Lars-Peter Clausen | 61bfbdb | 2010-07-15 20:06:04 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2009-2010, Lars-Peter Clausen <lars@metafoo.de> |
| 3 | * JZ4740 SD/MMC controller driver |
| 4 | * |
| 5 | * This program is free software; you can redistribute it and/or modify it |
| 6 | * under the terms of the GNU General Public License as published by the |
| 7 | * Free Software Foundation; either version 2 of the License, or (at your |
| 8 | * option) any later version. |
| 9 | * |
| 10 | * You should have received a copy of the GNU General Public License along |
| 11 | * with this program; if not, write to the Free Software Foundation, Inc., |
| 12 | * 675 Mass Ave, Cambridge, MA 02139, USA. |
| 13 | * |
| 14 | */ |
| 15 | |
| 16 | #include <linux/mmc/host.h> |
Lars-Peter Clausen | 58e300a | 2013-06-09 21:10:04 +0200 | [diff] [blame] | 17 | #include <linux/mmc/slot-gpio.h> |
Jamie Iles | 3119cbd | 2011-01-11 12:43:50 +0000 | [diff] [blame] | 18 | #include <linux/err.h> |
Lars-Peter Clausen | 61bfbdb | 2010-07-15 20:06:04 +0000 | [diff] [blame] | 19 | #include <linux/io.h> |
| 20 | #include <linux/irq.h> |
| 21 | #include <linux/interrupt.h> |
| 22 | #include <linux/module.h> |
| 23 | #include <linux/platform_device.h> |
| 24 | #include <linux/delay.h> |
| 25 | #include <linux/scatterlist.h> |
| 26 | #include <linux/clk.h> |
| 27 | |
| 28 | #include <linux/bitops.h> |
| 29 | #include <linux/gpio.h> |
| 30 | #include <asm/mach-jz4740/gpio.h> |
| 31 | #include <asm/cacheflush.h> |
| 32 | #include <linux/dma-mapping.h> |
Apelete Seketeli | 7ca27a6 | 2014-07-21 06:37:44 +0200 | [diff] [blame] | 33 | #include <linux/dmaengine.h> |
Lars-Peter Clausen | 61bfbdb | 2010-07-15 20:06:04 +0000 | [diff] [blame] | 34 | |
Apelete Seketeli | 7ca27a6 | 2014-07-21 06:37:44 +0200 | [diff] [blame] | 35 | #include <asm/mach-jz4740/dma.h> |
Lars-Peter Clausen | 61bfbdb | 2010-07-15 20:06:04 +0000 | [diff] [blame] | 36 | #include <asm/mach-jz4740/jz4740_mmc.h> |
| 37 | |
| 38 | #define JZ_REG_MMC_STRPCL 0x00 |
| 39 | #define JZ_REG_MMC_STATUS 0x04 |
| 40 | #define JZ_REG_MMC_CLKRT 0x08 |
| 41 | #define JZ_REG_MMC_CMDAT 0x0C |
| 42 | #define JZ_REG_MMC_RESTO 0x10 |
| 43 | #define JZ_REG_MMC_RDTO 0x14 |
| 44 | #define JZ_REG_MMC_BLKLEN 0x18 |
| 45 | #define JZ_REG_MMC_NOB 0x1C |
| 46 | #define JZ_REG_MMC_SNOB 0x20 |
| 47 | #define JZ_REG_MMC_IMASK 0x24 |
| 48 | #define JZ_REG_MMC_IREG 0x28 |
| 49 | #define JZ_REG_MMC_CMD 0x2C |
| 50 | #define JZ_REG_MMC_ARG 0x30 |
| 51 | #define JZ_REG_MMC_RESP_FIFO 0x34 |
| 52 | #define JZ_REG_MMC_RXFIFO 0x38 |
| 53 | #define JZ_REG_MMC_TXFIFO 0x3C |
| 54 | |
| 55 | #define JZ_MMC_STRPCL_EXIT_MULTIPLE BIT(7) |
| 56 | #define JZ_MMC_STRPCL_EXIT_TRANSFER BIT(6) |
| 57 | #define JZ_MMC_STRPCL_START_READWAIT BIT(5) |
| 58 | #define JZ_MMC_STRPCL_STOP_READWAIT BIT(4) |
| 59 | #define JZ_MMC_STRPCL_RESET BIT(3) |
| 60 | #define JZ_MMC_STRPCL_START_OP BIT(2) |
| 61 | #define JZ_MMC_STRPCL_CLOCK_CONTROL (BIT(1) | BIT(0)) |
| 62 | #define JZ_MMC_STRPCL_CLOCK_STOP BIT(0) |
| 63 | #define JZ_MMC_STRPCL_CLOCK_START BIT(1) |
| 64 | |
| 65 | |
| 66 | #define JZ_MMC_STATUS_IS_RESETTING BIT(15) |
| 67 | #define JZ_MMC_STATUS_SDIO_INT_ACTIVE BIT(14) |
| 68 | #define JZ_MMC_STATUS_PRG_DONE BIT(13) |
| 69 | #define JZ_MMC_STATUS_DATA_TRAN_DONE BIT(12) |
| 70 | #define JZ_MMC_STATUS_END_CMD_RES BIT(11) |
| 71 | #define JZ_MMC_STATUS_DATA_FIFO_AFULL BIT(10) |
| 72 | #define JZ_MMC_STATUS_IS_READWAIT BIT(9) |
| 73 | #define JZ_MMC_STATUS_CLK_EN BIT(8) |
| 74 | #define JZ_MMC_STATUS_DATA_FIFO_FULL BIT(7) |
| 75 | #define JZ_MMC_STATUS_DATA_FIFO_EMPTY BIT(6) |
| 76 | #define JZ_MMC_STATUS_CRC_RES_ERR BIT(5) |
| 77 | #define JZ_MMC_STATUS_CRC_READ_ERROR BIT(4) |
| 78 | #define JZ_MMC_STATUS_TIMEOUT_WRITE BIT(3) |
| 79 | #define JZ_MMC_STATUS_CRC_WRITE_ERROR BIT(2) |
| 80 | #define JZ_MMC_STATUS_TIMEOUT_RES BIT(1) |
| 81 | #define JZ_MMC_STATUS_TIMEOUT_READ BIT(0) |
| 82 | |
| 83 | #define JZ_MMC_STATUS_READ_ERROR_MASK (BIT(4) | BIT(0)) |
| 84 | #define JZ_MMC_STATUS_WRITE_ERROR_MASK (BIT(3) | BIT(2)) |
| 85 | |
| 86 | |
| 87 | #define JZ_MMC_CMDAT_IO_ABORT BIT(11) |
| 88 | #define JZ_MMC_CMDAT_BUS_WIDTH_4BIT BIT(10) |
| 89 | #define JZ_MMC_CMDAT_DMA_EN BIT(8) |
| 90 | #define JZ_MMC_CMDAT_INIT BIT(7) |
| 91 | #define JZ_MMC_CMDAT_BUSY BIT(6) |
| 92 | #define JZ_MMC_CMDAT_STREAM BIT(5) |
| 93 | #define JZ_MMC_CMDAT_WRITE BIT(4) |
| 94 | #define JZ_MMC_CMDAT_DATA_EN BIT(3) |
| 95 | #define JZ_MMC_CMDAT_RESPONSE_FORMAT (BIT(2) | BIT(1) | BIT(0)) |
| 96 | #define JZ_MMC_CMDAT_RSP_R1 1 |
| 97 | #define JZ_MMC_CMDAT_RSP_R2 2 |
| 98 | #define JZ_MMC_CMDAT_RSP_R3 3 |
| 99 | |
| 100 | #define JZ_MMC_IRQ_SDIO BIT(7) |
| 101 | #define JZ_MMC_IRQ_TXFIFO_WR_REQ BIT(6) |
| 102 | #define JZ_MMC_IRQ_RXFIFO_RD_REQ BIT(5) |
| 103 | #define JZ_MMC_IRQ_END_CMD_RES BIT(2) |
| 104 | #define JZ_MMC_IRQ_PRG_DONE BIT(1) |
| 105 | #define JZ_MMC_IRQ_DATA_TRAN_DONE BIT(0) |
| 106 | |
| 107 | |
| 108 | #define JZ_MMC_CLK_RATE 24000000 |
| 109 | |
| 110 | enum jz4740_mmc_state { |
| 111 | JZ4740_MMC_STATE_READ_RESPONSE, |
| 112 | JZ4740_MMC_STATE_TRANSFER_DATA, |
| 113 | JZ4740_MMC_STATE_SEND_STOP, |
| 114 | JZ4740_MMC_STATE_DONE, |
| 115 | }; |
| 116 | |
Apelete Seketeli | bb2f459 | 2014-07-21 06:37:45 +0200 | [diff] [blame] | 117 | struct jz4740_mmc_host_next { |
| 118 | int sg_len; |
| 119 | s32 cookie; |
| 120 | }; |
| 121 | |
Lars-Peter Clausen | 61bfbdb | 2010-07-15 20:06:04 +0000 | [diff] [blame] | 122 | struct jz4740_mmc_host { |
| 123 | struct mmc_host *mmc; |
| 124 | struct platform_device *pdev; |
| 125 | struct jz4740_mmc_platform_data *pdata; |
| 126 | struct clk *clk; |
| 127 | |
| 128 | int irq; |
| 129 | int card_detect_irq; |
| 130 | |
Lars-Peter Clausen | 61bfbdb | 2010-07-15 20:06:04 +0000 | [diff] [blame] | 131 | void __iomem *base; |
Apelete Seketeli | 7ca27a6 | 2014-07-21 06:37:44 +0200 | [diff] [blame] | 132 | struct resource *mem_res; |
Lars-Peter Clausen | 61bfbdb | 2010-07-15 20:06:04 +0000 | [diff] [blame] | 133 | struct mmc_request *req; |
| 134 | struct mmc_command *cmd; |
| 135 | |
| 136 | unsigned long waiting; |
| 137 | |
| 138 | uint32_t cmdat; |
| 139 | |
| 140 | uint16_t irq_mask; |
| 141 | |
| 142 | spinlock_t lock; |
| 143 | |
| 144 | struct timer_list timeout_timer; |
| 145 | struct sg_mapping_iter miter; |
| 146 | enum jz4740_mmc_state state; |
Apelete Seketeli | 7ca27a6 | 2014-07-21 06:37:44 +0200 | [diff] [blame] | 147 | |
| 148 | /* DMA support */ |
| 149 | struct dma_chan *dma_rx; |
| 150 | struct dma_chan *dma_tx; |
Apelete Seketeli | bb2f459 | 2014-07-21 06:37:45 +0200 | [diff] [blame] | 151 | struct jz4740_mmc_host_next next_data; |
Apelete Seketeli | 7ca27a6 | 2014-07-21 06:37:44 +0200 | [diff] [blame] | 152 | bool use_dma; |
| 153 | int sg_len; |
| 154 | |
| 155 | /* The DMA trigger level is 8 words, that is to say, the DMA read |
| 156 | * trigger is when data words in MSC_RXFIFO is >= 8 and the DMA write |
| 157 | * trigger is when data words in MSC_TXFIFO is < 8. |
| 158 | */ |
| 159 | #define JZ4740_MMC_FIFO_HALF_SIZE 8 |
Lars-Peter Clausen | 61bfbdb | 2010-07-15 20:06:04 +0000 | [diff] [blame] | 160 | }; |
| 161 | |
Apelete Seketeli | 7ca27a6 | 2014-07-21 06:37:44 +0200 | [diff] [blame] | 162 | /*----------------------------------------------------------------------------*/ |
| 163 | /* DMA infrastructure */ |
| 164 | |
| 165 | static void jz4740_mmc_release_dma_channels(struct jz4740_mmc_host *host) |
| 166 | { |
| 167 | if (!host->use_dma) |
| 168 | return; |
| 169 | |
| 170 | dma_release_channel(host->dma_tx); |
| 171 | dma_release_channel(host->dma_rx); |
| 172 | } |
| 173 | |
| 174 | static int jz4740_mmc_acquire_dma_channels(struct jz4740_mmc_host *host) |
| 175 | { |
| 176 | dma_cap_mask_t mask; |
| 177 | |
| 178 | dma_cap_zero(mask); |
| 179 | dma_cap_set(DMA_SLAVE, mask); |
| 180 | |
| 181 | host->dma_tx = dma_request_channel(mask, NULL, host); |
| 182 | if (!host->dma_tx) { |
| 183 | dev_err(mmc_dev(host->mmc), "Failed to get dma_tx channel\n"); |
| 184 | return -ENODEV; |
| 185 | } |
| 186 | |
| 187 | host->dma_rx = dma_request_channel(mask, NULL, host); |
| 188 | if (!host->dma_rx) { |
| 189 | dev_err(mmc_dev(host->mmc), "Failed to get dma_rx channel\n"); |
| 190 | goto free_master_write; |
| 191 | } |
| 192 | |
Apelete Seketeli | bb2f459 | 2014-07-21 06:37:45 +0200 | [diff] [blame] | 193 | /* Initialize DMA pre request cookie */ |
| 194 | host->next_data.cookie = 1; |
| 195 | |
Apelete Seketeli | 7ca27a6 | 2014-07-21 06:37:44 +0200 | [diff] [blame] | 196 | return 0; |
| 197 | |
| 198 | free_master_write: |
| 199 | dma_release_channel(host->dma_tx); |
| 200 | return -ENODEV; |
| 201 | } |
| 202 | |
| 203 | static inline int jz4740_mmc_get_dma_dir(struct mmc_data *data) |
| 204 | { |
| 205 | return (data->flags & MMC_DATA_READ) ? DMA_FROM_DEVICE : DMA_TO_DEVICE; |
| 206 | } |
| 207 | |
Apelete Seketeli | bb2f459 | 2014-07-21 06:37:45 +0200 | [diff] [blame] | 208 | static inline struct dma_chan *jz4740_mmc_get_dma_chan(struct jz4740_mmc_host *host, |
| 209 | struct mmc_data *data) |
| 210 | { |
| 211 | return (data->flags & MMC_DATA_READ) ? host->dma_rx : host->dma_tx; |
| 212 | } |
| 213 | |
Apelete Seketeli | 7ca27a6 | 2014-07-21 06:37:44 +0200 | [diff] [blame] | 214 | static void jz4740_mmc_dma_unmap(struct jz4740_mmc_host *host, |
| 215 | struct mmc_data *data) |
| 216 | { |
Apelete Seketeli | bb2f459 | 2014-07-21 06:37:45 +0200 | [diff] [blame] | 217 | struct dma_chan *chan = jz4740_mmc_get_dma_chan(host, data); |
Apelete Seketeli | 7ca27a6 | 2014-07-21 06:37:44 +0200 | [diff] [blame] | 218 | enum dma_data_direction dir = jz4740_mmc_get_dma_dir(data); |
| 219 | |
Apelete Seketeli | 7ca27a6 | 2014-07-21 06:37:44 +0200 | [diff] [blame] | 220 | dma_unmap_sg(chan->device->dev, data->sg, data->sg_len, dir); |
| 221 | } |
| 222 | |
Apelete Seketeli | bb2f459 | 2014-07-21 06:37:45 +0200 | [diff] [blame] | 223 | /* Prepares DMA data for current/next transfer, returns non-zero on failure */ |
| 224 | static int jz4740_mmc_prepare_dma_data(struct jz4740_mmc_host *host, |
| 225 | struct mmc_data *data, |
| 226 | struct jz4740_mmc_host_next *next, |
| 227 | struct dma_chan *chan) |
| 228 | { |
| 229 | struct jz4740_mmc_host_next *next_data = &host->next_data; |
| 230 | enum dma_data_direction dir = jz4740_mmc_get_dma_dir(data); |
| 231 | int sg_len; |
| 232 | |
| 233 | if (!next && data->host_cookie && |
| 234 | data->host_cookie != host->next_data.cookie) { |
| 235 | dev_warn(mmc_dev(host->mmc), |
| 236 | "[%s] invalid cookie: data->host_cookie %d host->next_data.cookie %d\n", |
| 237 | __func__, |
| 238 | data->host_cookie, |
| 239 | host->next_data.cookie); |
| 240 | data->host_cookie = 0; |
| 241 | } |
| 242 | |
| 243 | /* Check if next job is already prepared */ |
| 244 | if (next || data->host_cookie != host->next_data.cookie) { |
| 245 | sg_len = dma_map_sg(chan->device->dev, |
| 246 | data->sg, |
| 247 | data->sg_len, |
| 248 | dir); |
| 249 | |
| 250 | } else { |
| 251 | sg_len = next_data->sg_len; |
| 252 | next_data->sg_len = 0; |
| 253 | } |
| 254 | |
| 255 | if (sg_len <= 0) { |
| 256 | dev_err(mmc_dev(host->mmc), |
| 257 | "Failed to map scatterlist for DMA operation\n"); |
| 258 | return -EINVAL; |
| 259 | } |
| 260 | |
| 261 | if (next) { |
| 262 | next->sg_len = sg_len; |
| 263 | data->host_cookie = ++next->cookie < 0 ? 1 : next->cookie; |
| 264 | } else |
| 265 | host->sg_len = sg_len; |
| 266 | |
| 267 | return 0; |
| 268 | } |
| 269 | |
Apelete Seketeli | 7ca27a6 | 2014-07-21 06:37:44 +0200 | [diff] [blame] | 270 | static int jz4740_mmc_start_dma_transfer(struct jz4740_mmc_host *host, |
| 271 | struct mmc_data *data) |
| 272 | { |
Apelete Seketeli | bb2f459 | 2014-07-21 06:37:45 +0200 | [diff] [blame] | 273 | int ret; |
Apelete Seketeli | 7ca27a6 | 2014-07-21 06:37:44 +0200 | [diff] [blame] | 274 | struct dma_chan *chan; |
| 275 | struct dma_async_tx_descriptor *desc; |
| 276 | struct dma_slave_config conf = { |
| 277 | .src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES, |
| 278 | .dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES, |
| 279 | .src_maxburst = JZ4740_MMC_FIFO_HALF_SIZE, |
| 280 | .dst_maxburst = JZ4740_MMC_FIFO_HALF_SIZE, |
| 281 | }; |
Apelete Seketeli | 7ca27a6 | 2014-07-21 06:37:44 +0200 | [diff] [blame] | 282 | |
Apelete Seketeli | bb2f459 | 2014-07-21 06:37:45 +0200 | [diff] [blame] | 283 | if (data->flags & MMC_DATA_WRITE) { |
Apelete Seketeli | 7ca27a6 | 2014-07-21 06:37:44 +0200 | [diff] [blame] | 284 | conf.direction = DMA_MEM_TO_DEV; |
| 285 | conf.dst_addr = host->mem_res->start + JZ_REG_MMC_TXFIFO; |
| 286 | conf.slave_id = JZ4740_DMA_TYPE_MMC_TRANSMIT; |
| 287 | chan = host->dma_tx; |
| 288 | } else { |
| 289 | conf.direction = DMA_DEV_TO_MEM; |
| 290 | conf.src_addr = host->mem_res->start + JZ_REG_MMC_RXFIFO; |
| 291 | conf.slave_id = JZ4740_DMA_TYPE_MMC_RECEIVE; |
| 292 | chan = host->dma_rx; |
| 293 | } |
| 294 | |
Apelete Seketeli | bb2f459 | 2014-07-21 06:37:45 +0200 | [diff] [blame] | 295 | ret = jz4740_mmc_prepare_dma_data(host, data, NULL, chan); |
| 296 | if (ret) |
| 297 | return ret; |
Apelete Seketeli | 7ca27a6 | 2014-07-21 06:37:44 +0200 | [diff] [blame] | 298 | |
| 299 | dmaengine_slave_config(chan, &conf); |
| 300 | desc = dmaengine_prep_slave_sg(chan, |
| 301 | data->sg, |
| 302 | host->sg_len, |
| 303 | conf.direction, |
| 304 | DMA_PREP_INTERRUPT | DMA_CTRL_ACK); |
| 305 | if (!desc) { |
| 306 | dev_err(mmc_dev(host->mmc), |
| 307 | "Failed to allocate DMA %s descriptor", |
| 308 | conf.direction == DMA_MEM_TO_DEV ? "TX" : "RX"); |
| 309 | goto dma_unmap; |
| 310 | } |
| 311 | |
| 312 | dmaengine_submit(desc); |
| 313 | dma_async_issue_pending(chan); |
| 314 | |
| 315 | return 0; |
| 316 | |
| 317 | dma_unmap: |
| 318 | jz4740_mmc_dma_unmap(host, data); |
| 319 | return -ENOMEM; |
| 320 | } |
| 321 | |
Apelete Seketeli | bb2f459 | 2014-07-21 06:37:45 +0200 | [diff] [blame] | 322 | static void jz4740_mmc_pre_request(struct mmc_host *mmc, |
| 323 | struct mmc_request *mrq, |
| 324 | bool is_first_req) |
| 325 | { |
| 326 | struct jz4740_mmc_host *host = mmc_priv(mmc); |
| 327 | struct mmc_data *data = mrq->data; |
| 328 | struct jz4740_mmc_host_next *next_data = &host->next_data; |
| 329 | |
| 330 | BUG_ON(data->host_cookie); |
| 331 | |
| 332 | if (host->use_dma) { |
| 333 | struct dma_chan *chan = jz4740_mmc_get_dma_chan(host, data); |
| 334 | |
| 335 | if (jz4740_mmc_prepare_dma_data(host, data, next_data, chan)) |
| 336 | data->host_cookie = 0; |
| 337 | } |
| 338 | } |
| 339 | |
| 340 | static void jz4740_mmc_post_request(struct mmc_host *mmc, |
| 341 | struct mmc_request *mrq, |
| 342 | int err) |
| 343 | { |
| 344 | struct jz4740_mmc_host *host = mmc_priv(mmc); |
| 345 | struct mmc_data *data = mrq->data; |
| 346 | |
| 347 | if (host->use_dma && data->host_cookie) { |
| 348 | jz4740_mmc_dma_unmap(host, data); |
| 349 | data->host_cookie = 0; |
| 350 | } |
| 351 | |
| 352 | if (err) { |
| 353 | struct dma_chan *chan = jz4740_mmc_get_dma_chan(host, data); |
| 354 | |
| 355 | dmaengine_terminate_all(chan); |
| 356 | } |
| 357 | } |
| 358 | |
Apelete Seketeli | 7ca27a6 | 2014-07-21 06:37:44 +0200 | [diff] [blame] | 359 | /*----------------------------------------------------------------------------*/ |
| 360 | |
Lars-Peter Clausen | 61bfbdb | 2010-07-15 20:06:04 +0000 | [diff] [blame] | 361 | static void jz4740_mmc_set_irq_enabled(struct jz4740_mmc_host *host, |
| 362 | unsigned int irq, bool enabled) |
| 363 | { |
| 364 | unsigned long flags; |
| 365 | |
| 366 | spin_lock_irqsave(&host->lock, flags); |
| 367 | if (enabled) |
| 368 | host->irq_mask &= ~irq; |
| 369 | else |
| 370 | host->irq_mask |= irq; |
| 371 | spin_unlock_irqrestore(&host->lock, flags); |
| 372 | |
| 373 | writew(host->irq_mask, host->base + JZ_REG_MMC_IMASK); |
| 374 | } |
| 375 | |
| 376 | static void jz4740_mmc_clock_enable(struct jz4740_mmc_host *host, |
| 377 | bool start_transfer) |
| 378 | { |
| 379 | uint16_t val = JZ_MMC_STRPCL_CLOCK_START; |
| 380 | |
| 381 | if (start_transfer) |
| 382 | val |= JZ_MMC_STRPCL_START_OP; |
| 383 | |
| 384 | writew(val, host->base + JZ_REG_MMC_STRPCL); |
| 385 | } |
| 386 | |
| 387 | static void jz4740_mmc_clock_disable(struct jz4740_mmc_host *host) |
| 388 | { |
| 389 | uint32_t status; |
| 390 | unsigned int timeout = 1000; |
| 391 | |
| 392 | writew(JZ_MMC_STRPCL_CLOCK_STOP, host->base + JZ_REG_MMC_STRPCL); |
| 393 | do { |
| 394 | status = readl(host->base + JZ_REG_MMC_STATUS); |
| 395 | } while (status & JZ_MMC_STATUS_CLK_EN && --timeout); |
| 396 | } |
| 397 | |
| 398 | static void jz4740_mmc_reset(struct jz4740_mmc_host *host) |
| 399 | { |
| 400 | uint32_t status; |
| 401 | unsigned int timeout = 1000; |
| 402 | |
| 403 | writew(JZ_MMC_STRPCL_RESET, host->base + JZ_REG_MMC_STRPCL); |
| 404 | udelay(10); |
| 405 | do { |
| 406 | status = readl(host->base + JZ_REG_MMC_STATUS); |
| 407 | } while (status & JZ_MMC_STATUS_IS_RESETTING && --timeout); |
| 408 | } |
| 409 | |
| 410 | static void jz4740_mmc_request_done(struct jz4740_mmc_host *host) |
| 411 | { |
| 412 | struct mmc_request *req; |
| 413 | |
| 414 | req = host->req; |
| 415 | host->req = NULL; |
| 416 | |
| 417 | mmc_request_done(host->mmc, req); |
| 418 | } |
| 419 | |
| 420 | static unsigned int jz4740_mmc_poll_irq(struct jz4740_mmc_host *host, |
| 421 | unsigned int irq) |
| 422 | { |
| 423 | unsigned int timeout = 0x800; |
| 424 | uint16_t status; |
| 425 | |
| 426 | do { |
| 427 | status = readw(host->base + JZ_REG_MMC_IREG); |
| 428 | } while (!(status & irq) && --timeout); |
| 429 | |
| 430 | if (timeout == 0) { |
| 431 | set_bit(0, &host->waiting); |
| 432 | mod_timer(&host->timeout_timer, jiffies + 5*HZ); |
| 433 | jz4740_mmc_set_irq_enabled(host, irq, true); |
| 434 | return true; |
| 435 | } |
| 436 | |
| 437 | return false; |
| 438 | } |
| 439 | |
| 440 | static void jz4740_mmc_transfer_check_state(struct jz4740_mmc_host *host, |
| 441 | struct mmc_data *data) |
| 442 | { |
| 443 | int status; |
| 444 | |
| 445 | status = readl(host->base + JZ_REG_MMC_STATUS); |
| 446 | if (status & JZ_MMC_STATUS_WRITE_ERROR_MASK) { |
| 447 | if (status & (JZ_MMC_STATUS_TIMEOUT_WRITE)) { |
| 448 | host->req->cmd->error = -ETIMEDOUT; |
| 449 | data->error = -ETIMEDOUT; |
| 450 | } else { |
| 451 | host->req->cmd->error = -EIO; |
| 452 | data->error = -EIO; |
| 453 | } |
Paul Cercueil | 8a489aa | 2013-06-09 21:10:02 +0200 | [diff] [blame] | 454 | } else if (status & JZ_MMC_STATUS_READ_ERROR_MASK) { |
| 455 | if (status & (JZ_MMC_STATUS_TIMEOUT_READ)) { |
| 456 | host->req->cmd->error = -ETIMEDOUT; |
| 457 | data->error = -ETIMEDOUT; |
| 458 | } else { |
| 459 | host->req->cmd->error = -EIO; |
| 460 | data->error = -EIO; |
| 461 | } |
Lars-Peter Clausen | 61bfbdb | 2010-07-15 20:06:04 +0000 | [diff] [blame] | 462 | } |
| 463 | } |
| 464 | |
| 465 | static bool jz4740_mmc_write_data(struct jz4740_mmc_host *host, |
| 466 | struct mmc_data *data) |
| 467 | { |
| 468 | struct sg_mapping_iter *miter = &host->miter; |
| 469 | void __iomem *fifo_addr = host->base + JZ_REG_MMC_TXFIFO; |
| 470 | uint32_t *buf; |
| 471 | bool timeout; |
| 472 | size_t i, j; |
| 473 | |
| 474 | while (sg_miter_next(miter)) { |
| 475 | buf = miter->addr; |
| 476 | i = miter->length / 4; |
| 477 | j = i / 8; |
| 478 | i = i & 0x7; |
| 479 | while (j) { |
| 480 | timeout = jz4740_mmc_poll_irq(host, JZ_MMC_IRQ_TXFIFO_WR_REQ); |
| 481 | if (unlikely(timeout)) |
| 482 | goto poll_timeout; |
| 483 | |
| 484 | writel(buf[0], fifo_addr); |
| 485 | writel(buf[1], fifo_addr); |
| 486 | writel(buf[2], fifo_addr); |
| 487 | writel(buf[3], fifo_addr); |
| 488 | writel(buf[4], fifo_addr); |
| 489 | writel(buf[5], fifo_addr); |
| 490 | writel(buf[6], fifo_addr); |
| 491 | writel(buf[7], fifo_addr); |
| 492 | buf += 8; |
| 493 | --j; |
| 494 | } |
| 495 | if (unlikely(i)) { |
| 496 | timeout = jz4740_mmc_poll_irq(host, JZ_MMC_IRQ_TXFIFO_WR_REQ); |
| 497 | if (unlikely(timeout)) |
| 498 | goto poll_timeout; |
| 499 | |
| 500 | while (i) { |
| 501 | writel(*buf, fifo_addr); |
| 502 | ++buf; |
| 503 | --i; |
| 504 | } |
| 505 | } |
| 506 | data->bytes_xfered += miter->length; |
| 507 | } |
| 508 | sg_miter_stop(miter); |
| 509 | |
| 510 | return false; |
| 511 | |
| 512 | poll_timeout: |
| 513 | miter->consumed = (void *)buf - miter->addr; |
| 514 | data->bytes_xfered += miter->consumed; |
| 515 | sg_miter_stop(miter); |
| 516 | |
| 517 | return true; |
| 518 | } |
| 519 | |
| 520 | static bool jz4740_mmc_read_data(struct jz4740_mmc_host *host, |
| 521 | struct mmc_data *data) |
| 522 | { |
| 523 | struct sg_mapping_iter *miter = &host->miter; |
| 524 | void __iomem *fifo_addr = host->base + JZ_REG_MMC_RXFIFO; |
| 525 | uint32_t *buf; |
| 526 | uint32_t d; |
| 527 | uint16_t status; |
| 528 | size_t i, j; |
| 529 | unsigned int timeout; |
| 530 | |
| 531 | while (sg_miter_next(miter)) { |
| 532 | buf = miter->addr; |
| 533 | i = miter->length; |
| 534 | j = i / 32; |
| 535 | i = i & 0x1f; |
| 536 | while (j) { |
| 537 | timeout = jz4740_mmc_poll_irq(host, JZ_MMC_IRQ_RXFIFO_RD_REQ); |
| 538 | if (unlikely(timeout)) |
| 539 | goto poll_timeout; |
| 540 | |
| 541 | buf[0] = readl(fifo_addr); |
| 542 | buf[1] = readl(fifo_addr); |
| 543 | buf[2] = readl(fifo_addr); |
| 544 | buf[3] = readl(fifo_addr); |
| 545 | buf[4] = readl(fifo_addr); |
| 546 | buf[5] = readl(fifo_addr); |
| 547 | buf[6] = readl(fifo_addr); |
| 548 | buf[7] = readl(fifo_addr); |
| 549 | |
| 550 | buf += 8; |
| 551 | --j; |
| 552 | } |
| 553 | |
| 554 | if (unlikely(i)) { |
| 555 | timeout = jz4740_mmc_poll_irq(host, JZ_MMC_IRQ_RXFIFO_RD_REQ); |
| 556 | if (unlikely(timeout)) |
| 557 | goto poll_timeout; |
| 558 | |
| 559 | while (i >= 4) { |
| 560 | *buf++ = readl(fifo_addr); |
| 561 | i -= 4; |
| 562 | } |
| 563 | if (unlikely(i > 0)) { |
| 564 | d = readl(fifo_addr); |
| 565 | memcpy(buf, &d, i); |
| 566 | } |
| 567 | } |
| 568 | data->bytes_xfered += miter->length; |
| 569 | |
| 570 | /* This can go away once MIPS implements |
| 571 | * flush_kernel_dcache_page */ |
| 572 | flush_dcache_page(miter->page); |
| 573 | } |
| 574 | sg_miter_stop(miter); |
| 575 | |
| 576 | /* For whatever reason there is sometime one word more in the fifo then |
| 577 | * requested */ |
| 578 | timeout = 1000; |
| 579 | status = readl(host->base + JZ_REG_MMC_STATUS); |
| 580 | while (!(status & JZ_MMC_STATUS_DATA_FIFO_EMPTY) && --timeout) { |
| 581 | d = readl(fifo_addr); |
| 582 | status = readl(host->base + JZ_REG_MMC_STATUS); |
| 583 | } |
| 584 | |
| 585 | return false; |
| 586 | |
| 587 | poll_timeout: |
| 588 | miter->consumed = (void *)buf - miter->addr; |
| 589 | data->bytes_xfered += miter->consumed; |
| 590 | sg_miter_stop(miter); |
| 591 | |
| 592 | return true; |
| 593 | } |
| 594 | |
| 595 | static void jz4740_mmc_timeout(unsigned long data) |
| 596 | { |
| 597 | struct jz4740_mmc_host *host = (struct jz4740_mmc_host *)data; |
| 598 | |
| 599 | if (!test_and_clear_bit(0, &host->waiting)) |
| 600 | return; |
| 601 | |
| 602 | jz4740_mmc_set_irq_enabled(host, JZ_MMC_IRQ_END_CMD_RES, false); |
| 603 | |
| 604 | host->req->cmd->error = -ETIMEDOUT; |
| 605 | jz4740_mmc_request_done(host); |
| 606 | } |
| 607 | |
| 608 | static void jz4740_mmc_read_response(struct jz4740_mmc_host *host, |
| 609 | struct mmc_command *cmd) |
| 610 | { |
| 611 | int i; |
| 612 | uint16_t tmp; |
| 613 | void __iomem *fifo_addr = host->base + JZ_REG_MMC_RESP_FIFO; |
| 614 | |
| 615 | if (cmd->flags & MMC_RSP_136) { |
| 616 | tmp = readw(fifo_addr); |
| 617 | for (i = 0; i < 4; ++i) { |
| 618 | cmd->resp[i] = tmp << 24; |
| 619 | tmp = readw(fifo_addr); |
| 620 | cmd->resp[i] |= tmp << 8; |
| 621 | tmp = readw(fifo_addr); |
| 622 | cmd->resp[i] |= tmp >> 8; |
| 623 | } |
| 624 | } else { |
| 625 | cmd->resp[0] = readw(fifo_addr) << 24; |
| 626 | cmd->resp[0] |= readw(fifo_addr) << 8; |
| 627 | cmd->resp[0] |= readw(fifo_addr) & 0xff; |
| 628 | } |
| 629 | } |
| 630 | |
| 631 | static void jz4740_mmc_send_command(struct jz4740_mmc_host *host, |
| 632 | struct mmc_command *cmd) |
| 633 | { |
| 634 | uint32_t cmdat = host->cmdat; |
| 635 | |
| 636 | host->cmdat &= ~JZ_MMC_CMDAT_INIT; |
| 637 | jz4740_mmc_clock_disable(host); |
| 638 | |
| 639 | host->cmd = cmd; |
| 640 | |
| 641 | if (cmd->flags & MMC_RSP_BUSY) |
| 642 | cmdat |= JZ_MMC_CMDAT_BUSY; |
| 643 | |
| 644 | switch (mmc_resp_type(cmd)) { |
| 645 | case MMC_RSP_R1B: |
| 646 | case MMC_RSP_R1: |
| 647 | cmdat |= JZ_MMC_CMDAT_RSP_R1; |
| 648 | break; |
| 649 | case MMC_RSP_R2: |
| 650 | cmdat |= JZ_MMC_CMDAT_RSP_R2; |
| 651 | break; |
| 652 | case MMC_RSP_R3: |
| 653 | cmdat |= JZ_MMC_CMDAT_RSP_R3; |
| 654 | break; |
| 655 | default: |
| 656 | break; |
| 657 | } |
| 658 | |
| 659 | if (cmd->data) { |
| 660 | cmdat |= JZ_MMC_CMDAT_DATA_EN; |
| 661 | if (cmd->data->flags & MMC_DATA_WRITE) |
| 662 | cmdat |= JZ_MMC_CMDAT_WRITE; |
Apelete Seketeli | 7ca27a6 | 2014-07-21 06:37:44 +0200 | [diff] [blame] | 663 | if (host->use_dma) |
| 664 | cmdat |= JZ_MMC_CMDAT_DMA_EN; |
Lars-Peter Clausen | 61bfbdb | 2010-07-15 20:06:04 +0000 | [diff] [blame] | 665 | |
| 666 | writew(cmd->data->blksz, host->base + JZ_REG_MMC_BLKLEN); |
| 667 | writew(cmd->data->blocks, host->base + JZ_REG_MMC_NOB); |
| 668 | } |
| 669 | |
| 670 | writeb(cmd->opcode, host->base + JZ_REG_MMC_CMD); |
| 671 | writel(cmd->arg, host->base + JZ_REG_MMC_ARG); |
| 672 | writel(cmdat, host->base + JZ_REG_MMC_CMDAT); |
| 673 | |
| 674 | jz4740_mmc_clock_enable(host, 1); |
| 675 | } |
| 676 | |
| 677 | static void jz_mmc_prepare_data_transfer(struct jz4740_mmc_host *host) |
| 678 | { |
| 679 | struct mmc_command *cmd = host->req->cmd; |
| 680 | struct mmc_data *data = cmd->data; |
| 681 | int direction; |
| 682 | |
| 683 | if (data->flags & MMC_DATA_READ) |
| 684 | direction = SG_MITER_TO_SG; |
| 685 | else |
| 686 | direction = SG_MITER_FROM_SG; |
| 687 | |
| 688 | sg_miter_start(&host->miter, data->sg, data->sg_len, direction); |
| 689 | } |
| 690 | |
| 691 | |
| 692 | static irqreturn_t jz_mmc_irq_worker(int irq, void *devid) |
| 693 | { |
| 694 | struct jz4740_mmc_host *host = (struct jz4740_mmc_host *)devid; |
| 695 | struct mmc_command *cmd = host->req->cmd; |
| 696 | struct mmc_request *req = host->req; |
Apelete Seketeli | 7ca27a6 | 2014-07-21 06:37:44 +0200 | [diff] [blame] | 697 | struct mmc_data *data = cmd->data; |
Lars-Peter Clausen | 61bfbdb | 2010-07-15 20:06:04 +0000 | [diff] [blame] | 698 | bool timeout = false; |
| 699 | |
| 700 | if (cmd->error) |
| 701 | host->state = JZ4740_MMC_STATE_DONE; |
| 702 | |
| 703 | switch (host->state) { |
| 704 | case JZ4740_MMC_STATE_READ_RESPONSE: |
| 705 | if (cmd->flags & MMC_RSP_PRESENT) |
| 706 | jz4740_mmc_read_response(host, cmd); |
| 707 | |
Apelete Seketeli | 7ca27a6 | 2014-07-21 06:37:44 +0200 | [diff] [blame] | 708 | if (!data) |
Lars-Peter Clausen | 61bfbdb | 2010-07-15 20:06:04 +0000 | [diff] [blame] | 709 | break; |
| 710 | |
| 711 | jz_mmc_prepare_data_transfer(host); |
| 712 | |
| 713 | case JZ4740_MMC_STATE_TRANSFER_DATA: |
Apelete Seketeli | 7ca27a6 | 2014-07-21 06:37:44 +0200 | [diff] [blame] | 714 | if (host->use_dma) { |
Apelete Seketeli | bb2f459 | 2014-07-21 06:37:45 +0200 | [diff] [blame] | 715 | /* Use DMA if enabled. |
| 716 | * Data transfer direction is defined later by |
| 717 | * relying on data flags in |
| 718 | * jz4740_mmc_prepare_dma_data() and |
| 719 | * jz4740_mmc_start_dma_transfer(). |
Apelete Seketeli | 7ca27a6 | 2014-07-21 06:37:44 +0200 | [diff] [blame] | 720 | */ |
| 721 | timeout = jz4740_mmc_start_dma_transfer(host, data); |
| 722 | data->bytes_xfered = data->blocks * data->blksz; |
| 723 | } else if (data->flags & MMC_DATA_READ) |
Apelete Seketeli | bb2f459 | 2014-07-21 06:37:45 +0200 | [diff] [blame] | 724 | /* Use PIO if DMA is not enabled. |
| 725 | * Data transfer direction was defined before |
| 726 | * by relying on data flags in |
| 727 | * jz_mmc_prepare_data_transfer(). |
Apelete Seketeli | 7ca27a6 | 2014-07-21 06:37:44 +0200 | [diff] [blame] | 728 | */ |
| 729 | timeout = jz4740_mmc_read_data(host, data); |
Lars-Peter Clausen | 61bfbdb | 2010-07-15 20:06:04 +0000 | [diff] [blame] | 730 | else |
Apelete Seketeli | 7ca27a6 | 2014-07-21 06:37:44 +0200 | [diff] [blame] | 731 | timeout = jz4740_mmc_write_data(host, data); |
Lars-Peter Clausen | 61bfbdb | 2010-07-15 20:06:04 +0000 | [diff] [blame] | 732 | |
| 733 | if (unlikely(timeout)) { |
| 734 | host->state = JZ4740_MMC_STATE_TRANSFER_DATA; |
| 735 | break; |
| 736 | } |
| 737 | |
Apelete Seketeli | 7ca27a6 | 2014-07-21 06:37:44 +0200 | [diff] [blame] | 738 | jz4740_mmc_transfer_check_state(host, data); |
Lars-Peter Clausen | 61bfbdb | 2010-07-15 20:06:04 +0000 | [diff] [blame] | 739 | |
| 740 | timeout = jz4740_mmc_poll_irq(host, JZ_MMC_IRQ_DATA_TRAN_DONE); |
| 741 | if (unlikely(timeout)) { |
| 742 | host->state = JZ4740_MMC_STATE_SEND_STOP; |
| 743 | break; |
| 744 | } |
| 745 | writew(JZ_MMC_IRQ_DATA_TRAN_DONE, host->base + JZ_REG_MMC_IREG); |
| 746 | |
| 747 | case JZ4740_MMC_STATE_SEND_STOP: |
| 748 | if (!req->stop) |
| 749 | break; |
| 750 | |
| 751 | jz4740_mmc_send_command(host, req->stop); |
| 752 | |
Alex Smith | 1acee84 | 2014-04-29 13:54:54 +0100 | [diff] [blame] | 753 | if (mmc_resp_type(req->stop) & MMC_RSP_BUSY) { |
| 754 | timeout = jz4740_mmc_poll_irq(host, |
| 755 | JZ_MMC_IRQ_PRG_DONE); |
| 756 | if (timeout) { |
| 757 | host->state = JZ4740_MMC_STATE_DONE; |
| 758 | break; |
| 759 | } |
Lars-Peter Clausen | 61bfbdb | 2010-07-15 20:06:04 +0000 | [diff] [blame] | 760 | } |
| 761 | case JZ4740_MMC_STATE_DONE: |
| 762 | break; |
| 763 | } |
| 764 | |
| 765 | if (!timeout) |
| 766 | jz4740_mmc_request_done(host); |
| 767 | |
| 768 | return IRQ_HANDLED; |
| 769 | } |
| 770 | |
| 771 | static irqreturn_t jz_mmc_irq(int irq, void *devid) |
| 772 | { |
| 773 | struct jz4740_mmc_host *host = devid; |
| 774 | struct mmc_command *cmd = host->cmd; |
| 775 | uint16_t irq_reg, status, tmp; |
| 776 | |
| 777 | irq_reg = readw(host->base + JZ_REG_MMC_IREG); |
| 778 | |
| 779 | tmp = irq_reg; |
| 780 | irq_reg &= ~host->irq_mask; |
| 781 | |
| 782 | tmp &= ~(JZ_MMC_IRQ_TXFIFO_WR_REQ | JZ_MMC_IRQ_RXFIFO_RD_REQ | |
| 783 | JZ_MMC_IRQ_PRG_DONE | JZ_MMC_IRQ_DATA_TRAN_DONE); |
| 784 | |
| 785 | if (tmp != irq_reg) |
| 786 | writew(tmp & ~irq_reg, host->base + JZ_REG_MMC_IREG); |
| 787 | |
| 788 | if (irq_reg & JZ_MMC_IRQ_SDIO) { |
| 789 | writew(JZ_MMC_IRQ_SDIO, host->base + JZ_REG_MMC_IREG); |
| 790 | mmc_signal_sdio_irq(host->mmc); |
| 791 | irq_reg &= ~JZ_MMC_IRQ_SDIO; |
| 792 | } |
| 793 | |
| 794 | if (host->req && cmd && irq_reg) { |
| 795 | if (test_and_clear_bit(0, &host->waiting)) { |
| 796 | del_timer(&host->timeout_timer); |
| 797 | |
| 798 | status = readl(host->base + JZ_REG_MMC_STATUS); |
| 799 | |
| 800 | if (status & JZ_MMC_STATUS_TIMEOUT_RES) { |
| 801 | cmd->error = -ETIMEDOUT; |
| 802 | } else if (status & JZ_MMC_STATUS_CRC_RES_ERR) { |
| 803 | cmd->error = -EIO; |
| 804 | } else if (status & (JZ_MMC_STATUS_CRC_READ_ERROR | |
| 805 | JZ_MMC_STATUS_CRC_WRITE_ERROR)) { |
| 806 | if (cmd->data) |
| 807 | cmd->data->error = -EIO; |
| 808 | cmd->error = -EIO; |
Lars-Peter Clausen | 61bfbdb | 2010-07-15 20:06:04 +0000 | [diff] [blame] | 809 | } |
| 810 | |
| 811 | jz4740_mmc_set_irq_enabled(host, irq_reg, false); |
| 812 | writew(irq_reg, host->base + JZ_REG_MMC_IREG); |
| 813 | |
| 814 | return IRQ_WAKE_THREAD; |
| 815 | } |
| 816 | } |
| 817 | |
| 818 | return IRQ_HANDLED; |
| 819 | } |
| 820 | |
| 821 | static int jz4740_mmc_set_clock_rate(struct jz4740_mmc_host *host, int rate) |
| 822 | { |
| 823 | int div = 0; |
| 824 | int real_rate; |
| 825 | |
| 826 | jz4740_mmc_clock_disable(host); |
| 827 | clk_set_rate(host->clk, JZ_MMC_CLK_RATE); |
| 828 | |
| 829 | real_rate = clk_get_rate(host->clk); |
| 830 | |
| 831 | while (real_rate > rate && div < 7) { |
| 832 | ++div; |
| 833 | real_rate >>= 1; |
| 834 | } |
| 835 | |
| 836 | writew(div, host->base + JZ_REG_MMC_CLKRT); |
| 837 | return real_rate; |
| 838 | } |
| 839 | |
| 840 | static void jz4740_mmc_request(struct mmc_host *mmc, struct mmc_request *req) |
| 841 | { |
| 842 | struct jz4740_mmc_host *host = mmc_priv(mmc); |
| 843 | |
| 844 | host->req = req; |
| 845 | |
| 846 | writew(0xffff, host->base + JZ_REG_MMC_IREG); |
| 847 | |
| 848 | writew(JZ_MMC_IRQ_END_CMD_RES, host->base + JZ_REG_MMC_IREG); |
| 849 | jz4740_mmc_set_irq_enabled(host, JZ_MMC_IRQ_END_CMD_RES, true); |
| 850 | |
| 851 | host->state = JZ4740_MMC_STATE_READ_RESPONSE; |
| 852 | set_bit(0, &host->waiting); |
| 853 | mod_timer(&host->timeout_timer, jiffies + 5*HZ); |
| 854 | jz4740_mmc_send_command(host, req->cmd); |
| 855 | } |
| 856 | |
| 857 | static void jz4740_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) |
| 858 | { |
| 859 | struct jz4740_mmc_host *host = mmc_priv(mmc); |
| 860 | if (ios->clock) |
| 861 | jz4740_mmc_set_clock_rate(host, ios->clock); |
| 862 | |
| 863 | switch (ios->power_mode) { |
| 864 | case MMC_POWER_UP: |
| 865 | jz4740_mmc_reset(host); |
| 866 | if (gpio_is_valid(host->pdata->gpio_power)) |
| 867 | gpio_set_value(host->pdata->gpio_power, |
| 868 | !host->pdata->power_active_low); |
| 869 | host->cmdat |= JZ_MMC_CMDAT_INIT; |
Lars-Peter Clausen | fca9661 | 2013-05-12 20:12:38 +0200 | [diff] [blame] | 870 | clk_prepare_enable(host->clk); |
Lars-Peter Clausen | 61bfbdb | 2010-07-15 20:06:04 +0000 | [diff] [blame] | 871 | break; |
| 872 | case MMC_POWER_ON: |
| 873 | break; |
| 874 | default: |
| 875 | if (gpio_is_valid(host->pdata->gpio_power)) |
| 876 | gpio_set_value(host->pdata->gpio_power, |
| 877 | host->pdata->power_active_low); |
Lars-Peter Clausen | fca9661 | 2013-05-12 20:12:38 +0200 | [diff] [blame] | 878 | clk_disable_unprepare(host->clk); |
Lars-Peter Clausen | 61bfbdb | 2010-07-15 20:06:04 +0000 | [diff] [blame] | 879 | break; |
| 880 | } |
| 881 | |
| 882 | switch (ios->bus_width) { |
| 883 | case MMC_BUS_WIDTH_1: |
| 884 | host->cmdat &= ~JZ_MMC_CMDAT_BUS_WIDTH_4BIT; |
| 885 | break; |
| 886 | case MMC_BUS_WIDTH_4: |
| 887 | host->cmdat |= JZ_MMC_CMDAT_BUS_WIDTH_4BIT; |
| 888 | break; |
| 889 | default: |
| 890 | break; |
| 891 | } |
| 892 | } |
| 893 | |
Lars-Peter Clausen | 61bfbdb | 2010-07-15 20:06:04 +0000 | [diff] [blame] | 894 | static void jz4740_mmc_enable_sdio_irq(struct mmc_host *mmc, int enable) |
| 895 | { |
| 896 | struct jz4740_mmc_host *host = mmc_priv(mmc); |
| 897 | jz4740_mmc_set_irq_enabled(host, JZ_MMC_IRQ_SDIO, enable); |
| 898 | } |
| 899 | |
| 900 | static const struct mmc_host_ops jz4740_mmc_ops = { |
| 901 | .request = jz4740_mmc_request, |
Apelete Seketeli | bb2f459 | 2014-07-21 06:37:45 +0200 | [diff] [blame] | 902 | .pre_req = jz4740_mmc_pre_request, |
| 903 | .post_req = jz4740_mmc_post_request, |
Lars-Peter Clausen | 61bfbdb | 2010-07-15 20:06:04 +0000 | [diff] [blame] | 904 | .set_ios = jz4740_mmc_set_ios, |
Lars-Peter Clausen | 58e300a | 2013-06-09 21:10:04 +0200 | [diff] [blame] | 905 | .get_ro = mmc_gpio_get_ro, |
| 906 | .get_cd = mmc_gpio_get_cd, |
Lars-Peter Clausen | 61bfbdb | 2010-07-15 20:06:04 +0000 | [diff] [blame] | 907 | .enable_sdio_irq = jz4740_mmc_enable_sdio_irq, |
| 908 | }; |
| 909 | |
| 910 | static const struct jz_gpio_bulk_request jz4740_mmc_pins[] = { |
| 911 | JZ_GPIO_BULK_PIN(MSC_CMD), |
| 912 | JZ_GPIO_BULK_PIN(MSC_CLK), |
| 913 | JZ_GPIO_BULK_PIN(MSC_DATA0), |
| 914 | JZ_GPIO_BULK_PIN(MSC_DATA1), |
| 915 | JZ_GPIO_BULK_PIN(MSC_DATA2), |
| 916 | JZ_GPIO_BULK_PIN(MSC_DATA3), |
| 917 | }; |
| 918 | |
Bill Pemberton | c3be1ef | 2012-11-19 13:23:06 -0500 | [diff] [blame] | 919 | static int jz4740_mmc_request_gpio(struct device *dev, int gpio, |
Lars-Peter Clausen | 61bfbdb | 2010-07-15 20:06:04 +0000 | [diff] [blame] | 920 | const char *name, bool output, int value) |
| 921 | { |
| 922 | int ret; |
| 923 | |
| 924 | if (!gpio_is_valid(gpio)) |
| 925 | return 0; |
| 926 | |
| 927 | ret = gpio_request(gpio, name); |
| 928 | if (ret) { |
| 929 | dev_err(dev, "Failed to request %s gpio: %d\n", name, ret); |
| 930 | return ret; |
| 931 | } |
| 932 | |
| 933 | if (output) |
| 934 | gpio_direction_output(gpio, value); |
| 935 | else |
| 936 | gpio_direction_input(gpio); |
| 937 | |
| 938 | return 0; |
| 939 | } |
| 940 | |
Lars-Peter Clausen | 58e300a | 2013-06-09 21:10:04 +0200 | [diff] [blame] | 941 | static int jz4740_mmc_request_gpios(struct mmc_host *mmc, |
| 942 | struct platform_device *pdev) |
Lars-Peter Clausen | 61bfbdb | 2010-07-15 20:06:04 +0000 | [diff] [blame] | 943 | { |
Lars-Peter Clausen | 61bfbdb | 2010-07-15 20:06:04 +0000 | [diff] [blame] | 944 | struct jz4740_mmc_platform_data *pdata = pdev->dev.platform_data; |
Lars-Peter Clausen | 58e300a | 2013-06-09 21:10:04 +0200 | [diff] [blame] | 945 | int ret = 0; |
Lars-Peter Clausen | 61bfbdb | 2010-07-15 20:06:04 +0000 | [diff] [blame] | 946 | |
| 947 | if (!pdata) |
| 948 | return 0; |
| 949 | |
Lars-Peter Clausen | 58e300a | 2013-06-09 21:10:04 +0200 | [diff] [blame] | 950 | if (!pdata->card_detect_active_low) |
| 951 | mmc->caps2 |= MMC_CAP2_CD_ACTIVE_HIGH; |
| 952 | if (!pdata->read_only_active_low) |
| 953 | mmc->caps2 |= MMC_CAP2_RO_ACTIVE_HIGH; |
Lars-Peter Clausen | 61bfbdb | 2010-07-15 20:06:04 +0000 | [diff] [blame] | 954 | |
Lars-Peter Clausen | 58e300a | 2013-06-09 21:10:04 +0200 | [diff] [blame] | 955 | if (gpio_is_valid(pdata->gpio_card_detect)) { |
Laurent Pinchart | 214fc30 | 2013-08-08 12:38:31 +0200 | [diff] [blame] | 956 | ret = mmc_gpio_request_cd(mmc, pdata->gpio_card_detect, 0); |
Lars-Peter Clausen | 58e300a | 2013-06-09 21:10:04 +0200 | [diff] [blame] | 957 | if (ret) |
| 958 | return ret; |
Lars-Peter Clausen | 61bfbdb | 2010-07-15 20:06:04 +0000 | [diff] [blame] | 959 | } |
| 960 | |
Lars-Peter Clausen | 58e300a | 2013-06-09 21:10:04 +0200 | [diff] [blame] | 961 | if (gpio_is_valid(pdata->gpio_read_only)) { |
| 962 | ret = mmc_gpio_request_ro(mmc, pdata->gpio_read_only); |
| 963 | if (ret) |
| 964 | return ret; |
| 965 | } |
| 966 | |
| 967 | return jz4740_mmc_request_gpio(&pdev->dev, pdata->gpio_power, |
| 968 | "MMC read only", true, pdata->power_active_low); |
Lars-Peter Clausen | 61bfbdb | 2010-07-15 20:06:04 +0000 | [diff] [blame] | 969 | } |
| 970 | |
| 971 | static void jz4740_mmc_free_gpios(struct platform_device *pdev) |
| 972 | { |
| 973 | struct jz4740_mmc_platform_data *pdata = pdev->dev.platform_data; |
| 974 | |
| 975 | if (!pdata) |
| 976 | return; |
| 977 | |
| 978 | if (gpio_is_valid(pdata->gpio_power)) |
| 979 | gpio_free(pdata->gpio_power); |
Lars-Peter Clausen | 61bfbdb | 2010-07-15 20:06:04 +0000 | [diff] [blame] | 980 | } |
| 981 | |
| 982 | static inline size_t jz4740_mmc_num_pins(struct jz4740_mmc_host *host) |
| 983 | { |
| 984 | size_t num_pins = ARRAY_SIZE(jz4740_mmc_pins); |
| 985 | if (host->pdata && host->pdata->data_1bit) |
| 986 | num_pins -= 3; |
| 987 | |
| 988 | return num_pins; |
| 989 | } |
| 990 | |
Bill Pemberton | c3be1ef | 2012-11-19 13:23:06 -0500 | [diff] [blame] | 991 | static int jz4740_mmc_probe(struct platform_device* pdev) |
Lars-Peter Clausen | 61bfbdb | 2010-07-15 20:06:04 +0000 | [diff] [blame] | 992 | { |
| 993 | int ret; |
| 994 | struct mmc_host *mmc; |
| 995 | struct jz4740_mmc_host *host; |
| 996 | struct jz4740_mmc_platform_data *pdata; |
| 997 | |
| 998 | pdata = pdev->dev.platform_data; |
| 999 | |
| 1000 | mmc = mmc_alloc_host(sizeof(struct jz4740_mmc_host), &pdev->dev); |
| 1001 | if (!mmc) { |
| 1002 | dev_err(&pdev->dev, "Failed to alloc mmc host structure\n"); |
| 1003 | return -ENOMEM; |
| 1004 | } |
| 1005 | |
| 1006 | host = mmc_priv(mmc); |
| 1007 | host->pdata = pdata; |
| 1008 | |
| 1009 | host->irq = platform_get_irq(pdev, 0); |
| 1010 | if (host->irq < 0) { |
| 1011 | ret = host->irq; |
| 1012 | dev_err(&pdev->dev, "Failed to get platform irq: %d\n", ret); |
| 1013 | goto err_free_host; |
| 1014 | } |
| 1015 | |
Lars-Peter Clausen | 017d84b | 2013-06-09 21:10:05 +0200 | [diff] [blame] | 1016 | host->clk = devm_clk_get(&pdev->dev, "mmc"); |
Jamie Iles | 3119cbd | 2011-01-11 12:43:50 +0000 | [diff] [blame] | 1017 | if (IS_ERR(host->clk)) { |
| 1018 | ret = PTR_ERR(host->clk); |
Lars-Peter Clausen | 61bfbdb | 2010-07-15 20:06:04 +0000 | [diff] [blame] | 1019 | dev_err(&pdev->dev, "Failed to get mmc clock\n"); |
| 1020 | goto err_free_host; |
| 1021 | } |
| 1022 | |
Apelete Seketeli | 7ca27a6 | 2014-07-21 06:37:44 +0200 | [diff] [blame] | 1023 | host->mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 1024 | host->base = devm_ioremap_resource(&pdev->dev, host->mem_res); |
Wei Yongjun | 3e7e8c1 | 2013-06-29 08:44:53 +0800 | [diff] [blame] | 1025 | if (IS_ERR(host->base)) { |
| 1026 | ret = PTR_ERR(host->base); |
Apelete Seketeli | 7ca27a6 | 2014-07-21 06:37:44 +0200 | [diff] [blame] | 1027 | dev_err(&pdev->dev, "Failed to ioremap base memory\n"); |
Lars-Peter Clausen | 017d84b | 2013-06-09 21:10:05 +0200 | [diff] [blame] | 1028 | goto err_free_host; |
Lars-Peter Clausen | 61bfbdb | 2010-07-15 20:06:04 +0000 | [diff] [blame] | 1029 | } |
| 1030 | |
| 1031 | ret = jz_gpio_bulk_request(jz4740_mmc_pins, jz4740_mmc_num_pins(host)); |
| 1032 | if (ret) { |
| 1033 | dev_err(&pdev->dev, "Failed to request mmc pins: %d\n", ret); |
Lars-Peter Clausen | 017d84b | 2013-06-09 21:10:05 +0200 | [diff] [blame] | 1034 | goto err_free_host; |
Lars-Peter Clausen | 61bfbdb | 2010-07-15 20:06:04 +0000 | [diff] [blame] | 1035 | } |
| 1036 | |
Lars-Peter Clausen | 58e300a | 2013-06-09 21:10:04 +0200 | [diff] [blame] | 1037 | ret = jz4740_mmc_request_gpios(mmc, pdev); |
Lars-Peter Clausen | 61bfbdb | 2010-07-15 20:06:04 +0000 | [diff] [blame] | 1038 | if (ret) |
| 1039 | goto err_gpio_bulk_free; |
| 1040 | |
| 1041 | mmc->ops = &jz4740_mmc_ops; |
| 1042 | mmc->f_min = JZ_MMC_CLK_RATE / 128; |
| 1043 | mmc->f_max = JZ_MMC_CLK_RATE; |
| 1044 | mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34; |
| 1045 | mmc->caps = (pdata && pdata->data_1bit) ? 0 : MMC_CAP_4_BIT_DATA; |
| 1046 | mmc->caps |= MMC_CAP_SDIO_IRQ; |
| 1047 | |
| 1048 | mmc->max_blk_size = (1 << 10) - 1; |
| 1049 | mmc->max_blk_count = (1 << 15) - 1; |
| 1050 | mmc->max_req_size = mmc->max_blk_size * mmc->max_blk_count; |
| 1051 | |
Martin K. Petersen | a36274e | 2010-09-10 01:33:59 -0400 | [diff] [blame] | 1052 | mmc->max_segs = 128; |
Lars-Peter Clausen | 61bfbdb | 2010-07-15 20:06:04 +0000 | [diff] [blame] | 1053 | mmc->max_seg_size = mmc->max_req_size; |
| 1054 | |
| 1055 | host->mmc = mmc; |
| 1056 | host->pdev = pdev; |
| 1057 | spin_lock_init(&host->lock); |
| 1058 | host->irq_mask = 0xffff; |
| 1059 | |
Lars-Peter Clausen | 61bfbdb | 2010-07-15 20:06:04 +0000 | [diff] [blame] | 1060 | ret = request_threaded_irq(host->irq, jz_mmc_irq, jz_mmc_irq_worker, 0, |
| 1061 | dev_name(&pdev->dev), host); |
| 1062 | if (ret) { |
| 1063 | dev_err(&pdev->dev, "Failed to request irq: %d\n", ret); |
Lars-Peter Clausen | 58e300a | 2013-06-09 21:10:04 +0200 | [diff] [blame] | 1064 | goto err_free_gpios; |
Lars-Peter Clausen | 61bfbdb | 2010-07-15 20:06:04 +0000 | [diff] [blame] | 1065 | } |
| 1066 | |
| 1067 | jz4740_mmc_reset(host); |
| 1068 | jz4740_mmc_clock_disable(host); |
| 1069 | setup_timer(&host->timeout_timer, jz4740_mmc_timeout, |
| 1070 | (unsigned long)host); |
| 1071 | /* It is not important when it times out, it just needs to timeout. */ |
| 1072 | set_timer_slack(&host->timeout_timer, HZ); |
| 1073 | |
Apelete Seketeli | 7ca27a6 | 2014-07-21 06:37:44 +0200 | [diff] [blame] | 1074 | host->use_dma = true; |
| 1075 | if (host->use_dma && jz4740_mmc_acquire_dma_channels(host) != 0) |
| 1076 | host->use_dma = false; |
| 1077 | |
Lars-Peter Clausen | 61bfbdb | 2010-07-15 20:06:04 +0000 | [diff] [blame] | 1078 | platform_set_drvdata(pdev, host); |
| 1079 | ret = mmc_add_host(mmc); |
| 1080 | |
| 1081 | if (ret) { |
| 1082 | dev_err(&pdev->dev, "Failed to add mmc host: %d\n", ret); |
| 1083 | goto err_free_irq; |
| 1084 | } |
| 1085 | dev_info(&pdev->dev, "JZ SD/MMC card driver registered\n"); |
| 1086 | |
Apelete Seketeli | 7ca27a6 | 2014-07-21 06:37:44 +0200 | [diff] [blame] | 1087 | dev_info(&pdev->dev, "Using %s, %d-bit mode\n", |
| 1088 | host->use_dma ? "DMA" : "PIO", |
| 1089 | (mmc->caps & MMC_CAP_4_BIT_DATA) ? 4 : 1); |
| 1090 | |
Lars-Peter Clausen | 61bfbdb | 2010-07-15 20:06:04 +0000 | [diff] [blame] | 1091 | return 0; |
| 1092 | |
| 1093 | err_free_irq: |
| 1094 | free_irq(host->irq, host); |
Lars-Peter Clausen | 61bfbdb | 2010-07-15 20:06:04 +0000 | [diff] [blame] | 1095 | err_free_gpios: |
| 1096 | jz4740_mmc_free_gpios(pdev); |
| 1097 | err_gpio_bulk_free: |
Apelete Seketeli | 7ca27a6 | 2014-07-21 06:37:44 +0200 | [diff] [blame] | 1098 | if (host->use_dma) |
| 1099 | jz4740_mmc_release_dma_channels(host); |
Lars-Peter Clausen | 61bfbdb | 2010-07-15 20:06:04 +0000 | [diff] [blame] | 1100 | jz_gpio_bulk_free(jz4740_mmc_pins, jz4740_mmc_num_pins(host)); |
Lars-Peter Clausen | 61bfbdb | 2010-07-15 20:06:04 +0000 | [diff] [blame] | 1101 | err_free_host: |
Lars-Peter Clausen | 61bfbdb | 2010-07-15 20:06:04 +0000 | [diff] [blame] | 1102 | mmc_free_host(mmc); |
| 1103 | |
| 1104 | return ret; |
| 1105 | } |
| 1106 | |
Bill Pemberton | 6e0ee71 | 2012-11-19 13:26:03 -0500 | [diff] [blame] | 1107 | static int jz4740_mmc_remove(struct platform_device *pdev) |
Lars-Peter Clausen | 61bfbdb | 2010-07-15 20:06:04 +0000 | [diff] [blame] | 1108 | { |
| 1109 | struct jz4740_mmc_host *host = platform_get_drvdata(pdev); |
| 1110 | |
| 1111 | del_timer_sync(&host->timeout_timer); |
| 1112 | jz4740_mmc_set_irq_enabled(host, 0xff, false); |
| 1113 | jz4740_mmc_reset(host); |
| 1114 | |
| 1115 | mmc_remove_host(host->mmc); |
| 1116 | |
| 1117 | free_irq(host->irq, host); |
Lars-Peter Clausen | 61bfbdb | 2010-07-15 20:06:04 +0000 | [diff] [blame] | 1118 | |
| 1119 | jz4740_mmc_free_gpios(pdev); |
| 1120 | jz_gpio_bulk_free(jz4740_mmc_pins, jz4740_mmc_num_pins(host)); |
| 1121 | |
Apelete Seketeli | 7ca27a6 | 2014-07-21 06:37:44 +0200 | [diff] [blame] | 1122 | if (host->use_dma) |
| 1123 | jz4740_mmc_release_dma_channels(host); |
| 1124 | |
Lars-Peter Clausen | 61bfbdb | 2010-07-15 20:06:04 +0000 | [diff] [blame] | 1125 | mmc_free_host(host->mmc); |
| 1126 | |
| 1127 | return 0; |
| 1128 | } |
| 1129 | |
Lars-Peter Clausen | 5d5c035 | 2013-06-09 21:10:03 +0200 | [diff] [blame] | 1130 | #ifdef CONFIG_PM_SLEEP |
Lars-Peter Clausen | 61bfbdb | 2010-07-15 20:06:04 +0000 | [diff] [blame] | 1131 | |
| 1132 | static int jz4740_mmc_suspend(struct device *dev) |
| 1133 | { |
| 1134 | struct jz4740_mmc_host *host = dev_get_drvdata(dev); |
| 1135 | |
Lars-Peter Clausen | 61bfbdb | 2010-07-15 20:06:04 +0000 | [diff] [blame] | 1136 | jz_gpio_bulk_suspend(jz4740_mmc_pins, jz4740_mmc_num_pins(host)); |
| 1137 | |
| 1138 | return 0; |
| 1139 | } |
| 1140 | |
| 1141 | static int jz4740_mmc_resume(struct device *dev) |
| 1142 | { |
| 1143 | struct jz4740_mmc_host *host = dev_get_drvdata(dev); |
| 1144 | |
| 1145 | jz_gpio_bulk_resume(jz4740_mmc_pins, jz4740_mmc_num_pins(host)); |
| 1146 | |
Lars-Peter Clausen | 61bfbdb | 2010-07-15 20:06:04 +0000 | [diff] [blame] | 1147 | return 0; |
| 1148 | } |
| 1149 | |
Lars-Peter Clausen | 5d5c035 | 2013-06-09 21:10:03 +0200 | [diff] [blame] | 1150 | static SIMPLE_DEV_PM_OPS(jz4740_mmc_pm_ops, jz4740_mmc_suspend, |
| 1151 | jz4740_mmc_resume); |
Lars-Peter Clausen | 61bfbdb | 2010-07-15 20:06:04 +0000 | [diff] [blame] | 1152 | #define JZ4740_MMC_PM_OPS (&jz4740_mmc_pm_ops) |
| 1153 | #else |
| 1154 | #define JZ4740_MMC_PM_OPS NULL |
| 1155 | #endif |
| 1156 | |
| 1157 | static struct platform_driver jz4740_mmc_driver = { |
| 1158 | .probe = jz4740_mmc_probe, |
Bill Pemberton | 0433c14 | 2012-11-19 13:20:26 -0500 | [diff] [blame] | 1159 | .remove = jz4740_mmc_remove, |
Lars-Peter Clausen | 61bfbdb | 2010-07-15 20:06:04 +0000 | [diff] [blame] | 1160 | .driver = { |
| 1161 | .name = "jz4740-mmc", |
Lars-Peter Clausen | 61bfbdb | 2010-07-15 20:06:04 +0000 | [diff] [blame] | 1162 | .pm = JZ4740_MMC_PM_OPS, |
| 1163 | }, |
| 1164 | }; |
| 1165 | |
Axel Lin | d1f81a6 | 2011-11-26 12:55:43 +0800 | [diff] [blame] | 1166 | module_platform_driver(jz4740_mmc_driver); |
Lars-Peter Clausen | 61bfbdb | 2010-07-15 20:06:04 +0000 | [diff] [blame] | 1167 | |
| 1168 | MODULE_DESCRIPTION("JZ4740 SD/MMC controller driver"); |
| 1169 | MODULE_LICENSE("GPL"); |
| 1170 | MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>"); |