blob: a20cbd9d325a687279c2b634b517bc711e0887f2 [file] [log] [blame]
Jeff Garzik5a25ba12006-09-01 03:12:19 -04001/*
2 * SuperTrak EX Series Storage Controller driver for Linux
3 *
4 * Copyright (C) 2005, 2006 Promise Technology Inc.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 *
11 * Written By:
12 * Ed Lin <promise_linux@promise.com>
13 *
Ed Linfb4f66b2006-09-27 19:23:41 +080014 * Version: 3.0.0.1
Jeff Garzik5a25ba12006-09-01 03:12:19 -040015 *
16 */
17
18#include <linux/init.h>
19#include <linux/errno.h>
20#include <linux/kernel.h>
21#include <linux/delay.h>
22#include <linux/sched.h>
23#include <linux/time.h>
24#include <linux/pci.h>
25#include <linux/blkdev.h>
26#include <linux/interrupt.h>
27#include <linux/types.h>
28#include <linux/module.h>
29#include <linux/spinlock.h>
30#include <asm/io.h>
31#include <asm/irq.h>
32#include <asm/byteorder.h>
33#include <scsi/scsi.h>
34#include <scsi/scsi_device.h>
35#include <scsi/scsi_cmnd.h>
36#include <scsi/scsi_host.h>
Ed Lincf355882006-09-01 14:31:51 +080037#include <scsi/scsi_tcq.h>
Jeff Garzik5a25ba12006-09-01 03:12:19 -040038
39#define DRV_NAME "stex"
Ed Linfb4f66b2006-09-27 19:23:41 +080040#define ST_DRIVER_VERSION "3.0.0.1"
41#define ST_VER_MAJOR 3
42#define ST_VER_MINOR 0
Jeff Garzik5a25ba12006-09-01 03:12:19 -040043#define ST_OEM 0
Ed Linfb4f66b2006-09-27 19:23:41 +080044#define ST_BUILD_VER 1
Jeff Garzik5a25ba12006-09-01 03:12:19 -040045
46enum {
47 /* MU register offset */
48 IMR0 = 0x10, /* MU_INBOUND_MESSAGE_REG0 */
49 IMR1 = 0x14, /* MU_INBOUND_MESSAGE_REG1 */
50 OMR0 = 0x18, /* MU_OUTBOUND_MESSAGE_REG0 */
51 OMR1 = 0x1c, /* MU_OUTBOUND_MESSAGE_REG1 */
52 IDBL = 0x20, /* MU_INBOUND_DOORBELL */
53 IIS = 0x24, /* MU_INBOUND_INTERRUPT_STATUS */
54 IIM = 0x28, /* MU_INBOUND_INTERRUPT_MASK */
55 ODBL = 0x2c, /* MU_OUTBOUND_DOORBELL */
56 OIS = 0x30, /* MU_OUTBOUND_INTERRUPT_STATUS */
57 OIM = 0x3c, /* MU_OUTBOUND_INTERRUPT_MASK */
58
59 /* MU register value */
60 MU_INBOUND_DOORBELL_HANDSHAKE = 1,
61 MU_INBOUND_DOORBELL_REQHEADCHANGED = 2,
62 MU_INBOUND_DOORBELL_STATUSTAILCHANGED = 4,
63 MU_INBOUND_DOORBELL_HMUSTOPPED = 8,
64 MU_INBOUND_DOORBELL_RESET = 16,
65
66 MU_OUTBOUND_DOORBELL_HANDSHAKE = 1,
67 MU_OUTBOUND_DOORBELL_REQUESTTAILCHANGED = 2,
68 MU_OUTBOUND_DOORBELL_STATUSHEADCHANGED = 4,
69 MU_OUTBOUND_DOORBELL_BUSCHANGE = 8,
70 MU_OUTBOUND_DOORBELL_HASEVENT = 16,
71
72 /* MU status code */
73 MU_STATE_STARTING = 1,
74 MU_STATE_FMU_READY_FOR_HANDSHAKE = 2,
75 MU_STATE_SEND_HANDSHAKE_FRAME = 3,
76 MU_STATE_STARTED = 4,
77 MU_STATE_RESETTING = 5,
78
79 MU_MAX_DELAY_TIME = 240000,
80 MU_HANDSHAKE_SIGNATURE = 0x55aaaa55,
Ed Lin529e7a62006-12-04 17:49:34 -080081 MU_HANDSHAKE_SIGNATURE_HALF = 0x5a5a0000,
Jeff Garzik5a25ba12006-09-01 03:12:19 -040082 HMU_PARTNER_TYPE = 2,
83
84 /* firmware returned values */
85 SRB_STATUS_SUCCESS = 0x01,
86 SRB_STATUS_ERROR = 0x04,
87 SRB_STATUS_BUSY = 0x05,
88 SRB_STATUS_INVALID_REQUEST = 0x06,
89 SRB_STATUS_SELECTION_TIMEOUT = 0x0A,
90 SRB_SEE_SENSE = 0x80,
91
92 /* task attribute */
93 TASK_ATTRIBUTE_SIMPLE = 0x0,
94 TASK_ATTRIBUTE_HEADOFQUEUE = 0x1,
95 TASK_ATTRIBUTE_ORDERED = 0x2,
96 TASK_ATTRIBUTE_ACA = 0x4,
97
98 /* request count, etc. */
99 MU_MAX_REQUEST = 32,
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400100
101 /* one message wasted, use MU_MAX_REQUEST+1
102 to handle MU_MAX_REQUEST messages */
103 MU_REQ_COUNT = (MU_MAX_REQUEST + 1),
104 MU_STATUS_COUNT = (MU_MAX_REQUEST + 1),
105
106 STEX_CDB_LENGTH = MAX_COMMAND_SIZE,
107 REQ_VARIABLE_LEN = 1024,
108 STATUS_VAR_LEN = 128,
109 ST_CAN_QUEUE = MU_MAX_REQUEST,
110 ST_CMD_PER_LUN = MU_MAX_REQUEST,
111 ST_MAX_SG = 32,
112
113 /* sg flags */
114 SG_CF_EOT = 0x80, /* end of table */
115 SG_CF_64B = 0x40, /* 64 bit item */
116 SG_CF_HOST = 0x20, /* sg in host memory */
117
118 ST_MAX_ARRAY_SUPPORTED = 16,
119 ST_MAX_TARGET_NUM = (ST_MAX_ARRAY_SUPPORTED+1),
120 ST_MAX_LUN_PER_TARGET = 16,
121
122 st_shasta = 0,
123 st_vsc = 1,
Ed Linfb4f66b2006-09-27 19:23:41 +0800124 st_yosemite = 2,
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400125
126 PASSTHRU_REQ_TYPE = 0x00000001,
127 PASSTHRU_REQ_NO_WAKEUP = 0x00000100,
128 ST_INTERNAL_TIMEOUT = 30,
129
Ed Linfb4f66b2006-09-27 19:23:41 +0800130 ST_TO_CMD = 0,
131 ST_FROM_CMD = 1,
132
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400133 /* vendor specific commands of Promise */
Ed Linfb4f66b2006-09-27 19:23:41 +0800134 MGT_CMD = 0xd8,
135 SINBAND_MGT_CMD = 0xd9,
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400136 ARRAY_CMD = 0xe0,
137 CONTROLLER_CMD = 0xe1,
138 DEBUGGING_CMD = 0xe2,
139 PASSTHRU_CMD = 0xe3,
140
141 PASSTHRU_GET_ADAPTER = 0x05,
142 PASSTHRU_GET_DRVVER = 0x10,
Ed Linfb4f66b2006-09-27 19:23:41 +0800143
144 CTLR_CONFIG_CMD = 0x03,
145 CTLR_SHUTDOWN = 0x0d,
146
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400147 CTLR_POWER_STATE_CHANGE = 0x0e,
148 CTLR_POWER_SAVING = 0x01,
149
150 PASSTHRU_SIGNATURE = 0x4e415041,
Ed Linfb4f66b2006-09-27 19:23:41 +0800151 MGT_CMD_SIGNATURE = 0xba,
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400152
153 INQUIRY_EVPD = 0x01,
154};
155
Ed Linfb4f66b2006-09-27 19:23:41 +0800156/* SCSI inquiry data */
157typedef struct st_inq {
158 u8 DeviceType :5;
159 u8 DeviceTypeQualifier :3;
160 u8 DeviceTypeModifier :7;
161 u8 RemovableMedia :1;
162 u8 Versions;
163 u8 ResponseDataFormat :4;
164 u8 HiSupport :1;
165 u8 NormACA :1;
166 u8 ReservedBit :1;
167 u8 AERC :1;
168 u8 AdditionalLength;
169 u8 Reserved[2];
170 u8 SoftReset :1;
171 u8 CommandQueue :1;
172 u8 Reserved2 :1;
173 u8 LinkedCommands :1;
174 u8 Synchronous :1;
175 u8 Wide16Bit :1;
176 u8 Wide32Bit :1;
177 u8 RelativeAddressing :1;
178 u8 VendorId[8];
179 u8 ProductId[16];
180 u8 ProductRevisionLevel[4];
181 u8 VendorSpecific[20];
182 u8 Reserved3[40];
183} ST_INQ;
184
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400185struct st_sgitem {
186 u8 ctrl; /* SG_CF_xxx */
187 u8 reserved[3];
188 __le32 count;
189 __le32 addr;
190 __le32 addr_hi;
191};
192
193struct st_sgtable {
194 __le16 sg_count;
195 __le16 max_sg_count;
196 __le32 sz_in_byte;
197 struct st_sgitem table[ST_MAX_SG];
198};
199
200struct handshake_frame {
201 __le32 rb_phy; /* request payload queue physical address */
202 __le32 rb_phy_hi;
203 __le16 req_sz; /* size of each request payload */
204 __le16 req_cnt; /* count of reqs the buffer can hold */
205 __le16 status_sz; /* size of each status payload */
206 __le16 status_cnt; /* count of status the buffer can hold */
207 __le32 hosttime; /* seconds from Jan 1, 1970 (GMT) */
208 __le32 hosttime_hi;
209 u8 partner_type; /* who sends this frame */
210 u8 reserved0[7];
211 __le32 partner_ver_major;
212 __le32 partner_ver_minor;
213 __le32 partner_ver_oem;
214 __le32 partner_ver_build;
215 u32 reserved1[4];
216};
217
218struct req_msg {
219 __le16 tag;
220 u8 lun;
221 u8 target;
222 u8 task_attr;
223 u8 task_manage;
224 u8 prd_entry;
Ed Linf903d7b72006-09-27 19:23:33 +0800225 u8 payload_sz; /* payload size in 4-byte, not used */
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400226 u8 cdb[STEX_CDB_LENGTH];
227 u8 variable[REQ_VARIABLE_LEN];
228};
229
230struct status_msg {
231 __le16 tag;
232 u8 lun;
233 u8 target;
234 u8 srb_status;
235 u8 scsi_status;
236 u8 reserved;
237 u8 payload_sz; /* payload size in 4-byte */
238 u8 variable[STATUS_VAR_LEN];
239};
240
241struct ver_info {
242 u32 major;
243 u32 minor;
244 u32 oem;
245 u32 build;
246 u32 reserved[2];
247};
248
249struct st_frame {
250 u32 base[6];
251 u32 rom_addr;
252
253 struct ver_info drv_ver;
254 struct ver_info bios_ver;
255
256 u32 bus;
257 u32 slot;
258 u32 irq_level;
259 u32 irq_vec;
260 u32 id;
261 u32 subid;
262
263 u32 dimm_size;
264 u8 dimm_type;
265 u8 reserved[3];
266
267 u32 channel;
268 u32 reserved1;
269};
270
271struct st_drvver {
272 u32 major;
273 u32 minor;
274 u32 oem;
275 u32 build;
276 u32 signature[2];
277 u8 console_id;
278 u8 host_no;
279 u8 reserved0[2];
280 u32 reserved[3];
281};
282
283#define MU_REQ_BUFFER_SIZE (MU_REQ_COUNT * sizeof(struct req_msg))
284#define MU_STATUS_BUFFER_SIZE (MU_STATUS_COUNT * sizeof(struct status_msg))
285#define MU_BUFFER_SIZE (MU_REQ_BUFFER_SIZE + MU_STATUS_BUFFER_SIZE)
Ed Linfb4f66b2006-09-27 19:23:41 +0800286#define STEX_EXTRA_SIZE max(sizeof(struct st_frame), sizeof(ST_INQ))
287#define STEX_BUFFER_SIZE (MU_BUFFER_SIZE + STEX_EXTRA_SIZE)
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400288
289struct st_ccb {
290 struct req_msg *req;
291 struct scsi_cmnd *cmd;
292
293 void *sense_buffer;
294 unsigned int sense_bufflen;
295 int sg_count;
296
297 u32 req_type;
298 u8 srb_status;
299 u8 scsi_status;
300};
301
302struct st_hba {
303 void __iomem *mmio_base; /* iomapped PCI memory space */
304 void *dma_mem;
305 dma_addr_t dma_handle;
306
307 struct Scsi_Host *host;
308 struct pci_dev *pdev;
309
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400310 u32 req_head;
311 u32 req_tail;
312 u32 status_head;
313 u32 status_tail;
314
315 struct status_msg *status_buffer;
316 void *copy_buffer; /* temp buffer for driver-handled commands */
317 struct st_ccb ccb[MU_MAX_REQUEST];
318 struct st_ccb *wait_ccb;
319 wait_queue_head_t waitq;
320
321 unsigned int mu_status;
322 int out_req_cnt;
323
324 unsigned int cardtype;
325};
326
327static const char console_inq_page[] =
328{
329 0x03,0x00,0x03,0x03,0xFA,0x00,0x00,0x30,
330 0x50,0x72,0x6F,0x6D,0x69,0x73,0x65,0x20, /* "Promise " */
331 0x52,0x41,0x49,0x44,0x20,0x43,0x6F,0x6E, /* "RAID Con" */
332 0x73,0x6F,0x6C,0x65,0x20,0x20,0x20,0x20, /* "sole " */
333 0x31,0x2E,0x30,0x30,0x20,0x20,0x20,0x20, /* "1.00 " */
334 0x53,0x58,0x2F,0x52,0x53,0x41,0x46,0x2D, /* "SX/RSAF-" */
335 0x54,0x45,0x31,0x2E,0x30,0x30,0x20,0x20, /* "TE1.00 " */
336 0x0C,0x20,0x20,0x20,0x20,0x20,0x20,0x20
337};
338
339MODULE_AUTHOR("Ed Lin");
340MODULE_DESCRIPTION("Promise Technology SuperTrak EX Controllers");
341MODULE_LICENSE("GPL");
342MODULE_VERSION(ST_DRIVER_VERSION);
343
344static void stex_gettime(__le32 *time)
345{
346 struct timeval tv;
347 do_gettimeofday(&tv);
348
349 *time = cpu_to_le32(tv.tv_sec & 0xffffffff);
350 *(time + 1) = cpu_to_le32((tv.tv_sec >> 16) >> 16);
351}
352
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400353static struct status_msg *stex_get_status(struct st_hba *hba)
354{
355 struct status_msg *status =
356 hba->status_buffer + hba->status_tail;
357
358 ++hba->status_tail;
359 hba->status_tail %= MU_STATUS_COUNT;
360
361 return status;
362}
363
364static void stex_set_sense(struct scsi_cmnd *cmd, u8 sk, u8 asc, u8 ascq)
365{
366 cmd->result = (DRIVER_SENSE << 24) | SAM_STAT_CHECK_CONDITION;
367
368 cmd->sense_buffer[0] = 0x70; /* fixed format, current */
369 cmd->sense_buffer[2] = sk;
370 cmd->sense_buffer[7] = 18 - 8; /* additional sense length */
371 cmd->sense_buffer[12] = asc;
372 cmd->sense_buffer[13] = ascq;
373}
374
375static void stex_invalid_field(struct scsi_cmnd *cmd,
376 void (*done)(struct scsi_cmnd *))
377{
378 /* "Invalid field in cbd" */
379 stex_set_sense(cmd, ILLEGAL_REQUEST, 0x24, 0x0);
380 done(cmd);
381}
382
383static struct req_msg *stex_alloc_req(struct st_hba *hba)
384{
385 struct req_msg *req = ((struct req_msg *)hba->dma_mem) +
386 hba->req_head;
387
388 ++hba->req_head;
389 hba->req_head %= MU_REQ_COUNT;
390
391 return req;
392}
393
394static int stex_map_sg(struct st_hba *hba,
395 struct req_msg *req, struct st_ccb *ccb)
396{
397 struct pci_dev *pdev = hba->pdev;
398 struct scsi_cmnd *cmd;
399 dma_addr_t dma_handle;
400 struct scatterlist *src;
401 struct st_sgtable *dst;
402 int i;
403
404 cmd = ccb->cmd;
405 dst = (struct st_sgtable *)req->variable;
406 dst->max_sg_count = cpu_to_le16(ST_MAX_SG);
407 dst->sz_in_byte = cpu_to_le32(cmd->request_bufflen);
408
409 if (cmd->use_sg) {
410 int n_elem;
411
412 src = (struct scatterlist *) cmd->request_buffer;
413 n_elem = pci_map_sg(pdev, src,
414 cmd->use_sg, cmd->sc_data_direction);
415 if (n_elem <= 0)
416 return -EIO;
417
418 ccb->sg_count = n_elem;
419 dst->sg_count = cpu_to_le16((u16)n_elem);
420
421 for (i = 0; i < n_elem; i++, src++) {
422 dst->table[i].count = cpu_to_le32((u32)sg_dma_len(src));
423 dst->table[i].addr =
424 cpu_to_le32(sg_dma_address(src) & 0xffffffff);
425 dst->table[i].addr_hi =
426 cpu_to_le32((sg_dma_address(src) >> 16) >> 16);
427 dst->table[i].ctrl = SG_CF_64B | SG_CF_HOST;
428 }
429 dst->table[--i].ctrl |= SG_CF_EOT;
430 return 0;
431 }
432
433 dma_handle = pci_map_single(pdev, cmd->request_buffer,
434 cmd->request_bufflen, cmd->sc_data_direction);
435 cmd->SCp.dma_handle = dma_handle;
436
437 ccb->sg_count = 1;
438 dst->sg_count = cpu_to_le16(1);
439 dst->table[0].addr = cpu_to_le32(dma_handle & 0xffffffff);
440 dst->table[0].addr_hi = cpu_to_le32((dma_handle >> 16) >> 16);
441 dst->table[0].count = cpu_to_le32((u32)cmd->request_bufflen);
442 dst->table[0].ctrl = SG_CF_EOT | SG_CF_64B | SG_CF_HOST;
443
444 return 0;
445}
446
447static void stex_internal_copy(struct scsi_cmnd *cmd,
Ed Linfb4f66b2006-09-27 19:23:41 +0800448 const void *src, size_t *count, int sg_count, int direction)
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400449{
450 size_t lcount;
451 size_t len;
452 void *s, *d, *base = NULL;
453 if (*count > cmd->request_bufflen)
454 *count = cmd->request_bufflen;
455 lcount = *count;
456 while (lcount) {
457 len = lcount;
458 s = (void *)src;
459 if (cmd->use_sg) {
460 size_t offset = *count - lcount;
461 s += offset;
462 base = scsi_kmap_atomic_sg(cmd->request_buffer,
463 sg_count, &offset, &len);
464 if (base == NULL) {
465 *count -= lcount;
466 return;
467 }
468 d = base + offset;
469 } else
470 d = cmd->request_buffer;
471
Ed Linfb4f66b2006-09-27 19:23:41 +0800472 if (direction == ST_TO_CMD)
473 memcpy(d, s, len);
474 else
475 memcpy(s, d, len);
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400476
477 lcount -= len;
478 if (cmd->use_sg)
479 scsi_kunmap_atomic_sg(base);
480 }
481}
482
483static int stex_direct_copy(struct scsi_cmnd *cmd,
484 const void *src, size_t count)
485{
486 struct st_hba *hba = (struct st_hba *) &cmd->device->host->hostdata[0];
487 size_t cp_len = count;
488 int n_elem = 0;
489
490 if (cmd->use_sg) {
491 n_elem = pci_map_sg(hba->pdev, cmd->request_buffer,
492 cmd->use_sg, cmd->sc_data_direction);
493 if (n_elem <= 0)
494 return 0;
495 }
496
Ed Linfb4f66b2006-09-27 19:23:41 +0800497 stex_internal_copy(cmd, src, &cp_len, n_elem, ST_TO_CMD);
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400498
499 if (cmd->use_sg)
500 pci_unmap_sg(hba->pdev, cmd->request_buffer,
501 cmd->use_sg, cmd->sc_data_direction);
502 return cp_len == count;
503}
504
505static void stex_controller_info(struct st_hba *hba, struct st_ccb *ccb)
506{
507 struct st_frame *p;
508 size_t count = sizeof(struct st_frame);
509
510 p = hba->copy_buffer;
Ed Lin4eea9dc2006-12-04 17:49:28 -0800511 stex_internal_copy(ccb->cmd, p, &count, ccb->sg_count, ST_FROM_CMD);
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400512 memset(p->base, 0, sizeof(u32)*6);
513 *(unsigned long *)(p->base) = pci_resource_start(hba->pdev, 0);
514 p->rom_addr = 0;
515
516 p->drv_ver.major = ST_VER_MAJOR;
517 p->drv_ver.minor = ST_VER_MINOR;
518 p->drv_ver.oem = ST_OEM;
519 p->drv_ver.build = ST_BUILD_VER;
520
521 p->bus = hba->pdev->bus->number;
522 p->slot = hba->pdev->devfn;
523 p->irq_level = 0;
524 p->irq_vec = hba->pdev->irq;
525 p->id = hba->pdev->vendor << 16 | hba->pdev->device;
526 p->subid =
527 hba->pdev->subsystem_vendor << 16 | hba->pdev->subsystem_device;
528
Ed Linfb4f66b2006-09-27 19:23:41 +0800529 stex_internal_copy(ccb->cmd, p, &count, ccb->sg_count, ST_TO_CMD);
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400530}
531
532static void
533stex_send_cmd(struct st_hba *hba, struct req_msg *req, u16 tag)
534{
535 req->tag = cpu_to_le16(tag);
536 req->task_attr = TASK_ATTRIBUTE_SIMPLE;
537 req->task_manage = 0; /* not supported yet */
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400538
539 hba->ccb[tag].req = req;
540 hba->out_req_cnt++;
541
542 writel(hba->req_head, hba->mmio_base + IMR0);
543 writel(MU_INBOUND_DOORBELL_REQHEADCHANGED, hba->mmio_base + IDBL);
544 readl(hba->mmio_base + IDBL); /* flush */
545}
546
547static int
Ed Lincf355882006-09-01 14:31:51 +0800548stex_slave_alloc(struct scsi_device *sdev)
549{
550 /* Cheat: usually extracted from Inquiry data */
551 sdev->tagged_supported = 1;
552
553 scsi_activate_tcq(sdev, sdev->host->can_queue);
554
555 return 0;
556}
557
558static int
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400559stex_slave_config(struct scsi_device *sdev)
560{
561 sdev->use_10_for_rw = 1;
562 sdev->use_10_for_ms = 1;
563 sdev->timeout = 60 * HZ;
Ed Lincf355882006-09-01 14:31:51 +0800564 sdev->tagged_supported = 1;
565
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400566 return 0;
567}
568
569static void
570stex_slave_destroy(struct scsi_device *sdev)
571{
Ed Lincf355882006-09-01 14:31:51 +0800572 scsi_deactivate_tcq(sdev, 1);
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400573}
574
575static int
576stex_queuecommand(struct scsi_cmnd *cmd, void (* done)(struct scsi_cmnd *))
577{
578 struct st_hba *hba;
579 struct Scsi_Host *host;
580 unsigned int id,lun;
581 struct req_msg *req;
582 u16 tag;
583 host = cmd->device->host;
584 id = cmd->device->id;
585 lun = cmd->device->channel; /* firmware lun issue work around */
586 hba = (struct st_hba *) &host->hostdata[0];
587
588 switch (cmd->cmnd[0]) {
589 case MODE_SENSE_10:
590 {
591 static char ms10_caching_page[12] =
592 { 0, 0x12, 0, 0, 0, 0, 0, 0, 0x8, 0xa, 0x4, 0 };
593 unsigned char page;
594 page = cmd->cmnd[2] & 0x3f;
595 if (page == 0x8 || page == 0x3f) {
596 stex_direct_copy(cmd, ms10_caching_page,
597 sizeof(ms10_caching_page));
598 cmd->result = DID_OK << 16 | COMMAND_COMPLETE << 8;
599 done(cmd);
600 } else
601 stex_invalid_field(cmd, done);
602 return 0;
603 }
604 case INQUIRY:
605 if (id != ST_MAX_ARRAY_SUPPORTED)
606 break;
607 if (lun == 0 && (cmd->cmnd[1] & INQUIRY_EVPD) == 0) {
608 stex_direct_copy(cmd, console_inq_page,
609 sizeof(console_inq_page));
610 cmd->result = DID_OK << 16 | COMMAND_COMPLETE << 8;
611 done(cmd);
612 } else
613 stex_invalid_field(cmd, done);
614 return 0;
615 case PASSTHRU_CMD:
616 if (cmd->cmnd[1] == PASSTHRU_GET_DRVVER) {
617 struct st_drvver ver;
618 ver.major = ST_VER_MAJOR;
619 ver.minor = ST_VER_MINOR;
620 ver.oem = ST_OEM;
621 ver.build = ST_BUILD_VER;
622 ver.signature[0] = PASSTHRU_SIGNATURE;
623 ver.console_id = ST_MAX_ARRAY_SUPPORTED;
624 ver.host_no = hba->host->host_no;
625 cmd->result = stex_direct_copy(cmd, &ver, sizeof(ver)) ?
626 DID_OK << 16 | COMMAND_COMPLETE << 8 :
627 DID_ERROR << 16 | COMMAND_COMPLETE << 8;
628 done(cmd);
629 return 0;
630 }
631 default:
632 break;
633 }
634
635 cmd->scsi_done = done;
636
Ed Lincf355882006-09-01 14:31:51 +0800637 tag = cmd->request->tag;
638
639 if (unlikely(tag >= host->can_queue))
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400640 return SCSI_MLQUEUE_HOST_BUSY;
641
642 req = stex_alloc_req(hba);
Ed Linfb4f66b2006-09-27 19:23:41 +0800643
644 if (hba->cardtype == st_yosemite) {
645 req->lun = lun * (ST_MAX_TARGET_NUM - 1) + id;
646 req->target = 0;
647 } else {
648 req->lun = lun;
649 req->target = id;
650 }
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400651
652 /* cdb */
653 memcpy(req->cdb, cmd->cmnd, STEX_CDB_LENGTH);
654
655 hba->ccb[tag].cmd = cmd;
656 hba->ccb[tag].sense_bufflen = SCSI_SENSE_BUFFERSIZE;
657 hba->ccb[tag].sense_buffer = cmd->sense_buffer;
658 hba->ccb[tag].req_type = 0;
659
660 if (cmd->sc_data_direction != DMA_NONE)
661 stex_map_sg(hba, req, &hba->ccb[tag]);
662
663 stex_send_cmd(hba, req, tag);
664 return 0;
665}
666
667static void stex_unmap_sg(struct st_hba *hba, struct scsi_cmnd *cmd)
668{
669 if (cmd->sc_data_direction != DMA_NONE) {
670 if (cmd->use_sg)
671 pci_unmap_sg(hba->pdev, cmd->request_buffer,
672 cmd->use_sg, cmd->sc_data_direction);
673 else
674 pci_unmap_single(hba->pdev, cmd->SCp.dma_handle,
675 cmd->request_bufflen, cmd->sc_data_direction);
676 }
677}
678
679static void stex_scsi_done(struct st_ccb *ccb)
680{
681 struct scsi_cmnd *cmd = ccb->cmd;
682 int result;
683
684 if (ccb->srb_status == SRB_STATUS_SUCCESS || ccb->srb_status == 0) {
685 result = ccb->scsi_status;
686 switch (ccb->scsi_status) {
687 case SAM_STAT_GOOD:
688 result |= DID_OK << 16 | COMMAND_COMPLETE << 8;
689 break;
690 case SAM_STAT_CHECK_CONDITION:
691 result |= DRIVER_SENSE << 24;
692 break;
693 case SAM_STAT_BUSY:
694 result |= DID_BUS_BUSY << 16 | COMMAND_COMPLETE << 8;
695 break;
696 default:
697 result |= DID_ERROR << 16 | COMMAND_COMPLETE << 8;
698 break;
699 }
700 }
701 else if (ccb->srb_status & SRB_SEE_SENSE)
702 result = DRIVER_SENSE << 24 | SAM_STAT_CHECK_CONDITION;
703 else switch (ccb->srb_status) {
704 case SRB_STATUS_SELECTION_TIMEOUT:
705 result = DID_NO_CONNECT << 16 | COMMAND_COMPLETE << 8;
706 break;
707 case SRB_STATUS_BUSY:
708 result = DID_BUS_BUSY << 16 | COMMAND_COMPLETE << 8;
709 break;
710 case SRB_STATUS_INVALID_REQUEST:
711 case SRB_STATUS_ERROR:
712 default:
713 result = DID_ERROR << 16 | COMMAND_COMPLETE << 8;
714 break;
715 }
716
717 cmd->result = result;
718 cmd->scsi_done(cmd);
719}
720
721static void stex_copy_data(struct st_ccb *ccb,
722 struct status_msg *resp, unsigned int variable)
723{
724 size_t count = variable;
725 if (resp->scsi_status != SAM_STAT_GOOD) {
726 if (ccb->sense_buffer != NULL)
727 memcpy(ccb->sense_buffer, resp->variable,
728 min(variable, ccb->sense_bufflen));
729 return;
730 }
731
732 if (ccb->cmd == NULL)
733 return;
Ed Linfb4f66b2006-09-27 19:23:41 +0800734 stex_internal_copy(ccb->cmd,
735 resp->variable, &count, ccb->sg_count, ST_TO_CMD);
736}
737
738static void stex_ys_commands(struct st_hba *hba,
739 struct st_ccb *ccb, struct status_msg *resp)
740{
741 size_t count;
742
743 if (ccb->cmd->cmnd[0] == MGT_CMD &&
744 resp->scsi_status != SAM_STAT_CHECK_CONDITION) {
745 ccb->cmd->request_bufflen =
746 le32_to_cpu(*(__le32 *)&resp->variable[0]);
747 return;
748 }
749
750 if (resp->srb_status != 0)
751 return;
752
753 /* determine inquiry command status by DeviceTypeQualifier */
754 if (ccb->cmd->cmnd[0] == INQUIRY &&
755 resp->scsi_status == SAM_STAT_GOOD) {
756 ST_INQ *inq_data;
757
758 count = STEX_EXTRA_SIZE;
759 stex_internal_copy(ccb->cmd, hba->copy_buffer,
760 &count, ccb->sg_count, ST_FROM_CMD);
761 inq_data = (ST_INQ *)hba->copy_buffer;
762 if (inq_data->DeviceTypeQualifier != 0)
763 ccb->srb_status = SRB_STATUS_SELECTION_TIMEOUT;
764 else
765 ccb->srb_status = SRB_STATUS_SUCCESS;
766 } else if (ccb->cmd->cmnd[0] == REPORT_LUNS) {
767 u8 *report_lun_data = (u8 *)hba->copy_buffer;
768
769 count = STEX_EXTRA_SIZE;
770 stex_internal_copy(ccb->cmd, report_lun_data,
771 &count, ccb->sg_count, ST_FROM_CMD);
772 if (report_lun_data[2] || report_lun_data[3]) {
773 report_lun_data[2] = 0x00;
774 report_lun_data[3] = 0x08;
775 stex_internal_copy(ccb->cmd, report_lun_data,
776 &count, ccb->sg_count, ST_TO_CMD);
777 }
778 }
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400779}
780
781static void stex_mu_intr(struct st_hba *hba, u32 doorbell)
782{
783 void __iomem *base = hba->mmio_base;
784 struct status_msg *resp;
785 struct st_ccb *ccb;
786 unsigned int size;
787 u16 tag;
788
789 if (!(doorbell & MU_OUTBOUND_DOORBELL_STATUSHEADCHANGED))
790 return;
791
792 /* status payloads */
793 hba->status_head = readl(base + OMR1);
794 if (unlikely(hba->status_head >= MU_STATUS_COUNT)) {
795 printk(KERN_WARNING DRV_NAME "(%s): invalid status head\n",
796 pci_name(hba->pdev));
797 return;
798 }
799
Ed Linfb4f66b2006-09-27 19:23:41 +0800800 /*
801 * it's not a valid status payload if:
802 * 1. there are no pending requests(e.g. during init stage)
803 * 2. there are some pending requests, but the controller is in
804 * reset status, and its type is not st_yosemite
805 * firmware of st_yosemite in reset status will return pending requests
806 * to driver, so we allow it to pass
807 */
808 if (unlikely(hba->out_req_cnt <= 0 ||
809 (hba->mu_status == MU_STATE_RESETTING &&
810 hba->cardtype != st_yosemite))) {
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400811 hba->status_tail = hba->status_head;
812 goto update_status;
813 }
814
815 while (hba->status_tail != hba->status_head) {
816 resp = stex_get_status(hba);
817 tag = le16_to_cpu(resp->tag);
Ed Lincf355882006-09-01 14:31:51 +0800818 if (unlikely(tag >= hba->host->can_queue)) {
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400819 printk(KERN_WARNING DRV_NAME
820 "(%s): invalid tag\n", pci_name(hba->pdev));
821 continue;
822 }
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400823
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400824 ccb = &hba->ccb[tag];
825 if (hba->wait_ccb == ccb)
826 hba->wait_ccb = NULL;
827 if (unlikely(ccb->req == NULL)) {
828 printk(KERN_WARNING DRV_NAME
829 "(%s): lagging req\n", pci_name(hba->pdev));
Ed Linfb4f66b2006-09-27 19:23:41 +0800830 hba->out_req_cnt--;
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400831 continue;
832 }
833
834 size = resp->payload_sz * sizeof(u32); /* payload size */
835 if (unlikely(size < sizeof(*resp) - STATUS_VAR_LEN ||
836 size > sizeof(*resp))) {
837 printk(KERN_WARNING DRV_NAME "(%s): bad status size\n",
838 pci_name(hba->pdev));
839 } else {
840 size -= sizeof(*resp) - STATUS_VAR_LEN; /* copy size */
841 if (size)
842 stex_copy_data(ccb, resp, size);
843 }
844
845 ccb->srb_status = resp->srb_status;
846 ccb->scsi_status = resp->scsi_status;
847
Ed Lincf355882006-09-01 14:31:51 +0800848 if (likely(ccb->cmd != NULL)) {
Ed Linfb4f66b2006-09-27 19:23:41 +0800849 if (hba->cardtype == st_yosemite)
850 stex_ys_commands(hba, ccb, resp);
851
Ed Lincf355882006-09-01 14:31:51 +0800852 if (unlikely(ccb->cmd->cmnd[0] == PASSTHRU_CMD &&
853 ccb->cmd->cmnd[1] == PASSTHRU_GET_ADAPTER))
854 stex_controller_info(hba, ccb);
Ed Linfb4f66b2006-09-27 19:23:41 +0800855
Ed Lincf355882006-09-01 14:31:51 +0800856 stex_unmap_sg(hba, ccb->cmd);
857 stex_scsi_done(ccb);
858 hba->out_req_cnt--;
859 } else if (ccb->req_type & PASSTHRU_REQ_TYPE) {
860 hba->out_req_cnt--;
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400861 if (ccb->req_type & PASSTHRU_REQ_NO_WAKEUP) {
862 ccb->req_type = 0;
863 continue;
864 }
865 ccb->req_type = 0;
866 if (waitqueue_active(&hba->waitq))
867 wake_up(&hba->waitq);
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400868 }
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400869 }
870
871update_status:
872 writel(hba->status_head, base + IMR1);
873 readl(base + IMR1); /* flush */
874}
875
David Howells7d12e782006-10-05 14:55:46 +0100876static irqreturn_t stex_intr(int irq, void *__hba)
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400877{
878 struct st_hba *hba = __hba;
879 void __iomem *base = hba->mmio_base;
880 u32 data;
881 unsigned long flags;
882 int handled = 0;
883
884 spin_lock_irqsave(hba->host->host_lock, flags);
885
886 data = readl(base + ODBL);
887
888 if (data && data != 0xffffffff) {
889 /* clear the interrupt */
890 writel(data, base + ODBL);
891 readl(base + ODBL); /* flush */
892 stex_mu_intr(hba, data);
893 handled = 1;
894 }
895
896 spin_unlock_irqrestore(hba->host->host_lock, flags);
897
898 return IRQ_RETVAL(handled);
899}
900
901static int stex_handshake(struct st_hba *hba)
902{
903 void __iomem *base = hba->mmio_base;
904 struct handshake_frame *h;
905 dma_addr_t status_phys;
Ed Lin529e7a62006-12-04 17:49:34 -0800906 u32 data;
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400907 int i;
908
909 if (readl(base + OMR0) != MU_HANDSHAKE_SIGNATURE) {
910 writel(MU_INBOUND_DOORBELL_HANDSHAKE, base + IDBL);
911 readl(base + IDBL);
912 for (i = 0; readl(base + OMR0) != MU_HANDSHAKE_SIGNATURE
913 && i < MU_MAX_DELAY_TIME; i++) {
914 rmb();
915 msleep(1);
916 }
917
918 if (i == MU_MAX_DELAY_TIME) {
919 printk(KERN_ERR DRV_NAME
920 "(%s): no handshake signature\n",
921 pci_name(hba->pdev));
922 return -1;
923 }
924 }
925
926 udelay(10);
927
Ed Lin529e7a62006-12-04 17:49:34 -0800928 data = readl(base + OMR1);
929 if ((data & 0xffff0000) == MU_HANDSHAKE_SIGNATURE_HALF) {
930 data &= 0x0000ffff;
931 if (hba->host->can_queue > data)
932 hba->host->can_queue = data;
933 }
934
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400935 h = (struct handshake_frame *)(hba->dma_mem + MU_REQ_BUFFER_SIZE);
936 h->rb_phy = cpu_to_le32(hba->dma_handle);
937 h->rb_phy_hi = cpu_to_le32((hba->dma_handle >> 16) >> 16);
938 h->req_sz = cpu_to_le16(sizeof(struct req_msg));
939 h->req_cnt = cpu_to_le16(MU_REQ_COUNT);
940 h->status_sz = cpu_to_le16(sizeof(struct status_msg));
941 h->status_cnt = cpu_to_le16(MU_STATUS_COUNT);
942 stex_gettime(&h->hosttime);
943 h->partner_type = HMU_PARTNER_TYPE;
944
945 status_phys = hba->dma_handle + MU_REQ_BUFFER_SIZE;
946 writel(status_phys, base + IMR0);
947 readl(base + IMR0);
948 writel((status_phys >> 16) >> 16, base + IMR1);
949 readl(base + IMR1);
950
951 writel((status_phys >> 16) >> 16, base + OMR0); /* old fw compatible */
952 readl(base + OMR0);
953 writel(MU_INBOUND_DOORBELL_HANDSHAKE, base + IDBL);
954 readl(base + IDBL); /* flush */
955
956 udelay(10);
957 for (i = 0; readl(base + OMR0) != MU_HANDSHAKE_SIGNATURE
958 && i < MU_MAX_DELAY_TIME; i++) {
959 rmb();
960 msleep(1);
961 }
962
963 if (i == MU_MAX_DELAY_TIME) {
964 printk(KERN_ERR DRV_NAME
965 "(%s): no signature after handshake frame\n",
966 pci_name(hba->pdev));
967 return -1;
968 }
969
970 writel(0, base + IMR0);
971 readl(base + IMR0);
972 writel(0, base + OMR0);
973 readl(base + OMR0);
974 writel(0, base + IMR1);
975 readl(base + IMR1);
976 writel(0, base + OMR1);
977 readl(base + OMR1); /* flush */
978 hba->mu_status = MU_STATE_STARTED;
979 return 0;
980}
981
982static int stex_abort(struct scsi_cmnd *cmd)
983{
984 struct Scsi_Host *host = cmd->device->host;
985 struct st_hba *hba = (struct st_hba *)host->hostdata;
Ed Lincf355882006-09-01 14:31:51 +0800986 u16 tag = cmd->request->tag;
Jeff Garzik5a25ba12006-09-01 03:12:19 -0400987 void __iomem *base;
988 u32 data;
989 int result = SUCCESS;
990 unsigned long flags;
991 base = hba->mmio_base;
992 spin_lock_irqsave(host->host_lock, flags);
Ed Lincf355882006-09-01 14:31:51 +0800993 if (tag < host->can_queue && hba->ccb[tag].cmd == cmd)
994 hba->wait_ccb = &hba->ccb[tag];
995 else {
996 for (tag = 0; tag < host->can_queue; tag++)
997 if (hba->ccb[tag].cmd == cmd) {
998 hba->wait_ccb = &hba->ccb[tag];
999 break;
1000 }
1001 if (tag >= host->can_queue)
1002 goto out;
1003 }
Jeff Garzik5a25ba12006-09-01 03:12:19 -04001004
1005 data = readl(base + ODBL);
1006 if (data == 0 || data == 0xffffffff)
1007 goto fail_out;
1008
1009 writel(data, base + ODBL);
1010 readl(base + ODBL); /* flush */
1011
1012 stex_mu_intr(hba, data);
1013
1014 if (hba->wait_ccb == NULL) {
1015 printk(KERN_WARNING DRV_NAME
1016 "(%s): lost interrupt\n", pci_name(hba->pdev));
1017 goto out;
1018 }
1019
1020fail_out:
Ed Lincf355882006-09-01 14:31:51 +08001021 stex_unmap_sg(hba, cmd);
Jeff Garzik5a25ba12006-09-01 03:12:19 -04001022 hba->wait_ccb->req = NULL; /* nullify the req's future return */
1023 hba->wait_ccb = NULL;
1024 result = FAILED;
1025out:
1026 spin_unlock_irqrestore(host->host_lock, flags);
1027 return result;
1028}
1029
1030static void stex_hard_reset(struct st_hba *hba)
1031{
1032 struct pci_bus *bus;
1033 int i;
1034 u16 pci_cmd;
1035 u8 pci_bctl;
1036
1037 for (i = 0; i < 16; i++)
1038 pci_read_config_dword(hba->pdev, i * 4,
1039 &hba->pdev->saved_config_space[i]);
1040
1041 /* Reset secondary bus. Our controller(MU/ATU) is the only device on
1042 secondary bus. Consult Intel 80331/3 developer's manual for detail */
1043 bus = hba->pdev->bus;
1044 pci_read_config_byte(bus->self, PCI_BRIDGE_CONTROL, &pci_bctl);
1045 pci_bctl |= PCI_BRIDGE_CTL_BUS_RESET;
1046 pci_write_config_byte(bus->self, PCI_BRIDGE_CONTROL, pci_bctl);
1047 msleep(1);
1048 pci_bctl &= ~PCI_BRIDGE_CTL_BUS_RESET;
1049 pci_write_config_byte(bus->self, PCI_BRIDGE_CONTROL, pci_bctl);
1050
1051 for (i = 0; i < MU_MAX_DELAY_TIME; i++) {
1052 pci_read_config_word(hba->pdev, PCI_COMMAND, &pci_cmd);
Ed Lin47c4f992006-12-04 17:49:31 -08001053 if (pci_cmd != 0xffff && (pci_cmd & PCI_COMMAND_MASTER))
Jeff Garzik5a25ba12006-09-01 03:12:19 -04001054 break;
1055 msleep(1);
1056 }
1057
1058 ssleep(5);
1059 for (i = 0; i < 16; i++)
1060 pci_write_config_dword(hba->pdev, i * 4,
1061 hba->pdev->saved_config_space[i]);
1062}
1063
1064static int stex_reset(struct scsi_cmnd *cmd)
1065{
1066 struct st_hba *hba;
1067 unsigned long flags;
Ed Linfb4f66b2006-09-27 19:23:41 +08001068 unsigned long before;
Jeff Garzik5a25ba12006-09-01 03:12:19 -04001069 hba = (struct st_hba *) &cmd->device->host->hostdata[0];
1070
1071 hba->mu_status = MU_STATE_RESETTING;
1072
1073 if (hba->cardtype == st_shasta)
1074 stex_hard_reset(hba);
1075
Ed Linfb4f66b2006-09-27 19:23:41 +08001076 if (hba->cardtype != st_yosemite) {
1077 if (stex_handshake(hba)) {
1078 printk(KERN_WARNING DRV_NAME
1079 "(%s): resetting: handshake failed\n",
1080 pci_name(hba->pdev));
1081 return FAILED;
1082 }
1083 spin_lock_irqsave(hba->host->host_lock, flags);
1084 hba->req_head = 0;
1085 hba->req_tail = 0;
1086 hba->status_head = 0;
1087 hba->status_tail = 0;
1088 hba->out_req_cnt = 0;
1089 spin_unlock_irqrestore(hba->host->host_lock, flags);
1090 return SUCCESS;
Jeff Garzik5a25ba12006-09-01 03:12:19 -04001091 }
Jeff Garzik5a25ba12006-09-01 03:12:19 -04001092
Ed Linfb4f66b2006-09-27 19:23:41 +08001093 /* st_yosemite */
1094 writel(MU_INBOUND_DOORBELL_RESET, hba->mmio_base + IDBL);
1095 readl(hba->mmio_base + IDBL); /* flush */
1096 before = jiffies;
1097 while (hba->out_req_cnt > 0) {
1098 if (time_after(jiffies, before + ST_INTERNAL_TIMEOUT * HZ)) {
1099 printk(KERN_WARNING DRV_NAME
1100 "(%s): reset timeout\n", pci_name(hba->pdev));
1101 return FAILED;
1102 }
1103 msleep(1);
1104 }
1105
1106 hba->mu_status = MU_STATE_STARTED;
Jeff Garzik5a25ba12006-09-01 03:12:19 -04001107 return SUCCESS;
1108}
1109
1110static int stex_biosparam(struct scsi_device *sdev,
1111 struct block_device *bdev, sector_t capacity, int geom[])
1112{
Ed Linb4b8bed2006-12-04 17:49:24 -08001113 int heads = 255, sectors = 63;
Jeff Garzik5a25ba12006-09-01 03:12:19 -04001114
1115 if (capacity < 0x200000) {
1116 heads = 64;
1117 sectors = 32;
1118 }
1119
Ed Linb4b8bed2006-12-04 17:49:24 -08001120 sector_div(capacity, heads * sectors);
Jeff Garzik5a25ba12006-09-01 03:12:19 -04001121
1122 geom[0] = heads;
1123 geom[1] = sectors;
Ed Linb4b8bed2006-12-04 17:49:24 -08001124 geom[2] = capacity;
Jeff Garzik5a25ba12006-09-01 03:12:19 -04001125
1126 return 0;
1127}
1128
1129static struct scsi_host_template driver_template = {
1130 .module = THIS_MODULE,
1131 .name = DRV_NAME,
1132 .proc_name = DRV_NAME,
1133 .bios_param = stex_biosparam,
1134 .queuecommand = stex_queuecommand,
Ed Lincf355882006-09-01 14:31:51 +08001135 .slave_alloc = stex_slave_alloc,
Jeff Garzik5a25ba12006-09-01 03:12:19 -04001136 .slave_configure = stex_slave_config,
1137 .slave_destroy = stex_slave_destroy,
1138 .eh_abort_handler = stex_abort,
1139 .eh_host_reset_handler = stex_reset,
1140 .can_queue = ST_CAN_QUEUE,
1141 .this_id = -1,
1142 .sg_tablesize = ST_MAX_SG,
1143 .cmd_per_lun = ST_CMD_PER_LUN,
1144};
1145
1146static int stex_set_dma_mask(struct pci_dev * pdev)
1147{
1148 int ret;
1149 if (!pci_set_dma_mask(pdev, DMA_64BIT_MASK)
1150 && !pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))
1151 return 0;
1152 ret = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
1153 if (!ret)
1154 ret = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
1155 return ret;
1156}
1157
1158static int __devinit
1159stex_probe(struct pci_dev *pdev, const struct pci_device_id *id)
1160{
1161 struct st_hba *hba;
1162 struct Scsi_Host *host;
1163 int err;
1164
1165 err = pci_enable_device(pdev);
1166 if (err)
1167 return err;
1168
1169 pci_set_master(pdev);
1170
1171 host = scsi_host_alloc(&driver_template, sizeof(struct st_hba));
1172
1173 if (!host) {
1174 printk(KERN_ERR DRV_NAME "(%s): scsi_host_alloc failed\n",
1175 pci_name(pdev));
1176 err = -ENOMEM;
1177 goto out_disable;
1178 }
1179
1180 hba = (struct st_hba *)host->hostdata;
1181 memset(hba, 0, sizeof(struct st_hba));
1182
1183 err = pci_request_regions(pdev, DRV_NAME);
1184 if (err < 0) {
1185 printk(KERN_ERR DRV_NAME "(%s): request regions failed\n",
1186 pci_name(pdev));
1187 goto out_scsi_host_put;
1188 }
1189
1190 hba->mmio_base = ioremap(pci_resource_start(pdev, 0),
1191 pci_resource_len(pdev, 0));
1192 if ( !hba->mmio_base) {
1193 printk(KERN_ERR DRV_NAME "(%s): memory map failed\n",
1194 pci_name(pdev));
1195 err = -ENOMEM;
1196 goto out_release_regions;
1197 }
1198
1199 err = stex_set_dma_mask(pdev);
1200 if (err) {
1201 printk(KERN_ERR DRV_NAME "(%s): set dma mask failed\n",
1202 pci_name(pdev));
1203 goto out_iounmap;
1204 }
1205
1206 hba->dma_mem = dma_alloc_coherent(&pdev->dev,
1207 STEX_BUFFER_SIZE, &hba->dma_handle, GFP_KERNEL);
1208 if (!hba->dma_mem) {
1209 err = -ENOMEM;
1210 printk(KERN_ERR DRV_NAME "(%s): dma mem alloc failed\n",
1211 pci_name(pdev));
1212 goto out_iounmap;
1213 }
1214
1215 hba->status_buffer =
1216 (struct status_msg *)(hba->dma_mem + MU_REQ_BUFFER_SIZE);
1217 hba->copy_buffer = hba->dma_mem + MU_BUFFER_SIZE;
1218 hba->mu_status = MU_STATE_STARTING;
1219
1220 hba->cardtype = (unsigned int) id->driver_data;
1221
1222 /* firmware uses id/lun pair for a logical drive, but lun would be
1223 always 0 if CONFIG_SCSI_MULTI_LUN not configured, so we use
1224 channel to map lun here */
1225 host->max_channel = ST_MAX_LUN_PER_TARGET - 1;
1226 host->max_id = ST_MAX_TARGET_NUM;
1227 host->max_lun = 1;
1228 host->unique_id = host->host_no;
1229 host->max_cmd_len = STEX_CDB_LENGTH;
1230
1231 hba->host = host;
1232 hba->pdev = pdev;
1233 init_waitqueue_head(&hba->waitq);
1234
1235 err = request_irq(pdev->irq, stex_intr, IRQF_SHARED, DRV_NAME, hba);
1236 if (err) {
1237 printk(KERN_ERR DRV_NAME "(%s): request irq failed\n",
1238 pci_name(pdev));
1239 goto out_pci_free;
1240 }
1241
1242 err = stex_handshake(hba);
1243 if (err)
1244 goto out_free_irq;
1245
Ed Lin529e7a62006-12-04 17:49:34 -08001246 err = scsi_init_shared_tag_map(host, host->can_queue);
James Bottomleydeb81d82006-09-01 09:28:48 -04001247 if (err) {
Ed Lincf355882006-09-01 14:31:51 +08001248 printk(KERN_ERR DRV_NAME "(%s): init shared queue failed\n",
1249 pci_name(pdev));
1250 goto out_free_irq;
1251 }
1252
Jeff Garzik5a25ba12006-09-01 03:12:19 -04001253 pci_set_drvdata(pdev, hba);
1254
1255 err = scsi_add_host(host, &pdev->dev);
1256 if (err) {
1257 printk(KERN_ERR DRV_NAME "(%s): scsi_add_host failed\n",
1258 pci_name(pdev));
1259 goto out_free_irq;
1260 }
1261
1262 scsi_scan_host(host);
1263
1264 return 0;
1265
1266out_free_irq:
1267 free_irq(pdev->irq, hba);
1268out_pci_free:
1269 dma_free_coherent(&pdev->dev, STEX_BUFFER_SIZE,
1270 hba->dma_mem, hba->dma_handle);
1271out_iounmap:
1272 iounmap(hba->mmio_base);
1273out_release_regions:
1274 pci_release_regions(pdev);
1275out_scsi_host_put:
1276 scsi_host_put(host);
1277out_disable:
1278 pci_disable_device(pdev);
1279
1280 return err;
1281}
1282
1283static void stex_hba_stop(struct st_hba *hba)
1284{
1285 struct req_msg *req;
1286 unsigned long flags;
1287 unsigned long before;
Ed Lincf355882006-09-01 14:31:51 +08001288 u16 tag = 0;
Jeff Garzik5a25ba12006-09-01 03:12:19 -04001289
1290 spin_lock_irqsave(hba->host->host_lock, flags);
1291 req = stex_alloc_req(hba);
1292 memset(req->cdb, 0, STEX_CDB_LENGTH);
1293
Ed Linfb4f66b2006-09-27 19:23:41 +08001294 if (hba->cardtype == st_yosemite) {
1295 req->cdb[0] = MGT_CMD;
1296 req->cdb[1] = MGT_CMD_SIGNATURE;
1297 req->cdb[2] = CTLR_CONFIG_CMD;
1298 req->cdb[3] = CTLR_SHUTDOWN;
1299 } else {
1300 req->cdb[0] = CONTROLLER_CMD;
1301 req->cdb[1] = CTLR_POWER_STATE_CHANGE;
1302 req->cdb[2] = CTLR_POWER_SAVING;
1303 }
Jeff Garzik5a25ba12006-09-01 03:12:19 -04001304
1305 hba->ccb[tag].cmd = NULL;
1306 hba->ccb[tag].sg_count = 0;
1307 hba->ccb[tag].sense_bufflen = 0;
1308 hba->ccb[tag].sense_buffer = NULL;
1309 hba->ccb[tag].req_type |= PASSTHRU_REQ_TYPE;
1310
1311 stex_send_cmd(hba, req, tag);
1312 spin_unlock_irqrestore(hba->host->host_lock, flags);
1313
Ed Lincf355882006-09-01 14:31:51 +08001314 before = jiffies;
1315 while (hba->ccb[tag].req_type & PASSTHRU_REQ_TYPE) {
1316 if (time_after(jiffies, before + ST_INTERNAL_TIMEOUT * HZ))
1317 return;
1318 msleep(10);
1319 }
Jeff Garzik5a25ba12006-09-01 03:12:19 -04001320}
1321
1322static void stex_hba_free(struct st_hba *hba)
1323{
1324 free_irq(hba->pdev->irq, hba);
1325
1326 iounmap(hba->mmio_base);
1327
1328 pci_release_regions(hba->pdev);
1329
1330 dma_free_coherent(&hba->pdev->dev, STEX_BUFFER_SIZE,
1331 hba->dma_mem, hba->dma_handle);
1332}
1333
1334static void stex_remove(struct pci_dev *pdev)
1335{
1336 struct st_hba *hba = pci_get_drvdata(pdev);
1337
1338 scsi_remove_host(hba->host);
1339
1340 pci_set_drvdata(pdev, NULL);
1341
1342 stex_hba_stop(hba);
1343
1344 stex_hba_free(hba);
1345
1346 scsi_host_put(hba->host);
1347
1348 pci_disable_device(pdev);
1349}
1350
1351static void stex_shutdown(struct pci_dev *pdev)
1352{
1353 struct st_hba *hba = pci_get_drvdata(pdev);
1354
1355 stex_hba_stop(hba);
1356}
1357
1358static struct pci_device_id stex_pci_tbl[] = {
1359 { 0x105a, 0x8350, PCI_ANY_ID, PCI_ANY_ID, 0, 0, st_shasta },
1360 { 0x105a, 0xc350, PCI_ANY_ID, PCI_ANY_ID, 0, 0, st_shasta },
1361 { 0x105a, 0xf350, PCI_ANY_ID, PCI_ANY_ID, 0, 0, st_shasta },
1362 { 0x105a, 0x4301, PCI_ANY_ID, PCI_ANY_ID, 0, 0, st_shasta },
1363 { 0x105a, 0x4302, PCI_ANY_ID, PCI_ANY_ID, 0, 0, st_shasta },
1364 { 0x105a, 0x8301, PCI_ANY_ID, PCI_ANY_ID, 0, 0, st_shasta },
1365 { 0x105a, 0x8302, PCI_ANY_ID, PCI_ANY_ID, 0, 0, st_shasta },
1366 { 0x1725, 0x7250, PCI_ANY_ID, PCI_ANY_ID, 0, 0, st_vsc },
Ed Linfb4f66b2006-09-27 19:23:41 +08001367 { 0x105a, 0x8650, PCI_ANY_ID, PCI_ANY_ID, 0, 0, st_yosemite },
Jeff Garzik5a25ba12006-09-01 03:12:19 -04001368 { } /* terminate list */
1369};
1370MODULE_DEVICE_TABLE(pci, stex_pci_tbl);
1371
1372static struct pci_driver stex_pci_driver = {
1373 .name = DRV_NAME,
1374 .id_table = stex_pci_tbl,
1375 .probe = stex_probe,
1376 .remove = __devexit_p(stex_remove),
1377 .shutdown = stex_shutdown,
1378};
1379
1380static int __init stex_init(void)
1381{
1382 printk(KERN_INFO DRV_NAME
1383 ": Promise SuperTrak EX Driver version: %s\n",
1384 ST_DRIVER_VERSION);
1385
1386 return pci_register_driver(&stex_pci_driver);
1387}
1388
1389static void __exit stex_exit(void)
1390{
1391 pci_unregister_driver(&stex_pci_driver);
1392}
1393
1394module_init(stex_init);
1395module_exit(stex_exit);