Channagoud Kadabi | eee0ffd | 2016-08-11 14:18:17 -0700 | [diff] [blame^] | 1 | /* Copyright (c) 2010-2016, The Linux Foundation. All rights reserved. |
| 2 | * |
| 3 | * This program is free software; you can redistribute it and/or modify |
| 4 | * it under the terms of the GNU General Public License version 2 and |
| 5 | * only version 2 as published by the Free Software Foundation. |
| 6 | * |
| 7 | * This program is distributed in the hope that it will be useful, |
| 8 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 9 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 10 | * GNU General Public License for more details. |
| 11 | */ |
| 12 | #ifndef __MACH_SCM_H |
| 13 | #define __MACH_SCM_H |
| 14 | |
| 15 | #define SCM_SVC_BOOT 0x1 |
| 16 | #define SCM_SVC_PIL 0x2 |
| 17 | #define SCM_SVC_UTIL 0x3 |
| 18 | #define SCM_SVC_TZ 0x4 |
| 19 | #define SCM_SVC_IO 0x5 |
| 20 | #define SCM_SVC_INFO 0x6 |
| 21 | #define SCM_SVC_SSD 0x7 |
| 22 | #define SCM_SVC_FUSE 0x8 |
| 23 | #define SCM_SVC_PWR 0x9 |
| 24 | #define SCM_SVC_MP 0xC |
| 25 | #define SCM_SVC_DCVS 0xD |
| 26 | #define SCM_SVC_ES 0x10 |
| 27 | #define SCM_SVC_HDCP 0x11 |
| 28 | #define SCM_SVC_MDTP 0x12 |
| 29 | #define SCM_SVC_LMH 0x13 |
| 30 | #define SCM_SVC_SMMU_PROGRAM 0x15 |
| 31 | #define SCM_SVC_QDSS 0x16 |
| 32 | #define SCM_SVC_TZSCHEDULER 0xFC |
| 33 | |
| 34 | #define SCM_FUSE_READ 0x7 |
| 35 | #define SCM_CMD_HDCP 0x01 |
| 36 | |
| 37 | /* SCM Features */ |
| 38 | #define SCM_SVC_SEC_CAMERA 0xD |
| 39 | |
| 40 | #define DEFINE_SCM_BUFFER(__n) \ |
| 41 | static char __n[PAGE_SIZE] __aligned(PAGE_SIZE); |
| 42 | |
| 43 | #define SCM_BUFFER_SIZE(__buf) sizeof(__buf) |
| 44 | |
| 45 | #define SCM_BUFFER_PHYS(__buf) virt_to_phys(__buf) |
| 46 | |
| 47 | #define SCM_SIP_FNID(s, c) (((((s) & 0xFF) << 8) | ((c) & 0xFF)) | 0x02000000) |
| 48 | #define SCM_QSEEOS_FNID(s, c) (((((s) & 0xFF) << 8) | ((c) & 0xFF)) | \ |
| 49 | 0x32000000) |
| 50 | #define SCM_SVC_ID(s) (((s) & 0xFF00) >> 8) |
| 51 | |
| 52 | #define MAX_SCM_ARGS 10 |
| 53 | #define MAX_SCM_RETS 3 |
| 54 | |
| 55 | enum scm_arg_types { |
| 56 | SCM_VAL, |
| 57 | SCM_RO, |
| 58 | SCM_RW, |
| 59 | SCM_BUFVAL, |
| 60 | }; |
| 61 | |
| 62 | #define SCM_ARGS_IMPL(num, a, b, c, d, e, f, g, h, i, j, ...) (\ |
| 63 | (((a) & 0xff) << 4) | \ |
| 64 | (((b) & 0xff) << 6) | \ |
| 65 | (((c) & 0xff) << 8) | \ |
| 66 | (((d) & 0xff) << 10) | \ |
| 67 | (((e) & 0xff) << 12) | \ |
| 68 | (((f) & 0xff) << 14) | \ |
| 69 | (((g) & 0xff) << 16) | \ |
| 70 | (((h) & 0xff) << 18) | \ |
| 71 | (((i) & 0xff) << 20) | \ |
| 72 | (((j) & 0xff) << 22) | \ |
| 73 | (num & 0xffff)) |
| 74 | |
| 75 | #define SCM_ARGS(...) SCM_ARGS_IMPL(__VA_ARGS__, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0) |
| 76 | |
| 77 | /** |
| 78 | * struct scm_desc |
| 79 | * @arginfo: Metadata describing the arguments in args[] |
| 80 | * @args: The array of arguments for the secure syscall |
| 81 | * @ret: The values returned by the secure syscall |
| 82 | * @extra_arg_buf: The buffer containing extra arguments |
| 83 | (that don't fit in available registers) |
| 84 | * @x5: The 4rd argument to the secure syscall or physical address of |
| 85 | extra_arg_buf |
| 86 | */ |
| 87 | struct scm_desc { |
| 88 | u32 arginfo; |
| 89 | u64 args[MAX_SCM_ARGS]; |
| 90 | u64 ret[MAX_SCM_RETS]; |
| 91 | |
| 92 | /* private */ |
| 93 | void *extra_arg_buf; |
| 94 | u64 x5; |
| 95 | }; |
| 96 | |
| 97 | #ifdef CONFIG_QCOM_SCM |
| 98 | extern int scm_call(u32 svc_id, u32 cmd_id, const void *cmd_buf, size_t cmd_len, |
| 99 | void *resp_buf, size_t resp_len); |
| 100 | |
| 101 | extern int scm_call2(u32 cmd_id, struct scm_desc *desc); |
| 102 | |
| 103 | extern int scm_call2_atomic(u32 cmd_id, struct scm_desc *desc); |
| 104 | |
| 105 | extern int scm_call_noalloc(u32 svc_id, u32 cmd_id, const void *cmd_buf, |
| 106 | size_t cmd_len, void *resp_buf, size_t resp_len, |
| 107 | void *scm_buf, size_t scm_buf_size); |
| 108 | |
| 109 | |
| 110 | extern s32 scm_call_atomic1(u32 svc, u32 cmd, u32 arg1); |
| 111 | extern s32 scm_call_atomic1_1(u32 svc, u32 cmd, u32 arg1, u32 *ret1); |
| 112 | extern s32 scm_call_atomic2(u32 svc, u32 cmd, u32 arg1, u32 arg2); |
| 113 | extern s32 scm_call_atomic3(u32 svc, u32 cmd, u32 arg1, u32 arg2, u32 arg3); |
| 114 | extern s32 scm_call_atomic4_3(u32 svc, u32 cmd, u32 arg1, u32 arg2, u32 arg3, |
| 115 | u32 arg4, u32 *ret1, u32 *ret2); |
| 116 | extern s32 scm_call_atomic5_3(u32 svc, u32 cmd, u32 arg1, u32 arg2, u32 arg3, |
| 117 | u32 arg4, u32 arg5, u32 *ret1, u32 *ret2, u32 *ret3); |
| 118 | |
| 119 | #define SCM_VERSION(major, minor) (((major) << 16) | ((minor) & 0xFF)) |
| 120 | |
| 121 | extern u32 scm_get_version(void); |
| 122 | extern int scm_is_call_available(u32 svc_id, u32 cmd_id); |
| 123 | extern int scm_get_feat_version(u32 feat); |
| 124 | extern bool is_scm_armv8(void); |
| 125 | extern int scm_restore_sec_cfg(u32 device_id, u32 spare, int *scm_ret); |
| 126 | extern u32 scm_io_read(phys_addr_t address); |
| 127 | extern int scm_io_write(phys_addr_t address, u32 val); |
| 128 | extern bool scm_is_secure_device(void); |
| 129 | |
| 130 | #define SCM_HDCP_MAX_REG 5 |
| 131 | |
| 132 | struct scm_hdcp_req { |
| 133 | u32 addr; |
| 134 | u32 val; |
| 135 | }; |
| 136 | |
| 137 | extern struct mutex scm_lmh_lock; |
| 138 | |
| 139 | #else |
| 140 | |
| 141 | static inline int scm_call(u32 svc_id, u32 cmd_id, const void *cmd_buf, |
| 142 | size_t cmd_len, void *resp_buf, size_t resp_len) |
| 143 | { |
| 144 | return 0; |
| 145 | } |
| 146 | |
| 147 | static inline int scm_call2(u32 cmd_id, struct scm_desc *desc) |
| 148 | { |
| 149 | return 0; |
| 150 | } |
| 151 | |
| 152 | static inline int scm_call2_atomic(u32 cmd_id, struct scm_desc *desc) |
| 153 | { |
| 154 | return 0; |
| 155 | } |
| 156 | |
| 157 | static inline int scm_call_noalloc(u32 svc_id, u32 cmd_id, |
| 158 | const void *cmd_buf, size_t cmd_len, void *resp_buf, |
| 159 | size_t resp_len, void *scm_buf, size_t scm_buf_size) |
| 160 | { |
| 161 | return 0; |
| 162 | } |
| 163 | |
| 164 | static inline s32 scm_call_atomic1(u32 svc, u32 cmd, u32 arg1) |
| 165 | { |
| 166 | return 0; |
| 167 | } |
| 168 | |
| 169 | static inline s32 scm_call_atomic1_1(u32 svc, u32 cmd, u32 arg1, u32 *ret1) |
| 170 | { |
| 171 | return 0; |
| 172 | } |
| 173 | |
| 174 | static inline s32 scm_call_atomic2(u32 svc, u32 cmd, u32 arg1, u32 arg2) |
| 175 | { |
| 176 | return 0; |
| 177 | } |
| 178 | |
| 179 | static inline s32 scm_call_atomic3(u32 svc, u32 cmd, u32 arg1, u32 arg2, |
| 180 | u32 arg3) |
| 181 | { |
| 182 | return 0; |
| 183 | } |
| 184 | |
| 185 | static inline s32 scm_call_atomic4_3(u32 svc, u32 cmd, u32 arg1, u32 arg2, |
| 186 | u32 arg3, u32 arg4, u32 *ret1, u32 *ret2) |
| 187 | { |
| 188 | return 0; |
| 189 | } |
| 190 | |
| 191 | static inline s32 scm_call_atomic5_3(u32 svc, u32 cmd, u32 arg1, u32 arg2, |
| 192 | u32 arg3, u32 arg4, u32 arg5, u32 *ret1, u32 *ret2, u32 *ret3) |
| 193 | { |
| 194 | return 0; |
| 195 | } |
| 196 | |
| 197 | static inline u32 scm_get_version(void) |
| 198 | { |
| 199 | return 0; |
| 200 | } |
| 201 | |
| 202 | static inline int scm_is_call_available(u32 svc_id, u32 cmd_id) |
| 203 | { |
| 204 | return 0; |
| 205 | } |
| 206 | |
| 207 | static inline int scm_get_feat_version(u32 feat) |
| 208 | { |
| 209 | return 0; |
| 210 | } |
| 211 | |
| 212 | static inline bool is_scm_armv8(void) |
| 213 | { |
| 214 | return true; |
| 215 | } |
| 216 | |
| 217 | static inline int scm_restore_sec_cfg(u32 device_id, u32 spare, int *scm_ret) |
| 218 | { |
| 219 | return 0; |
| 220 | } |
| 221 | |
| 222 | static inline u32 scm_io_read(phys_addr_t address) |
| 223 | { |
| 224 | return 0; |
| 225 | } |
| 226 | |
| 227 | static inline int scm_io_write(phys_addr_t address, u32 val) |
| 228 | { |
| 229 | return 0; |
| 230 | } |
| 231 | |
| 232 | inline bool scm_is_secure_device(void) |
| 233 | { |
| 234 | return false; |
| 235 | } |
| 236 | #endif |
| 237 | #endif |