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Kou Ishizakibde18a22007-02-17 02:40:22 +01001/*
2 * Support for IDE interfaces on Celleb platform
3 *
4 * (C) Copyright 2006 TOSHIBA CORPORATION
5 *
6 * This code is based on drivers/ide/pci/siimage.c:
7 * Copyright (C) 2001-2002 Andre Hedrick <andre@linux-ide.org>
8 * Copyright (C) 2003 Red Hat <alan@redhat.com>
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License along
21 * with this program; if not, write to the Free Software Foundation, Inc.,
22 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
23 */
24
25#include <linux/types.h>
26#include <linux/module.h>
27#include <linux/pci.h>
28#include <linux/delay.h>
29#include <linux/hdreg.h>
30#include <linux/ide.h>
31#include <linux/init.h>
32
33#define PCI_DEVICE_ID_TOSHIBA_SCC_ATA 0x01b4
34
35#define SCC_PATA_NAME "scc IDE"
36
37#define TDVHSEL_MASTER 0x00000001
38#define TDVHSEL_SLAVE 0x00000004
39
40#define MODE_JCUSFEN 0x00000080
41
42#define CCKCTRL_ATARESET 0x00040000
43#define CCKCTRL_BUFCNT 0x00020000
44#define CCKCTRL_CRST 0x00010000
45#define CCKCTRL_OCLKEN 0x00000100
46#define CCKCTRL_ATACLKOEN 0x00000002
47#define CCKCTRL_LCLKEN 0x00000001
48
49#define QCHCD_IOS_SS 0x00000001
50
51#define QCHSD_STPDIAG 0x00020000
52
53#define INTMASK_MSK 0xD1000012
54#define INTSTS_SERROR 0x80000000
55#define INTSTS_PRERR 0x40000000
56#define INTSTS_RERR 0x10000000
57#define INTSTS_ICERR 0x01000000
58#define INTSTS_BMSINT 0x00000010
59#define INTSTS_BMHE 0x00000008
60#define INTSTS_IOIRQS 0x00000004
61#define INTSTS_INTRQ 0x00000002
62#define INTSTS_ACTEINT 0x00000001
63
64#define ECMODE_VALUE 0x01
65
66static struct scc_ports {
67 unsigned long ctl, dma;
Bartlomiej Zolnierkiewicz589b0622008-04-26 17:36:34 +020068 ide_hwif_t *hwif; /* for removing port from system */
Kou Ishizakibde18a22007-02-17 02:40:22 +010069} scc_ports[MAX_HWIFS];
70
71/* PIO transfer mode table */
72/* JCHST */
73static unsigned long JCHSTtbl[2][7] = {
74 {0x0E, 0x05, 0x02, 0x03, 0x02, 0x00, 0x00}, /* 100MHz */
75 {0x13, 0x07, 0x04, 0x04, 0x03, 0x00, 0x00} /* 133MHz */
76};
77
78/* JCHHT */
79static unsigned long JCHHTtbl[2][7] = {
80 {0x0E, 0x02, 0x02, 0x02, 0x02, 0x00, 0x00}, /* 100MHz */
81 {0x13, 0x03, 0x03, 0x03, 0x03, 0x00, 0x00} /* 133MHz */
82};
83
84/* JCHCT */
85static unsigned long JCHCTtbl[2][7] = {
86 {0x1D, 0x1D, 0x1C, 0x0B, 0x06, 0x00, 0x00}, /* 100MHz */
87 {0x27, 0x26, 0x26, 0x0E, 0x09, 0x00, 0x00} /* 133MHz */
88};
89
90
91/* DMA transfer mode table */
92/* JCHDCTM/JCHDCTS */
93static unsigned long JCHDCTxtbl[2][7] = {
94 {0x0A, 0x06, 0x04, 0x03, 0x01, 0x00, 0x00}, /* 100MHz */
95 {0x0E, 0x09, 0x06, 0x04, 0x02, 0x01, 0x00} /* 133MHz */
96};
97
98/* JCSTWTM/JCSTWTS */
99static unsigned long JCSTWTxtbl[2][7] = {
100 {0x06, 0x04, 0x03, 0x02, 0x02, 0x02, 0x00}, /* 100MHz */
101 {0x09, 0x06, 0x04, 0x02, 0x02, 0x02, 0x02} /* 133MHz */
102};
103
104/* JCTSS */
105static unsigned long JCTSStbl[2][7] = {
106 {0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x00}, /* 100MHz */
107 {0x05, 0x05, 0x05, 0x05, 0x05, 0x05, 0x05} /* 133MHz */
108};
109
110/* JCENVT */
111static unsigned long JCENVTtbl[2][7] = {
112 {0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x00}, /* 100MHz */
113 {0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02} /* 133MHz */
114};
115
116/* JCACTSELS/JCACTSELM */
117static unsigned long JCACTSELtbl[2][7] = {
118 {0x00, 0x00, 0x00, 0x00, 0x01, 0x01, 0x00}, /* 100MHz */
119 {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01} /* 133MHz */
120};
121
122
123static u8 scc_ide_inb(unsigned long port)
124{
125 u32 data = in_be32((void*)port);
126 return (u8)data;
127}
128
129static u16 scc_ide_inw(unsigned long port)
130{
131 u32 data = in_be32((void*)port);
132 return (u16)data;
133}
134
Kou Ishizakibde18a22007-02-17 02:40:22 +0100135static void scc_ide_insw(unsigned long port, void *addr, u32 count)
136{
137 u16 *ptr = (u16 *)addr;
138 while (count--) {
139 *ptr++ = le16_to_cpu(in_be32((void*)port));
140 }
141}
142
143static void scc_ide_insl(unsigned long port, void *addr, u32 count)
144{
145 u16 *ptr = (u16 *)addr;
146 while (count--) {
147 *ptr++ = le16_to_cpu(in_be32((void*)port));
148 *ptr++ = le16_to_cpu(in_be32((void*)port));
149 }
150}
151
152static void scc_ide_outb(u8 addr, unsigned long port)
153{
154 out_be32((void*)port, addr);
155}
156
157static void scc_ide_outw(u16 addr, unsigned long port)
158{
159 out_be32((void*)port, addr);
160}
161
Kou Ishizakibde18a22007-02-17 02:40:22 +0100162static void
163scc_ide_outbsync(ide_drive_t * drive, u8 addr, unsigned long port)
164{
165 ide_hwif_t *hwif = HWIF(drive);
166
167 out_be32((void*)port, addr);
Kumar Galaf644d472007-07-20 01:11:53 +0200168 eieio();
Kou Ishizakibde18a22007-02-17 02:40:22 +0100169 in_be32((void*)(hwif->dma_base + 0x01c));
Kumar Galaf644d472007-07-20 01:11:53 +0200170 eieio();
Kou Ishizakibde18a22007-02-17 02:40:22 +0100171}
172
173static void
174scc_ide_outsw(unsigned long port, void *addr, u32 count)
175{
176 u16 *ptr = (u16 *)addr;
177 while (count--) {
178 out_be32((void*)port, cpu_to_le16(*ptr++));
179 }
180}
181
182static void
183scc_ide_outsl(unsigned long port, void *addr, u32 count)
184{
185 u16 *ptr = (u16 *)addr;
186 while (count--) {
187 out_be32((void*)port, cpu_to_le16(*ptr++));
188 out_be32((void*)port, cpu_to_le16(*ptr++));
189 }
190}
191
192/**
Bartlomiej Zolnierkiewicz88b2b322007-10-13 17:47:51 +0200193 * scc_set_pio_mode - set host controller for PIO mode
194 * @drive: drive
195 * @pio: PIO mode number
Kou Ishizakibde18a22007-02-17 02:40:22 +0100196 *
197 * Load the timing settings for this device mode into the
198 * controller.
199 */
200
Bartlomiej Zolnierkiewicz88b2b322007-10-13 17:47:51 +0200201static void scc_set_pio_mode(ide_drive_t *drive, const u8 pio)
Kou Ishizakibde18a22007-02-17 02:40:22 +0100202{
203 ide_hwif_t *hwif = HWIF(drive);
204 struct scc_ports *ports = ide_get_hwifdata(hwif);
205 unsigned long ctl_base = ports->ctl;
206 unsigned long cckctrl_port = ctl_base + 0xff0;
207 unsigned long piosht_port = ctl_base + 0x000;
208 unsigned long pioct_port = ctl_base + 0x004;
209 unsigned long reg;
Kou Ishizakibde18a22007-02-17 02:40:22 +0100210 int offset;
211
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +0100212 reg = in_be32((void __iomem *)cckctrl_port);
Kou Ishizakibde18a22007-02-17 02:40:22 +0100213 if (reg & CCKCTRL_ATACLKOEN) {
214 offset = 1; /* 133MHz */
215 } else {
216 offset = 0; /* 100MHz */
217 }
Bartlomiej Zolnierkiewicz3fcece62007-08-01 23:46:46 +0200218 reg = JCHSTtbl[offset][pio] << 16 | JCHHTtbl[offset][pio];
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +0100219 out_be32((void __iomem *)piosht_port, reg);
Bartlomiej Zolnierkiewicz3fcece62007-08-01 23:46:46 +0200220 reg = JCHCTtbl[offset][pio];
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +0100221 out_be32((void __iomem *)pioct_port, reg);
Bartlomiej Zolnierkiewicz3fcece62007-08-01 23:46:46 +0200222}
Kou Ishizakibde18a22007-02-17 02:40:22 +0100223
Kou Ishizakibde18a22007-02-17 02:40:22 +0100224/**
Bartlomiej Zolnierkiewicz88b2b322007-10-13 17:47:51 +0200225 * scc_set_dma_mode - set host controller for DMA mode
226 * @drive: drive
227 * @speed: DMA mode
Kou Ishizakibde18a22007-02-17 02:40:22 +0100228 *
229 * Load the timing settings for this device mode into the
230 * controller.
231 */
232
Bartlomiej Zolnierkiewicz88b2b322007-10-13 17:47:51 +0200233static void scc_set_dma_mode(ide_drive_t *drive, const u8 speed)
Kou Ishizakibde18a22007-02-17 02:40:22 +0100234{
235 ide_hwif_t *hwif = HWIF(drive);
Kou Ishizakibde18a22007-02-17 02:40:22 +0100236 struct scc_ports *ports = ide_get_hwifdata(hwif);
237 unsigned long ctl_base = ports->ctl;
238 unsigned long cckctrl_port = ctl_base + 0xff0;
239 unsigned long mdmact_port = ctl_base + 0x008;
240 unsigned long mcrcst_port = ctl_base + 0x00c;
241 unsigned long sdmact_port = ctl_base + 0x010;
242 unsigned long scrcst_port = ctl_base + 0x014;
243 unsigned long udenvt_port = ctl_base + 0x018;
244 unsigned long tdvhsel_port = ctl_base + 0x020;
245 int is_slave = (&hwif->drives[1] == drive);
246 int offset, idx;
247 unsigned long reg;
248 unsigned long jcactsel;
249
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +0100250 reg = in_be32((void __iomem *)cckctrl_port);
Kou Ishizakibde18a22007-02-17 02:40:22 +0100251 if (reg & CCKCTRL_ATACLKOEN) {
252 offset = 1; /* 133MHz */
253 } else {
254 offset = 0; /* 100MHz */
255 }
256
Bartlomiej Zolnierkiewicz4db90a12008-01-25 22:17:18 +0100257 idx = speed - XFER_UDMA_0;
Kou Ishizakibde18a22007-02-17 02:40:22 +0100258
259 jcactsel = JCACTSELtbl[offset][idx];
260 if (is_slave) {
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +0100261 out_be32((void __iomem *)sdmact_port, JCHDCTxtbl[offset][idx]);
262 out_be32((void __iomem *)scrcst_port, JCSTWTxtbl[offset][idx]);
263 jcactsel = jcactsel << 2;
264 out_be32((void __iomem *)tdvhsel_port, (in_be32((void __iomem *)tdvhsel_port) & ~TDVHSEL_SLAVE) | jcactsel);
Kou Ishizakibde18a22007-02-17 02:40:22 +0100265 } else {
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +0100266 out_be32((void __iomem *)mdmact_port, JCHDCTxtbl[offset][idx]);
267 out_be32((void __iomem *)mcrcst_port, JCSTWTxtbl[offset][idx]);
268 out_be32((void __iomem *)tdvhsel_port, (in_be32((void __iomem *)tdvhsel_port) & ~TDVHSEL_MASTER) | jcactsel);
Kou Ishizakibde18a22007-02-17 02:40:22 +0100269 }
270 reg = JCTSStbl[offset][idx] << 16 | JCENVTtbl[offset][idx];
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +0100271 out_be32((void __iomem *)udenvt_port, reg);
Kou Ishizakibde18a22007-02-17 02:40:22 +0100272}
273
274/**
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +0100275 * scc_ide_dma_setup - begin a DMA phase
276 * @drive: target device
277 *
278 * Build an IDE DMA PRD (IDE speak for scatter gather table)
279 * and then set up the DMA transfer registers.
280 *
281 * Returns 0 on success. If a PIO fallback is required then 1
282 * is returned.
283 */
284
285static int scc_dma_setup(ide_drive_t *drive)
286{
287 ide_hwif_t *hwif = drive->hwif;
288 struct request *rq = HWGROUP(drive)->rq;
289 unsigned int reading;
290 u8 dma_stat;
291
292 if (rq_data_dir(rq))
293 reading = 0;
294 else
295 reading = 1 << 3;
296
297 /* fall back to pio! */
298 if (!ide_build_dmatable(drive, rq)) {
299 ide_map_sg(drive, rq);
300 return 1;
301 }
302
303 /* PRD table */
304 out_be32((void __iomem *)hwif->dma_prdtable, hwif->dmatable_dma);
305
306 /* specify r/w */
307 out_be32((void __iomem *)hwif->dma_command, reading);
308
309 /* read dma_status for INTR & ERROR flags */
310 dma_stat = in_be32((void __iomem *)hwif->dma_status);
311
312 /* clear INTR & ERROR flags */
313 out_be32((void __iomem *)hwif->dma_status, dma_stat|6);
314 drive->waiting_for_dma = 1;
315 return 0;
316}
317
318
319/**
Bartlomiej Zolnierkiewicz5e37bdc2008-04-26 22:25:24 +0200320 * scc_dma_end - Stop DMA
Kou Ishizakibde18a22007-02-17 02:40:22 +0100321 * @drive: IDE drive
322 *
323 * Check and clear INT Status register.
324 * Then call __ide_dma_end().
325 */
326
Bartlomiej Zolnierkiewicz5e37bdc2008-04-26 22:25:24 +0200327static int scc_dma_end(ide_drive_t *drive)
Kou Ishizakibde18a22007-02-17 02:40:22 +0100328{
329 ide_hwif_t *hwif = HWIF(drive);
330 unsigned long intsts_port = hwif->dma_base + 0x014;
331 u32 reg;
Kou Ishizaki4ae41ff2007-07-20 01:11:53 +0200332 int dma_stat, data_loss = 0;
333 static int retry = 0;
334
335 /* errata A308 workaround: Step5 (check data loss) */
336 /* We don't check non ide_disk because it is limited to UDMA4 */
Bartlomiej Zolnierkiewicz4c3032d2008-04-27 15:38:32 +0200337 if (!(in_be32((void __iomem *)hwif->io_ports.ctl_addr)
Bartlomiej Zolnierkiewicz23579a22008-04-18 00:46:26 +0200338 & ERR_STAT) &&
Kou Ishizaki4ae41ff2007-07-20 01:11:53 +0200339 drive->media == ide_disk && drive->current_speed > XFER_UDMA_4) {
340 reg = in_be32((void __iomem *)intsts_port);
341 if (!(reg & INTSTS_ACTEINT)) {
342 printk(KERN_WARNING "%s: operation failed (transfer data loss)\n",
343 drive->name);
344 data_loss = 1;
345 if (retry++) {
346 struct request *rq = HWGROUP(drive)->rq;
347 int unit;
348 /* ERROR_RESET and drive->crc_count are needed
349 * to reduce DMA transfer mode in retry process.
350 */
351 if (rq)
352 rq->errors |= ERROR_RESET;
353 for (unit = 0; unit < MAX_DRIVES; unit++) {
354 ide_drive_t *drive = &hwif->drives[unit];
355 drive->crc_count++;
356 }
357 }
358 }
359 }
Kou Ishizakibde18a22007-02-17 02:40:22 +0100360
361 while (1) {
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +0100362 reg = in_be32((void __iomem *)intsts_port);
Kou Ishizakibde18a22007-02-17 02:40:22 +0100363
364 if (reg & INTSTS_SERROR) {
365 printk(KERN_WARNING "%s: SERROR\n", SCC_PATA_NAME);
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +0100366 out_be32((void __iomem *)intsts_port, INTSTS_SERROR|INTSTS_BMSINT);
Kou Ishizakibde18a22007-02-17 02:40:22 +0100367
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +0100368 out_be32((void __iomem *)hwif->dma_command, in_be32((void __iomem *)hwif->dma_command) & ~QCHCD_IOS_SS);
Kou Ishizakibde18a22007-02-17 02:40:22 +0100369 continue;
370 }
371
372 if (reg & INTSTS_PRERR) {
373 u32 maea0, maec0;
374 unsigned long ctl_base = hwif->config_data;
375
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +0100376 maea0 = in_be32((void __iomem *)(ctl_base + 0xF50));
377 maec0 = in_be32((void __iomem *)(ctl_base + 0xF54));
Kou Ishizakibde18a22007-02-17 02:40:22 +0100378
379 printk(KERN_WARNING "%s: PRERR [addr:%x cmd:%x]\n", SCC_PATA_NAME, maea0, maec0);
380
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +0100381 out_be32((void __iomem *)intsts_port, INTSTS_PRERR|INTSTS_BMSINT);
Kou Ishizakibde18a22007-02-17 02:40:22 +0100382
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +0100383 out_be32((void __iomem *)hwif->dma_command, in_be32((void __iomem *)hwif->dma_command) & ~QCHCD_IOS_SS);
Kou Ishizakibde18a22007-02-17 02:40:22 +0100384 continue;
385 }
386
387 if (reg & INTSTS_RERR) {
388 printk(KERN_WARNING "%s: Response Error\n", SCC_PATA_NAME);
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +0100389 out_be32((void __iomem *)intsts_port, INTSTS_RERR|INTSTS_BMSINT);
Kou Ishizakibde18a22007-02-17 02:40:22 +0100390
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +0100391 out_be32((void __iomem *)hwif->dma_command, in_be32((void __iomem *)hwif->dma_command) & ~QCHCD_IOS_SS);
Kou Ishizakibde18a22007-02-17 02:40:22 +0100392 continue;
393 }
394
395 if (reg & INTSTS_ICERR) {
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +0100396 out_be32((void __iomem *)hwif->dma_command, in_be32((void __iomem *)hwif->dma_command) & ~QCHCD_IOS_SS);
Kou Ishizakibde18a22007-02-17 02:40:22 +0100397
398 printk(KERN_WARNING "%s: Illegal Configuration\n", SCC_PATA_NAME);
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +0100399 out_be32((void __iomem *)intsts_port, INTSTS_ICERR|INTSTS_BMSINT);
Kou Ishizakibde18a22007-02-17 02:40:22 +0100400 continue;
401 }
402
403 if (reg & INTSTS_BMSINT) {
404 printk(KERN_WARNING "%s: Internal Bus Error\n", SCC_PATA_NAME);
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +0100405 out_be32((void __iomem *)intsts_port, INTSTS_BMSINT);
Kou Ishizakibde18a22007-02-17 02:40:22 +0100406
407 ide_do_reset(drive);
408 continue;
409 }
410
411 if (reg & INTSTS_BMHE) {
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +0100412 out_be32((void __iomem *)intsts_port, INTSTS_BMHE);
Kou Ishizakibde18a22007-02-17 02:40:22 +0100413 continue;
414 }
415
416 if (reg & INTSTS_ACTEINT) {
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +0100417 out_be32((void __iomem *)intsts_port, INTSTS_ACTEINT);
Kou Ishizakibde18a22007-02-17 02:40:22 +0100418 continue;
419 }
420
421 if (reg & INTSTS_IOIRQS) {
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +0100422 out_be32((void __iomem *)intsts_port, INTSTS_IOIRQS);
Kou Ishizakibde18a22007-02-17 02:40:22 +0100423 continue;
424 }
425 break;
426 }
427
Kou Ishizaki4ae41ff2007-07-20 01:11:53 +0200428 dma_stat = __ide_dma_end(drive);
429 if (data_loss)
430 dma_stat |= 2; /* emulate DMA error (to retry command) */
431 return dma_stat;
Kou Ishizakibde18a22007-02-17 02:40:22 +0100432}
433
Akira Iguchi06a99522007-03-03 17:48:55 +0100434/* returns 1 if dma irq issued, 0 otherwise */
435static int scc_dma_test_irq(ide_drive_t *drive)
436{
Kou Ishizaki4ae41ff2007-07-20 01:11:53 +0200437 ide_hwif_t *hwif = HWIF(drive);
438 u32 int_stat = in_be32((void __iomem *)hwif->dma_base + 0x014);
Akira Iguchi06a99522007-03-03 17:48:55 +0100439
Kou Ishizaki4ae41ff2007-07-20 01:11:53 +0200440 /* SCC errata A252,A308 workaround: Step4 */
Bartlomiej Zolnierkiewicz4c3032d2008-04-27 15:38:32 +0200441 if ((in_be32((void __iomem *)hwif->io_ports.ctl_addr)
Bartlomiej Zolnierkiewicz23579a22008-04-18 00:46:26 +0200442 & ERR_STAT) &&
Kou Ishizaki4ae41ff2007-07-20 01:11:53 +0200443 (int_stat & INTSTS_INTRQ))
Akira Iguchi06a99522007-03-03 17:48:55 +0100444 return 1;
445
Kou Ishizaki4ae41ff2007-07-20 01:11:53 +0200446 /* SCC errata A308 workaround: Step5 (polling IOIRQS) */
447 if (int_stat & INTSTS_IOIRQS)
Akira Iguchi06a99522007-03-03 17:48:55 +0100448 return 1;
449
450 if (!drive->waiting_for_dma)
451 printk(KERN_WARNING "%s: (%s) called while not waiting\n",
Harvey Harrisoneb639632008-04-26 22:25:20 +0200452 drive->name, __func__);
Akira Iguchi06a99522007-03-03 17:48:55 +0100453 return 0;
454}
455
Kou Ishizaki4ae41ff2007-07-20 01:11:53 +0200456static u8 scc_udma_filter(ide_drive_t *drive)
457{
458 ide_hwif_t *hwif = drive->hwif;
459 u8 mask = hwif->ultra_mask;
460
461 /* errata A308 workaround: limit non ide_disk drive to UDMA4 */
462 if ((drive->media != ide_disk) && (mask & 0xE0)) {
463 printk(KERN_INFO "%s: limit %s to UDMA4\n",
464 SCC_PATA_NAME, drive->name);
Bartlomiej Zolnierkiewicz5f8b6c32007-10-19 00:30:07 +0200465 mask = ATA_UDMA4;
Kou Ishizaki4ae41ff2007-07-20 01:11:53 +0200466 }
467
468 return mask;
469}
470
Kou Ishizakibde18a22007-02-17 02:40:22 +0100471/**
472 * setup_mmio_scc - map CTRL/BMID region
473 * @dev: PCI device we are configuring
474 * @name: device name
475 *
476 */
477
478static int setup_mmio_scc (struct pci_dev *dev, const char *name)
479{
480 unsigned long ctl_base = pci_resource_start(dev, 0);
481 unsigned long dma_base = pci_resource_start(dev, 1);
482 unsigned long ctl_size = pci_resource_len(dev, 0);
483 unsigned long dma_size = pci_resource_len(dev, 1);
Al Viro0bd84962007-07-26 17:36:09 +0100484 void __iomem *ctl_addr;
485 void __iomem *dma_addr;
Bartlomiej Zolnierkiewicz0d1bad22008-04-26 22:25:19 +0200486 int i, ret;
Kou Ishizakibde18a22007-02-17 02:40:22 +0100487
488 for (i = 0; i < MAX_HWIFS; i++) {
489 if (scc_ports[i].ctl == 0)
490 break;
491 }
492 if (i >= MAX_HWIFS)
493 return -ENOMEM;
494
Bartlomiej Zolnierkiewicz0d1bad22008-04-26 22:25:19 +0200495 ret = pci_request_selected_regions(dev, (1 << 2) - 1, name);
496 if (ret < 0) {
497 printk(KERN_ERR "%s: can't reserve resources\n", name);
498 return ret;
Kou Ishizakibde18a22007-02-17 02:40:22 +0100499 }
500
501 if ((ctl_addr = ioremap(ctl_base, ctl_size)) == NULL)
Bartlomiej Zolnierkiewicz0d1bad22008-04-26 22:25:19 +0200502 goto fail_0;
Kou Ishizakibde18a22007-02-17 02:40:22 +0100503
504 if ((dma_addr = ioremap(dma_base, dma_size)) == NULL)
Bartlomiej Zolnierkiewicz0d1bad22008-04-26 22:25:19 +0200505 goto fail_1;
Kou Ishizakibde18a22007-02-17 02:40:22 +0100506
507 pci_set_master(dev);
508 scc_ports[i].ctl = (unsigned long)ctl_addr;
509 scc_ports[i].dma = (unsigned long)dma_addr;
510 pci_set_drvdata(dev, (void *) &scc_ports[i]);
511
512 return 1;
513
Kou Ishizakibde18a22007-02-17 02:40:22 +0100514 fail_1:
Bartlomiej Zolnierkiewicz0d1bad22008-04-26 22:25:19 +0200515 iounmap(ctl_addr);
Kou Ishizakibde18a22007-02-17 02:40:22 +0100516 fail_0:
517 return -ENOMEM;
518}
519
Akira Iguchi3d53ba82008-04-18 00:46:25 +0200520static int scc_ide_setup_pci_device(struct pci_dev *dev,
521 const struct ide_port_info *d)
522{
523 struct scc_ports *ports = pci_get_drvdata(dev);
524 ide_hwif_t *hwif = NULL;
525 hw_regs_t hw;
526 u8 idx[4] = { 0xff, 0xff, 0xff, 0xff };
527 int i;
528
Bartlomiej Zolnierkiewicz3fd4d202008-04-26 17:36:33 +0200529 hwif = ide_find_port();
530 if (hwif == NULL) {
Akira Iguchi3d53ba82008-04-18 00:46:25 +0200531 printk(KERN_ERR "%s: too many IDE interfaces, "
532 "no room in table\n", SCC_PATA_NAME);
533 return -ENOMEM;
534 }
535
536 memset(&hw, 0, sizeof(hw));
Bartlomiej Zolnierkiewicz4c3032d2008-04-27 15:38:32 +0200537 for (i = 0; i <= 8; i++)
538 hw.io_ports_array[i] = ports->dma + 0x20 + i * 4;
Akira Iguchi3d53ba82008-04-18 00:46:25 +0200539 hw.irq = dev->irq;
540 hw.dev = &dev->dev;
541 hw.chipset = ide_pci;
542 ide_init_port_hw(hwif, &hw);
543 hwif->dev = &dev->dev;
Akira Iguchi3d53ba82008-04-18 00:46:25 +0200544
545 idx[0] = hwif->index;
546
547 ide_device_add(idx, d);
548
549 return 0;
550}
551
Kou Ishizakibde18a22007-02-17 02:40:22 +0100552/**
553 * init_setup_scc - set up an SCC PATA Controller
554 * @dev: PCI device
Bartlomiej Zolnierkiewicz039788e2007-10-20 00:32:34 +0200555 * @d: IDE port info
Kou Ishizakibde18a22007-02-17 02:40:22 +0100556 *
557 * Perform the initial set up for this device.
558 */
559
Bartlomiej Zolnierkiewicz039788e2007-10-20 00:32:34 +0200560static int __devinit init_setup_scc(struct pci_dev *dev,
Bartlomiej Zolnierkiewicz85620432007-10-20 00:32:34 +0200561 const struct ide_port_info *d)
Kou Ishizakibde18a22007-02-17 02:40:22 +0100562{
563 unsigned long ctl_base;
564 unsigned long dma_base;
565 unsigned long cckctrl_port;
566 unsigned long intmask_port;
567 unsigned long mode_port;
568 unsigned long ecmode_port;
569 unsigned long dma_status_port;
570 u32 reg = 0;
571 struct scc_ports *ports;
572 int rc;
573
Akira Iguchi3d53ba82008-04-18 00:46:25 +0200574 rc = pci_enable_device(dev);
575 if (rc)
576 goto end;
577
Kou Ishizakibde18a22007-02-17 02:40:22 +0100578 rc = setup_mmio_scc(dev, d->name);
Akira Iguchi3d53ba82008-04-18 00:46:25 +0200579 if (rc < 0)
580 goto end;
Kou Ishizakibde18a22007-02-17 02:40:22 +0100581
582 ports = pci_get_drvdata(dev);
583 ctl_base = ports->ctl;
584 dma_base = ports->dma;
585 cckctrl_port = ctl_base + 0xff0;
586 intmask_port = dma_base + 0x010;
587 mode_port = ctl_base + 0x024;
588 ecmode_port = ctl_base + 0xf00;
589 dma_status_port = dma_base + 0x004;
590
591 /* controller initialization */
592 reg = 0;
593 out_be32((void*)cckctrl_port, reg);
594 reg |= CCKCTRL_ATACLKOEN;
595 out_be32((void*)cckctrl_port, reg);
596 reg |= CCKCTRL_LCLKEN | CCKCTRL_OCLKEN;
597 out_be32((void*)cckctrl_port, reg);
598 reg |= CCKCTRL_CRST;
599 out_be32((void*)cckctrl_port, reg);
600
601 for (;;) {
602 reg = in_be32((void*)cckctrl_port);
603 if (reg & CCKCTRL_CRST)
604 break;
605 udelay(5000);
606 }
607
608 reg |= CCKCTRL_ATARESET;
609 out_be32((void*)cckctrl_port, reg);
610
611 out_be32((void*)ecmode_port, ECMODE_VALUE);
612 out_be32((void*)mode_port, MODE_JCUSFEN);
613 out_be32((void*)intmask_port, INTMASK_MSK);
614
Akira Iguchi3d53ba82008-04-18 00:46:25 +0200615 rc = scc_ide_setup_pci_device(dev, d);
616
617 end:
618 return rc;
Kou Ishizakibde18a22007-02-17 02:40:22 +0100619}
620
Bartlomiej Zolnierkiewiczefa3db12008-04-28 23:44:36 +0200621static void scc_input_data(ide_drive_t *drive, struct request *rq,
622 void *buf, unsigned int len)
623{
624 unsigned long data_addr = drive->hwif->io_ports.data_addr;
625
626 len++;
627
628 if (drive->io_32bit) {
629 scc_ide_insl(data_addr, buf, len / 4);
630
631 if ((len & 3) >= 2)
632 scc_ide_insw(data_addr, (u8 *)buf + (len & ~3), 1);
633 } else
634 scc_ide_insw(data_addr, buf, len / 2);
635}
636
637static void scc_output_data(ide_drive_t *drive, struct request *rq,
638 void *buf, unsigned int len)
639{
640 unsigned long data_addr = drive->hwif->io_ports.data_addr;
641
642 len++;
643
644 if (drive->io_32bit) {
645 scc_ide_outsl(data_addr, buf, len / 4);
646
647 if ((len & 3) >= 2)
648 scc_ide_outsw(data_addr, (u8 *)buf + (len & ~3), 1);
649 } else
650 scc_ide_outsw(data_addr, buf, len / 2);
651}
652
Kou Ishizakibde18a22007-02-17 02:40:22 +0100653/**
654 * init_mmio_iops_scc - set up the iops for MMIO
655 * @hwif: interface to set up
656 *
657 */
658
659static void __devinit init_mmio_iops_scc(ide_hwif_t *hwif)
660{
Bartlomiej Zolnierkiewicz36501652008-02-01 23:09:31 +0100661 struct pci_dev *dev = to_pci_dev(hwif->dev);
Kou Ishizakibde18a22007-02-17 02:40:22 +0100662 struct scc_ports *ports = pci_get_drvdata(dev);
663 unsigned long dma_base = ports->dma;
664
665 ide_set_hwifdata(hwif, ports);
666
Bartlomiej Zolnierkiewiczefa3db12008-04-28 23:44:36 +0200667 hwif->input_data = scc_input_data;
668 hwif->output_data = scc_output_data;
669
Kou Ishizakibde18a22007-02-17 02:40:22 +0100670 hwif->INB = scc_ide_inb;
671 hwif->INW = scc_ide_inw;
Kou Ishizakibde18a22007-02-17 02:40:22 +0100672 hwif->INSW = scc_ide_insw;
673 hwif->INSL = scc_ide_insl;
674 hwif->OUTB = scc_ide_outb;
675 hwif->OUTBSYNC = scc_ide_outbsync;
676 hwif->OUTW = scc_ide_outw;
Kou Ishizakibde18a22007-02-17 02:40:22 +0100677 hwif->OUTSW = scc_ide_outsw;
678 hwif->OUTSL = scc_ide_outsl;
679
Kou Ishizakibde18a22007-02-17 02:40:22 +0100680 hwif->dma_base = dma_base;
681 hwif->config_data = ports->ctl;
Bartlomiej Zolnierkiewicz2ad1e552007-02-17 02:40:25 +0100682 hwif->mmio = 1;
Kou Ishizakibde18a22007-02-17 02:40:22 +0100683}
684
685/**
686 * init_iops_scc - set up iops
687 * @hwif: interface to set up
688 *
689 * Do the basic setup for the SCC hardware interface
690 * and then do the MMIO setup.
691 */
692
693static void __devinit init_iops_scc(ide_hwif_t *hwif)
694{
Bartlomiej Zolnierkiewicz36501652008-02-01 23:09:31 +0100695 struct pci_dev *dev = to_pci_dev(hwif->dev);
696
Kou Ishizakibde18a22007-02-17 02:40:22 +0100697 hwif->hwif_data = NULL;
698 if (pci_get_drvdata(dev) == NULL)
699 return;
700 init_mmio_iops_scc(hwif);
701}
702
Bartlomiej Zolnierkiewiczb4d1c732008-02-02 19:56:29 +0100703static u8 __devinit scc_cable_detect(ide_hwif_t *hwif)
704{
705 return ATA_CBL_PATA80;
706}
707
Kou Ishizakibde18a22007-02-17 02:40:22 +0100708/**
709 * init_hwif_scc - set up hwif
710 * @hwif: interface to set up
711 *
712 * We do the basic set up of the interface structure. The SCC
713 * requires several custom handlers so we override the default
714 * ide DMA handlers appropriately.
715 */
716
717static void __devinit init_hwif_scc(ide_hwif_t *hwif)
718{
719 struct scc_ports *ports = ide_get_hwifdata(hwif);
720
Bartlomiej Zolnierkiewicz589b0622008-04-26 17:36:34 +0200721 ports->hwif = hwif;
Kou Ishizakibde18a22007-02-17 02:40:22 +0100722
723 hwif->dma_command = hwif->dma_base;
724 hwif->dma_status = hwif->dma_base + 0x04;
725 hwif->dma_prdtable = hwif->dma_base + 0x08;
726
Bartlomiej Zolnierkiewicz0ecdca22007-02-17 02:40:25 +0100727 /* PTERADD */
728 out_be32((void __iomem *)(hwif->dma_base + 0x018), hwif->dmatable_dma);
Kou Ishizakibde18a22007-02-17 02:40:22 +0100729
Bartlomiej Zolnierkiewicz5f8b6c32007-10-19 00:30:07 +0200730 if (in_be32((void __iomem *)(hwif->config_data + 0xff0)) & CCKCTRL_ATACLKOEN)
731 hwif->ultra_mask = ATA_UDMA6; /* 133MHz */
732 else
733 hwif->ultra_mask = ATA_UDMA5; /* 100MHz */
Kou Ishizakibde18a22007-02-17 02:40:22 +0100734}
735
Bartlomiej Zolnierkiewiczac95bee2008-04-26 22:25:14 +0200736static const struct ide_port_ops scc_port_ops = {
737 .set_pio_mode = scc_set_pio_mode,
738 .set_dma_mode = scc_set_dma_mode,
739 .udma_filter = scc_udma_filter,
740 .cable_detect = scc_cable_detect,
741};
742
Bartlomiej Zolnierkiewiczf37afda2008-04-26 22:25:24 +0200743static const struct ide_dma_ops scc_dma_ops = {
744 .dma_host_set = ide_dma_host_set,
Bartlomiej Zolnierkiewicz5e37bdc2008-04-26 22:25:24 +0200745 .dma_setup = scc_dma_setup,
Bartlomiej Zolnierkiewiczf37afda2008-04-26 22:25:24 +0200746 .dma_exec_cmd = ide_dma_exec_cmd,
747 .dma_start = ide_dma_start,
Bartlomiej Zolnierkiewicz5e37bdc2008-04-26 22:25:24 +0200748 .dma_end = scc_dma_end,
749 .dma_test_irq = scc_dma_test_irq,
Bartlomiej Zolnierkiewiczf37afda2008-04-26 22:25:24 +0200750 .dma_lost_irq = ide_dma_lost_irq,
751 .dma_timeout = ide_dma_timeout,
Bartlomiej Zolnierkiewicz5e37bdc2008-04-26 22:25:24 +0200752};
753
Kou Ishizakibde18a22007-02-17 02:40:22 +0100754#define DECLARE_SCC_DEV(name_str) \
755 { \
756 .name = name_str, \
Kou Ishizakibde18a22007-02-17 02:40:22 +0100757 .init_iops = init_iops_scc, \
758 .init_hwif = init_hwif_scc, \
Bartlomiej Zolnierkiewiczac95bee2008-04-26 22:25:14 +0200759 .port_ops = &scc_port_ops, \
Bartlomiej Zolnierkiewicz5e37bdc2008-04-26 22:25:24 +0200760 .dma_ops = &scc_dma_ops, \
Bartlomiej Zolnierkiewicz5e71d9c2008-04-26 17:36:35 +0200761 .host_flags = IDE_HFLAG_SINGLE, \
Bartlomiej Zolnierkiewicz4099d142007-07-20 01:11:59 +0200762 .pio_mask = ATA_PIO4, \
Kou Ishizakibde18a22007-02-17 02:40:22 +0100763 }
764
Bartlomiej Zolnierkiewicz85620432007-10-20 00:32:34 +0200765static const struct ide_port_info scc_chipsets[] __devinitdata = {
Kou Ishizakibde18a22007-02-17 02:40:22 +0100766 /* 0 */ DECLARE_SCC_DEV("sccIDE"),
767};
768
769/**
770 * scc_init_one - pci layer discovery entry
771 * @dev: PCI device
772 * @id: ident table entry
773 *
774 * Called by the PCI code when it finds an SCC PATA controller.
775 * We then use the IDE PCI generic helper to do most of the work.
776 */
777
778static int __devinit scc_init_one(struct pci_dev *dev, const struct pci_device_id *id)
779{
Bartlomiej Zolnierkiewicz039788e2007-10-20 00:32:34 +0200780 return init_setup_scc(dev, &scc_chipsets[id->driver_data]);
Kou Ishizakibde18a22007-02-17 02:40:22 +0100781}
782
783/**
784 * scc_remove - pci layer remove entry
785 * @dev: PCI device
786 *
787 * Called by the PCI code when it removes an SCC PATA controller.
788 */
789
790static void __devexit scc_remove(struct pci_dev *dev)
791{
792 struct scc_ports *ports = pci_get_drvdata(dev);
Bartlomiej Zolnierkiewicz589b0622008-04-26 17:36:34 +0200793 ide_hwif_t *hwif = ports->hwif;
Kou Ishizakibde18a22007-02-17 02:40:22 +0100794
795 if (hwif->dmatable_cpu) {
Bartlomiej Zolnierkiewicz36501652008-02-01 23:09:31 +0100796 pci_free_consistent(dev, PRD_ENTRIES * PRD_BYTES,
797 hwif->dmatable_cpu, hwif->dmatable_dma);
Kou Ishizakibde18a22007-02-17 02:40:22 +0100798 hwif->dmatable_cpu = NULL;
799 }
800
Bartlomiej Zolnierkiewicz387750c2008-04-27 15:38:31 +0200801 ide_unregister(hwif);
Kou Ishizakibde18a22007-02-17 02:40:22 +0100802
Kou Ishizakibde18a22007-02-17 02:40:22 +0100803 iounmap((void*)ports->dma);
804 iounmap((void*)ports->ctl);
Bartlomiej Zolnierkiewicz0d1bad22008-04-26 22:25:19 +0200805 pci_release_selected_regions(dev, (1 << 2) - 1);
Kou Ishizakibde18a22007-02-17 02:40:22 +0100806 memset(ports, 0, sizeof(*ports));
807}
808
Bartlomiej Zolnierkiewicz9cbcc5e2007-10-16 22:29:56 +0200809static const struct pci_device_id scc_pci_tbl[] = {
810 { PCI_VDEVICE(TOSHIBA_2, PCI_DEVICE_ID_TOSHIBA_SCC_ATA), 0 },
Kou Ishizakibde18a22007-02-17 02:40:22 +0100811 { 0, },
812};
813MODULE_DEVICE_TABLE(pci, scc_pci_tbl);
814
815static struct pci_driver driver = {
816 .name = "SCC IDE",
817 .id_table = scc_pci_tbl,
818 .probe = scc_init_one,
819 .remove = scc_remove,
820};
821
822static int scc_ide_init(void)
823{
824 return ide_pci_register_driver(&driver);
825}
826
827module_init(scc_ide_init);
828/* -- No exit code?
829static void scc_ide_exit(void)
830{
831 ide_pci_unregister_driver(&driver);
832}
833module_exit(scc_ide_exit);
834 */
835
836
837MODULE_DESCRIPTION("PCI driver module for Toshiba SCC IDE");
838MODULE_LICENSE("GPL");