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Tomi Valkeinen559d6702009-11-03 11:23:50 +02001/*
Tomi Valkeinen559d6702009-11-03 11:23:50 +02002 * Copyright (C) 2008 Nokia Corporation
3 * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com>
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 as published by
7 * the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program. If not, see <http://www.gnu.org/licenses/>.
16 */
17
Tomi Valkeinena0b38cc2011-05-11 14:05:07 +030018#ifndef __OMAP_OMAPDSS_H
19#define __OMAP_OMAPDSS_H
Tomi Valkeinen559d6702009-11-03 11:23:50 +020020
21#include <linux/list.h>
22#include <linux/kobject.h>
23#include <linux/device.h>
Tomi Valkeinen348be692012-11-07 18:17:35 +020024#include <linux/interrupt.h>
Tomi Valkeinen559d6702009-11-03 11:23:50 +020025
Tomi Valkeinen6fcd4852013-05-10 13:02:32 +030026#include <video/videomode.h>
27
Tomi Valkeinen559d6702009-11-03 11:23:50 +020028#define DISPC_IRQ_FRAMEDONE (1 << 0)
29#define DISPC_IRQ_VSYNC (1 << 1)
30#define DISPC_IRQ_EVSYNC_EVEN (1 << 2)
31#define DISPC_IRQ_EVSYNC_ODD (1 << 3)
32#define DISPC_IRQ_ACBIAS_COUNT_STAT (1 << 4)
33#define DISPC_IRQ_PROG_LINE_NUM (1 << 5)
34#define DISPC_IRQ_GFX_FIFO_UNDERFLOW (1 << 6)
35#define DISPC_IRQ_GFX_END_WIN (1 << 7)
36#define DISPC_IRQ_PAL_GAMMA_MASK (1 << 8)
37#define DISPC_IRQ_OCP_ERR (1 << 9)
38#define DISPC_IRQ_VID1_FIFO_UNDERFLOW (1 << 10)
39#define DISPC_IRQ_VID1_END_WIN (1 << 11)
40#define DISPC_IRQ_VID2_FIFO_UNDERFLOW (1 << 12)
41#define DISPC_IRQ_VID2_END_WIN (1 << 13)
42#define DISPC_IRQ_SYNC_LOST (1 << 14)
43#define DISPC_IRQ_SYNC_LOST_DIGIT (1 << 15)
44#define DISPC_IRQ_WAKEUP (1 << 16)
Sumit Semwal2a205f32010-12-02 11:27:12 +000045#define DISPC_IRQ_SYNC_LOST2 (1 << 17)
46#define DISPC_IRQ_VSYNC2 (1 << 18)
Archit Tanejab8c095b2011-09-13 18:20:33 +053047#define DISPC_IRQ_VID3_END_WIN (1 << 19)
48#define DISPC_IRQ_VID3_FIFO_UNDERFLOW (1 << 20)
Sumit Semwal2a205f32010-12-02 11:27:12 +000049#define DISPC_IRQ_ACBIAS_COUNT_STAT2 (1 << 21)
50#define DISPC_IRQ_FRAMEDONE2 (1 << 22)
Tomi Valkeinen7f6f3c42011-08-31 13:39:03 +030051#define DISPC_IRQ_FRAMEDONEWB (1 << 23)
52#define DISPC_IRQ_FRAMEDONETV (1 << 24)
53#define DISPC_IRQ_WBBUFFEROVERFLOW (1 << 25)
Chandrabhanu Mahapatra14d33d32012-08-27 14:23:19 +053054#define DISPC_IRQ_SYNC_LOST3 (1 << 27)
55#define DISPC_IRQ_VSYNC3 (1 << 28)
56#define DISPC_IRQ_ACBIAS_COUNT_STAT3 (1 << 29)
57#define DISPC_IRQ_FRAMEDONE3 (1 << 30)
Tomi Valkeinen559d6702009-11-03 11:23:50 +020058
59struct omap_dss_device;
60struct omap_overlay_manager;
Tomi Valkeinena97a9632012-10-24 13:52:40 +030061struct dss_lcd_mgr_config;
Ricardo Neri9c0b8422012-03-06 18:20:37 -060062struct snd_aes_iec958;
63struct snd_cea_861_aud_if;
Tomi Valkeinen559d6702009-11-03 11:23:50 +020064
65enum omap_display_type {
66 OMAP_DISPLAY_TYPE_NONE = 0,
67 OMAP_DISPLAY_TYPE_DPI = 1 << 0,
68 OMAP_DISPLAY_TYPE_DBI = 1 << 1,
69 OMAP_DISPLAY_TYPE_SDI = 1 << 2,
70 OMAP_DISPLAY_TYPE_DSI = 1 << 3,
71 OMAP_DISPLAY_TYPE_VENC = 1 << 4,
Mythri P Kb1196012011-03-08 17:15:54 +053072 OMAP_DISPLAY_TYPE_HDMI = 1 << 5,
Tomi Valkeinenbc24b8b2013-05-13 13:40:33 +030073 OMAP_DISPLAY_TYPE_DVI = 1 << 6,
Tomi Valkeinen559d6702009-11-03 11:23:50 +020074};
75
76enum omap_plane {
77 OMAP_DSS_GFX = 0,
78 OMAP_DSS_VIDEO1 = 1,
Archit Tanejab8c095b2011-09-13 18:20:33 +053079 OMAP_DSS_VIDEO2 = 2,
80 OMAP_DSS_VIDEO3 = 3,
Tomi Valkeinen66a0f9e2012-08-22 16:57:02 +030081 OMAP_DSS_WB = 4,
Tomi Valkeinen559d6702009-11-03 11:23:50 +020082};
83
84enum omap_channel {
85 OMAP_DSS_CHANNEL_LCD = 0,
86 OMAP_DSS_CHANNEL_DIGIT = 1,
Sumit Semwal8613b002010-12-02 11:27:09 +000087 OMAP_DSS_CHANNEL_LCD2 = 2,
Chandrabhanu Mahapatraff6331e2012-06-19 15:08:16 +053088 OMAP_DSS_CHANNEL_LCD3 = 3,
Tomi Valkeinen559d6702009-11-03 11:23:50 +020089};
90
91enum omap_color_mode {
92 OMAP_DSS_COLOR_CLUT1 = 1 << 0, /* BITMAP 1 */
93 OMAP_DSS_COLOR_CLUT2 = 1 << 1, /* BITMAP 2 */
94 OMAP_DSS_COLOR_CLUT4 = 1 << 2, /* BITMAP 4 */
95 OMAP_DSS_COLOR_CLUT8 = 1 << 3, /* BITMAP 8 */
96 OMAP_DSS_COLOR_RGB12U = 1 << 4, /* RGB12, 16-bit container */
97 OMAP_DSS_COLOR_ARGB16 = 1 << 5, /* ARGB16 */
98 OMAP_DSS_COLOR_RGB16 = 1 << 6, /* RGB16 */
99 OMAP_DSS_COLOR_RGB24U = 1 << 7, /* RGB24, 32-bit container */
100 OMAP_DSS_COLOR_RGB24P = 1 << 8, /* RGB24, 24-bit container */
101 OMAP_DSS_COLOR_YUV2 = 1 << 9, /* YUV2 4:2:2 co-sited */
102 OMAP_DSS_COLOR_UYVY = 1 << 10, /* UYVY 4:2:2 co-sited */
103 OMAP_DSS_COLOR_ARGB32 = 1 << 11, /* ARGB32 */
104 OMAP_DSS_COLOR_RGBA32 = 1 << 12, /* RGBA32 */
105 OMAP_DSS_COLOR_RGBX32 = 1 << 13, /* RGBx32 */
Amber Jainf20e4222011-05-19 19:47:50 +0530106 OMAP_DSS_COLOR_NV12 = 1 << 14, /* NV12 format: YUV 4:2:0 */
107 OMAP_DSS_COLOR_RGBA16 = 1 << 15, /* RGBA16 - 4444 */
108 OMAP_DSS_COLOR_RGBX16 = 1 << 16, /* RGBx16 - 4444 */
109 OMAP_DSS_COLOR_ARGB16_1555 = 1 << 17, /* ARGB16 - 1555 */
110 OMAP_DSS_COLOR_XRGB16_1555 = 1 << 18, /* xRGB16 - 1555 */
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200111};
112
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200113enum omap_dss_load_mode {
114 OMAP_DSS_LOAD_CLUT_AND_FRAME = 0,
115 OMAP_DSS_LOAD_CLUT_ONLY = 1,
116 OMAP_DSS_LOAD_FRAME_ONLY = 2,
117 OMAP_DSS_LOAD_CLUT_ONCE_FRAME = 3,
118};
119
120enum omap_dss_trans_key_type {
121 OMAP_DSS_COLOR_KEY_GFX_DST = 0,
122 OMAP_DSS_COLOR_KEY_VID_SRC = 1,
123};
124
125enum omap_rfbi_te_mode {
126 OMAP_DSS_RFBI_TE_MODE_1 = 1,
127 OMAP_DSS_RFBI_TE_MODE_2 = 2,
128};
129
Archit Tanejaa8d5e412012-06-25 12:26:38 +0530130enum omap_dss_signal_level {
131 OMAPDSS_SIG_ACTIVE_HIGH = 0,
132 OMAPDSS_SIG_ACTIVE_LOW = 1,
133};
134
135enum omap_dss_signal_edge {
136 OMAPDSS_DRIVE_SIG_OPPOSITE_EDGES,
137 OMAPDSS_DRIVE_SIG_RISING_EDGE,
138 OMAPDSS_DRIVE_SIG_FALLING_EDGE,
139};
140
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200141enum omap_dss_venc_type {
142 OMAP_DSS_VENC_TYPE_COMPOSITE,
143 OMAP_DSS_VENC_TYPE_SVIDEO,
144};
145
Archit Tanejaa3b3cc22011-09-08 18:42:16 +0530146enum omap_dss_dsi_pixel_format {
147 OMAP_DSS_DSI_FMT_RGB888,
148 OMAP_DSS_DSI_FMT_RGB666,
149 OMAP_DSS_DSI_FMT_RGB666_PACKED,
150 OMAP_DSS_DSI_FMT_RGB565,
151};
152
Archit Taneja7e951ee2011-07-22 12:45:04 +0530153enum omap_dss_dsi_mode {
154 OMAP_DSS_DSI_CMD_MODE = 0,
155 OMAP_DSS_DSI_VIDEO_MODE,
156};
157
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200158enum omap_display_caps {
159 OMAP_DSS_DISPLAY_CAP_MANUAL_UPDATE = 1 << 0,
160 OMAP_DSS_DISPLAY_CAP_TEAR_ELIM = 1 << 1,
161};
162
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200163enum omap_dss_display_state {
164 OMAP_DSS_DISPLAY_DISABLED = 0,
165 OMAP_DSS_DISPLAY_ACTIVE,
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200166};
167
Ricardo Neri9c0b8422012-03-06 18:20:37 -0600168enum omap_dss_audio_state {
169 OMAP_DSS_AUDIO_DISABLED = 0,
170 OMAP_DSS_AUDIO_ENABLED,
171 OMAP_DSS_AUDIO_CONFIGURED,
172 OMAP_DSS_AUDIO_PLAYING,
173};
174
Tomi Valkeinen0b450c32013-05-24 13:20:17 +0300175struct omap_dss_audio {
176 struct snd_aes_iec958 *iec;
177 struct snd_cea_861_aud_if *cea;
178};
179
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200180enum omap_dss_rotation_type {
Chandrabhanu Mahapatra65e006f2012-05-11 19:19:55 +0530181 OMAP_DSS_ROT_DMA = 1 << 0,
182 OMAP_DSS_ROT_VRFB = 1 << 1,
183 OMAP_DSS_ROT_TILER = 1 << 2,
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200184};
185
186/* clockwise rotation angle */
187enum omap_dss_rotation_angle {
188 OMAP_DSS_ROT_0 = 0,
189 OMAP_DSS_ROT_90 = 1,
190 OMAP_DSS_ROT_180 = 2,
191 OMAP_DSS_ROT_270 = 3,
192};
193
194enum omap_overlay_caps {
195 OMAP_DSS_OVL_CAP_SCALE = 1 << 0,
Tomi Valkeinenf6dc8152011-08-15 15:18:20 +0300196 OMAP_DSS_OVL_CAP_GLOBAL_ALPHA = 1 << 1,
197 OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA = 1 << 2,
Archit Taneja11354dd2011-09-26 11:47:29 +0530198 OMAP_DSS_OVL_CAP_ZORDER = 1 << 3,
Archit Tanejad79db852012-09-22 12:30:17 +0530199 OMAP_DSS_OVL_CAP_POS = 1 << 4,
200 OMAP_DSS_OVL_CAP_REPLICATION = 1 << 5,
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200201};
202
203enum omap_overlay_manager_caps {
Tomi Valkeinen4a9e78a2011-08-15 11:22:21 +0300204 OMAP_DSS_DUMMY_VALUE, /* add a dummy value to prevent compiler error */
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200205};
206
Archit Taneja89a35e52011-04-12 13:52:23 +0530207enum omap_dss_clk_source {
208 OMAP_DSS_CLK_SRC_FCK = 0, /* OMAP2/3: DSS1_ALWON_FCLK
209 * OMAP4: DSS_FCLK */
210 OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC, /* OMAP3: DSI1_PLL_FCLK
211 * OMAP4: PLL1_CLK1 */
212 OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI, /* OMAP3: DSI2_PLL_FCLK
213 * OMAP4: PLL1_CLK2 */
Archit Taneja5a8b5722011-05-12 17:26:29 +0530214 OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC, /* OMAP4: PLL2_CLK1 */
215 OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DSI, /* OMAP4: PLL2_CLK2 */
Archit Taneja89a35e52011-04-12 13:52:23 +0530216};
217
Mythri P K9a901682012-01-02 14:02:38 +0530218enum omap_hdmi_flags {
219 OMAP_HDMI_SDA_SCL_EXTERNAL_PULLUP = 1 << 0,
220};
221
Archit Taneja484dc402012-09-07 17:38:00 +0530222enum omap_dss_output_id {
223 OMAP_DSS_OUTPUT_DPI = 1 << 0,
224 OMAP_DSS_OUTPUT_DBI = 1 << 1,
225 OMAP_DSS_OUTPUT_SDI = 1 << 2,
226 OMAP_DSS_OUTPUT_DSI1 = 1 << 3,
227 OMAP_DSS_OUTPUT_DSI2 = 1 << 4,
228 OMAP_DSS_OUTPUT_VENC = 1 << 5,
229 OMAP_DSS_OUTPUT_HDMI = 1 << 6,
230};
231
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200232/* RFBI */
233
234struct rfbi_timings {
235 int cs_on_time;
236 int cs_off_time;
237 int we_on_time;
238 int we_off_time;
239 int re_on_time;
240 int re_off_time;
241 int we_cycle_time;
242 int re_cycle_time;
243 int cs_pulse_width;
244 int access_time;
245
246 int clk_div;
247
248 u32 tim[5]; /* set by rfbi_convert_timings() */
249
250 int converted;
251};
252
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200253/* DSI */
Archit Taneja8af6ff02011-09-05 16:48:27 +0530254
Tomi Valkeinen478d7df2013-03-05 16:29:36 +0200255enum omap_dss_dsi_trans_mode {
256 /* Sync Pulses: both sync start and end packets sent */
257 OMAP_DSS_DSI_PULSE_MODE,
258 /* Sync Events: only sync start packets sent */
259 OMAP_DSS_DSI_EVENT_MODE,
260 /* Burst: only sync start packets sent, pixels are time compressed */
261 OMAP_DSS_DSI_BURST_MODE,
262};
263
Archit Taneja6b8493752012-08-13 22:12:24 +0530264struct omap_dss_dsi_videomode_timings {
Tomi Valkeinenf1e00012013-03-05 17:21:35 +0200265 unsigned long hsclk;
266
267 unsigned ndl;
268 unsigned bitspp;
269
270 /* pixels */
271 u16 hact;
272 /* lines */
273 u16 vact;
274
Archit Taneja8af6ff02011-09-05 16:48:27 +0530275 /* DSI video mode blanking data */
276 /* Unit: byte clock cycles */
Tomi Valkeinenf1e00012013-03-05 17:21:35 +0200277 u16 hss;
Archit Taneja8af6ff02011-09-05 16:48:27 +0530278 u16 hsa;
Tomi Valkeinenf1e00012013-03-05 17:21:35 +0200279 u16 hse;
Archit Taneja8af6ff02011-09-05 16:48:27 +0530280 u16 hfp;
281 u16 hbp;
282 /* Unit: line clocks */
283 u16 vsa;
284 u16 vfp;
285 u16 vbp;
286
287 /* DSI blanking modes */
288 int blanking_mode;
289 int hsa_blanking_mode;
290 int hbp_blanking_mode;
291 int hfp_blanking_mode;
292
Tomi Valkeinen478d7df2013-03-05 16:29:36 +0200293 enum omap_dss_dsi_trans_mode trans_mode;
Archit Taneja8af6ff02011-09-05 16:48:27 +0530294
295 bool ddr_clk_always_on;
296 int window_sync;
297};
298
Tomi Valkeinen777f05c2013-03-06 11:10:29 +0200299struct omap_dss_dsi_config {
300 enum omap_dss_dsi_mode mode;
301 enum omap_dss_dsi_pixel_format pixel_format;
302 const struct omap_video_timings *timings;
Tomi Valkeinen777f05c2013-03-06 11:10:29 +0200303
Tomi Valkeinenf1e00012013-03-05 17:21:35 +0200304 unsigned long hs_clk_min, hs_clk_max;
305 unsigned long lp_clk_min, lp_clk_max;
306
307 bool ddr_clk_always_on;
308 enum omap_dss_dsi_trans_mode trans_mode;
Tomi Valkeinen777f05c2013-03-06 11:10:29 +0200309};
310
Tomi Valkeinenacd18af2012-09-28 12:42:28 +0300311enum omapdss_version {
312 OMAPDSS_VER_UNKNOWN = 0,
313 OMAPDSS_VER_OMAP24xx,
314 OMAPDSS_VER_OMAP34xx_ES1, /* OMAP3430 ES1.0, 2.0 */
315 OMAPDSS_VER_OMAP34xx_ES3, /* OMAP3430 ES3.0+ */
316 OMAPDSS_VER_OMAP3630,
317 OMAPDSS_VER_AM35xx,
318 OMAPDSS_VER_OMAP4430_ES1, /* OMAP4430 ES1.0 */
319 OMAPDSS_VER_OMAP4430_ES2, /* OMAP4430 ES2.0, 2.1, 2.2 */
320 OMAPDSS_VER_OMAP4, /* All other OMAP4s */
321 OMAPDSS_VER_OMAP5,
322};
323
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200324/* Board specific data */
325struct omap_dss_board_info {
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200326 int num_devices;
327 struct omap_dss_device **devices;
328 struct omap_dss_device *default_device;
Tomi Valkeinen0a200122012-11-16 14:59:56 +0200329 const char *default_display_name;
Tomi Valkeinen5bc416c2011-06-15 15:21:12 +0300330 int (*dsi_enable_pads)(int dsi_id, unsigned lane_mask);
331 void (*dsi_disable_pads)(int dsi_id, unsigned lane_mask);
Tomi Valkeinen62c1dcf2012-03-08 12:37:58 +0200332 int (*set_min_bus_tput)(struct device *dev, unsigned long r);
Tomi Valkeinenacd18af2012-09-28 12:42:28 +0300333 enum omapdss_version version;
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200334};
335
Sumit Semwalb7ee79a2011-01-24 06:21:54 +0000336/* Init with the board info */
337extern int omap_display_init(struct omap_dss_board_info *board_data);
Mythri P Kee9dfd82012-01-02 14:02:37 +0530338/* HDMI mux init*/
Mythri P K9a901682012-01-02 14:02:38 +0530339extern int omap_hdmi_init(enum omap_hdmi_flags flags);
Sumit Semwalb7ee79a2011-01-24 06:21:54 +0000340
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200341struct omap_video_timings {
342 /* Unit: pixels */
343 u16 x_res;
344 /* Unit: pixels */
345 u16 y_res;
Tomi Valkeinend8d789412013-04-10 14:12:14 +0300346 /* Unit: Hz */
347 u32 pixelclock;
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200348 /* Unit: pixel clocks */
349 u16 hsw; /* Horizontal synchronization pulse width */
350 /* Unit: pixel clocks */
351 u16 hfp; /* Horizontal front porch */
352 /* Unit: pixel clocks */
353 u16 hbp; /* Horizontal back porch */
354 /* Unit: line clocks */
355 u16 vsw; /* Vertical synchronization pulse width */
356 /* Unit: line clocks */
357 u16 vfp; /* Vertical front porch */
358 /* Unit: line clocks */
359 u16 vbp; /* Vertical back porch */
Archit Tanejaa8d5e412012-06-25 12:26:38 +0530360
361 /* Vsync logic level */
362 enum omap_dss_signal_level vsync_level;
363 /* Hsync logic level */
364 enum omap_dss_signal_level hsync_level;
Archit Taneja23c8f882012-06-28 11:15:51 +0530365 /* Interlaced or Progressive timings */
366 bool interlace;
Archit Tanejaa8d5e412012-06-25 12:26:38 +0530367 /* Pixel clock edge to drive LCD data */
368 enum omap_dss_signal_edge data_pclk_edge;
369 /* Data enable logic level */
370 enum omap_dss_signal_level de_level;
371 /* Pixel clock edges to drive HSYNC and VSYNC signals */
372 enum omap_dss_signal_edge sync_pclk_edge;
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200373};
374
375#ifdef CONFIG_OMAP2_DSS_VENC
376/* Hardcoded timings for tv modes. Venc only uses these to
377 * identify the mode, and does not actually use the configs
378 * itself. However, the configs should be something that
379 * a normal monitor can also show */
Tobias Klauser5a1819e2010-05-20 17:12:52 +0200380extern const struct omap_video_timings omap_dss_pal_timings;
381extern const struct omap_video_timings omap_dss_ntsc_timings;
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200382#endif
383
Tomi Valkeinen3c07cae2011-06-21 09:34:30 +0300384struct omap_dss_cpr_coefs {
385 s16 rr, rg, rb;
386 s16 gr, gg, gb;
387 s16 br, bg, bb;
388};
389
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200390struct omap_overlay_info {
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200391 u32 paddr;
Amber Jain0d66cbb2011-05-19 19:47:54 +0530392 u32 p_uv_addr; /* for NV12 format */
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200393 u16 screen_width;
394 u16 width;
395 u16 height;
396 enum omap_color_mode color_mode;
397 u8 rotation;
398 enum omap_dss_rotation_type rotation_type;
399 bool mirror;
400
401 u16 pos_x;
402 u16 pos_y;
403 u16 out_width; /* if 0, out_width == width */
404 u16 out_height; /* if 0, out_height == height */
405 u8 global_alpha;
Rajkumar Nfd28a392010-11-04 12:28:42 +0100406 u8 pre_mult_alpha;
Archit Taneja54128702011-09-08 11:29:17 +0530407 u8 zorder;
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200408};
409
410struct omap_overlay {
411 struct kobject kobj;
412 struct list_head list;
413
414 /* static fields */
415 const char *name;
Tomi Valkeinen4a9e78a2011-08-15 11:22:21 +0300416 enum omap_plane id;
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200417 enum omap_color_mode supported_modes;
418 enum omap_overlay_caps caps;
419
420 /* dynamic fields */
421 struct omap_overlay_manager *manager;
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200422
Tomi Valkeinen9d11c322011-11-18 12:38:38 +0200423 /*
424 * The following functions do not block:
425 *
426 * is_enabled
427 * set_overlay_info
428 * get_overlay_info
429 *
430 * The rest of the functions may block and cannot be called from
431 * interrupt context
432 */
433
Tomi Valkeinenaaa874a2011-11-15 16:37:53 +0200434 int (*enable)(struct omap_overlay *ovl);
435 int (*disable)(struct omap_overlay *ovl);
436 bool (*is_enabled)(struct omap_overlay *ovl);
437
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200438 int (*set_manager)(struct omap_overlay *ovl,
439 struct omap_overlay_manager *mgr);
440 int (*unset_manager)(struct omap_overlay *ovl);
441
442 int (*set_overlay_info)(struct omap_overlay *ovl,
443 struct omap_overlay_info *info);
444 void (*get_overlay_info)(struct omap_overlay *ovl,
445 struct omap_overlay_info *info);
446
447 int (*wait_for_go)(struct omap_overlay *ovl);
Archit Taneja794bc4e2012-09-07 17:44:51 +0530448
449 struct omap_dss_device *(*get_device)(struct omap_overlay *ovl);
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200450};
451
452struct omap_overlay_manager_info {
453 u32 default_color;
454
455 enum omap_dss_trans_key_type trans_key_type;
456 u32 trans_key;
457 bool trans_enabled;
458
Archit Taneja11354dd2011-09-26 11:47:29 +0530459 bool partial_alpha_enabled;
Tomi Valkeinen3c07cae2011-06-21 09:34:30 +0300460
461 bool cpr_enable;
462 struct omap_dss_cpr_coefs cpr_coefs;
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200463};
464
465struct omap_overlay_manager {
466 struct kobject kobj;
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200467
468 /* static fields */
469 const char *name;
Tomi Valkeinen4a9e78a2011-08-15 11:22:21 +0300470 enum omap_channel id;
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200471 enum omap_overlay_manager_caps caps;
Tomi Valkeinen07e327c2011-11-05 10:59:59 +0200472 struct list_head overlays;
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200473 enum omap_display_type supported_displays;
Archit Taneja97f01b32012-09-26 16:42:39 +0530474 enum omap_dss_output_id supported_outputs;
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200475
476 /* dynamic fields */
Tomi Valkeinen1f68d9c2013-04-19 15:09:34 +0300477 struct omap_dss_device *output;
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200478
Tomi Valkeinen9d11c322011-11-18 12:38:38 +0200479 /*
480 * The following functions do not block:
481 *
482 * set_manager_info
483 * get_manager_info
484 * apply
485 *
486 * The rest of the functions may block and cannot be called from
487 * interrupt context
488 */
489
Archit Taneja97f01b32012-09-26 16:42:39 +0530490 int (*set_output)(struct omap_overlay_manager *mgr,
Tomi Valkeinen1f68d9c2013-04-19 15:09:34 +0300491 struct omap_dss_device *output);
Archit Taneja97f01b32012-09-26 16:42:39 +0530492 int (*unset_output)(struct omap_overlay_manager *mgr);
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200493
494 int (*set_manager_info)(struct omap_overlay_manager *mgr,
495 struct omap_overlay_manager_info *info);
496 void (*get_manager_info)(struct omap_overlay_manager *mgr,
497 struct omap_overlay_manager_info *info);
498
499 int (*apply)(struct omap_overlay_manager *mgr);
500 int (*wait_for_go)(struct omap_overlay_manager *mgr);
Tomi Valkeinen3f71cbe2010-01-08 17:06:04 +0200501 int (*wait_for_vsync)(struct omap_overlay_manager *mgr);
Archit Taneja794bc4e2012-09-07 17:44:51 +0530502
503 struct omap_dss_device *(*get_device)(struct omap_overlay_manager *mgr);
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200504};
505
Tomi Valkeinene4a9e942012-03-28 15:58:56 +0300506/* 22 pins means 1 clk lane and 10 data lanes */
507#define OMAP_DSS_MAX_DSI_PINS 22
508
509struct omap_dsi_pin_config {
510 int num_pins;
511 /*
512 * pin numbers in the following order:
513 * clk+, clk-
514 * data1+, data1-
515 * data2+, data2-
516 * ...
517 */
518 int pins[OMAP_DSS_MAX_DSI_PINS];
519};
520
Archit Taneja749feff2012-08-31 12:32:52 +0530521struct omap_dss_writeback_info {
522 u32 paddr;
523 u32 p_uv_addr;
524 u16 buf_width;
525 u16 width;
526 u16 height;
527 enum omap_color_mode color_mode;
528 u8 rotation;
529 enum omap_dss_rotation_type rotation_type;
530 bool mirror;
531 u8 pre_mult_alpha;
532};
533
Tomi Valkeinen0b24edb2013-05-24 13:18:52 +0300534struct omapdss_dpi_ops {
535 int (*connect)(struct omap_dss_device *dssdev,
536 struct omap_dss_device *dst);
537 void (*disconnect)(struct omap_dss_device *dssdev,
538 struct omap_dss_device *dst);
539
540 int (*enable)(struct omap_dss_device *dssdev);
541 void (*disable)(struct omap_dss_device *dssdev);
542
543 int (*check_timings)(struct omap_dss_device *dssdev,
544 struct omap_video_timings *timings);
545 void (*set_timings)(struct omap_dss_device *dssdev,
546 struct omap_video_timings *timings);
547 void (*get_timings)(struct omap_dss_device *dssdev,
548 struct omap_video_timings *timings);
549
550 void (*set_data_lines)(struct omap_dss_device *dssdev, int data_lines);
551};
552
Tomi Valkeinenb1082df2013-05-24 13:19:14 +0300553struct omapdss_sdi_ops {
554 int (*connect)(struct omap_dss_device *dssdev,
555 struct omap_dss_device *dst);
556 void (*disconnect)(struct omap_dss_device *dssdev,
557 struct omap_dss_device *dst);
558
559 int (*enable)(struct omap_dss_device *dssdev);
560 void (*disable)(struct omap_dss_device *dssdev);
561
562 int (*check_timings)(struct omap_dss_device *dssdev,
563 struct omap_video_timings *timings);
564 void (*set_timings)(struct omap_dss_device *dssdev,
565 struct omap_video_timings *timings);
566 void (*get_timings)(struct omap_dss_device *dssdev,
567 struct omap_video_timings *timings);
568
569 void (*set_datapairs)(struct omap_dss_device *dssdev, int datapairs);
570};
571
Tomi Valkeinen7700c2d2013-05-24 13:19:30 +0300572struct omapdss_dvi_ops {
573 int (*connect)(struct omap_dss_device *dssdev,
574 struct omap_dss_device *dst);
575 void (*disconnect)(struct omap_dss_device *dssdev,
576 struct omap_dss_device *dst);
577
578 int (*enable)(struct omap_dss_device *dssdev);
579 void (*disable)(struct omap_dss_device *dssdev);
580
581 int (*check_timings)(struct omap_dss_device *dssdev,
582 struct omap_video_timings *timings);
583 void (*set_timings)(struct omap_dss_device *dssdev,
584 struct omap_video_timings *timings);
585 void (*get_timings)(struct omap_dss_device *dssdev,
586 struct omap_video_timings *timings);
587};
588
Tomi Valkeinenfb8efa42013-05-24 13:19:50 +0300589struct omapdss_atv_ops {
590 int (*connect)(struct omap_dss_device *dssdev,
591 struct omap_dss_device *dst);
592 void (*disconnect)(struct omap_dss_device *dssdev,
593 struct omap_dss_device *dst);
594
595 int (*enable)(struct omap_dss_device *dssdev);
596 void (*disable)(struct omap_dss_device *dssdev);
597
598 int (*check_timings)(struct omap_dss_device *dssdev,
599 struct omap_video_timings *timings);
600 void (*set_timings)(struct omap_dss_device *dssdev,
601 struct omap_video_timings *timings);
602 void (*get_timings)(struct omap_dss_device *dssdev,
603 struct omap_video_timings *timings);
604
605 void (*set_type)(struct omap_dss_device *dssdev,
606 enum omap_dss_venc_type type);
607 void (*invert_vid_out_polarity)(struct omap_dss_device *dssdev,
608 bool invert_polarity);
609
610 int (*set_wss)(struct omap_dss_device *dssdev, u32 wss);
611 u32 (*get_wss)(struct omap_dss_device *dssdev);
612};
613
Tomi Valkeinen0b450c32013-05-24 13:20:17 +0300614struct omapdss_hdmi_ops {
615 int (*connect)(struct omap_dss_device *dssdev,
616 struct omap_dss_device *dst);
617 void (*disconnect)(struct omap_dss_device *dssdev,
618 struct omap_dss_device *dst);
619
620 int (*enable)(struct omap_dss_device *dssdev);
621 void (*disable)(struct omap_dss_device *dssdev);
622
623 int (*check_timings)(struct omap_dss_device *dssdev,
624 struct omap_video_timings *timings);
625 void (*set_timings)(struct omap_dss_device *dssdev,
626 struct omap_video_timings *timings);
627 void (*get_timings)(struct omap_dss_device *dssdev,
628 struct omap_video_timings *timings);
629
630 int (*read_edid)(struct omap_dss_device *dssdev, u8 *buf, int len);
631 bool (*detect)(struct omap_dss_device *dssdev);
632
633 /*
634 * Note: These functions might sleep. Do not call while
635 * holding a spinlock/readlock.
636 */
637 int (*audio_enable)(struct omap_dss_device *dssdev);
638 void (*audio_disable)(struct omap_dss_device *dssdev);
639 bool (*audio_supported)(struct omap_dss_device *dssdev);
640 int (*audio_config)(struct omap_dss_device *dssdev,
641 struct omap_dss_audio *audio);
642 /* Note: These functions may not sleep */
643 int (*audio_start)(struct omap_dss_device *dssdev);
644 void (*audio_stop)(struct omap_dss_device *dssdev);
645};
646
Tomi Valkeinendeb16df2013-05-24 13:20:27 +0300647struct omapdss_dsi_ops {
648 int (*connect)(struct omap_dss_device *dssdev,
649 struct omap_dss_device *dst);
650 void (*disconnect)(struct omap_dss_device *dssdev,
651 struct omap_dss_device *dst);
652
653 int (*enable)(struct omap_dss_device *dssdev);
654 void (*disable)(struct omap_dss_device *dssdev, bool disconnect_lanes,
655 bool enter_ulps);
656
657 /* bus configuration */
658 int (*set_config)(struct omap_dss_device *dssdev,
659 const struct omap_dss_dsi_config *cfg);
660 int (*configure_pins)(struct omap_dss_device *dssdev,
661 const struct omap_dsi_pin_config *pin_cfg);
662
663 void (*enable_hs)(struct omap_dss_device *dssdev, int channel,
664 bool enable);
665 int (*enable_te)(struct omap_dss_device *dssdev, bool enable);
666
667 int (*update)(struct omap_dss_device *dssdev, int channel,
668 void (*callback)(int, void *), void *data);
669
670 void (*bus_lock)(struct omap_dss_device *dssdev);
671 void (*bus_unlock)(struct omap_dss_device *dssdev);
672
673 int (*enable_video_output)(struct omap_dss_device *dssdev, int channel);
674 void (*disable_video_output)(struct omap_dss_device *dssdev,
675 int channel);
676
677 int (*request_vc)(struct omap_dss_device *dssdev, int *channel);
678 int (*set_vc_id)(struct omap_dss_device *dssdev, int channel,
679 int vc_id);
680 void (*release_vc)(struct omap_dss_device *dssdev, int channel);
681
682 /* data transfer */
683 int (*dcs_write)(struct omap_dss_device *dssdev, int channel,
684 u8 *data, int len);
685 int (*dcs_write_nosync)(struct omap_dss_device *dssdev, int channel,
686 u8 *data, int len);
687 int (*dcs_read)(struct omap_dss_device *dssdev, int channel, u8 dcs_cmd,
688 u8 *data, int len);
689
690 int (*gen_write)(struct omap_dss_device *dssdev, int channel,
691 u8 *data, int len);
692 int (*gen_write_nosync)(struct omap_dss_device *dssdev, int channel,
693 u8 *data, int len);
694 int (*gen_read)(struct omap_dss_device *dssdev, int channel,
695 u8 *reqdata, int reqlen,
696 u8 *data, int len);
697
698 int (*bta_sync)(struct omap_dss_device *dssdev, int channel);
699
700 int (*set_max_rx_packet_size)(struct omap_dss_device *dssdev,
701 int channel, u16 plen);
702};
703
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200704struct omap_dss_device {
Tomi Valkeinenecc8b372013-02-14 14:17:28 +0200705 struct device *dev;
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200706
Tomi Valkeinen4f3e44e2013-05-03 11:35:43 +0300707 struct module *owner;
708
Tomi Valkeinen2e7e3dc2012-11-16 15:45:26 +0200709 struct list_head panel_list;
710
711 /* alias in the form of "display%d" */
712 char alias[16];
713
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200714 enum omap_display_type type;
Tomi Valkeinen1f68d9c2013-04-19 15:09:34 +0300715 enum omap_display_type output_type;
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200716
717 union {
718 struct {
719 u8 data_lines;
720 } dpi;
721
722 struct {
723 u8 channel;
724 u8 data_lines;
725 } rfbi;
726
727 struct {
728 u8 datapairs;
729 } sdi;
730
731 struct {
Archit Tanejaa72b64b2011-05-12 17:26:26 +0530732 int module;
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200733 } dsi;
734
735 struct {
736 enum omap_dss_venc_type type;
737 bool invert_polarity;
738 } venc;
739 } phy;
740
741 struct {
742 struct omap_video_timings timings;
743
Archit Tanejaa3b3cc22011-09-08 18:42:16 +0530744 enum omap_dss_dsi_pixel_format dsi_pix_fmt;
Archit Taneja7e951ee2011-07-22 12:45:04 +0530745 enum omap_dss_dsi_mode dsi_mode;
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200746 } panel;
747
748 struct {
749 u8 pixel_size;
750 struct rfbi_timings rfbi_timings;
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200751 } ctrl;
752
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200753 const char *name;
754
755 /* used to match device to driver */
756 const char *driver_name;
757
758 void *data;
759
760 struct omap_dss_driver *driver;
761
Tomi Valkeinen0b24edb2013-05-24 13:18:52 +0300762 union {
763 const struct omapdss_dpi_ops *dpi;
Tomi Valkeinenb1082df2013-05-24 13:19:14 +0300764 const struct omapdss_sdi_ops *sdi;
Tomi Valkeinen7700c2d2013-05-24 13:19:30 +0300765 const struct omapdss_dvi_ops *dvi;
Tomi Valkeinen0b450c32013-05-24 13:20:17 +0300766 const struct omapdss_hdmi_ops *hdmi;
Tomi Valkeinenfb8efa42013-05-24 13:19:50 +0300767 const struct omapdss_atv_ops *atv;
Tomi Valkeinendeb16df2013-05-24 13:20:27 +0300768 const struct omapdss_dsi_ops *dsi;
Tomi Valkeinen0b24edb2013-05-24 13:18:52 +0300769 } ops;
770
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200771 /* helper variable for driver suspend/resume */
772 bool activate_after_resume;
773
774 enum omap_display_caps caps;
775
Tomi Valkeinena73fdc62013-07-24 13:01:34 +0300776 struct omap_dss_device *src;
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200777
778 enum omap_dss_display_state state;
779
Ricardo Neri9c0b8422012-03-06 18:20:37 -0600780 enum omap_dss_audio_state audio_state;
781
Tomi Valkeinen1f68d9c2013-04-19 15:09:34 +0300782 /* OMAP DSS output specific fields */
783
784 struct list_head list;
785
786 /* DISPC channel for this output */
787 enum omap_channel dispc_channel;
788
789 /* output instance */
790 enum omap_dss_output_id id;
791
792 /* dynamic fields */
793 struct omap_overlay_manager *manager;
794
Tomi Valkeinen9560dc102013-07-24 13:06:54 +0300795 struct omap_dss_device *dst;
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200796};
797
Tomi Valkeinenc49d0052012-01-17 11:09:57 +0200798struct omap_dss_hdmi_data
799{
Tomi Valkeinencca35012012-04-26 14:48:32 +0300800 int ct_cp_hpd_gpio;
801 int ls_oe_gpio;
Tomi Valkeinenc49d0052012-01-17 11:09:57 +0200802 int hpd_gpio;
803};
804
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200805struct omap_dss_driver {
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200806 int (*probe)(struct omap_dss_device *);
807 void (*remove)(struct omap_dss_device *);
808
Tomi Valkeinena7e71e72013-05-08 16:23:32 +0300809 int (*connect)(struct omap_dss_device *dssdev);
810 void (*disconnect)(struct omap_dss_device *dssdev);
811
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200812 int (*enable)(struct omap_dss_device *display);
813 void (*disable)(struct omap_dss_device *display);
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200814 int (*run_test)(struct omap_dss_device *display, int test);
815
Tomi Valkeinen18946f62010-01-12 14:16:41 +0200816 int (*update)(struct omap_dss_device *dssdev,
817 u16 x, u16 y, u16 w, u16 h);
818 int (*sync)(struct omap_dss_device *dssdev);
819
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200820 int (*enable_te)(struct omap_dss_device *dssdev, bool enable);
Tomi Valkeinen225b6502010-01-11 15:11:01 +0200821 int (*get_te)(struct omap_dss_device *dssdev);
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200822
823 u8 (*get_rotate)(struct omap_dss_device *dssdev);
824 int (*set_rotate)(struct omap_dss_device *dssdev, u8 rotate);
825
826 bool (*get_mirror)(struct omap_dss_device *dssdev);
827 int (*set_mirror)(struct omap_dss_device *dssdev, bool enable);
828
829 int (*memory_read)(struct omap_dss_device *dssdev,
830 void *buf, size_t size,
831 u16 x, u16 y, u16 w, u16 h);
Tomi Valkeinen96adcec2010-01-11 13:54:33 +0200832
833 void (*get_resolution)(struct omap_dss_device *dssdev,
834 u16 *xres, u16 *yres);
Jani Nikula7a0987b2010-06-16 15:26:36 +0300835 void (*get_dimensions)(struct omap_dss_device *dssdev,
836 u32 *width, u32 *height);
Tomi Valkeinena2699502010-01-11 14:33:40 +0200837 int (*get_recommended_bpp)(struct omap_dss_device *dssdev);
Tomi Valkeinen36511312010-01-19 15:53:16 +0200838
Tomi Valkeinen69b20482010-01-20 12:11:25 +0200839 int (*check_timings)(struct omap_dss_device *dssdev,
840 struct omap_video_timings *timings);
841 void (*set_timings)(struct omap_dss_device *dssdev,
842 struct omap_video_timings *timings);
843 void (*get_timings)(struct omap_dss_device *dssdev,
844 struct omap_video_timings *timings);
845
Tomi Valkeinen36511312010-01-19 15:53:16 +0200846 int (*set_wss)(struct omap_dss_device *dssdev, u32 wss);
847 u32 (*get_wss)(struct omap_dss_device *dssdev);
Tomi Valkeinen3d5e0ef2011-08-25 17:10:41 +0300848
849 int (*read_edid)(struct omap_dss_device *dssdev, u8 *buf, int len);
Tomi Valkeinendf4769c2011-08-29 17:26:01 +0300850 bool (*detect)(struct omap_dss_device *dssdev);
Ricardo Neri9c0b8422012-03-06 18:20:37 -0600851
852 /*
853 * For display drivers that support audio. This encompasses
854 * HDMI and DisplayPort at the moment.
855 */
856 /*
857 * Note: These functions might sleep. Do not call while
858 * holding a spinlock/readlock.
859 */
860 int (*audio_enable)(struct omap_dss_device *dssdev);
861 void (*audio_disable)(struct omap_dss_device *dssdev);
862 bool (*audio_supported)(struct omap_dss_device *dssdev);
863 int (*audio_config)(struct omap_dss_device *dssdev,
864 struct omap_dss_audio *audio);
865 /* Note: These functions may not sleep */
866 int (*audio_start)(struct omap_dss_device *dssdev);
867 void (*audio_stop)(struct omap_dss_device *dssdev);
868
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200869};
870
Tomi Valkeinenb2c7d542012-10-18 13:46:29 +0300871enum omapdss_version omapdss_get_version(void);
Tomi Valkeinen591a0ac2013-05-23 12:07:50 +0300872bool omapdss_is_initialized(void);
Tomi Valkeinenb2c7d542012-10-18 13:46:29 +0300873
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200874int omap_dss_register_driver(struct omap_dss_driver *);
875void omap_dss_unregister_driver(struct omap_dss_driver *);
876
Tomi Valkeinen2e7e3dc2012-11-16 15:45:26 +0200877int omapdss_register_display(struct omap_dss_device *dssdev);
878void omapdss_unregister_display(struct omap_dss_device *dssdev);
879
Tomi Valkeinend35317a2013-05-03 11:40:54 +0300880struct omap_dss_device *omap_dss_get_device(struct omap_dss_device *dssdev);
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200881void omap_dss_put_device(struct omap_dss_device *dssdev);
882#define for_each_dss_dev(d) while ((d = omap_dss_get_next_device(d)) != NULL)
883struct omap_dss_device *omap_dss_get_next_device(struct omap_dss_device *from);
884struct omap_dss_device *omap_dss_find_device(void *data,
885 int (*match)(struct omap_dss_device *dssdev, void *data));
Tomi Valkeinen2bbcce52012-10-29 12:40:46 +0200886const char *omapdss_get_default_display_name(void);
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200887
Tomi Valkeinen6fcd4852013-05-10 13:02:32 +0300888void videomode_to_omap_video_timings(const struct videomode *vm,
889 struct omap_video_timings *ovt);
890void omap_video_timings_to_videomode(const struct omap_video_timings *ovt,
891 struct videomode *vm);
892
Tomi Valkeineneda34272012-11-07 16:26:11 +0200893int dss_feat_get_num_mgrs(void);
894int dss_feat_get_num_ovls(void);
895enum omap_display_type dss_feat_get_supported_displays(enum omap_channel channel);
896enum omap_dss_output_id dss_feat_get_supported_outputs(enum omap_channel channel);
897enum omap_color_mode dss_feat_get_supported_color_modes(enum omap_plane plane);
898
899
900
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200901int omap_dss_get_num_overlay_managers(void);
902struct omap_overlay_manager *omap_dss_get_overlay_manager(int num);
903
904int omap_dss_get_num_overlays(void);
905struct omap_overlay *omap_dss_get_overlay(int num);
906
Tomi Valkeinen5d47dbc2013-04-24 13:32:51 +0300907int omapdss_register_output(struct omap_dss_device *output);
908void omapdss_unregister_output(struct omap_dss_device *output);
Tomi Valkeinen1f68d9c2013-04-19 15:09:34 +0300909struct omap_dss_device *omap_dss_get_output(enum omap_dss_output_id id);
910struct omap_dss_device *omap_dss_find_output(const char *name);
911struct omap_dss_device *omap_dss_find_output_by_node(struct device_node *node);
912int omapdss_output_set_device(struct omap_dss_device *out,
Archit Taneja6d71b922012-08-29 13:30:15 +0530913 struct omap_dss_device *dssdev);
Tomi Valkeinen1f68d9c2013-04-19 15:09:34 +0300914int omapdss_output_unset_device(struct omap_dss_device *out);
Archit Taneja484dc402012-09-07 17:38:00 +0530915
Tomi Valkeinen1f68d9c2013-04-19 15:09:34 +0300916struct omap_dss_device *omapdss_find_output_from_display(struct omap_dss_device *dssdev);
Tomi Valkeinenbe8e8e12013-04-23 15:35:35 +0300917struct omap_overlay_manager *omapdss_find_mgr_from_display(struct omap_dss_device *dssdev);
918
Tomi Valkeinen96adcec2010-01-11 13:54:33 +0200919void omapdss_default_get_resolution(struct omap_dss_device *dssdev,
920 u16 *xres, u16 *yres);
Tomi Valkeinena2699502010-01-11 14:33:40 +0200921int omapdss_default_get_recommended_bpp(struct omap_dss_device *dssdev);
Grazvydas Ignotas4b6430f2012-03-15 20:00:23 +0200922void omapdss_default_get_timings(struct omap_dss_device *dssdev,
923 struct omap_video_timings *timings);
Tomi Valkeinena2699502010-01-11 14:33:40 +0200924
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200925typedef void (*omap_dispc_isr_t) (void *arg, u32 mask);
926int omap_dispc_register_isr(omap_dispc_isr_t isr, void *arg, u32 mask);
927int omap_dispc_unregister_isr(omap_dispc_isr_t isr, void *arg, u32 mask);
928
Tomi Valkeinen348be692012-11-07 18:17:35 +0200929u32 dispc_read_irqstatus(void);
930void dispc_clear_irqstatus(u32 mask);
931u32 dispc_read_irqenable(void);
932void dispc_write_irqenable(u32 mask);
933
934int dispc_request_irq(irq_handler_t handler, void *dev_id);
935void dispc_free_irq(void *dev_id);
936
937int dispc_runtime_get(void);
938void dispc_runtime_put(void);
939
940void dispc_mgr_enable(enum omap_channel channel, bool enable);
941bool dispc_mgr_is_enabled(enum omap_channel channel);
942u32 dispc_mgr_get_vsync_irq(enum omap_channel channel);
943u32 dispc_mgr_get_framedone_irq(enum omap_channel channel);
944u32 dispc_mgr_get_sync_lost_irq(enum omap_channel channel);
945bool dispc_mgr_go_busy(enum omap_channel channel);
946void dispc_mgr_go(enum omap_channel channel);
947void dispc_mgr_set_lcd_config(enum omap_channel channel,
948 const struct dss_lcd_mgr_config *config);
949void dispc_mgr_set_timings(enum omap_channel channel,
950 const struct omap_video_timings *timings);
951void dispc_mgr_setup(enum omap_channel channel,
952 const struct omap_overlay_manager_info *info);
953
954int dispc_ovl_check(enum omap_plane plane, enum omap_channel channel,
955 const struct omap_overlay_info *oi,
956 const struct omap_video_timings *timings,
957 int *x_predecim, int *y_predecim);
958
959int dispc_ovl_enable(enum omap_plane plane, bool enable);
960bool dispc_ovl_enabled(enum omap_plane plane);
961void dispc_ovl_set_channel_out(enum omap_plane plane,
962 enum omap_channel channel);
963int dispc_ovl_setup(enum omap_plane plane, const struct omap_overlay_info *oi,
964 bool replication, const struct omap_video_timings *mgr_timings,
965 bool mem_to_mem);
966
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200967#define to_dss_driver(x) container_of((x), struct omap_dss_driver, driver)
Tomi Valkeinenecc8b372013-02-14 14:17:28 +0200968#define to_dss_device(x) container_of((x), struct omap_dss_device, old_dev)
Tomi Valkeinen559d6702009-11-03 11:23:50 +0200969
Tomi Valkeinen8dd24912012-10-10 10:26:45 +0300970int omapdss_compat_init(void);
971void omapdss_compat_uninit(void);
972
Tomi Valkeinena97a9632012-10-24 13:52:40 +0300973struct dss_mgr_ops {
Tomi Valkeinena7e71e72013-05-08 16:23:32 +0300974 int (*connect)(struct omap_overlay_manager *mgr,
Tomi Valkeinen1f68d9c2013-04-19 15:09:34 +0300975 struct omap_dss_device *dst);
Tomi Valkeinena7e71e72013-05-08 16:23:32 +0300976 void (*disconnect)(struct omap_overlay_manager *mgr,
Tomi Valkeinen1f68d9c2013-04-19 15:09:34 +0300977 struct omap_dss_device *dst);
Tomi Valkeinena7e71e72013-05-08 16:23:32 +0300978
Tomi Valkeinena97a9632012-10-24 13:52:40 +0300979 void (*start_update)(struct omap_overlay_manager *mgr);
980 int (*enable)(struct omap_overlay_manager *mgr);
981 void (*disable)(struct omap_overlay_manager *mgr);
982 void (*set_timings)(struct omap_overlay_manager *mgr,
983 const struct omap_video_timings *timings);
984 void (*set_lcd_config)(struct omap_overlay_manager *mgr,
985 const struct dss_lcd_mgr_config *config);
986 int (*register_framedone_handler)(struct omap_overlay_manager *mgr,
987 void (*handler)(void *), void *data);
988 void (*unregister_framedone_handler)(struct omap_overlay_manager *mgr,
989 void (*handler)(void *), void *data);
990};
991
992int dss_install_mgr_ops(const struct dss_mgr_ops *mgr_ops);
993void dss_uninstall_mgr_ops(void);
994
Tomi Valkeinena7e71e72013-05-08 16:23:32 +0300995int dss_mgr_connect(struct omap_overlay_manager *mgr,
Tomi Valkeinen1f68d9c2013-04-19 15:09:34 +0300996 struct omap_dss_device *dst);
Tomi Valkeinena7e71e72013-05-08 16:23:32 +0300997void dss_mgr_disconnect(struct omap_overlay_manager *mgr,
Tomi Valkeinen1f68d9c2013-04-19 15:09:34 +0300998 struct omap_dss_device *dst);
Tomi Valkeinena97a9632012-10-24 13:52:40 +0300999void dss_mgr_set_timings(struct omap_overlay_manager *mgr,
1000 const struct omap_video_timings *timings);
1001void dss_mgr_set_lcd_config(struct omap_overlay_manager *mgr,
1002 const struct dss_lcd_mgr_config *config);
1003int dss_mgr_enable(struct omap_overlay_manager *mgr);
1004void dss_mgr_disable(struct omap_overlay_manager *mgr);
1005void dss_mgr_start_update(struct omap_overlay_manager *mgr);
1006int dss_mgr_register_framedone_handler(struct omap_overlay_manager *mgr,
1007 void (*handler)(void *), void *data);
1008void dss_mgr_unregister_framedone_handler(struct omap_overlay_manager *mgr,
1009 void (*handler)(void *), void *data);
Tomi Valkeinena7e71e72013-05-08 16:23:32 +03001010
1011static inline bool omapdss_device_is_connected(struct omap_dss_device *dssdev)
1012{
Tomi Valkeinena73fdc62013-07-24 13:01:34 +03001013 return dssdev->src;
Tomi Valkeinena7e71e72013-05-08 16:23:32 +03001014}
1015
1016static inline bool omapdss_device_is_enabled(struct omap_dss_device *dssdev)
1017{
1018 return dssdev->state == OMAP_DSS_DISPLAY_ACTIVE;
1019}
1020
Tomi Valkeinen4e7470d2013-12-03 16:57:40 +02001021struct device_node *
1022omapdss_of_get_next_port(const struct device_node *parent,
1023 struct device_node *prev);
1024
1025struct device_node *
1026omapdss_of_get_next_endpoint(const struct device_node *parent,
1027 struct device_node *prev);
1028
1029struct device_node *
1030omapdss_of_get_first_endpoint(const struct device_node *parent);
1031
1032struct omap_dss_device *
1033omapdss_of_find_source_for_first_ep(struct device_node *node);
1034
Tomi Valkeinen559d6702009-11-03 11:23:50 +02001035#endif