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Michal Simek8beb8502009-03-27 14:25:16 +01001/*
Michal Simek46fb9be2009-05-26 16:30:28 +02002 * Copyright (C) 2007-2009 Michal Simek <monstr@monstr.eu>
3 * Copyright (C) 2007-2009 PetaLogix
Michal Simek8beb8502009-03-27 14:25:16 +01004 * Copyright (C) 2007 John Williams <john.williams@petalogix.com>
5 * based on v850 version which was
6 * Copyright (C) 2001,02,03 NEC Electronics Corporation
7 * Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org>
8 *
9 * This file is subject to the terms and conditions of the GNU General
10 * Public License. See the file COPYING in the main directory of this
11 * archive for more details.
12 *
13 */
14
15#ifndef _ASM_MICROBLAZE_CACHEFLUSH_H
16#define _ASM_MICROBLAZE_CACHEFLUSH_H
17
18/* Somebody depends on this; sigh... */
19#include <linux/mm.h>
Michal Simek79e87832010-06-04 13:00:31 +020020#include <linux/io.h>
Michal Simek8beb8502009-03-27 14:25:16 +010021
Michal Simek2ee2ff82009-12-10 11:43:57 +010022/* Look at Documentation/cachetlb.txt */
23
Michal Simek8beb8502009-03-27 14:25:16 +010024/*
25 * Cache handling functions.
26 * Microblaze has a write-through data cache, meaning that the data cache
27 * never needs to be flushed. The only flushing operations that are
28 * implemented are to invalidate the instruction cache. These are called
29 * after loading a user application into memory, we must invalidate the
30 * instruction cache to make sure we don't fetch old, bad code.
31 */
32
Michal Simek2ee2ff82009-12-10 11:43:57 +010033/* struct cache, d=dcache, i=icache, fl = flush, iv = invalidate,
34 * suffix r = range */
35struct scache {
36 /* icache */
37 void (*ie)(void); /* enable */
38 void (*id)(void); /* disable */
39 void (*ifl)(void); /* flush */
40 void (*iflr)(unsigned long a, unsigned long b);
41 void (*iin)(void); /* invalidate */
42 void (*iinr)(unsigned long a, unsigned long b);
43 /* dcache */
44 void (*de)(void); /* enable */
45 void (*dd)(void); /* disable */
46 void (*dfl)(void); /* flush */
47 void (*dflr)(unsigned long a, unsigned long b);
48 void (*din)(void); /* invalidate */
49 void (*dinr)(unsigned long a, unsigned long b);
50};
51
52/* microblaze cache */
53extern struct scache *mbc;
54
55void microblaze_cache_init(void);
56
57#define enable_icache() mbc->ie();
58#define disable_icache() mbc->id();
59#define flush_icache() mbc->ifl();
60#define flush_icache_range(start, end) mbc->iflr(start, end);
61#define invalidate_icache() mbc->iin();
62#define invalidate_icache_range(start, end) mbc->iinr(start, end);
63
Michal Simek2ee2ff82009-12-10 11:43:57 +010064#define flush_icache_user_range(vma, pg, adr, len) flush_icache();
65#define flush_icache_page(vma, pg) do { } while (0)
66
67#define enable_dcache() mbc->de();
68#define disable_dcache() mbc->dd();
Michal Simek8beb8502009-03-27 14:25:16 +010069/* FIXME for LL-temac driver */
Michal Simek2ee2ff82009-12-10 11:43:57 +010070#define invalidate_dcache() mbc->din();
71#define invalidate_dcache_range(start, end) mbc->dinr(start, end);
72#define flush_dcache() mbc->dfl();
73#define flush_dcache_range(start, end) mbc->dflr(start, end);
Michal Simek8beb8502009-03-27 14:25:16 +010074
Michal Simek79e87832010-06-04 13:00:31 +020075#define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 1
76/* MS: We have to implement it because of rootfs-jffs2 issue on WB */
77#define flush_dcache_page(page) \
78do { \
79 unsigned long addr = (unsigned long) page_address(page); /* virtual */ \
80 addr = (u32)virt_to_phys((void *)addr); \
81 flush_dcache_range((unsigned) (addr), (unsigned) (addr) + PAGE_SIZE); \
82} while (0);
83
Michal Simek8beb8502009-03-27 14:25:16 +010084#define flush_dcache_mmap_lock(mapping) do { } while (0)
85#define flush_dcache_mmap_unlock(mapping) do { } while (0)
86
Michal Simek2ee2ff82009-12-10 11:43:57 +010087#define flush_cache_dup_mm(mm) do { } while (0)
88#define flush_cache_vmap(start, end) do { } while (0)
89#define flush_cache_vunmap(start, end) do { } while (0)
90#define flush_cache_mm(mm) do { } while (0)
Michal Simeka7067292010-05-28 14:45:38 +020091
92#define flush_cache_page(vma, vmaddr, pfn) \
93 flush_dcache_range(pfn << PAGE_SHIFT, (pfn << PAGE_SHIFT) + PAGE_SIZE);
Michal Simek46fb9be2009-05-26 16:30:28 +020094
Michal Simek2ee2ff82009-12-10 11:43:57 +010095/* MS: kgdb code use this macro, wrong len with FLASH */
96#if 0
97#define flush_cache_range(vma, start, len) { \
98 flush_icache_range((unsigned) (start), (unsigned) (start) + (len)); \
99 flush_dcache_range((unsigned) (start), (unsigned) (start) + (len)); \
100}
Michal Simek46fb9be2009-05-26 16:30:28 +0200101#endif
102
Michal Simek2ee2ff82009-12-10 11:43:57 +0100103#define flush_cache_range(vma, start, len) do { } while (0)
Michal Simek8beb8502009-03-27 14:25:16 +0100104
Michal Simek62bc82a2013-06-03 11:30:04 +0200105static inline void copy_to_user_page(struct vm_area_struct *vma,
106 struct page *page, unsigned long vaddr,
107 void *dst, void *src, int len)
108{
109 u32 addr = virt_to_phys(dst);
110 memcpy(dst, src, len);
111 if (vma->vm_flags & VM_EXEC) {
112 invalidate_icache_range(addr, addr + PAGE_SIZE);
113 flush_dcache_range(addr, addr + PAGE_SIZE);
114 }
115}
Michal Simek8beb8502009-03-27 14:25:16 +0100116
Michal Simek62bc82a2013-06-03 11:30:04 +0200117static inline void copy_from_user_page(struct vm_area_struct *vma,
118 struct page *page, unsigned long vaddr,
119 void *dst, void *src, int len)
120{
121 memcpy(dst, src, len);
122}
Michal Simek8beb8502009-03-27 14:25:16 +0100123
124#endif /* _ASM_MICROBLAZE_CACHEFLUSH_H */