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Alessandro Rubini2ec1d352009-07-02 15:29:12 +01001/*
2 * Generic GPIO driver for logic cells found in the Nomadik SoC
3 *
4 * Copyright (C) 2008,2009 STMicroelectronics
5 * Copyright (C) 2009 Alessandro Rubini <rubini@unipv.it>
6 * Rewritten based on work by Prafulla WADASKAR <prafulla.wadaskar@st.com>
Linus Walleij33d78642011-06-09 11:08:47 +02007 * Copyright (C) 2011 Linus Walleij <linus.walleij@linaro.org>
Alessandro Rubini2ec1d352009-07-02 15:29:12 +01008 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13#include <linux/kernel.h>
14#include <linux/module.h>
15#include <linux/init.h>
16#include <linux/device.h>
Rabin Vincent3e3c62c2010-03-03 04:52:34 +010017#include <linux/platform_device.h>
Alessandro Rubini2ec1d352009-07-02 15:29:12 +010018#include <linux/io.h>
Rabin Vincentaf7dc222010-05-06 11:14:17 +010019#include <linux/clk.h>
20#include <linux/err.h>
Alessandro Rubini2ec1d352009-07-02 15:29:12 +010021#include <linux/gpio.h>
22#include <linux/spinlock.h>
23#include <linux/interrupt.h>
24#include <linux/irq.h>
Lee Jonesa60b57e2012-04-19 21:36:31 +010025#include <linux/irqdomain.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090026#include <linux/slab.h>
Lee Jones855f80c2012-05-26 06:09:29 +010027#include <linux/of_device.h>
Linus Walleije98ea772012-04-26 23:57:25 +020028#include <linux/pinctrl/pinctrl.h>
Linus Walleijdbfe8ca2012-05-02 22:56:47 +020029#include <linux/pinctrl/pinmux.h>
Linus Walleijd41af622012-05-03 15:58:12 +020030#include <linux/pinctrl/pinconf.h>
Linus Walleijdbfe8ca2012-05-02 22:56:47 +020031/* Since we request GPIOs from ourself */
32#include <linux/pinctrl/consumer.h>
Alessandro Rubini2ec1d352009-07-02 15:29:12 +010033
Will Deaconadfed152011-02-28 10:12:29 +000034#include <asm/mach/irq.h>
35
Rabin Vincent378be062010-06-02 06:06:29 +010036#include <plat/pincfg.h>
Linus Walleij0f332862011-08-22 08:33:30 +010037#include <plat/gpio-nomadik.h>
Alessandro Rubini2ec1d352009-07-02 15:29:12 +010038
Linus Walleije98ea772012-04-26 23:57:25 +020039#include "pinctrl-nomadik.h"
40
Alessandro Rubini2ec1d352009-07-02 15:29:12 +010041/*
42 * The GPIO module in the Nomadik family of Systems-on-Chip is an
43 * AMBA device, managing 32 pins and alternate functions. The logic block
Jonas Aaberg9c66ee62010-10-13 13:14:17 +020044 * is currently used in the Nomadik and ux500.
Alessandro Rubini2ec1d352009-07-02 15:29:12 +010045 *
46 * Symbols in this file are called "nmk_gpio" for "nomadik gpio"
47 */
48
Rabin Vincent01727e62010-12-13 12:02:40 +053049#define NMK_GPIO_PER_CHIP 32
50
Alessandro Rubini2ec1d352009-07-02 15:29:12 +010051struct nmk_gpio_chip {
52 struct gpio_chip chip;
Lee Jonesa60b57e2012-04-19 21:36:31 +010053 struct irq_domain *domain;
Alessandro Rubini2ec1d352009-07-02 15:29:12 +010054 void __iomem *addr;
Rabin Vincentaf7dc222010-05-06 11:14:17 +010055 struct clk *clk;
Rabin Vincent33b744b2010-10-14 10:38:03 +053056 unsigned int bank;
Alessandro Rubini2ec1d352009-07-02 15:29:12 +010057 unsigned int parent_irq;
Virupax Sadashivpetimath2c8bb0e2010-11-11 14:10:38 +053058 int secondary_parent_irq;
Rabin Vincent33b744b2010-10-14 10:38:03 +053059 u32 (*get_secondary_status)(unsigned int bank);
Rabin Vincent01727e62010-12-13 12:02:40 +053060 void (*set_ioforce)(bool enable);
Rabin Vincentc0fcb8d2010-03-03 04:48:54 +010061 spinlock_t lock;
Linus Walleij33d78642011-06-09 11:08:47 +020062 bool sleepmode;
Alessandro Rubini2ec1d352009-07-02 15:29:12 +010063 /* Keep track of configured edges */
64 u32 edge_rising;
65 u32 edge_falling;
Rabin Vincentb9df4682011-02-10 11:45:58 +053066 u32 real_wake;
67 u32 rwimsc;
68 u32 fwimsc;
Rabin Vincent6c12fe82011-05-23 12:13:33 +053069 u32 rimsc;
70 u32 fimsc;
Rickard Anderssonbc6f5cf2011-05-24 23:07:17 +020071 u32 pull_up;
Rabin Vincentebc61782011-09-28 15:49:11 +053072 u32 lowemi;
Alessandro Rubini2ec1d352009-07-02 15:29:12 +010073};
74
Linus Walleije98ea772012-04-26 23:57:25 +020075struct nmk_pinctrl {
76 struct device *dev;
77 struct pinctrl_dev *pctl;
78 const struct nmk_pinctrl_soc_data *soc;
79};
80
Rabin Vincent01727e62010-12-13 12:02:40 +053081static struct nmk_gpio_chip *
82nmk_gpio_chips[DIV_ROUND_UP(ARCH_NR_GPIOS, NMK_GPIO_PER_CHIP)];
83
84static DEFINE_SPINLOCK(nmk_gpio_slpm_lock);
85
86#define NUM_BANKS ARRAY_SIZE(nmk_gpio_chips)
87
Rabin Vincent6f9a9742010-06-02 05:50:28 +010088static void __nmk_gpio_set_mode(struct nmk_gpio_chip *nmk_chip,
89 unsigned offset, int gpio_mode)
90{
91 u32 bit = 1 << offset;
92 u32 afunc, bfunc;
93
94 afunc = readl(nmk_chip->addr + NMK_GPIO_AFSLA) & ~bit;
95 bfunc = readl(nmk_chip->addr + NMK_GPIO_AFSLB) & ~bit;
96 if (gpio_mode & NMK_GPIO_ALT_A)
97 afunc |= bit;
98 if (gpio_mode & NMK_GPIO_ALT_B)
99 bfunc |= bit;
100 writel(afunc, nmk_chip->addr + NMK_GPIO_AFSLA);
101 writel(bfunc, nmk_chip->addr + NMK_GPIO_AFSLB);
102}
103
Rabin Vincent81a3c292010-05-27 12:39:23 +0100104static void __nmk_gpio_set_slpm(struct nmk_gpio_chip *nmk_chip,
105 unsigned offset, enum nmk_gpio_slpm mode)
106{
107 u32 bit = 1 << offset;
108 u32 slpm;
109
110 slpm = readl(nmk_chip->addr + NMK_GPIO_SLPC);
111 if (mode == NMK_GPIO_SLPM_NOCHANGE)
112 slpm |= bit;
113 else
114 slpm &= ~bit;
115 writel(slpm, nmk_chip->addr + NMK_GPIO_SLPC);
116}
117
Rabin Vincent5b327ed2010-05-27 12:29:50 +0100118static void __nmk_gpio_set_pull(struct nmk_gpio_chip *nmk_chip,
119 unsigned offset, enum nmk_gpio_pull pull)
120{
121 u32 bit = 1 << offset;
122 u32 pdis;
123
124 pdis = readl(nmk_chip->addr + NMK_GPIO_PDIS);
Rickard Anderssonbc6f5cf2011-05-24 23:07:17 +0200125 if (pull == NMK_GPIO_PULL_NONE) {
Rabin Vincent5b327ed2010-05-27 12:29:50 +0100126 pdis |= bit;
Rickard Anderssonbc6f5cf2011-05-24 23:07:17 +0200127 nmk_chip->pull_up &= ~bit;
128 } else {
Rabin Vincent5b327ed2010-05-27 12:29:50 +0100129 pdis &= ~bit;
Rickard Anderssonbc6f5cf2011-05-24 23:07:17 +0200130 }
131
Rabin Vincent5b327ed2010-05-27 12:29:50 +0100132 writel(pdis, nmk_chip->addr + NMK_GPIO_PDIS);
133
Rickard Anderssonbc6f5cf2011-05-24 23:07:17 +0200134 if (pull == NMK_GPIO_PULL_UP) {
135 nmk_chip->pull_up |= bit;
Rabin Vincent5b327ed2010-05-27 12:29:50 +0100136 writel(bit, nmk_chip->addr + NMK_GPIO_DATS);
Rickard Anderssonbc6f5cf2011-05-24 23:07:17 +0200137 } else if (pull == NMK_GPIO_PULL_DOWN) {
138 nmk_chip->pull_up &= ~bit;
Rabin Vincent5b327ed2010-05-27 12:29:50 +0100139 writel(bit, nmk_chip->addr + NMK_GPIO_DATC);
Rickard Anderssonbc6f5cf2011-05-24 23:07:17 +0200140 }
Rabin Vincent5b327ed2010-05-27 12:29:50 +0100141}
142
Rabin Vincentebc61782011-09-28 15:49:11 +0530143static void __nmk_gpio_set_lowemi(struct nmk_gpio_chip *nmk_chip,
144 unsigned offset, bool lowemi)
145{
146 u32 bit = BIT(offset);
147 bool enabled = nmk_chip->lowemi & bit;
148
149 if (lowemi == enabled)
150 return;
151
152 if (lowemi)
153 nmk_chip->lowemi |= bit;
154 else
155 nmk_chip->lowemi &= ~bit;
156
157 writel_relaxed(nmk_chip->lowemi,
158 nmk_chip->addr + NMK_GPIO_LOWEMI);
159}
160
Rabin Vincent378be062010-06-02 06:06:29 +0100161static void __nmk_gpio_make_input(struct nmk_gpio_chip *nmk_chip,
162 unsigned offset)
163{
164 writel(1 << offset, nmk_chip->addr + NMK_GPIO_DIRC);
165}
166
Rabin Vincent6720db72010-09-02 11:28:48 +0100167static void __nmk_gpio_set_output(struct nmk_gpio_chip *nmk_chip,
168 unsigned offset, int val)
169{
170 if (val)
171 writel(1 << offset, nmk_chip->addr + NMK_GPIO_DATS);
172 else
173 writel(1 << offset, nmk_chip->addr + NMK_GPIO_DATC);
174}
175
176static void __nmk_gpio_make_output(struct nmk_gpio_chip *nmk_chip,
177 unsigned offset, int val)
178{
179 writel(1 << offset, nmk_chip->addr + NMK_GPIO_DIRS);
180 __nmk_gpio_set_output(nmk_chip, offset, val);
181}
182
Rabin Vincent01727e62010-12-13 12:02:40 +0530183static void __nmk_gpio_set_mode_safe(struct nmk_gpio_chip *nmk_chip,
184 unsigned offset, int gpio_mode,
185 bool glitch)
186{
Rabin Vincent6c12fe82011-05-23 12:13:33 +0530187 u32 rwimsc = nmk_chip->rwimsc;
188 u32 fwimsc = nmk_chip->fwimsc;
Rabin Vincent01727e62010-12-13 12:02:40 +0530189
190 if (glitch && nmk_chip->set_ioforce) {
191 u32 bit = BIT(offset);
192
Rabin Vincent01727e62010-12-13 12:02:40 +0530193 /* Prevent spurious wakeups */
194 writel(rwimsc & ~bit, nmk_chip->addr + NMK_GPIO_RWIMSC);
195 writel(fwimsc & ~bit, nmk_chip->addr + NMK_GPIO_FWIMSC);
196
197 nmk_chip->set_ioforce(true);
198 }
199
200 __nmk_gpio_set_mode(nmk_chip, offset, gpio_mode);
201
202 if (glitch && nmk_chip->set_ioforce) {
203 nmk_chip->set_ioforce(false);
204
205 writel(rwimsc, nmk_chip->addr + NMK_GPIO_RWIMSC);
206 writel(fwimsc, nmk_chip->addr + NMK_GPIO_FWIMSC);
207 }
208}
209
Rabin Vincent6c42ad12011-05-23 12:22:18 +0530210static void
211nmk_gpio_disable_lazy_irq(struct nmk_gpio_chip *nmk_chip, unsigned offset)
212{
213 u32 falling = nmk_chip->fimsc & BIT(offset);
214 u32 rising = nmk_chip->rimsc & BIT(offset);
215 int gpio = nmk_chip->chip.base + offset;
216 int irq = NOMADIK_GPIO_TO_IRQ(gpio);
217 struct irq_data *d = irq_get_irq_data(irq);
218
219 if (!rising && !falling)
220 return;
221
222 if (!d || !irqd_irq_disabled(d))
223 return;
224
225 if (rising) {
226 nmk_chip->rimsc &= ~BIT(offset);
227 writel_relaxed(nmk_chip->rimsc,
228 nmk_chip->addr + NMK_GPIO_RIMSC);
229 }
230
231 if (falling) {
232 nmk_chip->fimsc &= ~BIT(offset);
233 writel_relaxed(nmk_chip->fimsc,
234 nmk_chip->addr + NMK_GPIO_FIMSC);
235 }
236
237 dev_dbg(nmk_chip->chip.dev, "%d: clearing interrupt mask\n", gpio);
238}
239
Rabin Vincent378be062010-06-02 06:06:29 +0100240static void __nmk_config_pin(struct nmk_gpio_chip *nmk_chip, unsigned offset,
Rabin Vincent01727e62010-12-13 12:02:40 +0530241 pin_cfg_t cfg, bool sleep, unsigned int *slpmregs)
Rabin Vincent378be062010-06-02 06:06:29 +0100242{
243 static const char *afnames[] = {
244 [NMK_GPIO_ALT_GPIO] = "GPIO",
245 [NMK_GPIO_ALT_A] = "A",
246 [NMK_GPIO_ALT_B] = "B",
247 [NMK_GPIO_ALT_C] = "C"
248 };
249 static const char *pullnames[] = {
250 [NMK_GPIO_PULL_NONE] = "none",
251 [NMK_GPIO_PULL_UP] = "up",
252 [NMK_GPIO_PULL_DOWN] = "down",
253 [3] /* illegal */ = "??"
254 };
255 static const char *slpmnames[] = {
Rabin Vincent7e3f7e52010-09-02 11:28:05 +0100256 [NMK_GPIO_SLPM_INPUT] = "input/wakeup",
257 [NMK_GPIO_SLPM_NOCHANGE] = "no-change/no-wakeup",
Rabin Vincent378be062010-06-02 06:06:29 +0100258 };
259
260 int pin = PIN_NUM(cfg);
261 int pull = PIN_PULL(cfg);
262 int af = PIN_ALT(cfg);
263 int slpm = PIN_SLPM(cfg);
Rabin Vincent6720db72010-09-02 11:28:48 +0100264 int output = PIN_DIR(cfg);
265 int val = PIN_VAL(cfg);
Rabin Vincent01727e62010-12-13 12:02:40 +0530266 bool glitch = af == NMK_GPIO_ALT_C;
Rabin Vincent378be062010-06-02 06:06:29 +0100267
Rabin Vincentdacdc962010-12-03 20:35:37 +0530268 dev_dbg(nmk_chip->chip.dev, "pin %d [%#lx]: af %s, pull %s, slpm %s (%s%s)\n",
269 pin, cfg, afnames[af], pullnames[pull], slpmnames[slpm],
Rabin Vincent6720db72010-09-02 11:28:48 +0100270 output ? "output " : "input",
271 output ? (val ? "high" : "low") : "");
Rabin Vincent378be062010-06-02 06:06:29 +0100272
Rabin Vincentdacdc962010-12-03 20:35:37 +0530273 if (sleep) {
274 int slpm_pull = PIN_SLPM_PULL(cfg);
275 int slpm_output = PIN_SLPM_DIR(cfg);
276 int slpm_val = PIN_SLPM_VAL(cfg);
277
Rabin Vincent3546d152010-11-25 11:38:27 +0530278 af = NMK_GPIO_ALT_GPIO;
279
Rabin Vincentdacdc962010-12-03 20:35:37 +0530280 /*
281 * The SLPM_* values are normal values + 1 to allow zero to
282 * mean "same as normal".
283 */
284 if (slpm_pull)
285 pull = slpm_pull - 1;
286 if (slpm_output)
287 output = slpm_output - 1;
288 if (slpm_val)
289 val = slpm_val - 1;
290
291 dev_dbg(nmk_chip->chip.dev, "pin %d: sleep pull %s, dir %s, val %s\n",
292 pin,
293 slpm_pull ? pullnames[pull] : "same",
294 slpm_output ? (output ? "output" : "input") : "same",
295 slpm_val ? (val ? "high" : "low") : "same");
296 }
297
Rabin Vincent6720db72010-09-02 11:28:48 +0100298 if (output)
299 __nmk_gpio_make_output(nmk_chip, offset, val);
300 else {
301 __nmk_gpio_make_input(nmk_chip, offset);
302 __nmk_gpio_set_pull(nmk_chip, offset, pull);
303 }
304
Rabin Vincentebc61782011-09-28 15:49:11 +0530305 __nmk_gpio_set_lowemi(nmk_chip, offset, PIN_LOWEMI(cfg));
306
Rabin Vincent01727e62010-12-13 12:02:40 +0530307 /*
Rabin Vincent6c42ad12011-05-23 12:22:18 +0530308 * If the pin is switching to altfunc, and there was an interrupt
309 * installed on it which has been lazy disabled, actually mask the
310 * interrupt to prevent spurious interrupts that would occur while the
311 * pin is under control of the peripheral. Only SKE does this.
312 */
313 if (af != NMK_GPIO_ALT_GPIO)
314 nmk_gpio_disable_lazy_irq(nmk_chip, offset);
315
316 /*
Rabin Vincent01727e62010-12-13 12:02:40 +0530317 * If we've backed up the SLPM registers (glitch workaround), modify
318 * the backups since they will be restored.
319 */
320 if (slpmregs) {
321 if (slpm == NMK_GPIO_SLPM_NOCHANGE)
322 slpmregs[nmk_chip->bank] |= BIT(offset);
323 else
324 slpmregs[nmk_chip->bank] &= ~BIT(offset);
325 } else
326 __nmk_gpio_set_slpm(nmk_chip, offset, slpm);
327
328 __nmk_gpio_set_mode_safe(nmk_chip, offset, af, glitch);
329}
330
331/*
332 * Safe sequence used to switch IOs between GPIO and Alternate-C mode:
333 * - Save SLPM registers
334 * - Set SLPM=0 for the IOs you want to switch and others to 1
335 * - Configure the GPIO registers for the IOs that are being switched
336 * - Set IOFORCE=1
337 * - Modify the AFLSA/B registers for the IOs that are being switched
338 * - Set IOFORCE=0
339 * - Restore SLPM registers
340 * - Any spurious wake up event during switch sequence to be ignored and
341 * cleared
342 */
343static void nmk_gpio_glitch_slpm_init(unsigned int *slpm)
344{
345 int i;
346
347 for (i = 0; i < NUM_BANKS; i++) {
348 struct nmk_gpio_chip *chip = nmk_gpio_chips[i];
349 unsigned int temp = slpm[i];
350
351 if (!chip)
352 break;
353
Rabin Vincent3c0227d2011-09-20 10:50:03 +0200354 clk_enable(chip->clk);
355
Rabin Vincent01727e62010-12-13 12:02:40 +0530356 slpm[i] = readl(chip->addr + NMK_GPIO_SLPC);
357 writel(temp, chip->addr + NMK_GPIO_SLPC);
358 }
359}
360
361static void nmk_gpio_glitch_slpm_restore(unsigned int *slpm)
362{
363 int i;
364
365 for (i = 0; i < NUM_BANKS; i++) {
366 struct nmk_gpio_chip *chip = nmk_gpio_chips[i];
367
368 if (!chip)
369 break;
370
371 writel(slpm[i], chip->addr + NMK_GPIO_SLPC);
Rabin Vincent3c0227d2011-09-20 10:50:03 +0200372
373 clk_disable(chip->clk);
Rabin Vincent01727e62010-12-13 12:02:40 +0530374 }
375}
376
377static int __nmk_config_pins(pin_cfg_t *cfgs, int num, bool sleep)
378{
379 static unsigned int slpm[NUM_BANKS];
380 unsigned long flags;
381 bool glitch = false;
382 int ret = 0;
383 int i;
384
385 for (i = 0; i < num; i++) {
386 if (PIN_ALT(cfgs[i]) == NMK_GPIO_ALT_C) {
387 glitch = true;
388 break;
389 }
390 }
391
392 spin_lock_irqsave(&nmk_gpio_slpm_lock, flags);
393
394 if (glitch) {
395 memset(slpm, 0xff, sizeof(slpm));
396
397 for (i = 0; i < num; i++) {
398 int pin = PIN_NUM(cfgs[i]);
399 int offset = pin % NMK_GPIO_PER_CHIP;
400
401 if (PIN_ALT(cfgs[i]) == NMK_GPIO_ALT_C)
402 slpm[pin / NMK_GPIO_PER_CHIP] &= ~BIT(offset);
403 }
404
405 nmk_gpio_glitch_slpm_init(slpm);
406 }
407
408 for (i = 0; i < num; i++) {
409 struct nmk_gpio_chip *nmk_chip;
410 int pin = PIN_NUM(cfgs[i]);
411
Lee Jonesa60b57e2012-04-19 21:36:31 +0100412 nmk_chip = nmk_gpio_chips[pin / NMK_GPIO_PER_CHIP];
Rabin Vincent01727e62010-12-13 12:02:40 +0530413 if (!nmk_chip) {
414 ret = -EINVAL;
415 break;
416 }
417
Rabin Vincent3c0227d2011-09-20 10:50:03 +0200418 clk_enable(nmk_chip->clk);
Rabin Vincent01727e62010-12-13 12:02:40 +0530419 spin_lock(&nmk_chip->lock);
Lee Jonesa60b57e2012-04-19 21:36:31 +0100420 __nmk_config_pin(nmk_chip, pin % NMK_GPIO_PER_CHIP,
Rabin Vincent01727e62010-12-13 12:02:40 +0530421 cfgs[i], sleep, glitch ? slpm : NULL);
422 spin_unlock(&nmk_chip->lock);
Rabin Vincent3c0227d2011-09-20 10:50:03 +0200423 clk_disable(nmk_chip->clk);
Rabin Vincent01727e62010-12-13 12:02:40 +0530424 }
425
426 if (glitch)
427 nmk_gpio_glitch_slpm_restore(slpm);
428
429 spin_unlock_irqrestore(&nmk_gpio_slpm_lock, flags);
430
431 return ret;
Rabin Vincent378be062010-06-02 06:06:29 +0100432}
433
434/**
435 * nmk_config_pin - configure a pin's mux attributes
436 * @cfg: pin confguration
437 *
438 * Configures a pin's mode (alternate function or GPIO), its pull up status,
439 * and its sleep mode based on the specified configuration. The @cfg is
440 * usually one of the SoC specific macros defined in mach/<soc>-pins.h. These
441 * are constructed using, and can be further enhanced with, the macros in
442 * plat/pincfg.h.
443 *
444 * If a pin's mode is set to GPIO, it is configured as an input to avoid
445 * side-effects. The gpio can be manipulated later using standard GPIO API
446 * calls.
447 */
Rabin Vincentdacdc962010-12-03 20:35:37 +0530448int nmk_config_pin(pin_cfg_t cfg, bool sleep)
Rabin Vincent378be062010-06-02 06:06:29 +0100449{
Rabin Vincent01727e62010-12-13 12:02:40 +0530450 return __nmk_config_pins(&cfg, 1, sleep);
Rabin Vincent378be062010-06-02 06:06:29 +0100451}
452EXPORT_SYMBOL(nmk_config_pin);
453
454/**
455 * nmk_config_pins - configure several pins at once
456 * @cfgs: array of pin configurations
457 * @num: number of elments in the array
458 *
459 * Configures several pins using nmk_config_pin(). Refer to that function for
460 * further information.
461 */
462int nmk_config_pins(pin_cfg_t *cfgs, int num)
463{
Rabin Vincent01727e62010-12-13 12:02:40 +0530464 return __nmk_config_pins(cfgs, num, false);
Rabin Vincent378be062010-06-02 06:06:29 +0100465}
466EXPORT_SYMBOL(nmk_config_pins);
467
Rabin Vincentdacdc962010-12-03 20:35:37 +0530468int nmk_config_pins_sleep(pin_cfg_t *cfgs, int num)
469{
Rabin Vincent01727e62010-12-13 12:02:40 +0530470 return __nmk_config_pins(cfgs, num, true);
Rabin Vincentdacdc962010-12-03 20:35:37 +0530471}
472EXPORT_SYMBOL(nmk_config_pins_sleep);
473
Rabin Vincent5b327ed2010-05-27 12:29:50 +0100474/**
Rabin Vincent81a3c292010-05-27 12:39:23 +0100475 * nmk_gpio_set_slpm() - configure the sleep mode of a pin
476 * @gpio: pin number
477 * @mode: NMK_GPIO_SLPM_INPUT or NMK_GPIO_SLPM_NOCHANGE,
478 *
Linus Walleij33d78642011-06-09 11:08:47 +0200479 * This register is actually in the pinmux layer, not the GPIO block itself.
480 * The GPIO1B_SLPM register defines the GPIO mode when SLEEP/DEEP-SLEEP
481 * mode is entered (i.e. when signal IOFORCE is HIGH by the platform code).
482 * Each GPIO can be configured to be forced into GPIO mode when IOFORCE is
483 * HIGH, overriding the normal setting defined by GPIO_AFSELx registers.
484 * When IOFORCE returns LOW (by software, after SLEEP/DEEP-SLEEP exit),
485 * the GPIOs return to the normal setting defined by GPIO_AFSELx registers.
Rabin Vincent7e3f7e52010-09-02 11:28:05 +0100486 *
Linus Walleij33d78642011-06-09 11:08:47 +0200487 * If @mode is NMK_GPIO_SLPM_INPUT, the corresponding GPIO is switched to GPIO
488 * mode when signal IOFORCE is HIGH (i.e. when SLEEP/DEEP-SLEEP mode is
489 * entered) regardless of the altfunction selected. Also wake-up detection is
490 * ENABLED.
491 *
492 * If @mode is NMK_GPIO_SLPM_NOCHANGE, the corresponding GPIO remains
493 * controlled by NMK_GPIO_DATC, NMK_GPIO_DATS, NMK_GPIO_DIR, NMK_GPIO_PDIS
494 * (for altfunction GPIO) or respective on-chip peripherals (for other
495 * altfuncs) when IOFORCE is HIGH. Also wake-up detection DISABLED.
496 *
497 * Note that enable_irq_wake() will automatically enable wakeup detection.
Rabin Vincent81a3c292010-05-27 12:39:23 +0100498 */
499int nmk_gpio_set_slpm(int gpio, enum nmk_gpio_slpm mode)
500{
501 struct nmk_gpio_chip *nmk_chip;
502 unsigned long flags;
503
Lee Jonesa60b57e2012-04-19 21:36:31 +0100504 nmk_chip = nmk_gpio_chips[gpio / NMK_GPIO_PER_CHIP];
Rabin Vincent81a3c292010-05-27 12:39:23 +0100505 if (!nmk_chip)
506 return -EINVAL;
507
Rabin Vincent3c0227d2011-09-20 10:50:03 +0200508 clk_enable(nmk_chip->clk);
Rabin Vincent01727e62010-12-13 12:02:40 +0530509 spin_lock_irqsave(&nmk_gpio_slpm_lock, flags);
510 spin_lock(&nmk_chip->lock);
511
Lee Jonesa60b57e2012-04-19 21:36:31 +0100512 __nmk_gpio_set_slpm(nmk_chip, gpio % NMK_GPIO_PER_CHIP, mode);
Rabin Vincent01727e62010-12-13 12:02:40 +0530513
514 spin_unlock(&nmk_chip->lock);
515 spin_unlock_irqrestore(&nmk_gpio_slpm_lock, flags);
Rabin Vincent3c0227d2011-09-20 10:50:03 +0200516 clk_disable(nmk_chip->clk);
Rabin Vincent81a3c292010-05-27 12:39:23 +0100517
518 return 0;
519}
520
521/**
Rabin Vincent5b327ed2010-05-27 12:29:50 +0100522 * nmk_gpio_set_pull() - enable/disable pull up/down on a gpio
523 * @gpio: pin number
524 * @pull: one of NMK_GPIO_PULL_DOWN, NMK_GPIO_PULL_UP, and NMK_GPIO_PULL_NONE
525 *
526 * Enables/disables pull up/down on a specified pin. This only takes effect if
527 * the pin is configured as an input (either explicitly or by the alternate
528 * function).
529 *
530 * NOTE: If enabling the pull up/down, the caller must ensure that the GPIO is
531 * configured as an input. Otherwise, due to the way the controller registers
532 * work, this function will change the value output on the pin.
533 */
534int nmk_gpio_set_pull(int gpio, enum nmk_gpio_pull pull)
535{
536 struct nmk_gpio_chip *nmk_chip;
537 unsigned long flags;
538
Lee Jonesa60b57e2012-04-19 21:36:31 +0100539 nmk_chip = nmk_gpio_chips[gpio / NMK_GPIO_PER_CHIP];
Rabin Vincent5b327ed2010-05-27 12:29:50 +0100540 if (!nmk_chip)
541 return -EINVAL;
542
Rabin Vincent3c0227d2011-09-20 10:50:03 +0200543 clk_enable(nmk_chip->clk);
Rabin Vincent5b327ed2010-05-27 12:29:50 +0100544 spin_lock_irqsave(&nmk_chip->lock, flags);
Lee Jonesa60b57e2012-04-19 21:36:31 +0100545 __nmk_gpio_set_pull(nmk_chip, gpio % NMK_GPIO_PER_CHIP, pull);
Rabin Vincent5b327ed2010-05-27 12:29:50 +0100546 spin_unlock_irqrestore(&nmk_chip->lock, flags);
Rabin Vincent3c0227d2011-09-20 10:50:03 +0200547 clk_disable(nmk_chip->clk);
Rabin Vincent5b327ed2010-05-27 12:29:50 +0100548
549 return 0;
550}
551
Alessandro Rubini2ec1d352009-07-02 15:29:12 +0100552/* Mode functions */
Jonas Aaberg9c66ee62010-10-13 13:14:17 +0200553/**
554 * nmk_gpio_set_mode() - set the mux mode of a gpio pin
555 * @gpio: pin number
556 * @gpio_mode: one of NMK_GPIO_ALT_GPIO, NMK_GPIO_ALT_A,
557 * NMK_GPIO_ALT_B, and NMK_GPIO_ALT_C
558 *
559 * Sets the mode of the specified pin to one of the alternate functions or
560 * plain GPIO.
561 */
Alessandro Rubini2ec1d352009-07-02 15:29:12 +0100562int nmk_gpio_set_mode(int gpio, int gpio_mode)
563{
564 struct nmk_gpio_chip *nmk_chip;
565 unsigned long flags;
Alessandro Rubini2ec1d352009-07-02 15:29:12 +0100566
Lee Jonesa60b57e2012-04-19 21:36:31 +0100567 nmk_chip = nmk_gpio_chips[gpio / NMK_GPIO_PER_CHIP];
Alessandro Rubini2ec1d352009-07-02 15:29:12 +0100568 if (!nmk_chip)
569 return -EINVAL;
570
Rabin Vincent3c0227d2011-09-20 10:50:03 +0200571 clk_enable(nmk_chip->clk);
Alessandro Rubini2ec1d352009-07-02 15:29:12 +0100572 spin_lock_irqsave(&nmk_chip->lock, flags);
Lee Jonesa60b57e2012-04-19 21:36:31 +0100573 __nmk_gpio_set_mode(nmk_chip, gpio % NMK_GPIO_PER_CHIP, gpio_mode);
Alessandro Rubini2ec1d352009-07-02 15:29:12 +0100574 spin_unlock_irqrestore(&nmk_chip->lock, flags);
Rabin Vincent3c0227d2011-09-20 10:50:03 +0200575 clk_disable(nmk_chip->clk);
Alessandro Rubini2ec1d352009-07-02 15:29:12 +0100576
577 return 0;
578}
579EXPORT_SYMBOL(nmk_gpio_set_mode);
580
581int nmk_gpio_get_mode(int gpio)
582{
583 struct nmk_gpio_chip *nmk_chip;
584 u32 afunc, bfunc, bit;
585
Lee Jonesa60b57e2012-04-19 21:36:31 +0100586 nmk_chip = nmk_gpio_chips[gpio / NMK_GPIO_PER_CHIP];
Alessandro Rubini2ec1d352009-07-02 15:29:12 +0100587 if (!nmk_chip)
588 return -EINVAL;
589
Lee Jonesa60b57e2012-04-19 21:36:31 +0100590 bit = 1 << (gpio % NMK_GPIO_PER_CHIP);
Alessandro Rubini2ec1d352009-07-02 15:29:12 +0100591
Rabin Vincent3c0227d2011-09-20 10:50:03 +0200592 clk_enable(nmk_chip->clk);
593
Alessandro Rubini2ec1d352009-07-02 15:29:12 +0100594 afunc = readl(nmk_chip->addr + NMK_GPIO_AFSLA) & bit;
595 bfunc = readl(nmk_chip->addr + NMK_GPIO_AFSLB) & bit;
596
Rabin Vincent3c0227d2011-09-20 10:50:03 +0200597 clk_disable(nmk_chip->clk);
598
Alessandro Rubini2ec1d352009-07-02 15:29:12 +0100599 return (afunc ? NMK_GPIO_ALT_A : 0) | (bfunc ? NMK_GPIO_ALT_B : 0);
600}
601EXPORT_SYMBOL(nmk_gpio_get_mode);
602
603
604/* IRQ functions */
605static inline int nmk_gpio_get_bitmask(int gpio)
606{
Lee Jonesa60b57e2012-04-19 21:36:31 +0100607 return 1 << (gpio % NMK_GPIO_PER_CHIP);
Alessandro Rubini2ec1d352009-07-02 15:29:12 +0100608}
609
Lennert Buytenhekf272c002010-11-29 11:16:48 +0100610static void nmk_gpio_irq_ack(struct irq_data *d)
Alessandro Rubini2ec1d352009-07-02 15:29:12 +0100611{
Alessandro Rubini2ec1d352009-07-02 15:29:12 +0100612 struct nmk_gpio_chip *nmk_chip;
613
Lennert Buytenhekf272c002010-11-29 11:16:48 +0100614 nmk_chip = irq_data_get_irq_chip_data(d);
Alessandro Rubini2ec1d352009-07-02 15:29:12 +0100615 if (!nmk_chip)
616 return;
Rabin Vincent3c0227d2011-09-20 10:50:03 +0200617
618 clk_enable(nmk_chip->clk);
Lee Jonesa60b57e2012-04-19 21:36:31 +0100619 writel(nmk_gpio_get_bitmask(d->hwirq), nmk_chip->addr + NMK_GPIO_IC);
Rabin Vincent3c0227d2011-09-20 10:50:03 +0200620 clk_disable(nmk_chip->clk);
Alessandro Rubini2ec1d352009-07-02 15:29:12 +0100621}
622
Rabin Vincent4d4e20f2010-06-16 06:09:34 +0100623enum nmk_gpio_irq_type {
624 NORMAL,
625 WAKE,
626};
627
Rabin Vincent040e5ec2010-05-06 10:42:42 +0100628static void __nmk_gpio_irq_modify(struct nmk_gpio_chip *nmk_chip,
Rabin Vincent4d4e20f2010-06-16 06:09:34 +0100629 int gpio, enum nmk_gpio_irq_type which,
630 bool enable)
Rabin Vincent040e5ec2010-05-06 10:42:42 +0100631{
632 u32 bitmask = nmk_gpio_get_bitmask(gpio);
Rabin Vincent6c12fe82011-05-23 12:13:33 +0530633 u32 *rimscval;
634 u32 *fimscval;
635 u32 rimscreg;
636 u32 fimscreg;
637
638 if (which == NORMAL) {
639 rimscreg = NMK_GPIO_RIMSC;
640 fimscreg = NMK_GPIO_FIMSC;
641 rimscval = &nmk_chip->rimsc;
642 fimscval = &nmk_chip->fimsc;
643 } else {
644 rimscreg = NMK_GPIO_RWIMSC;
645 fimscreg = NMK_GPIO_FWIMSC;
646 rimscval = &nmk_chip->rwimsc;
647 fimscval = &nmk_chip->fwimsc;
648 }
Rabin Vincent040e5ec2010-05-06 10:42:42 +0100649
650 /* we must individually set/clear the two edges */
651 if (nmk_chip->edge_rising & bitmask) {
Rabin Vincent040e5ec2010-05-06 10:42:42 +0100652 if (enable)
Rabin Vincent6c12fe82011-05-23 12:13:33 +0530653 *rimscval |= bitmask;
Rabin Vincent040e5ec2010-05-06 10:42:42 +0100654 else
Rabin Vincent6c12fe82011-05-23 12:13:33 +0530655 *rimscval &= ~bitmask;
656 writel(*rimscval, nmk_chip->addr + rimscreg);
Rabin Vincent040e5ec2010-05-06 10:42:42 +0100657 }
658 if (nmk_chip->edge_falling & bitmask) {
Rabin Vincent040e5ec2010-05-06 10:42:42 +0100659 if (enable)
Rabin Vincent6c12fe82011-05-23 12:13:33 +0530660 *fimscval |= bitmask;
Rabin Vincent040e5ec2010-05-06 10:42:42 +0100661 else
Rabin Vincent6c12fe82011-05-23 12:13:33 +0530662 *fimscval &= ~bitmask;
663 writel(*fimscval, nmk_chip->addr + fimscreg);
Rabin Vincent040e5ec2010-05-06 10:42:42 +0100664 }
665}
666
Rabin Vincentb9df4682011-02-10 11:45:58 +0530667static void __nmk_gpio_set_wake(struct nmk_gpio_chip *nmk_chip,
668 int gpio, bool on)
669{
Rabin Vincentb982ff02011-04-26 09:03:27 +0530670 /*
671 * Ensure WAKEUP_ENABLE is on. No need to disable it if wakeup is
672 * disabled, since setting SLPM to 1 increases power consumption, and
673 * wakeup is anyhow controlled by the RIMSC and FIMSC registers.
674 */
675 if (nmk_chip->sleepmode && on) {
Lee Jonesa60b57e2012-04-19 21:36:31 +0100676 __nmk_gpio_set_slpm(nmk_chip, gpio % nmk_chip->chip.base,
Rabin Vincentb982ff02011-04-26 09:03:27 +0530677 NMK_GPIO_SLPM_WAKEUP_ENABLE);
Linus Walleij33d78642011-06-09 11:08:47 +0200678 }
679
Rabin Vincentb9df4682011-02-10 11:45:58 +0530680 __nmk_gpio_irq_modify(nmk_chip, gpio, WAKE, on);
681}
682
683static int nmk_gpio_irq_maskunmask(struct irq_data *d, bool enable)
Alessandro Rubini2ec1d352009-07-02 15:29:12 +0100684{
Alessandro Rubini2ec1d352009-07-02 15:29:12 +0100685 struct nmk_gpio_chip *nmk_chip;
686 unsigned long flags;
Rabin Vincent040e5ec2010-05-06 10:42:42 +0100687 u32 bitmask;
Alessandro Rubini2ec1d352009-07-02 15:29:12 +0100688
Lennert Buytenhekf272c002010-11-29 11:16:48 +0100689 nmk_chip = irq_data_get_irq_chip_data(d);
Lee Jonesa60b57e2012-04-19 21:36:31 +0100690 bitmask = nmk_gpio_get_bitmask(d->hwirq);
Alessandro Rubini2ec1d352009-07-02 15:29:12 +0100691 if (!nmk_chip)
Rabin Vincent4d4e20f2010-06-16 06:09:34 +0100692 return -EINVAL;
Alessandro Rubini2ec1d352009-07-02 15:29:12 +0100693
Rabin Vincent3c0227d2011-09-20 10:50:03 +0200694 clk_enable(nmk_chip->clk);
Rabin Vincentb9df4682011-02-10 11:45:58 +0530695 spin_lock_irqsave(&nmk_gpio_slpm_lock, flags);
696 spin_lock(&nmk_chip->lock);
697
Lee Jonesa60b57e2012-04-19 21:36:31 +0100698 __nmk_gpio_irq_modify(nmk_chip, d->hwirq, NORMAL, enable);
Rabin Vincentb9df4682011-02-10 11:45:58 +0530699
700 if (!(nmk_chip->real_wake & bitmask))
Lee Jonesa60b57e2012-04-19 21:36:31 +0100701 __nmk_gpio_set_wake(nmk_chip, d->hwirq, enable);
Rabin Vincentb9df4682011-02-10 11:45:58 +0530702
703 spin_unlock(&nmk_chip->lock);
704 spin_unlock_irqrestore(&nmk_gpio_slpm_lock, flags);
Rabin Vincent3c0227d2011-09-20 10:50:03 +0200705 clk_disable(nmk_chip->clk);
Rabin Vincent4d4e20f2010-06-16 06:09:34 +0100706
707 return 0;
Rabin Vincent040e5ec2010-05-06 10:42:42 +0100708}
709
Lennert Buytenhekf272c002010-11-29 11:16:48 +0100710static void nmk_gpio_irq_mask(struct irq_data *d)
Rabin Vincent040e5ec2010-05-06 10:42:42 +0100711{
Rabin Vincentb9df4682011-02-10 11:45:58 +0530712 nmk_gpio_irq_maskunmask(d, false);
Rabin Vincent4d4e20f2010-06-16 06:09:34 +0100713}
Alessandro Rubini2ec1d352009-07-02 15:29:12 +0100714
Lennert Buytenhekf272c002010-11-29 11:16:48 +0100715static void nmk_gpio_irq_unmask(struct irq_data *d)
Alessandro Rubini2ec1d352009-07-02 15:29:12 +0100716{
Rabin Vincentb9df4682011-02-10 11:45:58 +0530717 nmk_gpio_irq_maskunmask(d, true);
Rabin Vincent4d4e20f2010-06-16 06:09:34 +0100718}
719
Lennert Buytenhekf272c002010-11-29 11:16:48 +0100720static int nmk_gpio_irq_set_wake(struct irq_data *d, unsigned int on)
Rabin Vincent4d4e20f2010-06-16 06:09:34 +0100721{
Rabin Vincent7e3f7e52010-09-02 11:28:05 +0100722 struct nmk_gpio_chip *nmk_chip;
723 unsigned long flags;
Rabin Vincentb9df4682011-02-10 11:45:58 +0530724 u32 bitmask;
Rabin Vincent7e3f7e52010-09-02 11:28:05 +0100725
Lennert Buytenhekf272c002010-11-29 11:16:48 +0100726 nmk_chip = irq_data_get_irq_chip_data(d);
Rabin Vincent7e3f7e52010-09-02 11:28:05 +0100727 if (!nmk_chip)
728 return -EINVAL;
Lee Jonesa60b57e2012-04-19 21:36:31 +0100729 bitmask = nmk_gpio_get_bitmask(d->hwirq);
Rabin Vincent7e3f7e52010-09-02 11:28:05 +0100730
Rabin Vincent3c0227d2011-09-20 10:50:03 +0200731 clk_enable(nmk_chip->clk);
Rabin Vincent01727e62010-12-13 12:02:40 +0530732 spin_lock_irqsave(&nmk_gpio_slpm_lock, flags);
733 spin_lock(&nmk_chip->lock);
734
Linus Walleij479a0c72011-09-20 10:50:15 +0200735 if (irqd_irq_disabled(d))
Lee Jonesa60b57e2012-04-19 21:36:31 +0100736 __nmk_gpio_set_wake(nmk_chip, d->hwirq, on);
Rabin Vincentb9df4682011-02-10 11:45:58 +0530737
738 if (on)
739 nmk_chip->real_wake |= bitmask;
740 else
741 nmk_chip->real_wake &= ~bitmask;
Rabin Vincent01727e62010-12-13 12:02:40 +0530742
743 spin_unlock(&nmk_chip->lock);
744 spin_unlock_irqrestore(&nmk_gpio_slpm_lock, flags);
Rabin Vincent3c0227d2011-09-20 10:50:03 +0200745 clk_disable(nmk_chip->clk);
Rabin Vincent7e3f7e52010-09-02 11:28:05 +0100746
747 return 0;
Alessandro Rubini2ec1d352009-07-02 15:29:12 +0100748}
749
Lennert Buytenhekf272c002010-11-29 11:16:48 +0100750static int nmk_gpio_irq_set_type(struct irq_data *d, unsigned int type)
Alessandro Rubini2ec1d352009-07-02 15:29:12 +0100751{
Linus Walleij479a0c72011-09-20 10:50:15 +0200752 bool enabled = !irqd_irq_disabled(d);
Rabin Vincent3c0227d2011-09-20 10:50:03 +0200753 bool wake = irqd_is_wakeup_set(d);
Alessandro Rubini2ec1d352009-07-02 15:29:12 +0100754 struct nmk_gpio_chip *nmk_chip;
755 unsigned long flags;
756 u32 bitmask;
757
Lennert Buytenhekf272c002010-11-29 11:16:48 +0100758 nmk_chip = irq_data_get_irq_chip_data(d);
Lee Jonesa60b57e2012-04-19 21:36:31 +0100759 bitmask = nmk_gpio_get_bitmask(d->hwirq);
Alessandro Rubini2ec1d352009-07-02 15:29:12 +0100760 if (!nmk_chip)
761 return -EINVAL;
Alessandro Rubini2ec1d352009-07-02 15:29:12 +0100762 if (type & IRQ_TYPE_LEVEL_HIGH)
763 return -EINVAL;
764 if (type & IRQ_TYPE_LEVEL_LOW)
765 return -EINVAL;
766
Rabin Vincent3c0227d2011-09-20 10:50:03 +0200767 clk_enable(nmk_chip->clk);
Alessandro Rubini2ec1d352009-07-02 15:29:12 +0100768 spin_lock_irqsave(&nmk_chip->lock, flags);
769
Rabin Vincent7a852d82010-05-06 10:43:55 +0100770 if (enabled)
Lee Jonesa60b57e2012-04-19 21:36:31 +0100771 __nmk_gpio_irq_modify(nmk_chip, d->hwirq, NORMAL, false);
Rabin Vincent4d4e20f2010-06-16 06:09:34 +0100772
Rabin Vincentb9df4682011-02-10 11:45:58 +0530773 if (enabled || wake)
Lee Jonesa60b57e2012-04-19 21:36:31 +0100774 __nmk_gpio_irq_modify(nmk_chip, d->hwirq, WAKE, false);
Rabin Vincent7a852d82010-05-06 10:43:55 +0100775
Alessandro Rubini2ec1d352009-07-02 15:29:12 +0100776 nmk_chip->edge_rising &= ~bitmask;
777 if (type & IRQ_TYPE_EDGE_RISING)
778 nmk_chip->edge_rising |= bitmask;
Alessandro Rubini2ec1d352009-07-02 15:29:12 +0100779
780 nmk_chip->edge_falling &= ~bitmask;
781 if (type & IRQ_TYPE_EDGE_FALLING)
782 nmk_chip->edge_falling |= bitmask;
Rabin Vincent7a852d82010-05-06 10:43:55 +0100783
784 if (enabled)
Lee Jonesa60b57e2012-04-19 21:36:31 +0100785 __nmk_gpio_irq_modify(nmk_chip, d->hwirq, NORMAL, true);
Rabin Vincent4d4e20f2010-06-16 06:09:34 +0100786
Rabin Vincentb9df4682011-02-10 11:45:58 +0530787 if (enabled || wake)
Lee Jonesa60b57e2012-04-19 21:36:31 +0100788 __nmk_gpio_irq_modify(nmk_chip, d->hwirq, WAKE, true);
Alessandro Rubini2ec1d352009-07-02 15:29:12 +0100789
790 spin_unlock_irqrestore(&nmk_chip->lock, flags);
Rabin Vincent3c0227d2011-09-20 10:50:03 +0200791 clk_disable(nmk_chip->clk);
Alessandro Rubini2ec1d352009-07-02 15:29:12 +0100792
Alessandro Rubini2ec1d352009-07-02 15:29:12 +0100793 return 0;
794}
795
Rabin Vincent3c0227d2011-09-20 10:50:03 +0200796static unsigned int nmk_gpio_irq_startup(struct irq_data *d)
797{
798 struct nmk_gpio_chip *nmk_chip = irq_data_get_irq_chip_data(d);
799
800 clk_enable(nmk_chip->clk);
801 nmk_gpio_irq_unmask(d);
802 return 0;
803}
804
805static void nmk_gpio_irq_shutdown(struct irq_data *d)
806{
807 struct nmk_gpio_chip *nmk_chip = irq_data_get_irq_chip_data(d);
808
809 nmk_gpio_irq_mask(d);
810 clk_disable(nmk_chip->clk);
811}
812
Alessandro Rubini2ec1d352009-07-02 15:29:12 +0100813static struct irq_chip nmk_gpio_irq_chip = {
814 .name = "Nomadik-GPIO",
Lennert Buytenhekf272c002010-11-29 11:16:48 +0100815 .irq_ack = nmk_gpio_irq_ack,
816 .irq_mask = nmk_gpio_irq_mask,
817 .irq_unmask = nmk_gpio_irq_unmask,
818 .irq_set_type = nmk_gpio_irq_set_type,
819 .irq_set_wake = nmk_gpio_irq_set_wake,
Rabin Vincent3c0227d2011-09-20 10:50:03 +0200820 .irq_startup = nmk_gpio_irq_startup,
821 .irq_shutdown = nmk_gpio_irq_shutdown,
Alessandro Rubini2ec1d352009-07-02 15:29:12 +0100822};
823
Rabin Vincent33b744b2010-10-14 10:38:03 +0530824static void __nmk_gpio_irq_handler(unsigned int irq, struct irq_desc *desc,
825 u32 status)
Alessandro Rubini2ec1d352009-07-02 15:29:12 +0100826{
827 struct nmk_gpio_chip *nmk_chip;
Thomas Gleixner6845664a2011-03-24 13:25:22 +0100828 struct irq_chip *host_chip = irq_get_chip(irq);
Alessandro Rubini2ec1d352009-07-02 15:29:12 +0100829 unsigned int first_irq;
830
Will Deaconadfed152011-02-28 10:12:29 +0000831 chained_irq_enter(host_chip, desc);
Rabin Vincentaaedaa22010-03-03 04:50:27 +0100832
Thomas Gleixner6845664a2011-03-24 13:25:22 +0100833 nmk_chip = irq_get_handler_data(irq);
Lee Jonesa60b57e2012-04-19 21:36:31 +0100834 first_irq = nmk_chip->domain->revmap_data.legacy.first_irq;
Rabin Vincent33b744b2010-10-14 10:38:03 +0530835 while (status) {
836 int bit = __ffs(status);
837
838 generic_handle_irq(first_irq + bit);
839 status &= ~BIT(bit);
Alessandro Rubini2ec1d352009-07-02 15:29:12 +0100840 }
Rabin Vincentaaedaa22010-03-03 04:50:27 +0100841
Will Deaconadfed152011-02-28 10:12:29 +0000842 chained_irq_exit(host_chip, desc);
Alessandro Rubini2ec1d352009-07-02 15:29:12 +0100843}
844
Rabin Vincent33b744b2010-10-14 10:38:03 +0530845static void nmk_gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
846{
Thomas Gleixner6845664a2011-03-24 13:25:22 +0100847 struct nmk_gpio_chip *nmk_chip = irq_get_handler_data(irq);
Rabin Vincent3c0227d2011-09-20 10:50:03 +0200848 u32 status;
849
850 clk_enable(nmk_chip->clk);
851 status = readl(nmk_chip->addr + NMK_GPIO_IS);
852 clk_disable(nmk_chip->clk);
Rabin Vincent33b744b2010-10-14 10:38:03 +0530853
854 __nmk_gpio_irq_handler(irq, desc, status);
855}
856
857static void nmk_gpio_secondary_irq_handler(unsigned int irq,
858 struct irq_desc *desc)
859{
Thomas Gleixner6845664a2011-03-24 13:25:22 +0100860 struct nmk_gpio_chip *nmk_chip = irq_get_handler_data(irq);
Rabin Vincent33b744b2010-10-14 10:38:03 +0530861 u32 status = nmk_chip->get_secondary_status(nmk_chip->bank);
862
863 __nmk_gpio_irq_handler(irq, desc, status);
864}
865
Alessandro Rubini2ec1d352009-07-02 15:29:12 +0100866static int nmk_gpio_init_irq(struct nmk_gpio_chip *nmk_chip)
867{
Thomas Gleixner6845664a2011-03-24 13:25:22 +0100868 irq_set_chained_handler(nmk_chip->parent_irq, nmk_gpio_irq_handler);
869 irq_set_handler_data(nmk_chip->parent_irq, nmk_chip);
Rabin Vincent33b744b2010-10-14 10:38:03 +0530870
871 if (nmk_chip->secondary_parent_irq >= 0) {
Thomas Gleixner6845664a2011-03-24 13:25:22 +0100872 irq_set_chained_handler(nmk_chip->secondary_parent_irq,
Rabin Vincent33b744b2010-10-14 10:38:03 +0530873 nmk_gpio_secondary_irq_handler);
Thomas Gleixner6845664a2011-03-24 13:25:22 +0100874 irq_set_handler_data(nmk_chip->secondary_parent_irq, nmk_chip);
Rabin Vincent33b744b2010-10-14 10:38:03 +0530875 }
876
Alessandro Rubini2ec1d352009-07-02 15:29:12 +0100877 return 0;
878}
879
880/* I/O Functions */
Linus Walleijdbfe8ca2012-05-02 22:56:47 +0200881
882static int nmk_gpio_request(struct gpio_chip *chip, unsigned offset)
883{
884 /*
885 * Map back to global GPIO space and request muxing, the direction
886 * parameter does not matter for this controller.
887 */
888 int gpio = chip->base + offset;
889
890 return pinctrl_request_gpio(gpio);
891}
892
893static void nmk_gpio_free(struct gpio_chip *chip, unsigned offset)
894{
895 int gpio = chip->base + offset;
896
897 pinctrl_free_gpio(gpio);
898}
899
Alessandro Rubini2ec1d352009-07-02 15:29:12 +0100900static int nmk_gpio_make_input(struct gpio_chip *chip, unsigned offset)
901{
902 struct nmk_gpio_chip *nmk_chip =
903 container_of(chip, struct nmk_gpio_chip, chip);
904
Rabin Vincent3c0227d2011-09-20 10:50:03 +0200905 clk_enable(nmk_chip->clk);
906
Alessandro Rubini2ec1d352009-07-02 15:29:12 +0100907 writel(1 << offset, nmk_chip->addr + NMK_GPIO_DIRC);
Rabin Vincent3c0227d2011-09-20 10:50:03 +0200908
909 clk_disable(nmk_chip->clk);
910
Alessandro Rubini2ec1d352009-07-02 15:29:12 +0100911 return 0;
912}
913
Alessandro Rubini2ec1d352009-07-02 15:29:12 +0100914static int nmk_gpio_get_input(struct gpio_chip *chip, unsigned offset)
915{
916 struct nmk_gpio_chip *nmk_chip =
917 container_of(chip, struct nmk_gpio_chip, chip);
918 u32 bit = 1 << offset;
Rabin Vincent3c0227d2011-09-20 10:50:03 +0200919 int value;
Alessandro Rubini2ec1d352009-07-02 15:29:12 +0100920
Rabin Vincent3c0227d2011-09-20 10:50:03 +0200921 clk_enable(nmk_chip->clk);
922
923 value = (readl(nmk_chip->addr + NMK_GPIO_DAT) & bit) != 0;
924
925 clk_disable(nmk_chip->clk);
926
927 return value;
Alessandro Rubini2ec1d352009-07-02 15:29:12 +0100928}
929
930static void nmk_gpio_set_output(struct gpio_chip *chip, unsigned offset,
931 int val)
932{
933 struct nmk_gpio_chip *nmk_chip =
934 container_of(chip, struct nmk_gpio_chip, chip);
Alessandro Rubini2ec1d352009-07-02 15:29:12 +0100935
Rabin Vincent3c0227d2011-09-20 10:50:03 +0200936 clk_enable(nmk_chip->clk);
937
Rabin Vincent6720db72010-09-02 11:28:48 +0100938 __nmk_gpio_set_output(nmk_chip, offset, val);
Rabin Vincent3c0227d2011-09-20 10:50:03 +0200939
940 clk_disable(nmk_chip->clk);
Alessandro Rubini2ec1d352009-07-02 15:29:12 +0100941}
942
Rabin Vincent6647c6c2010-05-27 12:22:42 +0100943static int nmk_gpio_make_output(struct gpio_chip *chip, unsigned offset,
944 int val)
945{
946 struct nmk_gpio_chip *nmk_chip =
947 container_of(chip, struct nmk_gpio_chip, chip);
948
Rabin Vincent3c0227d2011-09-20 10:50:03 +0200949 clk_enable(nmk_chip->clk);
950
Rabin Vincent6720db72010-09-02 11:28:48 +0100951 __nmk_gpio_make_output(nmk_chip, offset, val);
Rabin Vincent6647c6c2010-05-27 12:22:42 +0100952
Rabin Vincent3c0227d2011-09-20 10:50:03 +0200953 clk_disable(nmk_chip->clk);
954
Rabin Vincent6647c6c2010-05-27 12:22:42 +0100955 return 0;
956}
957
Rabin Vincent0d2aec92010-06-16 06:10:43 +0100958static int nmk_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
959{
960 struct nmk_gpio_chip *nmk_chip =
961 container_of(chip, struct nmk_gpio_chip, chip);
962
Lee Jonesa60b57e2012-04-19 21:36:31 +0100963 return irq_find_mapping(nmk_chip->domain, offset);
Rabin Vincent0d2aec92010-06-16 06:10:43 +0100964}
965
Rabin Vincentd0b543c2010-03-04 17:39:05 +0530966#ifdef CONFIG_DEBUG_FS
967
968#include <linux/seq_file.h>
969
Linus Walleij6f4350a2012-05-02 21:06:13 +0200970static void nmk_gpio_dbg_show_one(struct seq_file *s, struct gpio_chip *chip,
971 unsigned offset, unsigned gpio)
Rabin Vincentd0b543c2010-03-04 17:39:05 +0530972{
Linus Walleij6f4350a2012-05-02 21:06:13 +0200973 const char *label = gpiochip_is_requested(chip, offset);
Rabin Vincentd0b543c2010-03-04 17:39:05 +0530974 struct nmk_gpio_chip *nmk_chip =
975 container_of(chip, struct nmk_gpio_chip, chip);
Linus Walleij6f4350a2012-05-02 21:06:13 +0200976 int mode;
977 bool is_out;
978 bool pull;
979 u32 bit = 1 << offset;
Rabin Vincentd0b543c2010-03-04 17:39:05 +0530980 const char *modes[] = {
981 [NMK_GPIO_ALT_GPIO] = "gpio",
982 [NMK_GPIO_ALT_A] = "altA",
983 [NMK_GPIO_ALT_B] = "altB",
984 [NMK_GPIO_ALT_C] = "altC",
985 };
986
Rabin Vincent3c0227d2011-09-20 10:50:03 +0200987 clk_enable(nmk_chip->clk);
Linus Walleij6f4350a2012-05-02 21:06:13 +0200988 is_out = !!(readl(nmk_chip->addr + NMK_GPIO_DIR) & bit);
989 pull = !(readl(nmk_chip->addr + NMK_GPIO_PDIS) & bit);
990 mode = nmk_gpio_get_mode(gpio);
Rabin Vincent3c0227d2011-09-20 10:50:03 +0200991
Linus Walleij6f4350a2012-05-02 21:06:13 +0200992 seq_printf(s, " gpio-%-3d (%-20.20s) %s %s %s %s",
993 gpio, label ?: "(none)",
994 is_out ? "out" : "in ",
995 chip->get
996 ? (chip->get(chip, offset) ? "hi" : "lo")
997 : "? ",
998 (mode < 0) ? "unknown" : modes[mode],
999 pull ? "pull" : "none");
Rabin Vincentd0b543c2010-03-04 17:39:05 +05301000
Linus Walleij6f4350a2012-05-02 21:06:13 +02001001 if (label && !is_out) {
1002 int irq = gpio_to_irq(gpio);
1003 struct irq_desc *desc = irq_to_desc(irq);
Rabin Vincent8ea72a32011-05-24 23:07:09 +02001004
Linus Walleij6f4350a2012-05-02 21:06:13 +02001005 /* This races with request_irq(), set_irq_type(),
1006 * and set_irq_wake() ... but those are "rare".
1007 */
1008 if (irq >= 0 && desc->action) {
1009 char *trigger;
1010 u32 bitmask = nmk_gpio_get_bitmask(gpio);
Rabin Vincent8ea72a32011-05-24 23:07:09 +02001011
Linus Walleij6f4350a2012-05-02 21:06:13 +02001012 if (nmk_chip->edge_rising & bitmask)
1013 trigger = "edge-rising";
1014 else if (nmk_chip->edge_falling & bitmask)
1015 trigger = "edge-falling";
1016 else
1017 trigger = "edge-undefined";
Rabin Vincent8ea72a32011-05-24 23:07:09 +02001018
Linus Walleij6f4350a2012-05-02 21:06:13 +02001019 seq_printf(s, " irq-%d %s%s",
1020 irq, trigger,
1021 irqd_is_wakeup_set(&desc->irq_data)
1022 ? " wakeup" : "");
Rabin Vincent8ea72a32011-05-24 23:07:09 +02001023 }
Rabin Vincentd0b543c2010-03-04 17:39:05 +05301024 }
Rabin Vincent3c0227d2011-09-20 10:50:03 +02001025 clk_disable(nmk_chip->clk);
Rabin Vincentd0b543c2010-03-04 17:39:05 +05301026}
1027
Linus Walleij6f4350a2012-05-02 21:06:13 +02001028static void nmk_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip)
1029{
1030 unsigned i;
1031 unsigned gpio = chip->base;
1032
1033 for (i = 0; i < chip->ngpio; i++, gpio++) {
1034 nmk_gpio_dbg_show_one(s, chip, i, gpio);
1035 seq_printf(s, "\n");
1036 }
1037}
1038
Rabin Vincentd0b543c2010-03-04 17:39:05 +05301039#else
Linus Walleij6f4350a2012-05-02 21:06:13 +02001040static inline void nmk_gpio_dbg_show_one(struct seq_file *s,
1041 struct gpio_chip *chip,
1042 unsigned offset, unsigned gpio)
1043{
1044}
Rabin Vincentd0b543c2010-03-04 17:39:05 +05301045#define nmk_gpio_dbg_show NULL
1046#endif
1047
Alessandro Rubini2ec1d352009-07-02 15:29:12 +01001048/* This structure is replicated for each GPIO block allocated at probe time */
1049static struct gpio_chip nmk_gpio_template = {
Linus Walleijdbfe8ca2012-05-02 22:56:47 +02001050 .request = nmk_gpio_request,
1051 .free = nmk_gpio_free,
Alessandro Rubini2ec1d352009-07-02 15:29:12 +01001052 .direction_input = nmk_gpio_make_input,
1053 .get = nmk_gpio_get_input,
1054 .direction_output = nmk_gpio_make_output,
1055 .set = nmk_gpio_set_output,
Rabin Vincent0d2aec92010-06-16 06:10:43 +01001056 .to_irq = nmk_gpio_to_irq,
Rabin Vincentd0b543c2010-03-04 17:39:05 +05301057 .dbg_show = nmk_gpio_dbg_show,
Alessandro Rubini2ec1d352009-07-02 15:29:12 +01001058 .can_sleep = 0,
1059};
1060
Rabin Vincent3c0227d2011-09-20 10:50:03 +02001061void nmk_gpio_clocks_enable(void)
1062{
1063 int i;
1064
1065 for (i = 0; i < NUM_BANKS; i++) {
1066 struct nmk_gpio_chip *chip = nmk_gpio_chips[i];
1067
1068 if (!chip)
1069 continue;
1070
1071 clk_enable(chip->clk);
1072 }
1073}
1074
1075void nmk_gpio_clocks_disable(void)
1076{
1077 int i;
1078
1079 for (i = 0; i < NUM_BANKS; i++) {
1080 struct nmk_gpio_chip *chip = nmk_gpio_chips[i];
1081
1082 if (!chip)
1083 continue;
1084
1085 clk_disable(chip->clk);
1086 }
1087}
1088
Rabin Vincentb9df4682011-02-10 11:45:58 +05301089/*
1090 * Called from the suspend/resume path to only keep the real wakeup interrupts
1091 * (those that have had set_irq_wake() called on them) as wakeup interrupts,
1092 * and not the rest of the interrupts which we needed to have as wakeups for
1093 * cpuidle.
1094 *
1095 * PM ops are not used since this needs to be done at the end, after all the
1096 * other drivers are done with their suspend callbacks.
1097 */
1098void nmk_gpio_wakeups_suspend(void)
1099{
1100 int i;
1101
1102 for (i = 0; i < NUM_BANKS; i++) {
1103 struct nmk_gpio_chip *chip = nmk_gpio_chips[i];
1104
1105 if (!chip)
1106 break;
1107
Rabin Vincent3c0227d2011-09-20 10:50:03 +02001108 clk_enable(chip->clk);
1109
Rabin Vincentb9df4682011-02-10 11:45:58 +05301110 writel(chip->rwimsc & chip->real_wake,
1111 chip->addr + NMK_GPIO_RWIMSC);
1112 writel(chip->fwimsc & chip->real_wake,
1113 chip->addr + NMK_GPIO_FWIMSC);
1114
Rabin Vincent3c0227d2011-09-20 10:50:03 +02001115 clk_disable(chip->clk);
Rabin Vincentb9df4682011-02-10 11:45:58 +05301116 }
1117}
1118
1119void nmk_gpio_wakeups_resume(void)
1120{
1121 int i;
1122
1123 for (i = 0; i < NUM_BANKS; i++) {
1124 struct nmk_gpio_chip *chip = nmk_gpio_chips[i];
1125
1126 if (!chip)
1127 break;
1128
Rabin Vincent3c0227d2011-09-20 10:50:03 +02001129 clk_enable(chip->clk);
1130
Rabin Vincentb9df4682011-02-10 11:45:58 +05301131 writel(chip->rwimsc, chip->addr + NMK_GPIO_RWIMSC);
1132 writel(chip->fwimsc, chip->addr + NMK_GPIO_FWIMSC);
1133
Rabin Vincent3c0227d2011-09-20 10:50:03 +02001134 clk_disable(chip->clk);
Rabin Vincentb9df4682011-02-10 11:45:58 +05301135 }
1136}
1137
Rickard Anderssonbc6f5cf2011-05-24 23:07:17 +02001138/*
1139 * Read the pull up/pull down status.
1140 * A bit set in 'pull_up' means that pull up
1141 * is selected if pull is enabled in PDIS register.
1142 * Note: only pull up/down set via this driver can
1143 * be detected due to HW limitations.
1144 */
1145void nmk_gpio_read_pull(int gpio_bank, u32 *pull_up)
1146{
1147 if (gpio_bank < NUM_BANKS) {
1148 struct nmk_gpio_chip *chip = nmk_gpio_chips[gpio_bank];
1149
1150 if (!chip)
1151 return;
1152
1153 *pull_up = chip->pull_up;
1154 }
1155}
1156
Lee Jonesa60b57e2012-04-19 21:36:31 +01001157int nmk_gpio_irq_map(struct irq_domain *d, unsigned int irq,
1158 irq_hw_number_t hwirq)
1159{
1160 struct nmk_gpio_chip *nmk_chip = d->host_data;
1161
1162 if (!nmk_chip)
1163 return -EINVAL;
1164
1165 irq_set_chip_and_handler(irq, &nmk_gpio_irq_chip, handle_edge_irq);
1166 set_irq_flags(irq, IRQF_VALID);
1167 irq_set_chip_data(irq, nmk_chip);
1168 irq_set_irq_type(irq, IRQ_TYPE_EDGE_FALLING);
1169
1170 return 0;
1171}
1172
1173const struct irq_domain_ops nmk_gpio_irq_simple_ops = {
1174 .map = nmk_gpio_irq_map,
1175 .xlate = irq_domain_xlate_twocell,
1176};
1177
Uwe Kleine-Königfd0d67d2010-09-02 16:13:35 +01001178static int __devinit nmk_gpio_probe(struct platform_device *dev)
Alessandro Rubini2ec1d352009-07-02 15:29:12 +01001179{
Rabin Vincent3e3c62c2010-03-03 04:52:34 +01001180 struct nmk_gpio_platform_data *pdata = dev->dev.platform_data;
Lee Jones513c27f2012-04-13 15:05:05 +01001181 struct device_node *np = dev->dev.of_node;
Alessandro Rubini2ec1d352009-07-02 15:29:12 +01001182 struct nmk_gpio_chip *nmk_chip;
1183 struct gpio_chip *chip;
Rabin Vincent3e3c62c2010-03-03 04:52:34 +01001184 struct resource *res;
Rabin Vincentaf7dc222010-05-06 11:14:17 +01001185 struct clk *clk;
Rabin Vincent33b744b2010-10-14 10:38:03 +05301186 int secondary_irq;
Linus Walleij8d917712012-04-17 10:15:54 +02001187 void __iomem *base;
Rabin Vincent3e3c62c2010-03-03 04:52:34 +01001188 int irq;
Alessandro Rubini2ec1d352009-07-02 15:29:12 +01001189 int ret;
1190
Lee Jones513c27f2012-04-13 15:05:05 +01001191 if (!pdata && !np) {
1192 dev_err(&dev->dev, "No platform data or device tree found\n");
Rabin Vincent3e3c62c2010-03-03 04:52:34 +01001193 return -ENODEV;
Lee Jones513c27f2012-04-13 15:05:05 +01001194 }
1195
1196 if (np) {
1197 pdata = kzalloc(sizeof(*pdata), GFP_KERNEL);
1198 if (!pdata)
1199 return -ENOMEM;
1200
1201 if (of_get_property(np, "supports-sleepmode", NULL))
1202 pdata->supports_sleepmode = true;
1203
1204 if (of_property_read_u32(np, "gpio-bank", &dev->id)) {
1205 dev_err(&dev->dev, "gpio-bank property not found\n");
1206 ret = -EINVAL;
Lee Jonesa60b57e2012-04-19 21:36:31 +01001207 goto out;
Lee Jones513c27f2012-04-13 15:05:05 +01001208 }
1209
1210 pdata->first_gpio = dev->id * NMK_GPIO_PER_CHIP;
1211 pdata->num_gpio = NMK_GPIO_PER_CHIP;
1212 }
Rabin Vincent3e3c62c2010-03-03 04:52:34 +01001213
1214 res = platform_get_resource(dev, IORESOURCE_MEM, 0);
1215 if (!res) {
1216 ret = -ENOENT;
1217 goto out;
1218 }
1219
1220 irq = platform_get_irq(dev, 0);
1221 if (irq < 0) {
1222 ret = irq;
1223 goto out;
1224 }
1225
Rabin Vincent33b744b2010-10-14 10:38:03 +05301226 secondary_irq = platform_get_irq(dev, 1);
1227 if (secondary_irq >= 0 && !pdata->get_secondary_status) {
1228 ret = -EINVAL;
1229 goto out;
1230 }
1231
Rabin Vincent3e3c62c2010-03-03 04:52:34 +01001232 if (request_mem_region(res->start, resource_size(res),
1233 dev_name(&dev->dev)) == NULL) {
1234 ret = -EBUSY;
1235 goto out;
1236 }
Alessandro Rubini2ec1d352009-07-02 15:29:12 +01001237
Linus Walleij8d917712012-04-17 10:15:54 +02001238 base = ioremap(res->start, resource_size(res));
1239 if (!base) {
1240 ret = -ENOMEM;
1241 goto out_release;
1242 }
1243
Rabin Vincentaf7dc222010-05-06 11:14:17 +01001244 clk = clk_get(&dev->dev, NULL);
1245 if (IS_ERR(clk)) {
1246 ret = PTR_ERR(clk);
Linus Walleij8d917712012-04-17 10:15:54 +02001247 goto out_unmap;
Rabin Vincentaf7dc222010-05-06 11:14:17 +01001248 }
Linus Walleijefec3812012-06-06 22:50:41 +02001249 clk_prepare(clk);
Rabin Vincentaf7dc222010-05-06 11:14:17 +01001250
Alessandro Rubini2ec1d352009-07-02 15:29:12 +01001251 nmk_chip = kzalloc(sizeof(*nmk_chip), GFP_KERNEL);
1252 if (!nmk_chip) {
1253 ret = -ENOMEM;
Rabin Vincentaf7dc222010-05-06 11:14:17 +01001254 goto out_clk;
Alessandro Rubini2ec1d352009-07-02 15:29:12 +01001255 }
Lee Jones513c27f2012-04-13 15:05:05 +01001256
Alessandro Rubini2ec1d352009-07-02 15:29:12 +01001257 /*
1258 * The virt address in nmk_chip->addr is in the nomadik register space,
1259 * so we can simply convert the resource address, without remapping
1260 */
Rabin Vincent33b744b2010-10-14 10:38:03 +05301261 nmk_chip->bank = dev->id;
Rabin Vincentaf7dc222010-05-06 11:14:17 +01001262 nmk_chip->clk = clk;
Linus Walleij8d917712012-04-17 10:15:54 +02001263 nmk_chip->addr = base;
Alessandro Rubini2ec1d352009-07-02 15:29:12 +01001264 nmk_chip->chip = nmk_gpio_template;
Rabin Vincent3e3c62c2010-03-03 04:52:34 +01001265 nmk_chip->parent_irq = irq;
Rabin Vincent33b744b2010-10-14 10:38:03 +05301266 nmk_chip->secondary_parent_irq = secondary_irq;
1267 nmk_chip->get_secondary_status = pdata->get_secondary_status;
Rabin Vincent01727e62010-12-13 12:02:40 +05301268 nmk_chip->set_ioforce = pdata->set_ioforce;
Linus Walleij33d78642011-06-09 11:08:47 +02001269 nmk_chip->sleepmode = pdata->supports_sleepmode;
Rabin Vincentc0fcb8d2010-03-03 04:48:54 +01001270 spin_lock_init(&nmk_chip->lock);
Alessandro Rubini2ec1d352009-07-02 15:29:12 +01001271
1272 chip = &nmk_chip->chip;
1273 chip->base = pdata->first_gpio;
Rabin Vincente493e062010-03-18 12:35:22 +05301274 chip->ngpio = pdata->num_gpio;
Rabin Vincent8d568ae2010-12-08 11:07:54 +05301275 chip->label = pdata->name ?: dev_name(&dev->dev);
Alessandro Rubini2ec1d352009-07-02 15:29:12 +01001276 chip->dev = &dev->dev;
1277 chip->owner = THIS_MODULE;
1278
Rabin Vincentebc61782011-09-28 15:49:11 +05301279 clk_enable(nmk_chip->clk);
1280 nmk_chip->lowemi = readl_relaxed(nmk_chip->addr + NMK_GPIO_LOWEMI);
1281 clk_disable(nmk_chip->clk);
1282
Arnd Bergmann072e82a2012-05-10 13:39:52 +02001283#ifdef CONFIG_OF_GPIO
Lee Jones513c27f2012-04-13 15:05:05 +01001284 chip->of_node = np;
Arnd Bergmann072e82a2012-05-10 13:39:52 +02001285#endif
Lee Jones513c27f2012-04-13 15:05:05 +01001286
Alessandro Rubini2ec1d352009-07-02 15:29:12 +01001287 ret = gpiochip_add(&nmk_chip->chip);
1288 if (ret)
1289 goto out_free;
1290
Rabin Vincent01727e62010-12-13 12:02:40 +05301291 BUG_ON(nmk_chip->bank >= ARRAY_SIZE(nmk_gpio_chips));
1292
1293 nmk_gpio_chips[nmk_chip->bank] = nmk_chip;
Lee Jones513c27f2012-04-13 15:05:05 +01001294
Rabin Vincent3e3c62c2010-03-03 04:52:34 +01001295 platform_set_drvdata(dev, nmk_chip);
Alessandro Rubini2ec1d352009-07-02 15:29:12 +01001296
Lee Jonesa60b57e2012-04-19 21:36:31 +01001297 nmk_chip->domain = irq_domain_add_legacy(np, NMK_GPIO_PER_CHIP,
1298 NOMADIK_GPIO_TO_IRQ(pdata->first_gpio),
1299 0, &nmk_gpio_irq_simple_ops, nmk_chip);
1300 if (!nmk_chip->domain) {
1301 pr_err("%s: Failed to create irqdomain\n", np->full_name);
1302 ret = -ENOSYS;
1303 goto out_free;
1304 }
1305
Alessandro Rubini2ec1d352009-07-02 15:29:12 +01001306 nmk_gpio_init_irq(nmk_chip);
1307
Lee Jones513c27f2012-04-13 15:05:05 +01001308 dev_info(&dev->dev, "at address %p\n", nmk_chip->addr);
1309
Alessandro Rubini2ec1d352009-07-02 15:29:12 +01001310 return 0;
1311
Rabin Vincent3e3c62c2010-03-03 04:52:34 +01001312out_free:
Alessandro Rubini2ec1d352009-07-02 15:29:12 +01001313 kfree(nmk_chip);
Rabin Vincentaf7dc222010-05-06 11:14:17 +01001314out_clk:
1315 clk_disable(clk);
1316 clk_put(clk);
Linus Walleij8d917712012-04-17 10:15:54 +02001317out_unmap:
1318 iounmap(base);
Rabin Vincent3e3c62c2010-03-03 04:52:34 +01001319out_release:
1320 release_mem_region(res->start, resource_size(res));
1321out:
Alessandro Rubini2ec1d352009-07-02 15:29:12 +01001322 dev_err(&dev->dev, "Failure %i for GPIO %i-%i\n", ret,
1323 pdata->first_gpio, pdata->first_gpio+31);
Lee Jones513c27f2012-04-13 15:05:05 +01001324 if (np)
1325 kfree(pdata);
1326
Alessandro Rubini2ec1d352009-07-02 15:29:12 +01001327 return ret;
1328}
1329
Linus Walleije98ea772012-04-26 23:57:25 +02001330static int nmk_get_groups_cnt(struct pinctrl_dev *pctldev)
1331{
1332 struct nmk_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev);
1333
1334 return npct->soc->ngroups;
1335}
1336
1337static const char *nmk_get_group_name(struct pinctrl_dev *pctldev,
1338 unsigned selector)
1339{
1340 struct nmk_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev);
1341
1342 return npct->soc->groups[selector].name;
1343}
1344
1345static int nmk_get_group_pins(struct pinctrl_dev *pctldev, unsigned selector,
1346 const unsigned **pins,
1347 unsigned *num_pins)
1348{
1349 struct nmk_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev);
1350
1351 *pins = npct->soc->groups[selector].pins;
1352 *num_pins = npct->soc->groups[selector].npins;
1353 return 0;
1354}
1355
Linus Walleij24cbdd72012-05-02 21:28:00 +02001356static struct pinctrl_gpio_range *
1357nmk_match_gpio_range(struct pinctrl_dev *pctldev, unsigned offset)
1358{
1359 struct nmk_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev);
1360 int i;
1361
1362 for (i = 0; i < npct->soc->gpio_num_ranges; i++) {
1363 struct pinctrl_gpio_range *range;
1364
1365 range = &npct->soc->gpio_ranges[i];
1366 if (offset >= range->pin_base &&
1367 offset <= (range->pin_base + range->npins - 1))
1368 return range;
1369 }
1370 return NULL;
1371}
1372
Linus Walleije98ea772012-04-26 23:57:25 +02001373static void nmk_pin_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s,
1374 unsigned offset)
1375{
Linus Walleij24cbdd72012-05-02 21:28:00 +02001376 struct pinctrl_gpio_range *range;
1377 struct gpio_chip *chip;
1378
1379 range = nmk_match_gpio_range(pctldev, offset);
1380 if (!range || !range->gc) {
1381 seq_printf(s, "invalid pin offset");
1382 return;
1383 }
1384 chip = range->gc;
1385 nmk_gpio_dbg_show_one(s, chip, offset - chip->base, offset);
Linus Walleije98ea772012-04-26 23:57:25 +02001386}
1387
1388static struct pinctrl_ops nmk_pinctrl_ops = {
1389 .get_groups_count = nmk_get_groups_cnt,
1390 .get_group_name = nmk_get_group_name,
1391 .get_group_pins = nmk_get_group_pins,
1392 .pin_dbg_show = nmk_pin_dbg_show,
1393};
1394
Linus Walleijdbfe8ca2012-05-02 22:56:47 +02001395static int nmk_pmx_get_funcs_cnt(struct pinctrl_dev *pctldev)
1396{
1397 struct nmk_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev);
1398
1399 return npct->soc->nfunctions;
1400}
1401
1402static const char *nmk_pmx_get_func_name(struct pinctrl_dev *pctldev,
1403 unsigned function)
1404{
1405 struct nmk_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev);
1406
1407 return npct->soc->functions[function].name;
1408}
1409
1410static int nmk_pmx_get_func_groups(struct pinctrl_dev *pctldev,
1411 unsigned function,
1412 const char * const **groups,
1413 unsigned * const num_groups)
1414{
1415 struct nmk_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev);
1416
1417 *groups = npct->soc->functions[function].groups;
1418 *num_groups = npct->soc->functions[function].ngroups;
1419
1420 return 0;
1421}
1422
1423static int nmk_pmx_enable(struct pinctrl_dev *pctldev, unsigned function,
1424 unsigned group)
1425{
1426 struct nmk_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev);
1427 const struct nmk_pingroup *g;
1428 static unsigned int slpm[NUM_BANKS];
1429 unsigned long flags;
1430 bool glitch;
1431 int ret = -EINVAL;
1432 int i;
1433
1434 g = &npct->soc->groups[group];
1435
1436 if (g->altsetting < 0)
1437 return -EINVAL;
1438
1439 dev_dbg(npct->dev, "enable group %s, %u pins\n", g->name, g->npins);
1440
1441 /* Handle this special glitch on altfunction C */
1442 glitch = (g->altsetting == NMK_GPIO_ALT_C);
1443
1444 if (glitch) {
1445 spin_lock_irqsave(&nmk_gpio_slpm_lock, flags);
1446
1447 /* Initially don't put any pins to sleep when switching */
1448 memset(slpm, 0xff, sizeof(slpm));
1449
1450 /*
1451 * Then mask the pins that need to be sleeping now when we're
1452 * switching to the ALT C function.
1453 */
1454 for (i = 0; i < g->npins; i++)
1455 slpm[g->pins[i] / NMK_GPIO_PER_CHIP] &= ~BIT(g->pins[i]);
1456 nmk_gpio_glitch_slpm_init(slpm);
1457 }
1458
1459 for (i = 0; i < g->npins; i++) {
1460 struct pinctrl_gpio_range *range;
1461 struct nmk_gpio_chip *nmk_chip;
1462 struct gpio_chip *chip;
1463 unsigned bit;
1464
1465 range = nmk_match_gpio_range(pctldev, g->pins[i]);
1466 if (!range) {
1467 dev_err(npct->dev,
1468 "invalid pin offset %d in group %s at index %d\n",
1469 g->pins[i], g->name, i);
1470 goto out_glitch;
1471 }
1472 if (!range->gc) {
1473 dev_err(npct->dev, "GPIO chip missing in range for pin offset %d in group %s at index %d\n",
1474 g->pins[i], g->name, i);
1475 goto out_glitch;
1476 }
1477 chip = range->gc;
1478 nmk_chip = container_of(chip, struct nmk_gpio_chip, chip);
1479 dev_dbg(npct->dev, "setting pin %d to altsetting %d\n", g->pins[i], g->altsetting);
1480
1481 clk_enable(nmk_chip->clk);
1482 bit = g->pins[i] % NMK_GPIO_PER_CHIP;
1483 /*
1484 * If the pin is switching to altfunc, and there was an
1485 * interrupt installed on it which has been lazy disabled,
1486 * actually mask the interrupt to prevent spurious interrupts
1487 * that would occur while the pin is under control of the
1488 * peripheral. Only SKE does this.
1489 */
1490 nmk_gpio_disable_lazy_irq(nmk_chip, bit);
1491
1492 __nmk_gpio_set_mode_safe(nmk_chip, bit, g->altsetting, glitch);
1493 clk_disable(nmk_chip->clk);
1494 }
1495
1496 /* When all pins are successfully reconfigured we get here */
1497 ret = 0;
1498
1499out_glitch:
1500 if (glitch) {
1501 nmk_gpio_glitch_slpm_restore(slpm);
1502 spin_unlock_irqrestore(&nmk_gpio_slpm_lock, flags);
1503 }
1504
1505 return ret;
1506}
1507
1508static void nmk_pmx_disable(struct pinctrl_dev *pctldev,
1509 unsigned function, unsigned group)
1510{
1511 struct nmk_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev);
1512 const struct nmk_pingroup *g;
1513
1514 g = &npct->soc->groups[group];
1515
1516 if (g->altsetting < 0)
1517 return;
1518
1519 /* Poke out the mux, set the pin to some default state? */
1520 dev_dbg(npct->dev, "disable group %s, %u pins\n", g->name, g->npins);
1521}
1522
1523int nmk_gpio_request_enable(struct pinctrl_dev *pctldev,
1524 struct pinctrl_gpio_range *range,
1525 unsigned offset)
1526{
1527 struct nmk_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev);
1528 struct nmk_gpio_chip *nmk_chip;
1529 struct gpio_chip *chip;
1530 unsigned bit;
1531
1532 if (!range) {
1533 dev_err(npct->dev, "invalid range\n");
1534 return -EINVAL;
1535 }
1536 if (!range->gc) {
1537 dev_err(npct->dev, "missing GPIO chip in range\n");
1538 return -EINVAL;
1539 }
1540 chip = range->gc;
1541 nmk_chip = container_of(chip, struct nmk_gpio_chip, chip);
1542
1543 dev_dbg(npct->dev, "enable pin %u as GPIO\n", offset);
1544
1545 clk_enable(nmk_chip->clk);
1546 bit = offset % NMK_GPIO_PER_CHIP;
1547 /* There is no glitch when converting any pin to GPIO */
1548 __nmk_gpio_set_mode(nmk_chip, bit, NMK_GPIO_ALT_GPIO);
1549 clk_disable(nmk_chip->clk);
1550
1551 return 0;
1552}
1553
1554void nmk_gpio_disable_free(struct pinctrl_dev *pctldev,
1555 struct pinctrl_gpio_range *range,
1556 unsigned offset)
1557{
1558 struct nmk_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev);
1559
1560 dev_dbg(npct->dev, "disable pin %u as GPIO\n", offset);
1561 /* Set the pin to some default state, GPIO is usually default */
1562}
1563
1564static struct pinmux_ops nmk_pinmux_ops = {
1565 .get_functions_count = nmk_pmx_get_funcs_cnt,
1566 .get_function_name = nmk_pmx_get_func_name,
1567 .get_function_groups = nmk_pmx_get_func_groups,
1568 .enable = nmk_pmx_enable,
1569 .disable = nmk_pmx_disable,
1570 .gpio_request_enable = nmk_gpio_request_enable,
1571 .gpio_disable_free = nmk_gpio_disable_free,
1572};
1573
Linus Walleijd41af622012-05-03 15:58:12 +02001574int nmk_pin_config_get(struct pinctrl_dev *pctldev,
1575 unsigned pin,
1576 unsigned long *config)
1577{
1578 /* Not implemented */
1579 return -EINVAL;
1580}
1581
1582int nmk_pin_config_set(struct pinctrl_dev *pctldev,
1583 unsigned pin,
1584 unsigned long config)
1585{
1586 static const char *pullnames[] = {
1587 [NMK_GPIO_PULL_NONE] = "none",
1588 [NMK_GPIO_PULL_UP] = "up",
1589 [NMK_GPIO_PULL_DOWN] = "down",
1590 [3] /* illegal */ = "??"
1591 };
1592 static const char *slpmnames[] = {
1593 [NMK_GPIO_SLPM_INPUT] = "input/wakeup",
1594 [NMK_GPIO_SLPM_NOCHANGE] = "no-change/no-wakeup",
1595 };
1596 struct nmk_pinctrl *npct = pinctrl_dev_get_drvdata(pctldev);
1597 struct nmk_gpio_chip *nmk_chip;
1598 struct pinctrl_gpio_range *range;
1599 struct gpio_chip *chip;
1600 unsigned bit;
1601
1602 /*
1603 * The pin config contains pin number and altfunction fields, here
1604 * we just ignore that part. It's being handled by the framework and
1605 * pinmux callback respectively.
1606 */
1607 pin_cfg_t cfg = (pin_cfg_t) config;
1608 int pull = PIN_PULL(cfg);
1609 int slpm = PIN_SLPM(cfg);
1610 int output = PIN_DIR(cfg);
1611 int val = PIN_VAL(cfg);
1612 bool lowemi = PIN_LOWEMI(cfg);
1613 bool gpiomode = PIN_GPIOMODE(cfg);
1614 bool sleep = PIN_SLEEPMODE(cfg);
1615
1616 range = nmk_match_gpio_range(pctldev, pin);
1617 if (!range) {
1618 dev_err(npct->dev, "invalid pin offset %d\n", pin);
1619 return -EINVAL;
1620 }
1621 if (!range->gc) {
1622 dev_err(npct->dev, "GPIO chip missing in range for pin %d\n",
1623 pin);
1624 return -EINVAL;
1625 }
1626 chip = range->gc;
1627 nmk_chip = container_of(chip, struct nmk_gpio_chip, chip);
1628
1629 if (sleep) {
1630 int slpm_pull = PIN_SLPM_PULL(cfg);
1631 int slpm_output = PIN_SLPM_DIR(cfg);
1632 int slpm_val = PIN_SLPM_VAL(cfg);
1633
1634 /* All pins go into GPIO mode at sleep */
1635 gpiomode = true;
1636
1637 /*
1638 * The SLPM_* values are normal values + 1 to allow zero to
1639 * mean "same as normal".
1640 */
1641 if (slpm_pull)
1642 pull = slpm_pull - 1;
1643 if (slpm_output)
1644 output = slpm_output - 1;
1645 if (slpm_val)
1646 val = slpm_val - 1;
1647
1648 dev_dbg(nmk_chip->chip.dev, "pin %d: sleep pull %s, dir %s, val %s\n",
1649 pin,
1650 slpm_pull ? pullnames[pull] : "same",
1651 slpm_output ? (output ? "output" : "input") : "same",
1652 slpm_val ? (val ? "high" : "low") : "same");
1653 }
1654
1655 dev_dbg(nmk_chip->chip.dev, "pin %d [%#lx]: pull %s, slpm %s (%s%s), lowemi %s\n",
1656 pin, cfg, pullnames[pull], slpmnames[slpm],
1657 output ? "output " : "input",
1658 output ? (val ? "high" : "low") : "",
1659 lowemi ? "on" : "off" );
1660
1661 clk_enable(nmk_chip->clk);
1662 bit = pin % NMK_GPIO_PER_CHIP;
1663 if (gpiomode)
1664 /* No glitch when going to GPIO mode */
1665 __nmk_gpio_set_mode(nmk_chip, bit, NMK_GPIO_ALT_GPIO);
1666 if (output)
1667 __nmk_gpio_make_output(nmk_chip, bit, val);
1668 else {
1669 __nmk_gpio_make_input(nmk_chip, bit);
1670 __nmk_gpio_set_pull(nmk_chip, bit, pull);
1671 }
1672 /* TODO: isn't this only applicable on output pins? */
1673 __nmk_gpio_set_lowemi(nmk_chip, bit, lowemi);
1674
1675 __nmk_gpio_set_slpm(nmk_chip, bit, slpm);
1676 clk_disable(nmk_chip->clk);
1677 return 0;
1678}
1679
1680static struct pinconf_ops nmk_pinconf_ops = {
1681 .pin_config_get = nmk_pin_config_get,
1682 .pin_config_set = nmk_pin_config_set,
1683};
1684
Linus Walleije98ea772012-04-26 23:57:25 +02001685static struct pinctrl_desc nmk_pinctrl_desc = {
1686 .name = "pinctrl-nomadik",
1687 .pctlops = &nmk_pinctrl_ops,
Linus Walleijdbfe8ca2012-05-02 22:56:47 +02001688 .pmxops = &nmk_pinmux_ops,
Linus Walleijd41af622012-05-03 15:58:12 +02001689 .confops = &nmk_pinconf_ops,
Linus Walleije98ea772012-04-26 23:57:25 +02001690 .owner = THIS_MODULE,
1691};
1692
Lee Jones855f80c2012-05-26 06:09:29 +01001693static const struct of_device_id nmk_pinctrl_match[] = {
1694 {
1695 .compatible = "stericsson,nmk_pinctrl",
1696 .data = (void *)PINCTRL_NMK_DB8500,
1697 },
1698 {},
1699};
1700
Linus Walleije98ea772012-04-26 23:57:25 +02001701static int __devinit nmk_pinctrl_probe(struct platform_device *pdev)
1702{
1703 const struct platform_device_id *platid = platform_get_device_id(pdev);
Lee Jones855f80c2012-05-26 06:09:29 +01001704 struct device_node *np = pdev->dev.of_node;
Linus Walleije98ea772012-04-26 23:57:25 +02001705 struct nmk_pinctrl *npct;
Lee Jones855f80c2012-05-26 06:09:29 +01001706 unsigned int version = 0;
Linus Walleije98ea772012-04-26 23:57:25 +02001707 int i;
1708
1709 npct = devm_kzalloc(&pdev->dev, sizeof(*npct), GFP_KERNEL);
1710 if (!npct)
1711 return -ENOMEM;
1712
Lee Jones855f80c2012-05-26 06:09:29 +01001713 if (platid)
1714 version = platid->driver_data;
1715 else if (np)
1716 version = (unsigned int)
1717 of_match_device(nmk_pinctrl_match, &pdev->dev)->data;
1718
Linus Walleije98ea772012-04-26 23:57:25 +02001719 /* Poke in other ASIC variants here */
Lee Jones855f80c2012-05-26 06:09:29 +01001720 if (version == PINCTRL_NMK_DB8500)
Linus Walleije98ea772012-04-26 23:57:25 +02001721 nmk_pinctrl_db8500_init(&npct->soc);
1722
1723 /*
1724 * We need all the GPIO drivers to probe FIRST, or we will not be able
1725 * to obtain references to the struct gpio_chip * for them, and we
1726 * need this to proceed.
1727 */
1728 for (i = 0; i < npct->soc->gpio_num_ranges; i++) {
1729 if (!nmk_gpio_chips[i]) {
1730 dev_warn(&pdev->dev, "GPIO chip %d not registered yet\n", i);
1731 devm_kfree(&pdev->dev, npct);
1732 return -EPROBE_DEFER;
1733 }
1734 npct->soc->gpio_ranges[i].gc = &nmk_gpio_chips[i]->chip;
1735 }
1736
1737 nmk_pinctrl_desc.pins = npct->soc->pins;
1738 nmk_pinctrl_desc.npins = npct->soc->npins;
1739 npct->dev = &pdev->dev;
1740 npct->pctl = pinctrl_register(&nmk_pinctrl_desc, &pdev->dev, npct);
1741 if (!npct->pctl) {
1742 dev_err(&pdev->dev, "could not register Nomadik pinctrl driver\n");
1743 return -EINVAL;
1744 }
1745
1746 /* We will handle a range of GPIO pins */
1747 for (i = 0; i < npct->soc->gpio_num_ranges; i++)
1748 pinctrl_add_gpio_range(npct->pctl, &npct->soc->gpio_ranges[i]);
1749
1750 platform_set_drvdata(pdev, npct);
1751 dev_info(&pdev->dev, "initialized Nomadik pin control driver\n");
1752
1753 return 0;
1754}
1755
Lee Jones513c27f2012-04-13 15:05:05 +01001756static const struct of_device_id nmk_gpio_match[] = {
1757 { .compatible = "st,nomadik-gpio", },
1758 {}
1759};
1760
Rabin Vincent3e3c62c2010-03-03 04:52:34 +01001761static struct platform_driver nmk_gpio_driver = {
1762 .driver = {
Alessandro Rubini2ec1d352009-07-02 15:29:12 +01001763 .owner = THIS_MODULE,
1764 .name = "gpio",
Lee Jones513c27f2012-04-13 15:05:05 +01001765 .of_match_table = nmk_gpio_match,
Rabin Vincent5317e4d12011-02-10 09:29:53 +05301766 },
Alessandro Rubini2ec1d352009-07-02 15:29:12 +01001767 .probe = nmk_gpio_probe,
Alessandro Rubini2ec1d352009-07-02 15:29:12 +01001768};
1769
Linus Walleije98ea772012-04-26 23:57:25 +02001770static const struct platform_device_id nmk_pinctrl_id[] = {
1771 { "pinctrl-stn8815", PINCTRL_NMK_STN8815 },
1772 { "pinctrl-db8500", PINCTRL_NMK_DB8500 },
1773};
1774
1775static struct platform_driver nmk_pinctrl_driver = {
1776 .driver = {
1777 .owner = THIS_MODULE,
1778 .name = "pinctrl-nomadik",
Lee Jones855f80c2012-05-26 06:09:29 +01001779 .of_match_table = nmk_pinctrl_match,
Linus Walleije98ea772012-04-26 23:57:25 +02001780 },
1781 .probe = nmk_pinctrl_probe,
1782 .id_table = nmk_pinctrl_id,
1783};
1784
Alessandro Rubini2ec1d352009-07-02 15:29:12 +01001785static int __init nmk_gpio_init(void)
1786{
Linus Walleije98ea772012-04-26 23:57:25 +02001787 int ret;
1788
1789 ret = platform_driver_register(&nmk_gpio_driver);
1790 if (ret)
1791 return ret;
1792 return platform_driver_register(&nmk_pinctrl_driver);
Alessandro Rubini2ec1d352009-07-02 15:29:12 +01001793}
1794
Rabin Vincent33f45ea2010-06-02 06:09:52 +01001795core_initcall(nmk_gpio_init);
Alessandro Rubini2ec1d352009-07-02 15:29:12 +01001796
1797MODULE_AUTHOR("Prafulla WADASKAR and Alessandro Rubini");
1798MODULE_DESCRIPTION("Nomadik GPIO Driver");
1799MODULE_LICENSE("GPL");