Ben Dooks | 5718df9 | 2008-10-21 14:07:09 +0100 | [diff] [blame] | 1 | /* linux/arch/arm/mach-s3c6410/mach-smdk6410.c |
| 2 | * |
| 3 | * Copyright 2008 Openmoko, Inc. |
| 4 | * Copyright 2008 Simtec Electronics |
| 5 | * Ben Dooks <ben@simtec.co.uk> |
| 6 | * http://armlinux.simtec.co.uk/ |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License version 2 as |
| 10 | * published by the Free Software Foundation. |
| 11 | * |
| 12 | */ |
| 13 | |
| 14 | #include <linux/kernel.h> |
| 15 | #include <linux/types.h> |
| 16 | #include <linux/interrupt.h> |
| 17 | #include <linux/list.h> |
| 18 | #include <linux/timer.h> |
| 19 | #include <linux/init.h> |
| 20 | #include <linux/serial_core.h> |
| 21 | #include <linux/platform_device.h> |
| 22 | #include <linux/io.h> |
Ben Dooks | 096941e | 2008-10-31 16:14:59 +0000 | [diff] [blame] | 23 | #include <linux/i2c.h> |
Ben Dooks | 438a5d4 | 2008-11-19 15:41:34 +0000 | [diff] [blame] | 24 | #include <linux/fb.h> |
| 25 | #include <linux/gpio.h> |
| 26 | #include <linux/delay.h> |
Mark Brown | 3056ea0 | 2009-01-27 16:18:01 +0000 | [diff] [blame] | 27 | #include <linux/smsc911x.h> |
Mark Brown | 42015c1 | 2009-11-03 14:42:06 +0000 | [diff] [blame] | 28 | #include <linux/regulator/fixed.h> |
Ben Dooks | 438a5d4 | 2008-11-19 15:41:34 +0000 | [diff] [blame] | 29 | |
Mark Brown | ecc558a | 2009-02-17 15:59:38 +0000 | [diff] [blame] | 30 | #ifdef CONFIG_SMDK6410_WM1190_EV1 |
| 31 | #include <linux/mfd/wm8350/core.h> |
| 32 | #include <linux/mfd/wm8350/pmic.h> |
| 33 | #endif |
Ben Dooks | 438a5d4 | 2008-11-19 15:41:34 +0000 | [diff] [blame] | 34 | |
| 35 | #include <video/platform_lcd.h> |
Ben Dooks | 5718df9 | 2008-10-21 14:07:09 +0100 | [diff] [blame] | 36 | |
| 37 | #include <asm/mach/arch.h> |
| 38 | #include <asm/mach/map.h> |
| 39 | #include <asm/mach/irq.h> |
| 40 | |
| 41 | #include <mach/hardware.h> |
Ben Dooks | 438a5d4 | 2008-11-19 15:41:34 +0000 | [diff] [blame] | 42 | #include <mach/regs-fb.h> |
Ben Dooks | 5718df9 | 2008-10-21 14:07:09 +0100 | [diff] [blame] | 43 | #include <mach/map.h> |
| 44 | |
| 45 | #include <asm/irq.h> |
| 46 | #include <asm/mach-types.h> |
| 47 | |
| 48 | #include <plat/regs-serial.h> |
Ben Dooks | d6662c3 | 2008-12-12 00:24:40 +0000 | [diff] [blame] | 49 | #include <plat/regs-modem.h> |
| 50 | #include <plat/regs-gpio.h> |
| 51 | #include <plat/regs-sys.h> |
Andy Green | f01fdac | 2009-12-29 14:40:36 +0000 | [diff] [blame^] | 52 | #include <plat/regs-srom.h> |
Ben Dooks | d85fa24 | 2008-10-31 16:14:52 +0000 | [diff] [blame] | 53 | #include <plat/iic.h> |
Ben Dooks | 438a5d4 | 2008-11-19 15:41:34 +0000 | [diff] [blame] | 54 | #include <plat/fb.h> |
Mark Brown | 3056ea0 | 2009-01-27 16:18:01 +0000 | [diff] [blame] | 55 | #include <plat/gpio-cfg.h> |
Ben Dooks | 5718df9 | 2008-10-21 14:07:09 +0100 | [diff] [blame] | 56 | |
| 57 | #include <plat/s3c6410.h> |
| 58 | #include <plat/clock.h> |
| 59 | #include <plat/devs.h> |
| 60 | #include <plat/cpu.h> |
| 61 | |
| 62 | #define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK |
| 63 | #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB |
| 64 | #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE |
| 65 | |
| 66 | static struct s3c2410_uartcfg smdk6410_uartcfgs[] __initdata = { |
| 67 | [0] = { |
| 68 | .hwport = 0, |
| 69 | .flags = 0, |
Matt Hsu | bd258e5 | 2009-06-29 19:03:41 +0800 | [diff] [blame] | 70 | .ucon = UCON, |
| 71 | .ulcon = ULCON, |
| 72 | .ufcon = UFCON, |
Ben Dooks | 5718df9 | 2008-10-21 14:07:09 +0100 | [diff] [blame] | 73 | }, |
| 74 | [1] = { |
| 75 | .hwport = 1, |
| 76 | .flags = 0, |
Matt Hsu | bd258e5 | 2009-06-29 19:03:41 +0800 | [diff] [blame] | 77 | .ucon = UCON, |
| 78 | .ulcon = ULCON, |
| 79 | .ufcon = UFCON, |
| 80 | }, |
| 81 | [2] = { |
| 82 | .hwport = 2, |
| 83 | .flags = 0, |
| 84 | .ucon = UCON, |
| 85 | .ulcon = ULCON, |
| 86 | .ufcon = UFCON, |
| 87 | }, |
| 88 | [3] = { |
| 89 | .hwport = 3, |
| 90 | .flags = 0, |
| 91 | .ucon = UCON, |
| 92 | .ulcon = ULCON, |
| 93 | .ufcon = UFCON, |
Ben Dooks | 5718df9 | 2008-10-21 14:07:09 +0100 | [diff] [blame] | 94 | }, |
| 95 | }; |
| 96 | |
Ben Dooks | 438a5d4 | 2008-11-19 15:41:34 +0000 | [diff] [blame] | 97 | /* framebuffer and LCD setup. */ |
| 98 | |
| 99 | /* GPF15 = LCD backlight control |
| 100 | * GPF13 => Panel power |
| 101 | * GPN5 = LCD nRESET signal |
| 102 | * PWM_TOUT1 => backlight brightness |
| 103 | */ |
| 104 | |
| 105 | static void smdk6410_lcd_power_set(struct plat_lcd_data *pd, |
| 106 | unsigned int power) |
| 107 | { |
| 108 | if (power) { |
| 109 | gpio_direction_output(S3C64XX_GPF(13), 1); |
| 110 | gpio_direction_output(S3C64XX_GPF(15), 1); |
| 111 | |
| 112 | /* fire nRESET on power up */ |
| 113 | gpio_direction_output(S3C64XX_GPN(5), 0); |
| 114 | msleep(10); |
| 115 | gpio_direction_output(S3C64XX_GPN(5), 1); |
| 116 | msleep(1); |
| 117 | } else { |
| 118 | gpio_direction_output(S3C64XX_GPF(15), 0); |
| 119 | gpio_direction_output(S3C64XX_GPF(13), 0); |
| 120 | } |
| 121 | } |
| 122 | |
| 123 | static struct plat_lcd_data smdk6410_lcd_power_data = { |
| 124 | .set_power = smdk6410_lcd_power_set, |
| 125 | }; |
| 126 | |
| 127 | static struct platform_device smdk6410_lcd_powerdev = { |
| 128 | .name = "platform-lcd", |
| 129 | .dev.parent = &s3c_device_fb.dev, |
| 130 | .dev.platform_data = &smdk6410_lcd_power_data, |
| 131 | }; |
| 132 | |
| 133 | static struct s3c_fb_pd_win smdk6410_fb_win0 = { |
| 134 | /* this is to ensure we use win0 */ |
| 135 | .win_mode = { |
| 136 | .pixclock = 41094, |
| 137 | .left_margin = 8, |
| 138 | .right_margin = 13, |
| 139 | .upper_margin = 7, |
| 140 | .lower_margin = 5, |
| 141 | .hsync_len = 3, |
| 142 | .vsync_len = 1, |
| 143 | .xres = 800, |
| 144 | .yres = 480, |
| 145 | }, |
| 146 | .max_bpp = 32, |
| 147 | .default_bpp = 16, |
| 148 | }; |
| 149 | |
| 150 | /* 405566 clocks per frame => 60Hz refresh requires 24333960Hz clock */ |
| 151 | static struct s3c_fb_platdata smdk6410_lcd_pdata __initdata = { |
| 152 | .setup_gpio = s3c64xx_fb_gpio_setup_24bpp, |
| 153 | .win[0] = &smdk6410_fb_win0, |
| 154 | .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB, |
| 155 | .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC, |
| 156 | }; |
| 157 | |
Mark Brown | 3056ea0 | 2009-01-27 16:18:01 +0000 | [diff] [blame] | 158 | static struct resource smdk6410_smsc911x_resources[] = { |
| 159 | [0] = { |
Andy Green | f01fdac | 2009-12-29 14:40:36 +0000 | [diff] [blame^] | 160 | .start = S3C64XX_PA_XM0CSN1, |
| 161 | .end = S3C64XX_PA_XM0CSN1 + SZ_64K - 1, |
Mark Brown | 3056ea0 | 2009-01-27 16:18:01 +0000 | [diff] [blame] | 162 | .flags = IORESOURCE_MEM, |
| 163 | }, |
| 164 | [1] = { |
| 165 | .start = S3C_EINT(10), |
| 166 | .end = S3C_EINT(10), |
| 167 | .flags = IORESOURCE_IRQ | IRQ_TYPE_LEVEL_LOW, |
| 168 | }, |
| 169 | }; |
| 170 | |
| 171 | static struct smsc911x_platform_config smdk6410_smsc911x_pdata = { |
| 172 | .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW, |
| 173 | .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN, |
| 174 | .flags = SMSC911X_USE_32BIT | SMSC911X_FORCE_INTERNAL_PHY, |
| 175 | .phy_interface = PHY_INTERFACE_MODE_MII, |
| 176 | }; |
| 177 | |
| 178 | |
| 179 | static struct platform_device smdk6410_smsc911x = { |
| 180 | .name = "smsc911x", |
| 181 | .id = -1, |
| 182 | .num_resources = ARRAY_SIZE(smdk6410_smsc911x_resources), |
| 183 | .resource = &smdk6410_smsc911x_resources[0], |
| 184 | .dev = { |
| 185 | .platform_data = &smdk6410_smsc911x_pdata, |
| 186 | }, |
| 187 | }; |
| 188 | |
Mark Brown | 42015c1 | 2009-11-03 14:42:06 +0000 | [diff] [blame] | 189 | #ifdef CONFIG_REGULATOR |
| 190 | static struct regulator_consumer_supply smdk6410_b_pwr_5v_consumers[] = { |
| 191 | { |
| 192 | /* WM8580 */ |
| 193 | .supply = "PVDD", |
| 194 | .dev_name = "0-001b", |
| 195 | }, |
| 196 | { |
| 197 | /* WM8580 */ |
| 198 | .supply = "AVDD", |
| 199 | .dev_name = "0-001b", |
| 200 | }, |
| 201 | }; |
| 202 | |
| 203 | static struct regulator_init_data smdk6410_b_pwr_5v_data = { |
| 204 | .constraints = { |
| 205 | .always_on = 1, |
| 206 | }, |
| 207 | .num_consumer_supplies = ARRAY_SIZE(smdk6410_b_pwr_5v_consumers), |
| 208 | .consumer_supplies = smdk6410_b_pwr_5v_consumers, |
| 209 | }; |
| 210 | |
| 211 | static struct fixed_voltage_config smdk6410_b_pwr_5v_pdata = { |
| 212 | .supply_name = "B_PWR_5V", |
| 213 | .microvolts = 5000000, |
| 214 | .init_data = &smdk6410_b_pwr_5v_data, |
Mark Brown | d3cf448 | 2010-01-13 13:57:04 +0000 | [diff] [blame] | 215 | .gpio = -EINVAL, |
Mark Brown | 42015c1 | 2009-11-03 14:42:06 +0000 | [diff] [blame] | 216 | }; |
| 217 | |
| 218 | static struct platform_device smdk6410_b_pwr_5v = { |
| 219 | .name = "reg-fixed-voltage", |
| 220 | .id = -1, |
| 221 | .dev = { |
| 222 | .platform_data = &smdk6410_b_pwr_5v_pdata, |
| 223 | }, |
| 224 | }; |
| 225 | #endif |
| 226 | |
Mark Brown | 027191a | 2009-01-23 16:29:43 +0000 | [diff] [blame] | 227 | static struct map_desc smdk6410_iodesc[] = {}; |
Ben Dooks | 5718df9 | 2008-10-21 14:07:09 +0100 | [diff] [blame] | 228 | |
| 229 | static struct platform_device *smdk6410_devices[] __initdata = { |
Ben Dooks | b24636c | 2008-11-03 20:14:53 +0000 | [diff] [blame] | 230 | #ifdef CONFIG_SMDK6410_SD_CH0 |
Ben Dooks | 39057f2 | 2008-10-31 16:14:29 +0000 | [diff] [blame] | 231 | &s3c_device_hsmmc0, |
Ben Dooks | b24636c | 2008-11-03 20:14:53 +0000 | [diff] [blame] | 232 | #endif |
| 233 | #ifdef CONFIG_SMDK6410_SD_CH1 |
| 234 | &s3c_device_hsmmc1, |
| 235 | #endif |
Ben Dooks | d85fa24 | 2008-10-31 16:14:52 +0000 | [diff] [blame] | 236 | &s3c_device_i2c0, |
Ben Dooks | d7ea374 | 2008-10-31 16:14:57 +0000 | [diff] [blame] | 237 | &s3c_device_i2c1, |
Ben Dooks | 438a5d4 | 2008-11-19 15:41:34 +0000 | [diff] [blame] | 238 | &s3c_device_fb, |
Ben Dooks | 98fd63b | 2009-03-06 19:49:49 +0000 | [diff] [blame] | 239 | &s3c_device_usb, |
Ben Dooks | 06fa1d3 | 2009-05-16 22:11:20 +0100 | [diff] [blame] | 240 | &s3c_device_usb_hsotg, |
Mark Brown | 42015c1 | 2009-11-03 14:42:06 +0000 | [diff] [blame] | 241 | |
| 242 | #ifdef CONFIG_REGULATOR |
| 243 | &smdk6410_b_pwr_5v, |
| 244 | #endif |
Ben Dooks | 438a5d4 | 2008-11-19 15:41:34 +0000 | [diff] [blame] | 245 | &smdk6410_lcd_powerdev, |
Mark Brown | 3056ea0 | 2009-01-27 16:18:01 +0000 | [diff] [blame] | 246 | |
| 247 | &smdk6410_smsc911x, |
Ben Dooks | 5718df9 | 2008-10-21 14:07:09 +0100 | [diff] [blame] | 248 | }; |
| 249 | |
Mark Brown | ecc558a | 2009-02-17 15:59:38 +0000 | [diff] [blame] | 250 | #ifdef CONFIG_SMDK6410_WM1190_EV1 |
| 251 | /* S3C64xx internal logic & PLL */ |
| 252 | static struct regulator_init_data wm8350_dcdc1_data = { |
| 253 | .constraints = { |
| 254 | .name = "PVDD_INT/PVDD_PLL", |
| 255 | .min_uV = 1200000, |
| 256 | .max_uV = 1200000, |
| 257 | .always_on = 1, |
| 258 | .apply_uV = 1, |
| 259 | }, |
| 260 | }; |
| 261 | |
| 262 | /* Memory */ |
| 263 | static struct regulator_init_data wm8350_dcdc3_data = { |
| 264 | .constraints = { |
| 265 | .name = "PVDD_MEM", |
| 266 | .min_uV = 1800000, |
| 267 | .max_uV = 1800000, |
| 268 | .always_on = 1, |
| 269 | .state_mem = { |
| 270 | .uV = 1800000, |
| 271 | .mode = REGULATOR_MODE_NORMAL, |
| 272 | .enabled = 1, |
| 273 | }, |
| 274 | .initial_state = PM_SUSPEND_MEM, |
| 275 | }, |
| 276 | }; |
| 277 | |
| 278 | /* USB, EXT, PCM, ADC/DAC, USB, MMC */ |
Mark Brown | 42015c1 | 2009-11-03 14:42:06 +0000 | [diff] [blame] | 279 | static struct regulator_consumer_supply wm8350_dcdc4_consumers[] = { |
| 280 | { |
| 281 | /* WM8580 */ |
| 282 | .supply = "DVDD", |
| 283 | .dev_name = "0-001b", |
| 284 | }, |
| 285 | }; |
| 286 | |
Mark Brown | ecc558a | 2009-02-17 15:59:38 +0000 | [diff] [blame] | 287 | static struct regulator_init_data wm8350_dcdc4_data = { |
| 288 | .constraints = { |
| 289 | .name = "PVDD_HI/PVDD_EXT/PVDD_SYS/PVCCM2MTV", |
| 290 | .min_uV = 3000000, |
| 291 | .max_uV = 3000000, |
| 292 | .always_on = 1, |
| 293 | }, |
Mark Brown | 42015c1 | 2009-11-03 14:42:06 +0000 | [diff] [blame] | 294 | .num_consumer_supplies = ARRAY_SIZE(wm8350_dcdc4_consumers), |
| 295 | .consumer_supplies = wm8350_dcdc4_consumers, |
Mark Brown | ecc558a | 2009-02-17 15:59:38 +0000 | [diff] [blame] | 296 | }; |
| 297 | |
| 298 | /* ARM core */ |
Mark Brown | e3980b6 | 2009-04-15 17:11:53 +0100 | [diff] [blame] | 299 | static struct regulator_consumer_supply dcdc6_consumers[] = { |
| 300 | { |
| 301 | .supply = "vddarm", |
| 302 | } |
| 303 | }; |
| 304 | |
Mark Brown | ecc558a | 2009-02-17 15:59:38 +0000 | [diff] [blame] | 305 | static struct regulator_init_data wm8350_dcdc6_data = { |
| 306 | .constraints = { |
| 307 | .name = "PVDD_ARM", |
| 308 | .min_uV = 1000000, |
| 309 | .max_uV = 1300000, |
| 310 | .always_on = 1, |
Mark Brown | e3980b6 | 2009-04-15 17:11:53 +0100 | [diff] [blame] | 311 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE, |
Mark Brown | ecc558a | 2009-02-17 15:59:38 +0000 | [diff] [blame] | 312 | }, |
Mark Brown | e3980b6 | 2009-04-15 17:11:53 +0100 | [diff] [blame] | 313 | .num_consumer_supplies = ARRAY_SIZE(dcdc6_consumers), |
| 314 | .consumer_supplies = dcdc6_consumers, |
Mark Brown | ecc558a | 2009-02-17 15:59:38 +0000 | [diff] [blame] | 315 | }; |
| 316 | |
| 317 | /* Alive */ |
| 318 | static struct regulator_init_data wm8350_ldo1_data = { |
| 319 | .constraints = { |
| 320 | .name = "PVDD_ALIVE", |
| 321 | .min_uV = 1200000, |
| 322 | .max_uV = 1200000, |
| 323 | .always_on = 1, |
| 324 | .apply_uV = 1, |
| 325 | }, |
| 326 | }; |
| 327 | |
| 328 | /* OTG */ |
| 329 | static struct regulator_init_data wm8350_ldo2_data = { |
| 330 | .constraints = { |
| 331 | .name = "PVDD_OTG", |
| 332 | .min_uV = 3300000, |
| 333 | .max_uV = 3300000, |
Mark Brown | f53aee2 | 2009-04-09 16:30:40 +0100 | [diff] [blame] | 334 | .always_on = 1, |
Mark Brown | ecc558a | 2009-02-17 15:59:38 +0000 | [diff] [blame] | 335 | }, |
| 336 | }; |
| 337 | |
| 338 | /* LCD */ |
| 339 | static struct regulator_init_data wm8350_ldo3_data = { |
| 340 | .constraints = { |
| 341 | .name = "PVDD_LCD", |
| 342 | .min_uV = 3000000, |
| 343 | .max_uV = 3000000, |
Mark Brown | f53aee2 | 2009-04-09 16:30:40 +0100 | [diff] [blame] | 344 | .always_on = 1, |
Mark Brown | ecc558a | 2009-02-17 15:59:38 +0000 | [diff] [blame] | 345 | }, |
| 346 | }; |
| 347 | |
| 348 | /* OTGi/1190-EV1 HPVDD & AVDD */ |
| 349 | static struct regulator_init_data wm8350_ldo4_data = { |
| 350 | .constraints = { |
| 351 | .name = "PVDD_OTGI/HPVDD/AVDD", |
| 352 | .min_uV = 1200000, |
| 353 | .max_uV = 1200000, |
| 354 | .apply_uV = 1, |
Mark Brown | f53aee2 | 2009-04-09 16:30:40 +0100 | [diff] [blame] | 355 | .always_on = 1, |
Mark Brown | ecc558a | 2009-02-17 15:59:38 +0000 | [diff] [blame] | 356 | }, |
| 357 | }; |
| 358 | |
| 359 | static struct { |
| 360 | int regulator; |
| 361 | struct regulator_init_data *initdata; |
| 362 | } wm1190_regulators[] = { |
| 363 | { WM8350_DCDC_1, &wm8350_dcdc1_data }, |
| 364 | { WM8350_DCDC_3, &wm8350_dcdc3_data }, |
| 365 | { WM8350_DCDC_4, &wm8350_dcdc4_data }, |
| 366 | { WM8350_DCDC_6, &wm8350_dcdc6_data }, |
| 367 | { WM8350_LDO_1, &wm8350_ldo1_data }, |
| 368 | { WM8350_LDO_2, &wm8350_ldo2_data }, |
| 369 | { WM8350_LDO_3, &wm8350_ldo3_data }, |
| 370 | { WM8350_LDO_4, &wm8350_ldo4_data }, |
| 371 | }; |
| 372 | |
| 373 | static int __init smdk6410_wm8350_init(struct wm8350 *wm8350) |
| 374 | { |
| 375 | int i; |
| 376 | |
Mark Brown | a3323b7 | 2009-11-03 14:42:04 +0000 | [diff] [blame] | 377 | /* Configure the IRQ line */ |
| 378 | s3c_gpio_setpull(S3C64XX_GPN(12), S3C_GPIO_PULL_UP); |
| 379 | |
Mark Brown | ecc558a | 2009-02-17 15:59:38 +0000 | [diff] [blame] | 380 | /* Instantiate the regulators */ |
| 381 | for (i = 0; i < ARRAY_SIZE(wm1190_regulators); i++) |
| 382 | wm8350_register_regulator(wm8350, |
| 383 | wm1190_regulators[i].regulator, |
| 384 | wm1190_regulators[i].initdata); |
| 385 | |
| 386 | return 0; |
| 387 | } |
| 388 | |
| 389 | static struct wm8350_platform_data __initdata smdk6410_wm8350_pdata = { |
| 390 | .init = smdk6410_wm8350_init, |
Mark Brown | db9256f | 2009-04-09 19:00:19 +0100 | [diff] [blame] | 391 | .irq_high = 1, |
Mark Brown | ecc558a | 2009-02-17 15:59:38 +0000 | [diff] [blame] | 392 | }; |
| 393 | #endif |
| 394 | |
Ben Dooks | 096941e | 2008-10-31 16:14:59 +0000 | [diff] [blame] | 395 | static struct i2c_board_info i2c_devs0[] __initdata = { |
| 396 | { I2C_BOARD_INFO("24c08", 0x50), }, |
Mark Brown | 7789747 | 2009-01-23 16:29:41 +0000 | [diff] [blame] | 397 | { I2C_BOARD_INFO("wm8580", 0x1b), }, |
Mark Brown | ecc558a | 2009-02-17 15:59:38 +0000 | [diff] [blame] | 398 | |
| 399 | #ifdef CONFIG_SMDK6410_WM1190_EV1 |
| 400 | { I2C_BOARD_INFO("wm8350", 0x1a), |
| 401 | .platform_data = &smdk6410_wm8350_pdata, |
| 402 | .irq = S3C_EINT(12), |
| 403 | }, |
| 404 | #endif |
Ben Dooks | 096941e | 2008-10-31 16:14:59 +0000 | [diff] [blame] | 405 | }; |
| 406 | |
| 407 | static struct i2c_board_info i2c_devs1[] __initdata = { |
| 408 | { I2C_BOARD_INFO("24c128", 0x57), }, /* Samsung S524AD0XD1 */ |
Ben Dooks | 5718df9 | 2008-10-21 14:07:09 +0100 | [diff] [blame] | 409 | }; |
| 410 | |
Ben Dooks | 5718df9 | 2008-10-21 14:07:09 +0100 | [diff] [blame] | 411 | static void __init smdk6410_map_io(void) |
| 412 | { |
Ben Dooks | d6662c3 | 2008-12-12 00:24:40 +0000 | [diff] [blame] | 413 | u32 tmp; |
| 414 | |
Ben Dooks | 5718df9 | 2008-10-21 14:07:09 +0100 | [diff] [blame] | 415 | s3c64xx_init_io(smdk6410_iodesc, ARRAY_SIZE(smdk6410_iodesc)); |
| 416 | s3c24xx_init_clocks(12000000); |
| 417 | s3c24xx_init_uarts(smdk6410_uartcfgs, ARRAY_SIZE(smdk6410_uartcfgs)); |
Ben Dooks | d6662c3 | 2008-12-12 00:24:40 +0000 | [diff] [blame] | 418 | |
| 419 | /* set the LCD type */ |
| 420 | |
| 421 | tmp = __raw_readl(S3C64XX_SPCON); |
| 422 | tmp &= ~S3C64XX_SPCON_LCD_SEL_MASK; |
| 423 | tmp |= S3C64XX_SPCON_LCD_SEL_RGB; |
| 424 | __raw_writel(tmp, S3C64XX_SPCON); |
| 425 | |
| 426 | /* remove the lcd bypass */ |
| 427 | tmp = __raw_readl(S3C64XX_MODEM_MIFPCON); |
| 428 | tmp &= ~MIFPCON_LCD_BYPASS; |
| 429 | __raw_writel(tmp, S3C64XX_MODEM_MIFPCON); |
Ben Dooks | 5718df9 | 2008-10-21 14:07:09 +0100 | [diff] [blame] | 430 | } |
| 431 | |
| 432 | static void __init smdk6410_machine_init(void) |
| 433 | { |
Andy Green | f01fdac | 2009-12-29 14:40:36 +0000 | [diff] [blame^] | 434 | u32 cs1; |
| 435 | |
Ben Dooks | d85fa24 | 2008-10-31 16:14:52 +0000 | [diff] [blame] | 436 | s3c_i2c0_set_platdata(NULL); |
Ben Dooks | d7ea374 | 2008-10-31 16:14:57 +0000 | [diff] [blame] | 437 | s3c_i2c1_set_platdata(NULL); |
Ben Dooks | 438a5d4 | 2008-11-19 15:41:34 +0000 | [diff] [blame] | 438 | s3c_fb_set_platdata(&smdk6410_lcd_pdata); |
Ben Dooks | 096941e | 2008-10-31 16:14:59 +0000 | [diff] [blame] | 439 | |
Andy Green | f01fdac | 2009-12-29 14:40:36 +0000 | [diff] [blame^] | 440 | /* configure nCS1 width to 16 bits */ |
| 441 | |
| 442 | cs1 = __raw_readl(S3C64XX_SROM_BW) & |
| 443 | ~(S3C64XX_SROM_BW__CS_MASK << S3C64XX_SROM_BW__NCS1__SHIFT); |
| 444 | cs1 |= ((1 << S3C64XX_SROM_BW__DATAWIDTH__SHIFT) | |
| 445 | (1 << S3C64XX_SROM_BW__WAITENABLE__SHIFT) | |
| 446 | (1 << S3C64XX_SROM_BW__BYTEENABLE__SHIFT)) << |
| 447 | S3C64XX_SROM_BW__NCS1__SHIFT; |
| 448 | __raw_writel(cs1, S3C64XX_SROM_BW); |
| 449 | |
| 450 | /* set timing for nCS1 suitable for ethernet chip */ |
| 451 | |
| 452 | __raw_writel((0 << S3C64XX_SROM_BCX__PMC__SHIFT) | |
| 453 | (6 << S3C64XX_SROM_BCX__TACP__SHIFT) | |
| 454 | (4 << S3C64XX_SROM_BCX__TCAH__SHIFT) | |
| 455 | (1 << S3C64XX_SROM_BCX__TCOH__SHIFT) | |
| 456 | (0xe << S3C64XX_SROM_BCX__TACC__SHIFT) | |
| 457 | (4 << S3C64XX_SROM_BCX__TCOS__SHIFT) | |
| 458 | (0 << S3C64XX_SROM_BCX__TACS__SHIFT), S3C64XX_SROM_BC1); |
| 459 | |
Mark Brown | b7f9a94 | 2009-04-08 16:12:35 +0100 | [diff] [blame] | 460 | gpio_request(S3C64XX_GPN(5), "LCD power"); |
| 461 | gpio_request(S3C64XX_GPF(13), "LCD power"); |
| 462 | gpio_request(S3C64XX_GPF(15), "LCD power"); |
| 463 | |
Ben Dooks | 096941e | 2008-10-31 16:14:59 +0000 | [diff] [blame] | 464 | i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0)); |
| 465 | i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1)); |
| 466 | |
Ben Dooks | 5718df9 | 2008-10-21 14:07:09 +0100 | [diff] [blame] | 467 | platform_add_devices(smdk6410_devices, ARRAY_SIZE(smdk6410_devices)); |
| 468 | } |
| 469 | |
| 470 | MACHINE_START(SMDK6410, "SMDK6410") |
| 471 | /* Maintainer: Ben Dooks <ben@fluff.org> */ |
| 472 | .phys_io = S3C_PA_UART & 0xfff00000, |
| 473 | .io_pg_offst = (((u32)S3C_VA_UART) >> 18) & 0xfffc, |
| 474 | .boot_params = S3C64XX_PA_SDRAM + 0x100, |
| 475 | |
| 476 | .init_irq = s3c6410_init_irq, |
| 477 | .map_io = smdk6410_map_io, |
| 478 | .init_machine = smdk6410_machine_init, |
| 479 | .timer = &s3c24xx_timer, |
| 480 | MACHINE_END |