blob: 58d411b6faaf46029baf984fad2732c70eb7e5bf [file] [log] [blame]
Mark Brown1dcf98f2009-07-01 18:28:54 +01001/*
2 * wm8523.c -- WM8523 ALSA SoC Audio driver
3 *
4 * Copyright 2009 Wolfson Microelectronics plc
5 *
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7 *
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14#include <linux/module.h>
15#include <linux/moduleparam.h>
16#include <linux/init.h>
17#include <linux/delay.h>
18#include <linux/pm.h>
19#include <linux/i2c.h>
20#include <linux/platform_device.h>
21#include <linux/regulator/consumer.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090022#include <linux/slab.h>
Mark Brown1dcf98f2009-07-01 18:28:54 +010023#include <sound/core.h>
24#include <sound/pcm.h>
25#include <sound/pcm_params.h>
26#include <sound/soc.h>
27#include <sound/soc-dapm.h>
28#include <sound/initval.h>
29#include <sound/tlv.h>
30
31#include "wm8523.h"
32
Mark Brown1dcf98f2009-07-01 18:28:54 +010033#define WM8523_NUM_SUPPLIES 2
34static const char *wm8523_supply_names[WM8523_NUM_SUPPLIES] = {
35 "AVDD",
36 "LINEVDD",
37};
38
39#define WM8523_NUM_RATES 7
40
41/* codec private data */
42struct wm8523_priv {
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +000043 enum snd_soc_control_type control_type;
44 void *control_data;
Mark Brown1dcf98f2009-07-01 18:28:54 +010045 u16 reg_cache[WM8523_REGISTER_COUNT];
46 struct regulator_bulk_data supplies[WM8523_NUM_SUPPLIES];
47 unsigned int sysclk;
48 unsigned int rate_constraint_list[WM8523_NUM_RATES];
49 struct snd_pcm_hw_constraint_list rate_constraint;
50};
51
52static const u16 wm8523_reg[WM8523_REGISTER_COUNT] = {
53 0x8523, /* R0 - DEVICE_ID */
54 0x0001, /* R1 - REVISION */
55 0x0000, /* R2 - PSCTRL1 */
56 0x1812, /* R3 - AIF_CTRL1 */
57 0x0000, /* R4 - AIF_CTRL2 */
58 0x0001, /* R5 - DAC_CTRL3 */
59 0x0190, /* R6 - DAC_GAINL */
60 0x0190, /* R7 - DAC_GAINR */
61 0x0000, /* R8 - ZERO_DETECT */
62};
63
Mark Brown8d50e442009-07-10 23:12:01 +010064static int wm8523_volatile_register(unsigned int reg)
Mark Brown1dcf98f2009-07-01 18:28:54 +010065{
66 switch (reg) {
67 case WM8523_DEVICE_ID:
68 case WM8523_REVISION:
69 return 1;
70 default:
71 return 0;
72 }
73}
74
Mark Brown1dcf98f2009-07-01 18:28:54 +010075static int wm8523_reset(struct snd_soc_codec *codec)
76{
Mark Brown8d50e442009-07-10 23:12:01 +010077 return snd_soc_write(codec, WM8523_DEVICE_ID, 0);
Mark Brown1dcf98f2009-07-01 18:28:54 +010078}
79
80static const DECLARE_TLV_DB_SCALE(dac_tlv, -10000, 25, 0);
81
82static const char *wm8523_zd_count_text[] = {
83 "1024",
84 "2048",
85};
86
87static const struct soc_enum wm8523_zc_count =
88 SOC_ENUM_SINGLE(WM8523_ZERO_DETECT, 0, 2, wm8523_zd_count_text);
89
90static const struct snd_kcontrol_new wm8523_snd_controls[] = {
91SOC_DOUBLE_R_TLV("Playback Volume", WM8523_DAC_GAINL, WM8523_DAC_GAINR,
92 0, 448, 0, dac_tlv),
93SOC_SINGLE("ZC Switch", WM8523_DAC_CTRL3, 4, 1, 0),
94SOC_SINGLE("Playback Deemphasis Switch", WM8523_AIF_CTRL1, 8, 1, 0),
95SOC_DOUBLE("Playback Switch", WM8523_DAC_CTRL3, 2, 3, 1, 1),
96SOC_SINGLE("Volume Ramp Up Switch", WM8523_DAC_CTRL3, 1, 1, 0),
97SOC_SINGLE("Volume Ramp Down Switch", WM8523_DAC_CTRL3, 0, 1, 0),
98SOC_ENUM("Zero Detect Count", wm8523_zc_count),
99};
100
101static const struct snd_soc_dapm_widget wm8523_dapm_widgets[] = {
102SND_SOC_DAPM_DAC("DAC", "Playback", SND_SOC_NOPM, 0, 0),
103SND_SOC_DAPM_OUTPUT("LINEVOUTL"),
104SND_SOC_DAPM_OUTPUT("LINEVOUTR"),
105};
106
107static const struct snd_soc_dapm_route intercon[] = {
108 { "LINEVOUTL", NULL, "DAC" },
109 { "LINEVOUTR", NULL, "DAC" },
110};
111
112static int wm8523_add_widgets(struct snd_soc_codec *codec)
113{
114 snd_soc_dapm_new_controls(codec, wm8523_dapm_widgets,
115 ARRAY_SIZE(wm8523_dapm_widgets));
116
117 snd_soc_dapm_add_routes(codec, intercon, ARRAY_SIZE(intercon));
118
Mark Brown1dcf98f2009-07-01 18:28:54 +0100119 return 0;
120}
121
122static struct {
123 int value;
124 int ratio;
125} lrclk_ratios[WM8523_NUM_RATES] = {
126 { 1, 128 },
127 { 2, 192 },
128 { 3, 256 },
129 { 4, 384 },
130 { 5, 512 },
131 { 6, 768 },
132 { 7, 1152 },
133};
134
135static int wm8523_startup(struct snd_pcm_substream *substream,
136 struct snd_soc_dai *dai)
137{
138 struct snd_soc_codec *codec = dai->codec;
Mark Brownb2c812e2010-04-14 15:35:19 +0900139 struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec);
Mark Brown1dcf98f2009-07-01 18:28:54 +0100140
141 /* The set of sample rates that can be supported depends on the
142 * MCLK supplied to the CODEC - enforce this.
143 */
144 if (!wm8523->sysclk) {
145 dev_err(codec->dev,
146 "No MCLK configured, call set_sysclk() on init\n");
147 return -EINVAL;
148 }
149
150 return 0;
151 snd_pcm_hw_constraint_list(substream->runtime, 0,
152 SNDRV_PCM_HW_PARAM_RATE,
153 &wm8523->rate_constraint);
154
155 return 0;
156}
157
158static int wm8523_hw_params(struct snd_pcm_substream *substream,
159 struct snd_pcm_hw_params *params,
160 struct snd_soc_dai *dai)
161{
162 struct snd_soc_pcm_runtime *rtd = substream->private_data;
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000163 struct snd_soc_codec *codec = rtd->codec;
Mark Brownb2c812e2010-04-14 15:35:19 +0900164 struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec);
Mark Brown1dcf98f2009-07-01 18:28:54 +0100165 int i;
Mark Brown8d50e442009-07-10 23:12:01 +0100166 u16 aifctrl1 = snd_soc_read(codec, WM8523_AIF_CTRL1);
167 u16 aifctrl2 = snd_soc_read(codec, WM8523_AIF_CTRL2);
Mark Brown1dcf98f2009-07-01 18:28:54 +0100168
169 /* Find a supported LRCLK ratio */
170 for (i = 0; i < ARRAY_SIZE(lrclk_ratios); i++) {
171 if (wm8523->sysclk / params_rate(params) ==
172 lrclk_ratios[i].ratio)
173 break;
174 }
175
176 /* Should never happen, should be handled by constraints */
177 if (i == ARRAY_SIZE(lrclk_ratios)) {
178 dev_err(codec->dev, "MCLK/fs ratio %d unsupported\n",
179 wm8523->sysclk / params_rate(params));
180 return -EINVAL;
181 }
182
183 aifctrl2 &= ~WM8523_SR_MASK;
184 aifctrl2 |= lrclk_ratios[i].value;
185
186 aifctrl1 &= ~WM8523_WL_MASK;
187 switch (params_format(params)) {
188 case SNDRV_PCM_FORMAT_S16_LE:
189 break;
190 case SNDRV_PCM_FORMAT_S20_3LE:
191 aifctrl1 |= 0x8;
192 break;
193 case SNDRV_PCM_FORMAT_S24_LE:
194 aifctrl1 |= 0x10;
195 break;
196 case SNDRV_PCM_FORMAT_S32_LE:
197 aifctrl1 |= 0x18;
198 break;
199 }
200
Mark Brown8d50e442009-07-10 23:12:01 +0100201 snd_soc_write(codec, WM8523_AIF_CTRL1, aifctrl1);
202 snd_soc_write(codec, WM8523_AIF_CTRL2, aifctrl2);
Mark Brown1dcf98f2009-07-01 18:28:54 +0100203
204 return 0;
205}
206
207static int wm8523_set_dai_sysclk(struct snd_soc_dai *codec_dai,
208 int clk_id, unsigned int freq, int dir)
209{
210 struct snd_soc_codec *codec = codec_dai->codec;
Mark Brownb2c812e2010-04-14 15:35:19 +0900211 struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec);
Mark Brown1dcf98f2009-07-01 18:28:54 +0100212 unsigned int val;
213 int i;
214
215 wm8523->sysclk = freq;
216
217 wm8523->rate_constraint.count = 0;
218 for (i = 0; i < ARRAY_SIZE(lrclk_ratios); i++) {
219 val = freq / lrclk_ratios[i].ratio;
220 /* Check that it's a standard rate since core can't
221 * cope with others and having the odd rates confuses
222 * constraint matching.
223 */
224 switch (val) {
225 case 8000:
226 case 11025:
227 case 16000:
228 case 22050:
229 case 32000:
230 case 44100:
231 case 48000:
232 case 64000:
233 case 88200:
234 case 96000:
235 case 176400:
236 case 192000:
237 dev_dbg(codec->dev, "Supported sample rate: %dHz\n",
238 val);
239 wm8523->rate_constraint_list[i] = val;
240 wm8523->rate_constraint.count++;
241 break;
242 default:
243 dev_dbg(codec->dev, "Skipping sample rate: %dHz\n",
244 val);
245 }
246 }
247
248 /* Need at least one supported rate... */
249 if (wm8523->rate_constraint.count == 0)
250 return -EINVAL;
251
252 return 0;
253}
254
255
256static int wm8523_set_dai_fmt(struct snd_soc_dai *codec_dai,
257 unsigned int fmt)
258{
259 struct snd_soc_codec *codec = codec_dai->codec;
Mark Brown8d50e442009-07-10 23:12:01 +0100260 u16 aifctrl1 = snd_soc_read(codec, WM8523_AIF_CTRL1);
Mark Brown1dcf98f2009-07-01 18:28:54 +0100261
262 aifctrl1 &= ~(WM8523_BCLK_INV_MASK | WM8523_LRCLK_INV_MASK |
263 WM8523_FMT_MASK | WM8523_AIF_MSTR_MASK);
264
265 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
266 case SND_SOC_DAIFMT_CBM_CFM:
267 aifctrl1 |= WM8523_AIF_MSTR;
268 break;
269 case SND_SOC_DAIFMT_CBS_CFS:
270 break;
271 default:
272 return -EINVAL;
273 }
274
275 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
276 case SND_SOC_DAIFMT_I2S:
277 aifctrl1 |= 0x0002;
278 break;
279 case SND_SOC_DAIFMT_RIGHT_J:
280 break;
281 case SND_SOC_DAIFMT_LEFT_J:
282 aifctrl1 |= 0x0001;
283 break;
284 case SND_SOC_DAIFMT_DSP_A:
285 aifctrl1 |= 0x0003;
286 break;
287 case SND_SOC_DAIFMT_DSP_B:
288 aifctrl1 |= 0x0023;
289 break;
290 default:
291 return -EINVAL;
292 }
293
294 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
295 case SND_SOC_DAIFMT_NB_NF:
296 break;
297 case SND_SOC_DAIFMT_IB_IF:
298 aifctrl1 |= WM8523_BCLK_INV | WM8523_LRCLK_INV;
299 break;
300 case SND_SOC_DAIFMT_IB_NF:
301 aifctrl1 |= WM8523_BCLK_INV;
302 break;
303 case SND_SOC_DAIFMT_NB_IF:
304 aifctrl1 |= WM8523_LRCLK_INV;
305 break;
306 default:
307 return -EINVAL;
308 }
309
Mark Brown8d50e442009-07-10 23:12:01 +0100310 snd_soc_write(codec, WM8523_AIF_CTRL1, aifctrl1);
Mark Brown1dcf98f2009-07-01 18:28:54 +0100311
312 return 0;
313}
314
315static int wm8523_set_bias_level(struct snd_soc_codec *codec,
316 enum snd_soc_bias_level level)
317{
Mark Brownb2c812e2010-04-14 15:35:19 +0900318 struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec);
Mark Brown1dcf98f2009-07-01 18:28:54 +0100319 int ret, i;
320
321 switch (level) {
322 case SND_SOC_BIAS_ON:
323 break;
324
325 case SND_SOC_BIAS_PREPARE:
326 /* Full power on */
327 snd_soc_update_bits(codec, WM8523_PSCTRL1,
328 WM8523_SYS_ENA_MASK, 3);
329 break;
330
331 case SND_SOC_BIAS_STANDBY:
332 if (codec->bias_level == SND_SOC_BIAS_OFF) {
333 ret = regulator_bulk_enable(ARRAY_SIZE(wm8523->supplies),
334 wm8523->supplies);
335 if (ret != 0) {
336 dev_err(codec->dev,
337 "Failed to enable supplies: %d\n",
338 ret);
339 return ret;
340 }
341
342 /* Initial power up */
343 snd_soc_update_bits(codec, WM8523_PSCTRL1,
344 WM8523_SYS_ENA_MASK, 1);
345
346 /* Sync back default/cached values */
347 for (i = WM8523_AIF_CTRL1;
348 i < WM8523_MAX_REGISTER; i++)
Mark Brown8d50e442009-07-10 23:12:01 +0100349 snd_soc_write(codec, i, wm8523->reg_cache[i]);
Mark Brown1dcf98f2009-07-01 18:28:54 +0100350
351
352 msleep(100);
353 }
354
355 /* Power up to mute */
356 snd_soc_update_bits(codec, WM8523_PSCTRL1,
357 WM8523_SYS_ENA_MASK, 2);
358
359 break;
360
361 case SND_SOC_BIAS_OFF:
362 /* The chip runs through the power down sequence for us. */
363 snd_soc_update_bits(codec, WM8523_PSCTRL1,
364 WM8523_SYS_ENA_MASK, 0);
365 msleep(100);
366
367 regulator_bulk_disable(ARRAY_SIZE(wm8523->supplies),
368 wm8523->supplies);
369 break;
370 }
371 codec->bias_level = level;
372 return 0;
373}
374
375#define WM8523_RATES SNDRV_PCM_RATE_8000_192000
376
377#define WM8523_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
378 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
379
380static struct snd_soc_dai_ops wm8523_dai_ops = {
381 .startup = wm8523_startup,
382 .hw_params = wm8523_hw_params,
383 .set_sysclk = wm8523_set_dai_sysclk,
384 .set_fmt = wm8523_set_dai_fmt,
385};
386
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000387static struct snd_soc_dai_driver wm8523_dai = {
388 .name = "wm8523-hifi",
Mark Brown1dcf98f2009-07-01 18:28:54 +0100389 .playback = {
390 .stream_name = "Playback",
391 .channels_min = 2, /* Mono modes not yet supported */
392 .channels_max = 2,
393 .rates = WM8523_RATES,
394 .formats = WM8523_FORMATS,
395 },
396 .ops = &wm8523_dai_ops,
397};
Mark Brown1dcf98f2009-07-01 18:28:54 +0100398
399#ifdef CONFIG_PM
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000400static int wm8523_suspend(struct snd_soc_codec *codec, pm_message_t state)
Mark Brown1dcf98f2009-07-01 18:28:54 +0100401{
Mark Brown1dcf98f2009-07-01 18:28:54 +0100402 wm8523_set_bias_level(codec, SND_SOC_BIAS_OFF);
403 return 0;
404}
405
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000406static int wm8523_resume(struct snd_soc_codec *codec)
Mark Brown1dcf98f2009-07-01 18:28:54 +0100407{
Mark Brown1dcf98f2009-07-01 18:28:54 +0100408 wm8523_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
Mark Brown1dcf98f2009-07-01 18:28:54 +0100409 return 0;
410}
411#else
412#define wm8523_suspend NULL
413#define wm8523_resume NULL
414#endif
415
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000416static int wm8523_probe(struct snd_soc_codec *codec)
Mark Brown1dcf98f2009-07-01 18:28:54 +0100417{
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000418 struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec);
419 int ret, i;
Mark Brown1dcf98f2009-07-01 18:28:54 +0100420
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000421 codec->hw_write = (hw_write_t)i2c_master_send;
422 codec->control_data = wm8523->control_data;
Mark Brown1dcf98f2009-07-01 18:28:54 +0100423 wm8523->rate_constraint.list = &wm8523->rate_constraint_list[0];
424 wm8523->rate_constraint.count =
425 ARRAY_SIZE(wm8523->rate_constraint_list);
426
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000427 ret = snd_soc_codec_set_cache_io(codec, 8, 16, wm8523->control_type);
Mark Brown8d50e442009-07-10 23:12:01 +0100428 if (ret != 0) {
429 dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000430 return ret;
Mark Brown8d50e442009-07-10 23:12:01 +0100431 }
432
Mark Brown1dcf98f2009-07-01 18:28:54 +0100433 for (i = 0; i < ARRAY_SIZE(wm8523->supplies); i++)
434 wm8523->supplies[i].supply = wm8523_supply_names[i];
435
436 ret = regulator_bulk_get(codec->dev, ARRAY_SIZE(wm8523->supplies),
437 wm8523->supplies);
438 if (ret != 0) {
439 dev_err(codec->dev, "Failed to request supplies: %d\n", ret);
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000440 return ret;
Mark Brown1dcf98f2009-07-01 18:28:54 +0100441 }
442
443 ret = regulator_bulk_enable(ARRAY_SIZE(wm8523->supplies),
444 wm8523->supplies);
445 if (ret != 0) {
446 dev_err(codec->dev, "Failed to enable supplies: %d\n", ret);
447 goto err_get;
448 }
449
Mark Brown8d50e442009-07-10 23:12:01 +0100450 ret = snd_soc_read(codec, WM8523_DEVICE_ID);
Mark Brown1dcf98f2009-07-01 18:28:54 +0100451 if (ret < 0) {
452 dev_err(codec->dev, "Failed to read ID register\n");
453 goto err_enable;
454 }
455 if (ret != wm8523_reg[WM8523_DEVICE_ID]) {
456 dev_err(codec->dev, "Device is not a WM8523, ID is %x\n", ret);
457 ret = -EINVAL;
458 goto err_enable;
459 }
460
Mark Brown8d50e442009-07-10 23:12:01 +0100461 ret = snd_soc_read(codec, WM8523_REVISION);
Mark Brown1dcf98f2009-07-01 18:28:54 +0100462 if (ret < 0) {
463 dev_err(codec->dev, "Failed to read revision register\n");
464 goto err_enable;
465 }
466 dev_info(codec->dev, "revision %c\n",
467 (ret & WM8523_CHIP_REV_MASK) + 'A');
468
469 ret = wm8523_reset(codec);
470 if (ret < 0) {
471 dev_err(codec->dev, "Failed to issue reset\n");
472 goto err_enable;
473 }
474
Mark Brown1dcf98f2009-07-01 18:28:54 +0100475 /* Change some default settings - latch VU and enable ZC */
476 wm8523->reg_cache[WM8523_DAC_GAINR] |= WM8523_DACR_VU;
477 wm8523->reg_cache[WM8523_DAC_CTRL3] |= WM8523_ZC;
478
479 wm8523_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
480
481 /* Bias level configuration will have done an extra enable */
482 regulator_bulk_disable(ARRAY_SIZE(wm8523->supplies), wm8523->supplies);
483
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000484 snd_soc_add_controls(codec, wm8523_snd_controls,
485 ARRAY_SIZE(wm8523_snd_controls));
486 wm8523_add_widgets(codec);
Mark Brown1dcf98f2009-07-01 18:28:54 +0100487
488 return 0;
489
490err_enable:
491 regulator_bulk_disable(ARRAY_SIZE(wm8523->supplies), wm8523->supplies);
492err_get:
493 regulator_bulk_free(ARRAY_SIZE(wm8523->supplies), wm8523->supplies);
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000494
Mark Brown1dcf98f2009-07-01 18:28:54 +0100495 return ret;
496}
497
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000498static int wm8523_remove(struct snd_soc_codec *codec)
Mark Brown1dcf98f2009-07-01 18:28:54 +0100499{
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000500 struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec);
501
502 wm8523_set_bias_level(codec, SND_SOC_BIAS_OFF);
Mark Brown1dcf98f2009-07-01 18:28:54 +0100503 regulator_bulk_free(ARRAY_SIZE(wm8523->supplies), wm8523->supplies);
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000504 return 0;
Mark Brown1dcf98f2009-07-01 18:28:54 +0100505}
506
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000507static struct snd_soc_codec_driver soc_codec_dev_wm8523 = {
508 .probe = wm8523_probe,
509 .remove = wm8523_remove,
510 .suspend = wm8523_suspend,
511 .resume = wm8523_resume,
512 .set_bias_level = wm8523_set_bias_level,
513 .reg_cache_size = WM8523_REGISTER_COUNT,
514 .reg_word_size = sizeof(u16),
515 .reg_cache_default = wm8523_reg,
516 .volatile_register = wm8523_volatile_register,
517};
518
Mark Brown1dcf98f2009-07-01 18:28:54 +0100519#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
520static __devinit int wm8523_i2c_probe(struct i2c_client *i2c,
521 const struct i2c_device_id *id)
522{
523 struct wm8523_priv *wm8523;
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000524 int ret;
Mark Brown1dcf98f2009-07-01 18:28:54 +0100525
526 wm8523 = kzalloc(sizeof(struct wm8523_priv), GFP_KERNEL);
527 if (wm8523 == NULL)
528 return -ENOMEM;
529
Mark Brown1dcf98f2009-07-01 18:28:54 +0100530 i2c_set_clientdata(i2c, wm8523);
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000531 wm8523->control_data = i2c;
532 wm8523->control_type = SND_SOC_I2C;
Mark Brown1dcf98f2009-07-01 18:28:54 +0100533
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000534 ret = snd_soc_register_codec(&i2c->dev,
535 &soc_codec_dev_wm8523, &wm8523_dai, 1);
536 if (ret < 0)
537 kfree(wm8523);
538 return ret;
Mark Brown1dcf98f2009-07-01 18:28:54 +0100539
Mark Brown1dcf98f2009-07-01 18:28:54 +0100540}
541
542static __devexit int wm8523_i2c_remove(struct i2c_client *client)
543{
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000544 snd_soc_unregister_codec(&client->dev);
545 kfree(i2c_get_clientdata(client));
Mark Brown1dcf98f2009-07-01 18:28:54 +0100546 return 0;
547}
548
Mark Brown1dcf98f2009-07-01 18:28:54 +0100549static const struct i2c_device_id wm8523_i2c_id[] = {
550 { "wm8523", 0 },
551 { }
552};
553MODULE_DEVICE_TABLE(i2c, wm8523_i2c_id);
554
555static struct i2c_driver wm8523_i2c_driver = {
556 .driver = {
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000557 .name = "wm8523-codec",
Mark Brown1dcf98f2009-07-01 18:28:54 +0100558 .owner = THIS_MODULE,
559 },
560 .probe = wm8523_i2c_probe,
561 .remove = __devexit_p(wm8523_i2c_remove),
Mark Brown1dcf98f2009-07-01 18:28:54 +0100562 .id_table = wm8523_i2c_id,
563};
564#endif
565
566static int __init wm8523_modinit(void)
567{
568 int ret;
569#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
570 ret = i2c_add_driver(&wm8523_i2c_driver);
571 if (ret != 0) {
572 printk(KERN_ERR "Failed to register WM8523 I2C driver: %d\n",
573 ret);
574 }
575#endif
576 return 0;
577}
578module_init(wm8523_modinit);
579
580static void __exit wm8523_exit(void)
581{
582#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
583 i2c_del_driver(&wm8523_i2c_driver);
584#endif
585}
586module_exit(wm8523_exit);
587
588MODULE_DESCRIPTION("ASoC WM8523 driver");
589MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
590MODULE_LICENSE("GPL");