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Mark Brown0a1bf552009-05-23 11:18:41 +01001/*
2 * wm8974.c -- WM8974 ALSA Soc Audio driver
3 *
Mark Brown8b83a192009-06-30 19:37:02 +01004 * Copyright 2006-2009 Wolfson Microelectronics PLC.
Mark Brown0a1bf552009-05-23 11:18:41 +01005 *
Mark Brown9a185b92011-10-06 11:10:01 +01006 * Author: Liam Girdwood <Liam.Girdwood@wolfsonmicro.com>
Mark Brown0a1bf552009-05-23 11:18:41 +01007 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#include <linux/module.h>
14#include <linux/moduleparam.h>
Mark Brown0a1bf552009-05-23 11:18:41 +010015#include <linux/kernel.h>
16#include <linux/init.h>
17#include <linux/delay.h>
18#include <linux/pm.h>
19#include <linux/i2c.h>
Mark Browne40e0b52013-11-08 14:01:39 +000020#include <linux/regmap.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090021#include <linux/slab.h>
Mark Brown0a1bf552009-05-23 11:18:41 +010022#include <sound/core.h>
23#include <sound/pcm.h>
24#include <sound/pcm_params.h>
25#include <sound/soc.h>
Mark Brown0a1bf552009-05-23 11:18:41 +010026#include <sound/initval.h>
Mark Browna5f8d2f2009-06-30 19:30:33 +010027#include <sound/tlv.h>
Mark Brown0a1bf552009-05-23 11:18:41 +010028
29#include "wm8974.h"
30
Mark Browne40e0b52013-11-08 14:01:39 +000031static const struct reg_default wm8974_reg_defaults[] = {
32 { 0, 0x0000 }, { 1, 0x0000 }, { 2, 0x0000 }, { 3, 0x0000 },
33 { 4, 0x0050 }, { 5, 0x0000 }, { 6, 0x0140 }, { 7, 0x0000 },
34 { 8, 0x0000 }, { 9, 0x0000 }, { 10, 0x0000 }, { 11, 0x00ff },
35 { 12, 0x0000 }, { 13, 0x0000 }, { 14, 0x0100 }, { 15, 0x00ff },
36 { 16, 0x0000 }, { 17, 0x0000 }, { 18, 0x012c }, { 19, 0x002c },
37 { 20, 0x002c }, { 21, 0x002c }, { 22, 0x002c }, { 23, 0x0000 },
38 { 24, 0x0032 }, { 25, 0x0000 }, { 26, 0x0000 }, { 27, 0x0000 },
39 { 28, 0x0000 }, { 29, 0x0000 }, { 30, 0x0000 }, { 31, 0x0000 },
40 { 32, 0x0038 }, { 33, 0x000b }, { 34, 0x0032 }, { 35, 0x0000 },
41 { 36, 0x0008 }, { 37, 0x000c }, { 38, 0x0093 }, { 39, 0x00e9 },
42 { 40, 0x0000 }, { 41, 0x0000 }, { 42, 0x0000 }, { 43, 0x0000 },
43 { 44, 0x0003 }, { 45, 0x0010 }, { 46, 0x0000 }, { 47, 0x0000 },
44 { 48, 0x0000 }, { 49, 0x0002 }, { 50, 0x0000 }, { 51, 0x0000 },
45 { 52, 0x0000 }, { 53, 0x0000 }, { 54, 0x0039 }, { 55, 0x0000 },
46 { 56, 0x0000 },
Mark Brown0a1bf552009-05-23 11:18:41 +010047};
48
Mark Browndf1ef7a2009-06-30 19:01:09 +010049#define WM8974_POWER1_BIASEN 0x08
Guennadi Liakhovetski48c03ce2009-12-17 14:51:35 +010050#define WM8974_POWER1_BUFIOEN 0x04
Mark Browndf1ef7a2009-06-30 19:01:09 +010051
Mark Brown1e97f502009-08-15 12:15:10 +010052#define wm8974_reset(c) snd_soc_write(c, WM8974_RESET, 0)
Mark Brown0a1bf552009-05-23 11:18:41 +010053
54static const char *wm8974_companding[] = {"Off", "NC", "u-law", "A-law" };
55static const char *wm8974_deemp[] = {"None", "32kHz", "44.1kHz", "48kHz" };
56static const char *wm8974_eqmode[] = {"Capture", "Playback" };
57static const char *wm8974_bw[] = {"Narrow", "Wide" };
58static const char *wm8974_eq1[] = {"80Hz", "105Hz", "135Hz", "175Hz" };
59static const char *wm8974_eq2[] = {"230Hz", "300Hz", "385Hz", "500Hz" };
60static const char *wm8974_eq3[] = {"650Hz", "850Hz", "1.1kHz", "1.4kHz" };
61static const char *wm8974_eq4[] = {"1.8kHz", "2.4kHz", "3.2kHz", "4.1kHz" };
62static const char *wm8974_eq5[] = {"5.3kHz", "6.9kHz", "9kHz", "11.7kHz" };
63static const char *wm8974_alc[] = {"ALC", "Limiter" };
64
65static const struct soc_enum wm8974_enum[] = {
66 SOC_ENUM_SINGLE(WM8974_COMP, 1, 4, wm8974_companding), /* adc */
67 SOC_ENUM_SINGLE(WM8974_COMP, 3, 4, wm8974_companding), /* dac */
68 SOC_ENUM_SINGLE(WM8974_DAC, 4, 4, wm8974_deemp),
69 SOC_ENUM_SINGLE(WM8974_EQ1, 8, 2, wm8974_eqmode),
70
71 SOC_ENUM_SINGLE(WM8974_EQ1, 5, 4, wm8974_eq1),
72 SOC_ENUM_SINGLE(WM8974_EQ2, 8, 2, wm8974_bw),
73 SOC_ENUM_SINGLE(WM8974_EQ2, 5, 4, wm8974_eq2),
74 SOC_ENUM_SINGLE(WM8974_EQ3, 8, 2, wm8974_bw),
75
76 SOC_ENUM_SINGLE(WM8974_EQ3, 5, 4, wm8974_eq3),
77 SOC_ENUM_SINGLE(WM8974_EQ4, 8, 2, wm8974_bw),
78 SOC_ENUM_SINGLE(WM8974_EQ4, 5, 4, wm8974_eq4),
79 SOC_ENUM_SINGLE(WM8974_EQ5, 8, 2, wm8974_bw),
80
81 SOC_ENUM_SINGLE(WM8974_EQ5, 5, 4, wm8974_eq5),
82 SOC_ENUM_SINGLE(WM8974_ALC3, 8, 2, wm8974_alc),
83};
84
Mark Brown8a123ee2009-06-30 21:10:34 +010085static const char *wm8974_auxmode_text[] = { "Buffer", "Mixer" };
86
87static const struct soc_enum wm8974_auxmode =
88 SOC_ENUM_SINGLE(WM8974_INPUT, 3, 2, wm8974_auxmode_text);
89
Mark Browna5f8d2f2009-06-30 19:30:33 +010090static const DECLARE_TLV_DB_SCALE(digital_tlv, -12750, 50, 1);
91static const DECLARE_TLV_DB_SCALE(eq_tlv, -1200, 100, 0);
92static const DECLARE_TLV_DB_SCALE(inpga_tlv, -1200, 75, 0);
93static const DECLARE_TLV_DB_SCALE(spk_tlv, -5700, 100, 0);
94
Mark Brown0a1bf552009-05-23 11:18:41 +010095static const struct snd_kcontrol_new wm8974_snd_controls[] = {
96
97SOC_SINGLE("Digital Loopback Switch", WM8974_COMP, 0, 1, 0),
98
99SOC_ENUM("DAC Companding", wm8974_enum[1]),
100SOC_ENUM("ADC Companding", wm8974_enum[0]),
101
102SOC_ENUM("Playback De-emphasis", wm8974_enum[2]),
103SOC_SINGLE("DAC Inversion Switch", WM8974_DAC, 0, 1, 0),
104
Mark Browna5f8d2f2009-06-30 19:30:33 +0100105SOC_SINGLE_TLV("PCM Volume", WM8974_DACVOL, 0, 255, 0, digital_tlv),
Mark Brown0a1bf552009-05-23 11:18:41 +0100106
107SOC_SINGLE("High Pass Filter Switch", WM8974_ADC, 8, 1, 0),
108SOC_SINGLE("High Pass Cut Off", WM8974_ADC, 4, 7, 0),
javier Martin25cbf462009-07-21 11:15:06 +0200109SOC_SINGLE("ADC Inversion Switch", WM8974_ADC, 0, 1, 0),
Mark Brown0a1bf552009-05-23 11:18:41 +0100110
Mark Browna5f8d2f2009-06-30 19:30:33 +0100111SOC_SINGLE_TLV("Capture Volume", WM8974_ADCVOL, 0, 255, 0, digital_tlv),
Mark Brown0a1bf552009-05-23 11:18:41 +0100112
113SOC_ENUM("Equaliser Function", wm8974_enum[3]),
114SOC_ENUM("EQ1 Cut Off", wm8974_enum[4]),
Mark Browna5f8d2f2009-06-30 19:30:33 +0100115SOC_SINGLE_TLV("EQ1 Volume", WM8974_EQ1, 0, 24, 1, eq_tlv),
Mark Brown0a1bf552009-05-23 11:18:41 +0100116
Masanari Iidac46d5c02012-11-02 23:25:30 +0900117SOC_ENUM("Equaliser EQ2 Bandwidth", wm8974_enum[5]),
Mark Brown0a1bf552009-05-23 11:18:41 +0100118SOC_ENUM("EQ2 Cut Off", wm8974_enum[6]),
Mark Browna5f8d2f2009-06-30 19:30:33 +0100119SOC_SINGLE_TLV("EQ2 Volume", WM8974_EQ2, 0, 24, 1, eq_tlv),
Mark Brown0a1bf552009-05-23 11:18:41 +0100120
Masanari Iidac46d5c02012-11-02 23:25:30 +0900121SOC_ENUM("Equaliser EQ3 Bandwidth", wm8974_enum[7]),
Mark Brown0a1bf552009-05-23 11:18:41 +0100122SOC_ENUM("EQ3 Cut Off", wm8974_enum[8]),
Mark Browna5f8d2f2009-06-30 19:30:33 +0100123SOC_SINGLE_TLV("EQ3 Volume", WM8974_EQ3, 0, 24, 1, eq_tlv),
Mark Brown0a1bf552009-05-23 11:18:41 +0100124
Masanari Iidac46d5c02012-11-02 23:25:30 +0900125SOC_ENUM("Equaliser EQ4 Bandwidth", wm8974_enum[9]),
Mark Brown0a1bf552009-05-23 11:18:41 +0100126SOC_ENUM("EQ4 Cut Off", wm8974_enum[10]),
Mark Browna5f8d2f2009-06-30 19:30:33 +0100127SOC_SINGLE_TLV("EQ4 Volume", WM8974_EQ4, 0, 24, 1, eq_tlv),
Mark Brown0a1bf552009-05-23 11:18:41 +0100128
Masanari Iidaa895d572013-04-09 02:06:50 +0900129SOC_ENUM("Equaliser EQ5 Bandwidth", wm8974_enum[11]),
Mark Brown0a1bf552009-05-23 11:18:41 +0100130SOC_ENUM("EQ5 Cut Off", wm8974_enum[12]),
Mark Browna5f8d2f2009-06-30 19:30:33 +0100131SOC_SINGLE_TLV("EQ5 Volume", WM8974_EQ5, 0, 24, 1, eq_tlv),
Mark Brown0a1bf552009-05-23 11:18:41 +0100132
133SOC_SINGLE("DAC Playback Limiter Switch", WM8974_DACLIM1, 8, 1, 0),
134SOC_SINGLE("DAC Playback Limiter Decay", WM8974_DACLIM1, 4, 15, 0),
135SOC_SINGLE("DAC Playback Limiter Attack", WM8974_DACLIM1, 0, 15, 0),
136
137SOC_SINGLE("DAC Playback Limiter Threshold", WM8974_DACLIM2, 4, 7, 0),
138SOC_SINGLE("DAC Playback Limiter Boost", WM8974_DACLIM2, 0, 15, 0),
139
140SOC_SINGLE("ALC Enable Switch", WM8974_ALC1, 8, 1, 0),
141SOC_SINGLE("ALC Capture Max Gain", WM8974_ALC1, 3, 7, 0),
142SOC_SINGLE("ALC Capture Min Gain", WM8974_ALC1, 0, 7, 0),
143
144SOC_SINGLE("ALC Capture ZC Switch", WM8974_ALC2, 8, 1, 0),
145SOC_SINGLE("ALC Capture Hold", WM8974_ALC2, 4, 7, 0),
146SOC_SINGLE("ALC Capture Target", WM8974_ALC2, 0, 15, 0),
147
148SOC_ENUM("ALC Capture Mode", wm8974_enum[13]),
149SOC_SINGLE("ALC Capture Decay", WM8974_ALC3, 4, 15, 0),
150SOC_SINGLE("ALC Capture Attack", WM8974_ALC3, 0, 15, 0),
151
152SOC_SINGLE("ALC Capture Noise Gate Switch", WM8974_NGATE, 3, 1, 0),
153SOC_SINGLE("ALC Capture Noise Gate Threshold", WM8974_NGATE, 0, 7, 0),
154
155SOC_SINGLE("Capture PGA ZC Switch", WM8974_INPPGA, 7, 1, 0),
Mark Browna5f8d2f2009-06-30 19:30:33 +0100156SOC_SINGLE_TLV("Capture PGA Volume", WM8974_INPPGA, 0, 63, 0, inpga_tlv),
Mark Brown0a1bf552009-05-23 11:18:41 +0100157
158SOC_SINGLE("Speaker Playback ZC Switch", WM8974_SPKVOL, 7, 1, 0),
159SOC_SINGLE("Speaker Playback Switch", WM8974_SPKVOL, 6, 1, 1),
Mark Brown8a123ee2009-06-30 21:10:34 +0100160SOC_SINGLE_TLV("Speaker Playback Volume", WM8974_SPKVOL, 0, 63, 0, spk_tlv),
161
162SOC_ENUM("Aux Mode", wm8974_auxmode),
Mark Brown0a1bf552009-05-23 11:18:41 +0100163
164SOC_SINGLE("Capture Boost(+20dB)", WM8974_ADCBOOST, 8, 1, 0),
Mark Brown8a123ee2009-06-30 21:10:34 +0100165SOC_SINGLE("Mono Playback Switch", WM8974_MONOMIX, 6, 1, 1),
Guennadi Liakhovetskib2c3e922010-01-29 15:31:06 +0100166
167/* DAC / ADC oversampling */
168SOC_SINGLE("DAC 128x Oversampling Switch", WM8974_DAC, 8, 1, 0),
169SOC_SINGLE("ADC 128x Oversampling Switch", WM8974_ADC, 8, 1, 0),
Mark Brown0a1bf552009-05-23 11:18:41 +0100170};
171
Mark Brown0a1bf552009-05-23 11:18:41 +0100172/* Speaker Output Mixer */
173static const struct snd_kcontrol_new wm8974_speaker_mixer_controls[] = {
174SOC_DAPM_SINGLE("Line Bypass Switch", WM8974_SPKMIX, 1, 1, 0),
175SOC_DAPM_SINGLE("Aux Playback Switch", WM8974_SPKMIX, 5, 1, 0),
Mark Brown759512f2010-04-23 17:39:23 +0100176SOC_DAPM_SINGLE("PCM Playback Switch", WM8974_SPKMIX, 0, 1, 0),
Mark Brown0a1bf552009-05-23 11:18:41 +0100177};
178
179/* Mono Output Mixer */
180static const struct snd_kcontrol_new wm8974_mono_mixer_controls[] = {
181SOC_DAPM_SINGLE("Line Bypass Switch", WM8974_MONOMIX, 1, 1, 0),
182SOC_DAPM_SINGLE("Aux Playback Switch", WM8974_MONOMIX, 2, 1, 0),
Mark Brown8a123ee2009-06-30 21:10:34 +0100183SOC_DAPM_SINGLE("PCM Playback Switch", WM8974_MONOMIX, 0, 1, 0),
184};
185
186/* Boost mixer */
187static const struct snd_kcontrol_new wm8974_boost_mixer[] = {
188SOC_DAPM_SINGLE("Aux Switch", WM8974_INPPGA, 6, 1, 0),
189};
190
191/* Input PGA */
192static const struct snd_kcontrol_new wm8974_inpga[] = {
193SOC_DAPM_SINGLE("Aux Switch", WM8974_INPUT, 2, 1, 0),
194SOC_DAPM_SINGLE("MicN Switch", WM8974_INPUT, 1, 1, 0),
195SOC_DAPM_SINGLE("MicP Switch", WM8974_INPUT, 0, 1, 0),
Mark Brown0a1bf552009-05-23 11:18:41 +0100196};
197
198/* AUX Input boost vol */
199static const struct snd_kcontrol_new wm8974_aux_boost_controls =
200SOC_DAPM_SINGLE("Aux Volume", WM8974_ADCBOOST, 0, 7, 0);
201
202/* Mic Input boost vol */
203static const struct snd_kcontrol_new wm8974_mic_boost_controls =
204SOC_DAPM_SINGLE("Mic Volume", WM8974_ADCBOOST, 4, 7, 0);
205
Mark Brown0a1bf552009-05-23 11:18:41 +0100206static const struct snd_soc_dapm_widget wm8974_dapm_widgets[] = {
207SND_SOC_DAPM_MIXER("Speaker Mixer", WM8974_POWER3, 2, 0,
208 &wm8974_speaker_mixer_controls[0],
209 ARRAY_SIZE(wm8974_speaker_mixer_controls)),
210SND_SOC_DAPM_MIXER("Mono Mixer", WM8974_POWER3, 3, 0,
211 &wm8974_mono_mixer_controls[0],
212 ARRAY_SIZE(wm8974_mono_mixer_controls)),
213SND_SOC_DAPM_DAC("DAC", "HiFi Playback", WM8974_POWER3, 0, 0),
Mark Brown8a123ee2009-06-30 21:10:34 +0100214SND_SOC_DAPM_ADC("ADC", "HiFi Capture", WM8974_POWER2, 0, 0),
Mark Brown0a1bf552009-05-23 11:18:41 +0100215SND_SOC_DAPM_PGA("Aux Input", WM8974_POWER1, 6, 0, NULL, 0),
216SND_SOC_DAPM_PGA("SpkN Out", WM8974_POWER3, 5, 0, NULL, 0),
217SND_SOC_DAPM_PGA("SpkP Out", WM8974_POWER3, 6, 0, NULL, 0),
218SND_SOC_DAPM_PGA("Mono Out", WM8974_POWER3, 7, 0, NULL, 0),
Mark Brown0a1bf552009-05-23 11:18:41 +0100219
Mark Brown8a123ee2009-06-30 21:10:34 +0100220SND_SOC_DAPM_MIXER("Input PGA", WM8974_POWER2, 2, 0, wm8974_inpga,
221 ARRAY_SIZE(wm8974_inpga)),
222SND_SOC_DAPM_MIXER("Boost Mixer", WM8974_POWER2, 4, 0,
223 wm8974_boost_mixer, ARRAY_SIZE(wm8974_boost_mixer)),
Mark Brown0a1bf552009-05-23 11:18:41 +0100224
Mark Brown48dd2312011-10-27 09:47:09 +0200225SND_SOC_DAPM_SUPPLY("Mic Bias", WM8974_POWER1, 4, 0, NULL, 0),
Mark Brown0a1bf552009-05-23 11:18:41 +0100226
227SND_SOC_DAPM_INPUT("MICN"),
228SND_SOC_DAPM_INPUT("MICP"),
229SND_SOC_DAPM_INPUT("AUX"),
230SND_SOC_DAPM_OUTPUT("MONOOUT"),
231SND_SOC_DAPM_OUTPUT("SPKOUTP"),
232SND_SOC_DAPM_OUTPUT("SPKOUTN"),
233};
234
Mark Browna2bd6912011-12-29 11:10:27 +0000235static const struct snd_soc_dapm_route wm8974_dapm_routes[] = {
Mark Brown0a1bf552009-05-23 11:18:41 +0100236 /* Mono output mixer */
237 {"Mono Mixer", "PCM Playback Switch", "DAC"},
238 {"Mono Mixer", "Aux Playback Switch", "Aux Input"},
239 {"Mono Mixer", "Line Bypass Switch", "Boost Mixer"},
240
241 /* Speaker output mixer */
242 {"Speaker Mixer", "PCM Playback Switch", "DAC"},
243 {"Speaker Mixer", "Aux Playback Switch", "Aux Input"},
244 {"Speaker Mixer", "Line Bypass Switch", "Boost Mixer"},
245
246 /* Outputs */
247 {"Mono Out", NULL, "Mono Mixer"},
248 {"MONOOUT", NULL, "Mono Out"},
249 {"SpkN Out", NULL, "Speaker Mixer"},
250 {"SpkP Out", NULL, "Speaker Mixer"},
251 {"SPKOUTN", NULL, "SpkN Out"},
252 {"SPKOUTP", NULL, "SpkP Out"},
253
254 /* Boost Mixer */
Mark Brown8a123ee2009-06-30 21:10:34 +0100255 {"ADC", NULL, "Boost Mixer"},
256 {"Boost Mixer", "Aux Switch", "Aux Input"},
257 {"Boost Mixer", NULL, "Input PGA"},
258 {"Boost Mixer", NULL, "MICP"},
259
260 /* Input PGA */
261 {"Input PGA", "Aux Switch", "Aux Input"},
262 {"Input PGA", "MicN Switch", "MICN"},
263 {"Input PGA", "MicP Switch", "MICP"},
Mark Brown0a1bf552009-05-23 11:18:41 +0100264
265 /* Inputs */
Mark Brown8a123ee2009-06-30 21:10:34 +0100266 {"Aux Input", NULL, "AUX"},
Mark Brown0a1bf552009-05-23 11:18:41 +0100267};
268
Mark Brown0a1bf552009-05-23 11:18:41 +0100269struct pll_ {
Mark Brownc36b2fc2009-09-30 14:31:38 +0100270 unsigned int pre_div:1;
Mark Brown0a1bf552009-05-23 11:18:41 +0100271 unsigned int n:4;
272 unsigned int k;
273};
274
Mark Brown91d0c3e2009-06-30 19:02:32 +0100275/* The size in bits of the pll divide multiplied by 10
276 * to allow rounding later */
277#define FIXED_PLL_SIZE ((1 << 24) * 10)
278
Mark Brownc36b2fc2009-09-30 14:31:38 +0100279static void pll_factors(struct pll_ *pll_div,
280 unsigned int target, unsigned int source)
Mark Brown91d0c3e2009-06-30 19:02:32 +0100281{
282 unsigned long long Kpart;
283 unsigned int K, Ndiv, Nmod;
284
Mark Brownc36b2fc2009-09-30 14:31:38 +0100285 /* There is a fixed divide by 4 in the output path */
286 target *= 4;
287
Mark Brown91d0c3e2009-06-30 19:02:32 +0100288 Ndiv = target / source;
289 if (Ndiv < 6) {
Mark Brownc36b2fc2009-09-30 14:31:38 +0100290 source /= 2;
291 pll_div->pre_div = 1;
Mark Brown91d0c3e2009-06-30 19:02:32 +0100292 Ndiv = target / source;
293 } else
Mark Brownc36b2fc2009-09-30 14:31:38 +0100294 pll_div->pre_div = 0;
Mark Brown91d0c3e2009-06-30 19:02:32 +0100295
296 if ((Ndiv < 6) || (Ndiv > 12))
297 printk(KERN_WARNING
Mark Brown8b83a192009-06-30 19:37:02 +0100298 "WM8974 N value %u outwith recommended range!\n",
Mark Brown91d0c3e2009-06-30 19:02:32 +0100299 Ndiv);
300
Mark Brownc36b2fc2009-09-30 14:31:38 +0100301 pll_div->n = Ndiv;
Mark Brown91d0c3e2009-06-30 19:02:32 +0100302 Nmod = target % source;
303 Kpart = FIXED_PLL_SIZE * (long long)Nmod;
304
305 do_div(Kpart, source);
306
307 K = Kpart & 0xFFFFFFFF;
308
309 /* Check if we need to round */
310 if ((K % 10) >= 5)
311 K += 5;
312
313 /* Move down to proper range now rounding is done */
314 K /= 10;
315
Mark Brownc36b2fc2009-09-30 14:31:38 +0100316 pll_div->k = K;
Mark Brown91d0c3e2009-06-30 19:02:32 +0100317}
Mark Brown0a1bf552009-05-23 11:18:41 +0100318
Mark Brown85488032009-09-05 18:52:16 +0100319static int wm8974_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id,
320 int source, unsigned int freq_in, unsigned int freq_out)
Mark Brown0a1bf552009-05-23 11:18:41 +0100321{
322 struct snd_soc_codec *codec = codec_dai->codec;
Mark Brownc36b2fc2009-09-30 14:31:38 +0100323 struct pll_ pll_div;
Mark Brown0a1bf552009-05-23 11:18:41 +0100324 u16 reg;
325
Mark Brown1a55b3f2009-05-23 11:31:40 +0100326 if (freq_in == 0 || freq_out == 0) {
Mark Brown91d0c3e2009-06-30 19:02:32 +0100327 /* Clock CODEC directly from MCLK */
Mark Brown1e97f502009-08-15 12:15:10 +0100328 reg = snd_soc_read(codec, WM8974_CLOCK);
329 snd_soc_write(codec, WM8974_CLOCK, reg & 0x0ff);
Mark Brown91d0c3e2009-06-30 19:02:32 +0100330
331 /* Turn off PLL */
Mark Brown1e97f502009-08-15 12:15:10 +0100332 reg = snd_soc_read(codec, WM8974_POWER1);
333 snd_soc_write(codec, WM8974_POWER1, reg & 0x1df);
Mark Brown0a1bf552009-05-23 11:18:41 +0100334 return 0;
335 }
336
Mark Brownc36b2fc2009-09-30 14:31:38 +0100337 pll_factors(&pll_div, freq_out, freq_in);
Mark Brown1a55b3f2009-05-23 11:31:40 +0100338
Mark Brown1e97f502009-08-15 12:15:10 +0100339 snd_soc_write(codec, WM8974_PLLN, (pll_div.pre_div << 4) | pll_div.n);
340 snd_soc_write(codec, WM8974_PLLK1, pll_div.k >> 18);
341 snd_soc_write(codec, WM8974_PLLK2, (pll_div.k >> 9) & 0x1ff);
342 snd_soc_write(codec, WM8974_PLLK3, pll_div.k & 0x1ff);
343 reg = snd_soc_read(codec, WM8974_POWER1);
344 snd_soc_write(codec, WM8974_POWER1, reg | 0x020);
Mark Brown91d0c3e2009-06-30 19:02:32 +0100345
346 /* Run CODEC from PLL instead of MCLK */
Mark Brown1e97f502009-08-15 12:15:10 +0100347 reg = snd_soc_read(codec, WM8974_CLOCK);
348 snd_soc_write(codec, WM8974_CLOCK, reg | 0x100);
Mark Brown91d0c3e2009-06-30 19:02:32 +0100349
350 return 0;
Mark Brown0a1bf552009-05-23 11:18:41 +0100351}
352
353/*
354 * Configure WM8974 clock dividers.
355 */
356static int wm8974_set_dai_clkdiv(struct snd_soc_dai *codec_dai,
357 int div_id, int div)
358{
359 struct snd_soc_codec *codec = codec_dai->codec;
360 u16 reg;
361
362 switch (div_id) {
363 case WM8974_OPCLKDIV:
Mark Brown1e97f502009-08-15 12:15:10 +0100364 reg = snd_soc_read(codec, WM8974_GPIO) & 0x1cf;
365 snd_soc_write(codec, WM8974_GPIO, reg | div);
Mark Brown0a1bf552009-05-23 11:18:41 +0100366 break;
367 case WM8974_MCLKDIV:
Mark Brown1e97f502009-08-15 12:15:10 +0100368 reg = snd_soc_read(codec, WM8974_CLOCK) & 0x11f;
369 snd_soc_write(codec, WM8974_CLOCK, reg | div);
Mark Brown0a1bf552009-05-23 11:18:41 +0100370 break;
Mark Brown0a1bf552009-05-23 11:18:41 +0100371 case WM8974_BCLKDIV:
Mark Brown1e97f502009-08-15 12:15:10 +0100372 reg = snd_soc_read(codec, WM8974_CLOCK) & 0x1e3;
373 snd_soc_write(codec, WM8974_CLOCK, reg | div);
Mark Brown0a1bf552009-05-23 11:18:41 +0100374 break;
375 default:
376 return -EINVAL;
377 }
378
379 return 0;
380}
381
382static int wm8974_set_dai_fmt(struct snd_soc_dai *codec_dai,
383 unsigned int fmt)
384{
385 struct snd_soc_codec *codec = codec_dai->codec;
386 u16 iface = 0;
Mark Brown1e97f502009-08-15 12:15:10 +0100387 u16 clk = snd_soc_read(codec, WM8974_CLOCK) & 0x1fe;
Mark Brown0a1bf552009-05-23 11:18:41 +0100388
389 /* set master/slave audio interface */
390 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
391 case SND_SOC_DAIFMT_CBM_CFM:
392 clk |= 0x0001;
393 break;
394 case SND_SOC_DAIFMT_CBS_CFS:
395 break;
396 default:
397 return -EINVAL;
398 }
399
400 /* interface format */
401 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
402 case SND_SOC_DAIFMT_I2S:
403 iface |= 0x0010;
404 break;
405 case SND_SOC_DAIFMT_RIGHT_J:
406 break;
407 case SND_SOC_DAIFMT_LEFT_J:
408 iface |= 0x0008;
409 break;
410 case SND_SOC_DAIFMT_DSP_A:
411 iface |= 0x00018;
412 break;
413 default:
414 return -EINVAL;
415 }
416
417 /* clock inversion */
418 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
419 case SND_SOC_DAIFMT_NB_NF:
420 break;
421 case SND_SOC_DAIFMT_IB_IF:
422 iface |= 0x0180;
423 break;
424 case SND_SOC_DAIFMT_IB_NF:
425 iface |= 0x0100;
426 break;
427 case SND_SOC_DAIFMT_NB_IF:
428 iface |= 0x0080;
429 break;
430 default:
431 return -EINVAL;
432 }
433
Mark Brown1e97f502009-08-15 12:15:10 +0100434 snd_soc_write(codec, WM8974_IFACE, iface);
435 snd_soc_write(codec, WM8974_CLOCK, clk);
Mark Brown0a1bf552009-05-23 11:18:41 +0100436 return 0;
437}
438
439static int wm8974_pcm_hw_params(struct snd_pcm_substream *substream,
440 struct snd_pcm_hw_params *params,
441 struct snd_soc_dai *dai)
442{
443 struct snd_soc_codec *codec = dai->codec;
Mark Brown1e97f502009-08-15 12:15:10 +0100444 u16 iface = snd_soc_read(codec, WM8974_IFACE) & 0x19f;
445 u16 adn = snd_soc_read(codec, WM8974_ADD) & 0x1f1;
Mark Brown0a1bf552009-05-23 11:18:41 +0100446
447 /* bit size */
448 switch (params_format(params)) {
449 case SNDRV_PCM_FORMAT_S16_LE:
450 break;
451 case SNDRV_PCM_FORMAT_S20_3LE:
452 iface |= 0x0020;
453 break;
454 case SNDRV_PCM_FORMAT_S24_LE:
455 iface |= 0x0040;
456 break;
457 case SNDRV_PCM_FORMAT_S32_LE:
458 iface |= 0x0060;
459 break;
460 }
461
462 /* filter coefficient */
463 switch (params_rate(params)) {
Guennadi Liakhovetskib3172f22009-12-24 01:13:51 +0100464 case 8000:
Mark Brown0a1bf552009-05-23 11:18:41 +0100465 adn |= 0x5 << 1;
466 break;
Guennadi Liakhovetskib3172f22009-12-24 01:13:51 +0100467 case 11025:
Mark Brown0a1bf552009-05-23 11:18:41 +0100468 adn |= 0x4 << 1;
469 break;
Guennadi Liakhovetskib3172f22009-12-24 01:13:51 +0100470 case 16000:
Mark Brown0a1bf552009-05-23 11:18:41 +0100471 adn |= 0x3 << 1;
472 break;
Guennadi Liakhovetskib3172f22009-12-24 01:13:51 +0100473 case 22050:
Mark Brown0a1bf552009-05-23 11:18:41 +0100474 adn |= 0x2 << 1;
475 break;
Guennadi Liakhovetskib3172f22009-12-24 01:13:51 +0100476 case 32000:
Mark Brown0a1bf552009-05-23 11:18:41 +0100477 adn |= 0x1 << 1;
478 break;
Guennadi Liakhovetskib3172f22009-12-24 01:13:51 +0100479 case 44100:
480 case 48000:
Mark Brown0a1bf552009-05-23 11:18:41 +0100481 break;
482 }
483
Mark Brown1e97f502009-08-15 12:15:10 +0100484 snd_soc_write(codec, WM8974_IFACE, iface);
485 snd_soc_write(codec, WM8974_ADD, adn);
Mark Brown0a1bf552009-05-23 11:18:41 +0100486 return 0;
487}
488
489static int wm8974_mute(struct snd_soc_dai *dai, int mute)
490{
491 struct snd_soc_codec *codec = dai->codec;
Mark Brown1e97f502009-08-15 12:15:10 +0100492 u16 mute_reg = snd_soc_read(codec, WM8974_DAC) & 0xffbf;
Mark Brown0a1bf552009-05-23 11:18:41 +0100493
Mark Brown1a55b3f2009-05-23 11:31:40 +0100494 if (mute)
Mark Brown1e97f502009-08-15 12:15:10 +0100495 snd_soc_write(codec, WM8974_DAC, mute_reg | 0x40);
Mark Brown0a1bf552009-05-23 11:18:41 +0100496 else
Mark Brown1e97f502009-08-15 12:15:10 +0100497 snd_soc_write(codec, WM8974_DAC, mute_reg);
Mark Brown0a1bf552009-05-23 11:18:41 +0100498 return 0;
499}
500
501/* liam need to make this lower power with dapm */
502static int wm8974_set_bias_level(struct snd_soc_codec *codec,
503 enum snd_soc_bias_level level)
504{
Mark Brown1e97f502009-08-15 12:15:10 +0100505 u16 power1 = snd_soc_read(codec, WM8974_POWER1) & ~0x3;
Mark Browndf1ef7a2009-06-30 19:01:09 +0100506
Mark Brown0a1bf552009-05-23 11:18:41 +0100507 switch (level) {
508 case SND_SOC_BIAS_ON:
Mark Brown0a1bf552009-05-23 11:18:41 +0100509 case SND_SOC_BIAS_PREPARE:
Mark Browndf1ef7a2009-06-30 19:01:09 +0100510 power1 |= 0x1; /* VMID 50k */
Mark Brown1e97f502009-08-15 12:15:10 +0100511 snd_soc_write(codec, WM8974_POWER1, power1);
Mark Brown0a1bf552009-05-23 11:18:41 +0100512 break;
Mark Browndf1ef7a2009-06-30 19:01:09 +0100513
Mark Brown0a1bf552009-05-23 11:18:41 +0100514 case SND_SOC_BIAS_STANDBY:
Mark Browndf1ef7a2009-06-30 19:01:09 +0100515 power1 |= WM8974_POWER1_BIASEN | WM8974_POWER1_BUFIOEN;
516
Liam Girdwoodce6120c2010-11-05 15:53:46 +0200517 if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) {
Mark Browne40e0b52013-11-08 14:01:39 +0000518 regcache_sync(dev_get_regmap(codec->dev, NULL));
Axel Lin0bad3d82011-10-07 21:52:42 +0800519
Mark Browndf1ef7a2009-06-30 19:01:09 +0100520 /* Initial cap charge at VMID 5k */
Mark Brown1e97f502009-08-15 12:15:10 +0100521 snd_soc_write(codec, WM8974_POWER1, power1 | 0x3);
Mark Browndf1ef7a2009-06-30 19:01:09 +0100522 mdelay(100);
523 }
524
525 power1 |= 0x2; /* VMID 500k */
Mark Brown1e97f502009-08-15 12:15:10 +0100526 snd_soc_write(codec, WM8974_POWER1, power1);
Mark Brown0a1bf552009-05-23 11:18:41 +0100527 break;
Mark Browndf1ef7a2009-06-30 19:01:09 +0100528
Mark Brown0a1bf552009-05-23 11:18:41 +0100529 case SND_SOC_BIAS_OFF:
Mark Brown1e97f502009-08-15 12:15:10 +0100530 snd_soc_write(codec, WM8974_POWER1, 0);
531 snd_soc_write(codec, WM8974_POWER2, 0);
532 snd_soc_write(codec, WM8974_POWER3, 0);
Mark Brown0a1bf552009-05-23 11:18:41 +0100533 break;
534 }
Mark Browndf1ef7a2009-06-30 19:01:09 +0100535
Liam Girdwoodce6120c2010-11-05 15:53:46 +0200536 codec->dapm.bias_level = level;
Mark Brown0a1bf552009-05-23 11:18:41 +0100537 return 0;
538}
539
Mark Brown1a55b3f2009-05-23 11:31:40 +0100540#define WM8974_RATES (SNDRV_PCM_RATE_8000_48000)
Mark Brown0a1bf552009-05-23 11:18:41 +0100541
542#define WM8974_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
543 SNDRV_PCM_FMTBIT_S24_LE)
544
Lars-Peter Clausen85e76522011-11-23 11:40:40 +0100545static const struct snd_soc_dai_ops wm8974_ops = {
Mark Brown0a1bf552009-05-23 11:18:41 +0100546 .hw_params = wm8974_pcm_hw_params,
547 .digital_mute = wm8974_mute,
548 .set_fmt = wm8974_set_dai_fmt,
549 .set_clkdiv = wm8974_set_dai_clkdiv,
550 .set_pll = wm8974_set_dai_pll,
551};
552
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000553static struct snd_soc_dai_driver wm8974_dai = {
554 .name = "wm8974-hifi",
Mark Brown0a1bf552009-05-23 11:18:41 +0100555 .playback = {
556 .stream_name = "Playback",
557 .channels_min = 1,
Mark Brown33d81af2009-06-30 19:01:52 +0100558 .channels_max = 2, /* Only 1 channel of data */
Mark Brown0a1bf552009-05-23 11:18:41 +0100559 .rates = WM8974_RATES,
560 .formats = WM8974_FORMATS,},
561 .capture = {
562 .stream_name = "Capture",
563 .channels_min = 1,
Mark Brown33d81af2009-06-30 19:01:52 +0100564 .channels_max = 2, /* Only 1 channel of data */
Mark Brown0a1bf552009-05-23 11:18:41 +0100565 .rates = WM8974_RATES,
566 .formats = WM8974_FORMATS,},
567 .ops = &wm8974_ops,
Mark Browncb11d392009-06-30 19:36:39 +0100568 .symmetric_rates = 1,
Mark Brown0a1bf552009-05-23 11:18:41 +0100569};
Mark Brown0a1bf552009-05-23 11:18:41 +0100570
Lars-Peter Clausen84b315e2011-12-02 10:18:28 +0100571static int wm8974_suspend(struct snd_soc_codec *codec)
Mark Brown0a1bf552009-05-23 11:18:41 +0100572{
Mark Brown0a1bf552009-05-23 11:18:41 +0100573 wm8974_set_bias_level(codec, SND_SOC_BIAS_OFF);
574 return 0;
575}
576
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000577static int wm8974_resume(struct snd_soc_codec *codec)
Mark Brown0a1bf552009-05-23 11:18:41 +0100578{
Mark Brown0a1bf552009-05-23 11:18:41 +0100579 wm8974_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
Mark Brown0a1bf552009-05-23 11:18:41 +0100580 return 0;
581}
582
Mark Browne40e0b52013-11-08 14:01:39 +0000583static const struct regmap_config wm8974_regmap = {
584 .reg_bits = 7,
585 .val_bits = 9,
586
587 .max_register = WM8974_MONOMIX,
588 .reg_defaults = wm8974_reg_defaults,
589 .num_reg_defaults = ARRAY_SIZE(wm8974_reg_defaults),
590};
591
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000592static int wm8974_probe(struct snd_soc_codec *codec)
Mark Brown0a1bf552009-05-23 11:18:41 +0100593{
Mark Brown0a1bf552009-05-23 11:18:41 +0100594 int ret = 0;
595
Mark Browne40e0b52013-11-08 14:01:39 +0000596 ret = snd_soc_codec_set_cache_io(codec, 7, 9, SND_SOC_REGMAP);
Mark Brown1a55b3f2009-05-23 11:31:40 +0100597 if (ret < 0) {
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000598 dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
599 return ret;
Mark Brown0a1bf552009-05-23 11:18:41 +0100600 }
601
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000602 ret = wm8974_reset(codec);
603 if (ret < 0) {
604 dev_err(codec->dev, "Failed to issue reset\n");
605 return ret;
606 }
607
608 wm8974_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
Mark Brown4fcbbb62009-05-23 12:27:03 +0100609
Mark Brown0a1bf552009-05-23 11:18:41 +0100610 return ret;
Mark Brown0a1bf552009-05-23 11:18:41 +0100611}
612
613/* power down chip */
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000614static int wm8974_remove(struct snd_soc_codec *codec)
Mark Brown0a1bf552009-05-23 11:18:41 +0100615{
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000616 wm8974_set_bias_level(codec, SND_SOC_BIAS_OFF);
Mark Brown0a1bf552009-05-23 11:18:41 +0100617 return 0;
618}
619
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000620static struct snd_soc_codec_driver soc_codec_dev_wm8974 = {
Mark Brown0a1bf552009-05-23 11:18:41 +0100621 .probe = wm8974_probe,
622 .remove = wm8974_remove,
623 .suspend = wm8974_suspend,
624 .resume = wm8974_resume,
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000625 .set_bias_level = wm8974_set_bias_level,
Mark Browna2bd6912011-12-29 11:10:27 +0000626
627 .controls = wm8974_snd_controls,
628 .num_controls = ARRAY_SIZE(wm8974_snd_controls),
629 .dapm_widgets = wm8974_dapm_widgets,
630 .num_dapm_widgets = ARRAY_SIZE(wm8974_dapm_widgets),
631 .dapm_routes = wm8974_dapm_routes,
632 .num_dapm_routes = ARRAY_SIZE(wm8974_dapm_routes),
Mark Brown0a1bf552009-05-23 11:18:41 +0100633};
Mark Brown0a1bf552009-05-23 11:18:41 +0100634
Bill Pemberton7a79e942012-12-07 09:26:37 -0500635static int wm8974_i2c_probe(struct i2c_client *i2c,
636 const struct i2c_device_id *id)
Mark Brown4fcbbb62009-05-23 12:27:03 +0100637{
Mark Browne40e0b52013-11-08 14:01:39 +0000638 struct regmap *regmap;
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000639 int ret;
Mark Brown4fcbbb62009-05-23 12:27:03 +0100640
Mark Browne40e0b52013-11-08 14:01:39 +0000641 regmap = devm_regmap_init_i2c(i2c, &wm8974_regmap);
642 if (IS_ERR(regmap))
643 return PTR_ERR(regmap);
644
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000645 ret = snd_soc_register_codec(&i2c->dev,
646 &soc_codec_dev_wm8974, &wm8974_dai, 1);
Mark Brownc2562a82011-12-29 11:11:25 +0000647
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000648 return ret;
Mark Brown4fcbbb62009-05-23 12:27:03 +0100649}
650
Bill Pemberton7a79e942012-12-07 09:26:37 -0500651static int wm8974_i2c_remove(struct i2c_client *client)
Mark Brown4fcbbb62009-05-23 12:27:03 +0100652{
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000653 snd_soc_unregister_codec(&client->dev);
Mark Brownc2562a82011-12-29 11:11:25 +0000654
Mark Brown4fcbbb62009-05-23 12:27:03 +0100655 return 0;
656}
657
658static const struct i2c_device_id wm8974_i2c_id[] = {
659 { "wm8974", 0 },
660 { }
661};
662MODULE_DEVICE_TABLE(i2c, wm8974_i2c_id);
663
664static struct i2c_driver wm8974_i2c_driver = {
665 .driver = {
Mark Brown091edcc2011-12-02 22:08:49 +0000666 .name = "wm8974",
Mark Brown4fcbbb62009-05-23 12:27:03 +0100667 .owner = THIS_MODULE,
668 },
669 .probe = wm8974_i2c_probe,
Bill Pemberton7a79e942012-12-07 09:26:37 -0500670 .remove = wm8974_i2c_remove,
Mark Brown4fcbbb62009-05-23 12:27:03 +0100671 .id_table = wm8974_i2c_id,
672};
673
Sachin Kamat2be59412012-08-06 17:25:59 +0530674module_i2c_driver(wm8974_i2c_driver);
Mark Brown0a1bf552009-05-23 11:18:41 +0100675
676MODULE_DESCRIPTION("ASoC WM8974 driver");
677MODULE_AUTHOR("Liam Girdwood");
678MODULE_LICENSE("GPL");