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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/* $Id: etraxgpio.h,v 1.8 2002/06/17 15:53:07 johana Exp $ */
2/*
3 * The following devices are accessable using this driver using
4 * GPIO_MAJOR (120) and a couple of minor numbers:
5 * For ETRAX 100LX (ARCH_V10):
6 * /dev/gpioa minor 0, 8 bit GPIO, each bit can change direction
7 * /dev/gpiob minor 1, 8 bit GPIO, each bit can change direction
8 * /dev/leds minor 2, Access to leds depending on kernelconfig
9 * /dev/gpiog minor 3
10 g0dir, g8_15dir, g16_23dir, g24 dir configurable in R_GEN_CONFIG
11 g1-g7 and g25-g31 is both input and outputs but on different pins
12 Also note that some bits change pins depending on what interfaces
13 are enabled.
14 *
15 *
Mikael Starvikcb09f542005-07-27 11:44:27 -070016 * For ETRAX FS (ARCH_V32):
Linus Torvalds1da177e2005-04-16 15:20:36 -070017 * /dev/gpioa minor 0, 8 bit GPIO, each bit can change direction
18 * /dev/gpiob minor 1, 18 bit GPIO, each bit can change direction
19 * /dev/gpioc minor 2, 18 bit GPIO, each bit can change direction
20 * /dev/gpiod minor 3, 18 bit GPIO, each bit can change direction
21 * /dev/gpioe minor 4, 18 bit GPIO, each bit can change direction
22 * /dev/leds minor 5, Access to leds depending on kernelconfig
23 *
24 */
25#ifndef _ASM_ETRAXGPIO_H
26#define _ASM_ETRAXGPIO_H
27
28#include <linux/config.h>
29/* etraxgpio _IOC_TYPE, bits 8 to 15 in ioctl cmd */
30#ifdef CONFIG_ETRAX_ARCH_V10
31#define ETRAXGPIO_IOCTYPE 43
32#define GPIO_MINOR_A 0
33#define GPIO_MINOR_B 1
34#define GPIO_MINOR_LEDS 2
35#define GPIO_MINOR_G 3
36#define GPIO_MINOR_LAST 3
37#endif
38#ifdef CONFIG_ETRAX_ARCH_V32
39#define ETRAXGPIO_IOCTYPE 43
40#define GPIO_MINOR_A 0
41#define GPIO_MINOR_B 1
Mikael Starvikcb09f542005-07-27 11:44:27 -070042#define GPIO_MINOR_LEDS 2
43#define GPIO_MINOR_C 3
44#define GPIO_MINOR_D 4
45#define GPIO_MINOR_E 5
Linus Torvalds1da177e2005-04-16 15:20:36 -070046#define GPIO_MINOR_LAST 5
47#endif
48
49/* supported ioctl _IOC_NR's */
50
51#define IO_READBITS 0x1 /* read and return current port bits (obsolete) */
52#define IO_SETBITS 0x2 /* set the bits marked by 1 in the argument */
53#define IO_CLRBITS 0x3 /* clear the bits marked by 1 in the argument */
54
55/* the alarm is waited for by select() */
56
57#define IO_HIGHALARM 0x4 /* set alarm on high for bits marked by 1 */
58#define IO_LOWALARM 0x5 /* set alarm on low for bits marked by 1 */
59#define IO_CLRALARM 0x6 /* clear alarm for bits marked by 1 */
60
61/* LED ioctl */
62#define IO_LEDACTIVE_SET 0x7 /* set active led
63 * 0=off, 1=green, 2=red, 3=yellow */
64
65/* GPIO direction ioctl's */
66#define IO_READDIR 0x8 /* Read direction 0=input 1=output (obsolete) */
67#define IO_SETINPUT 0x9 /* Set direction for bits set, 0=unchanged 1=input,
68 returns mask with current inputs (obsolete) */
69#define IO_SETOUTPUT 0xA /* Set direction for bits set, 0=unchanged 1=output,
70 returns mask with current outputs (obsolete)*/
71
72/* LED ioctl extended */
73#define IO_LED_SETBIT 0xB
74#define IO_LED_CLRBIT 0xC
75
76/* SHUTDOWN ioctl */
77#define IO_SHUTDOWN 0xD
78#define IO_GET_PWR_BT 0xE
79
80/* Bit toggling in driver settings */
81/* bit set in low byte0 is CLK mask (0x00FF),
82 bit set in byte1 is DATA mask (0xFF00)
83 msb, data_mask[7:0] , clk_mask[7:0]
84 */
85#define IO_CFG_WRITE_MODE 0xF
86#define IO_CFG_WRITE_MODE_VALUE(msb, data_mask, clk_mask) \
87 ( (((msb)&1) << 16) | (((data_mask) &0xFF) << 8) | ((clk_mask) & 0xFF) )
88
89/* The following 4 ioctl's take a pointer as argument and handles
90 * 32 bit ports (port G) properly.
91 * These replaces IO_READBITS,IO_SETINPUT AND IO_SETOUTPUT
92 */
93#define IO_READ_INBITS 0x10 /* *arg is result of reading the input pins */
94#define IO_READ_OUTBITS 0x11 /* *arg is result of reading the output shadow */
95#define IO_SETGET_INPUT 0x12 /* bits set in *arg is set to input,
96 * *arg updated with current input pins.
97 */
98#define IO_SETGET_OUTPUT 0x13 /* bits set in *arg is set to output,
99 * *arg updated with current output pins.
100 */
101
102
103
104#endif