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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/* natsemi.c: A Linux PCI Ethernet driver for the NatSemi DP8381x series. */
2/*
3 Written/copyright 1999-2001 by Donald Becker.
4 Portions copyright (c) 2001,2002 Sun Microsystems (thockin@sun.com)
5 Portions copyright 2001,2002 Manfred Spraul (manfred@colorfullife.com)
Mark Brownb27a16b2006-02-02 00:00:01 +00006 Portions copyright 2004 Harald Welte <laforge@gnumonks.org>
Linus Torvalds1da177e2005-04-16 15:20:36 -07007
8 This software may be used and distributed according to the terms of
9 the GNU General Public License (GPL), incorporated herein by reference.
10 Drivers based on or derived from this code fall under the GPL and must
11 retain the authorship, copyright and license notice. This file is not
12 a complete program and may only be used when the entire operating
13 system is licensed under the GPL. License for under other terms may be
14 available. Contact the original author for details.
15
16 The original author may be reached as becker@scyld.com, or at
17 Scyld Computing Corporation
18 410 Severn Ave., Suite 210
19 Annapolis MD 21403
20
21 Support information and updates available at
22 http://www.scyld.com/network/netsemi.html
Jeff Garzik03a8c662006-06-27 07:57:22 -040023 [link no longer provides useful info -jgarzik]
Linus Torvalds1da177e2005-04-16 15:20:36 -070024
25
Linus Torvalds1da177e2005-04-16 15:20:36 -070026 TODO:
27 * big endian support with CFG:BEM instead of cpu_to_le32
Linus Torvalds1da177e2005-04-16 15:20:36 -070028*/
29
Linus Torvalds1da177e2005-04-16 15:20:36 -070030#include <linux/module.h>
31#include <linux/kernel.h>
32#include <linux/string.h>
33#include <linux/timer.h>
34#include <linux/errno.h>
35#include <linux/ioport.h>
36#include <linux/slab.h>
37#include <linux/interrupt.h>
38#include <linux/pci.h>
39#include <linux/netdevice.h>
40#include <linux/etherdevice.h>
41#include <linux/skbuff.h>
42#include <linux/init.h>
43#include <linux/spinlock.h>
44#include <linux/ethtool.h>
45#include <linux/delay.h>
46#include <linux/rtnetlink.h>
47#include <linux/mii.h>
48#include <linux/crc32.h>
49#include <linux/bitops.h>
Mark Brownb27a16b2006-02-02 00:00:01 +000050#include <linux/prefetch.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070051#include <asm/processor.h> /* Processor type for cache alignment. */
52#include <asm/io.h>
53#include <asm/irq.h>
54#include <asm/uaccess.h>
55
56#define DRV_NAME "natsemi"
Andy Gospodarekd5b20692006-09-11 17:39:18 -040057#define DRV_VERSION "2.1"
58#define DRV_RELDATE "Sept 11, 2006"
Linus Torvalds1da177e2005-04-16 15:20:36 -070059
60#define RX_OFFSET 2
61
62/* Updated to recommendations in pci-skeleton v2.03. */
63
64/* The user-configurable values.
65 These may be modified when a driver module is loaded.*/
66
67#define NATSEMI_DEF_MSG (NETIF_MSG_DRV | \
68 NETIF_MSG_LINK | \
69 NETIF_MSG_WOL | \
70 NETIF_MSG_RX_ERR | \
71 NETIF_MSG_TX_ERR)
72static int debug = -1;
73
Linus Torvalds1da177e2005-04-16 15:20:36 -070074static int mtu;
75
76/* Maximum number of multicast addresses to filter (vs. rx-all-multicast).
77 This chip uses a 512 element hash table based on the Ethernet CRC. */
Arjan van de Venf71e1302006-03-03 21:33:57 -050078static const int multicast_filter_limit = 100;
Linus Torvalds1da177e2005-04-16 15:20:36 -070079
80/* Set the copy breakpoint for the copy-only-tiny-frames scheme.
81 Setting to > 1518 effectively disables this feature. */
82static int rx_copybreak;
83
Mark Brown1a147802007-05-03 10:36:56 +010084static int dspcfg_workaround = 1;
85
Linus Torvalds1da177e2005-04-16 15:20:36 -070086/* Used to pass the media type, etc.
87 Both 'options[]' and 'full_duplex[]' should exist for driver
88 interoperability.
89 The media type is usually passed in 'options[]'.
90*/
91#define MAX_UNITS 8 /* More are supported, limit only on options */
92static int options[MAX_UNITS];
93static int full_duplex[MAX_UNITS];
94
95/* Operational parameters that are set at compile time. */
96
97/* Keep the ring sizes a power of two for compile efficiency.
98 The compiler will convert <unsigned>'%'<2^N> into a bit mask.
99 Making the Tx ring too large decreases the effectiveness of channel
100 bonding and packet priority.
101 There are no ill effects from too-large receive rings. */
102#define TX_RING_SIZE 16
103#define TX_QUEUE_LEN 10 /* Limit ring entries actually used, min 4. */
104#define RX_RING_SIZE 32
105
106/* Operational parameters that usually are not changed. */
107/* Time in jiffies before concluding the transmitter is hung. */
108#define TX_TIMEOUT (2*HZ)
109
110#define NATSEMI_HW_TIMEOUT 400
Mark Brownf2cade12007-10-09 22:57:39 +0100111#define NATSEMI_TIMER_FREQ 5*HZ
Linus Torvalds1da177e2005-04-16 15:20:36 -0700112#define NATSEMI_PG0_NREGS 64
113#define NATSEMI_RFDR_NREGS 8
114#define NATSEMI_PG1_NREGS 4
115#define NATSEMI_NREGS (NATSEMI_PG0_NREGS + NATSEMI_RFDR_NREGS + \
116 NATSEMI_PG1_NREGS)
117#define NATSEMI_REGS_VER 1 /* v1 added RFDR registers */
118#define NATSEMI_REGS_SIZE (NATSEMI_NREGS * sizeof(u32))
Linus Torvalds1da177e2005-04-16 15:20:36 -0700119
120/* Buffer sizes:
121 * The nic writes 32-bit values, even if the upper bytes of
122 * a 32-bit value are beyond the end of the buffer.
123 */
124#define NATSEMI_HEADERS 22 /* 2*mac,type,vlan,crc */
125#define NATSEMI_PADDING 16 /* 2 bytes should be sufficient */
126#define NATSEMI_LONGPKT 1518 /* limit for normal packets */
127#define NATSEMI_RX_LIMIT 2046 /* maximum supported by hardware */
128
129/* These identify the driver base version and may not be removed. */
Randy Dunlape19360f2006-04-10 23:22:06 -0700130static const char version[] __devinitdata =
Linus Torvalds1da177e2005-04-16 15:20:36 -0700131 KERN_INFO DRV_NAME " dp8381x driver, version "
132 DRV_VERSION ", " DRV_RELDATE "\n"
133 KERN_INFO " originally by Donald Becker <becker@scyld.com>\n"
Linus Torvalds1da177e2005-04-16 15:20:36 -0700134 KERN_INFO " 2.4.x kernel port by Jeff Garzik, Tjeerd Mulder\n";
135
136MODULE_AUTHOR("Donald Becker <becker@scyld.com>");
137MODULE_DESCRIPTION("National Semiconductor DP8381x series PCI Ethernet driver");
138MODULE_LICENSE("GPL");
139
Linus Torvalds1da177e2005-04-16 15:20:36 -0700140module_param(mtu, int, 0);
141module_param(debug, int, 0);
142module_param(rx_copybreak, int, 0);
Mark Brown1a147802007-05-03 10:36:56 +0100143module_param(dspcfg_workaround, int, 1);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700144module_param_array(options, int, NULL, 0);
145module_param_array(full_duplex, int, NULL, 0);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700146MODULE_PARM_DESC(mtu, "DP8381x MTU (all boards)");
147MODULE_PARM_DESC(debug, "DP8381x default debug level");
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400148MODULE_PARM_DESC(rx_copybreak,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700149 "DP8381x copy breakpoint for copy-only-tiny-frames");
Mark Brown1a147802007-05-03 10:36:56 +0100150MODULE_PARM_DESC(dspcfg_workaround, "DP8381x: control DspCfg workaround");
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400151MODULE_PARM_DESC(options,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700152 "DP8381x: Bits 0-3: media type, bit 17: full duplex");
153MODULE_PARM_DESC(full_duplex, "DP8381x full duplex setting(s) (1)");
154
155/*
156 Theory of Operation
157
158I. Board Compatibility
159
160This driver is designed for National Semiconductor DP83815 PCI Ethernet NIC.
161It also works with other chips in in the DP83810 series.
162
163II. Board-specific settings
164
165This driver requires the PCI interrupt line to be valid.
166It honors the EEPROM-set values.
167
168III. Driver operation
169
170IIIa. Ring buffers
171
172This driver uses two statically allocated fixed-size descriptor lists
173formed into rings by a branch from the final descriptor to the beginning of
174the list. The ring sizes are set at compile time by RX/TX_RING_SIZE.
175The NatSemi design uses a 'next descriptor' pointer that the driver forms
176into a list.
177
178IIIb/c. Transmit/Receive Structure
179
180This driver uses a zero-copy receive and transmit scheme.
181The driver allocates full frame size skbuffs for the Rx ring buffers at
182open() time and passes the skb->data field to the chip as receive data
183buffers. When an incoming frame is less than RX_COPYBREAK bytes long,
184a fresh skbuff is allocated and the frame is copied to the new skbuff.
185When the incoming frame is larger, the skbuff is passed directly up the
186protocol stack. Buffers consumed this way are replaced by newly allocated
187skbuffs in a later phase of receives.
188
189The RX_COPYBREAK value is chosen to trade-off the memory wasted by
190using a full-sized skbuff for small frames vs. the copying costs of larger
191frames. New boards are typically used in generously configured machines
192and the underfilled buffers have negligible impact compared to the benefit of
193a single allocation size, so the default value of zero results in never
194copying packets. When copying is done, the cost is usually mitigated by using
195a combined copy/checksum routine. Copying also preloads the cache, which is
196most useful with small frames.
197
198A subtle aspect of the operation is that unaligned buffers are not permitted
199by the hardware. Thus the IP header at offset 14 in an ethernet frame isn't
200longword aligned for further processing. On copies frames are put into the
201skbuff at an offset of "+2", 16-byte aligning the IP header.
202
203IIId. Synchronization
204
205Most operations are synchronized on the np->lock irq spinlock, except the
206performance critical codepaths:
207
208The rx process only runs in the interrupt handler. Access from outside
209the interrupt handler is only permitted after disable_irq().
210
Herbert Xu932ff272006-06-09 12:20:56 -0700211The rx process usually runs under the netif_tx_lock. If np->intr_tx_reap
Linus Torvalds1da177e2005-04-16 15:20:36 -0700212is set, then access is permitted under spin_lock_irq(&np->lock).
213
214Thus configuration functions that want to access everything must call
215 disable_irq(dev->irq);
Herbert Xu932ff272006-06-09 12:20:56 -0700216 netif_tx_lock_bh(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700217 spin_lock_irq(&np->lock);
218
219IV. Notes
220
221NatSemi PCI network controllers are very uncommon.
222
223IVb. References
224
225http://www.scyld.com/expert/100mbps.html
226http://www.scyld.com/expert/NWay.html
227Datasheet is available from:
228http://www.national.com/pf/DP/DP83815.html
229
230IVc. Errata
231
232None characterised.
233*/
234
235
236
Linus Torvalds1da177e2005-04-16 15:20:36 -0700237/*
238 * Support for fibre connections on Am79C874:
239 * This phy needs a special setup when connected to a fibre cable.
240 * http://www.amd.com/files/connectivitysolutions/networking/archivednetworking/22235.pdf
241 */
242#define PHYID_AM79C874 0x0022561b
243
Jeff Garzika2b524b2006-06-26 22:48:38 -0400244enum {
245 MII_MCTRL = 0x15, /* mode control register */
246 MII_FX_SEL = 0x0001, /* 100BASE-FX (fiber) */
247 MII_EN_SCRM = 0x0004, /* enable scrambler (tp) */
248};
Linus Torvalds1da177e2005-04-16 15:20:36 -0700249
Mark Brown6aab4442007-02-19 20:15:40 +0000250enum {
251 NATSEMI_FLAG_IGNORE_PHY = 0x1,
252};
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400253
Linus Torvalds1da177e2005-04-16 15:20:36 -0700254/* array of board data directly indexed by pci_tbl[x].driver_data */
Arjan van de Venf71e1302006-03-03 21:33:57 -0500255static const struct {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700256 const char *name;
257 unsigned long flags;
Jeff Garzika2b524b2006-06-26 22:48:38 -0400258 unsigned int eeprom_size;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700259} natsemi_pci_info[] __devinitdata = {
Mark Brown6aab4442007-02-19 20:15:40 +0000260 { "Aculab E1/T1 PMXc cPCI carrier card", NATSEMI_FLAG_IGNORE_PHY, 128 },
Jeff Garzika2b524b2006-06-26 22:48:38 -0400261 { "NatSemi DP8381[56]", 0, 24 },
Linus Torvalds1da177e2005-04-16 15:20:36 -0700262};
263
Jeff Garzika2b524b2006-06-26 22:48:38 -0400264static const struct pci_device_id natsemi_pci_tbl[] __devinitdata = {
Mark Brown6aab4442007-02-19 20:15:40 +0000265 { PCI_VENDOR_ID_NS, 0x0020, 0x12d9, 0x000c, 0, 0, 0 },
Mark Brown36c843d2007-02-25 15:37:27 +0000266 { PCI_VENDOR_ID_NS, 0x0020, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1 },
Jeff Garzika2b524b2006-06-26 22:48:38 -0400267 { } /* terminate list */
Linus Torvalds1da177e2005-04-16 15:20:36 -0700268};
269MODULE_DEVICE_TABLE(pci, natsemi_pci_tbl);
270
271/* Offsets to the device registers.
272 Unlike software-only systems, device drivers interact with complex hardware.
273 It's not useful to define symbolic names for every register bit in the
274 device.
275*/
276enum register_offsets {
277 ChipCmd = 0x00,
278 ChipConfig = 0x04,
279 EECtrl = 0x08,
280 PCIBusCfg = 0x0C,
281 IntrStatus = 0x10,
282 IntrMask = 0x14,
283 IntrEnable = 0x18,
284 IntrHoldoff = 0x1C, /* DP83816 only */
285 TxRingPtr = 0x20,
286 TxConfig = 0x24,
287 RxRingPtr = 0x30,
288 RxConfig = 0x34,
289 ClkRun = 0x3C,
290 WOLCmd = 0x40,
291 PauseCmd = 0x44,
292 RxFilterAddr = 0x48,
293 RxFilterData = 0x4C,
294 BootRomAddr = 0x50,
295 BootRomData = 0x54,
296 SiliconRev = 0x58,
297 StatsCtrl = 0x5C,
298 StatsData = 0x60,
299 RxPktErrs = 0x60,
300 RxMissed = 0x68,
301 RxCRCErrs = 0x64,
302 BasicControl = 0x80,
303 BasicStatus = 0x84,
304 AnegAdv = 0x90,
305 AnegPeer = 0x94,
306 PhyStatus = 0xC0,
307 MIntrCtrl = 0xC4,
308 MIntrStatus = 0xC8,
309 PhyCtrl = 0xE4,
310
311 /* These are from the spec, around page 78... on a separate table.
312 * The meaning of these registers depend on the value of PGSEL. */
313 PGSEL = 0xCC,
314 PMDCSR = 0xE4,
315 TSTDAT = 0xFC,
316 DSPCFG = 0xF4,
317 SDCFG = 0xF8
318};
319/* the values for the 'magic' registers above (PGSEL=1) */
320#define PMDCSR_VAL 0x189c /* enable preferred adaptation circuitry */
321#define TSTDAT_VAL 0x0
322#define DSPCFG_VAL 0x5040
323#define SDCFG_VAL 0x008c /* set voltage thresholds for Signal Detect */
324#define DSPCFG_LOCK 0x20 /* coefficient lock bit in DSPCFG */
325#define DSPCFG_COEF 0x1000 /* see coefficient (in TSTDAT) bit in DSPCFG */
326#define TSTDAT_FIXED 0xe8 /* magic number for bad coefficients */
327
328/* misc PCI space registers */
329enum pci_register_offsets {
330 PCIPM = 0x44,
331};
332
333enum ChipCmd_bits {
334 ChipReset = 0x100,
335 RxReset = 0x20,
336 TxReset = 0x10,
337 RxOff = 0x08,
338 RxOn = 0x04,
339 TxOff = 0x02,
340 TxOn = 0x01,
341};
342
343enum ChipConfig_bits {
344 CfgPhyDis = 0x200,
345 CfgPhyRst = 0x400,
346 CfgExtPhy = 0x1000,
347 CfgAnegEnable = 0x2000,
348 CfgAneg100 = 0x4000,
349 CfgAnegFull = 0x8000,
350 CfgAnegDone = 0x8000000,
351 CfgFullDuplex = 0x20000000,
352 CfgSpeed100 = 0x40000000,
353 CfgLink = 0x80000000,
354};
355
356enum EECtrl_bits {
357 EE_ShiftClk = 0x04,
358 EE_DataIn = 0x01,
359 EE_ChipSelect = 0x08,
360 EE_DataOut = 0x02,
361 MII_Data = 0x10,
362 MII_Write = 0x20,
363 MII_ShiftClk = 0x40,
364};
365
366enum PCIBusCfg_bits {
367 EepromReload = 0x4,
368};
369
370/* Bits in the interrupt status/mask registers. */
371enum IntrStatus_bits {
372 IntrRxDone = 0x0001,
373 IntrRxIntr = 0x0002,
374 IntrRxErr = 0x0004,
375 IntrRxEarly = 0x0008,
376 IntrRxIdle = 0x0010,
377 IntrRxOverrun = 0x0020,
378 IntrTxDone = 0x0040,
379 IntrTxIntr = 0x0080,
380 IntrTxErr = 0x0100,
381 IntrTxIdle = 0x0200,
382 IntrTxUnderrun = 0x0400,
383 StatsMax = 0x0800,
384 SWInt = 0x1000,
385 WOLPkt = 0x2000,
386 LinkChange = 0x4000,
387 IntrHighBits = 0x8000,
388 RxStatusFIFOOver = 0x10000,
389 IntrPCIErr = 0xf00000,
390 RxResetDone = 0x1000000,
391 TxResetDone = 0x2000000,
392 IntrAbnormalSummary = 0xCD20,
393};
394
395/*
396 * Default Interrupts:
397 * Rx OK, Rx Packet Error, Rx Overrun,
398 * Tx OK, Tx Packet Error, Tx Underrun,
399 * MIB Service, Phy Interrupt, High Bits,
400 * Rx Status FIFO overrun,
401 * Received Target Abort, Received Master Abort,
402 * Signalled System Error, Received Parity Error
403 */
404#define DEFAULT_INTR 0x00f1cd65
405
406enum TxConfig_bits {
407 TxDrthMask = 0x3f,
408 TxFlthMask = 0x3f00,
409 TxMxdmaMask = 0x700000,
410 TxMxdma_512 = 0x0,
411 TxMxdma_4 = 0x100000,
412 TxMxdma_8 = 0x200000,
413 TxMxdma_16 = 0x300000,
414 TxMxdma_32 = 0x400000,
415 TxMxdma_64 = 0x500000,
416 TxMxdma_128 = 0x600000,
417 TxMxdma_256 = 0x700000,
418 TxCollRetry = 0x800000,
419 TxAutoPad = 0x10000000,
420 TxMacLoop = 0x20000000,
421 TxHeartIgn = 0x40000000,
422 TxCarrierIgn = 0x80000000
423};
424
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400425/*
Linus Torvalds1da177e2005-04-16 15:20:36 -0700426 * Tx Configuration:
427 * - 256 byte DMA burst length
428 * - fill threshold 512 bytes (i.e. restart DMA when 512 bytes are free)
429 * - 64 bytes initial drain threshold (i.e. begin actual transmission
430 * when 64 byte are in the fifo)
431 * - on tx underruns, increase drain threshold by 64.
432 * - at most use a drain threshold of 1472 bytes: The sum of the fill
433 * threshold and the drain threshold must be less than 2016 bytes.
434 *
435 */
436#define TX_FLTH_VAL ((512/32) << 8)
437#define TX_DRTH_VAL_START (64/32)
438#define TX_DRTH_VAL_INC 2
439#define TX_DRTH_VAL_LIMIT (1472/32)
440
441enum RxConfig_bits {
442 RxDrthMask = 0x3e,
443 RxMxdmaMask = 0x700000,
444 RxMxdma_512 = 0x0,
445 RxMxdma_4 = 0x100000,
446 RxMxdma_8 = 0x200000,
447 RxMxdma_16 = 0x300000,
448 RxMxdma_32 = 0x400000,
449 RxMxdma_64 = 0x500000,
450 RxMxdma_128 = 0x600000,
451 RxMxdma_256 = 0x700000,
452 RxAcceptLong = 0x8000000,
453 RxAcceptTx = 0x10000000,
454 RxAcceptRunt = 0x40000000,
455 RxAcceptErr = 0x80000000
456};
457#define RX_DRTH_VAL (128/8)
458
459enum ClkRun_bits {
460 PMEEnable = 0x100,
461 PMEStatus = 0x8000,
462};
463
464enum WolCmd_bits {
465 WakePhy = 0x1,
466 WakeUnicast = 0x2,
467 WakeMulticast = 0x4,
468 WakeBroadcast = 0x8,
469 WakeArp = 0x10,
470 WakePMatch0 = 0x20,
471 WakePMatch1 = 0x40,
472 WakePMatch2 = 0x80,
473 WakePMatch3 = 0x100,
474 WakeMagic = 0x200,
475 WakeMagicSecure = 0x400,
476 SecureHack = 0x100000,
477 WokePhy = 0x400000,
478 WokeUnicast = 0x800000,
479 WokeMulticast = 0x1000000,
480 WokeBroadcast = 0x2000000,
481 WokeArp = 0x4000000,
482 WokePMatch0 = 0x8000000,
483 WokePMatch1 = 0x10000000,
484 WokePMatch2 = 0x20000000,
485 WokePMatch3 = 0x40000000,
486 WokeMagic = 0x80000000,
487 WakeOptsSummary = 0x7ff
488};
489
490enum RxFilterAddr_bits {
491 RFCRAddressMask = 0x3ff,
492 AcceptMulticast = 0x00200000,
493 AcceptMyPhys = 0x08000000,
494 AcceptAllPhys = 0x10000000,
495 AcceptAllMulticast = 0x20000000,
496 AcceptBroadcast = 0x40000000,
497 RxFilterEnable = 0x80000000
498};
499
500enum StatsCtrl_bits {
501 StatsWarn = 0x1,
502 StatsFreeze = 0x2,
503 StatsClear = 0x4,
504 StatsStrobe = 0x8,
505};
506
507enum MIntrCtrl_bits {
508 MICRIntEn = 0x2,
509};
510
511enum PhyCtrl_bits {
512 PhyAddrMask = 0x1f,
513};
514
515#define PHY_ADDR_NONE 32
516#define PHY_ADDR_INTERNAL 1
517
518/* values we might find in the silicon revision register */
519#define SRR_DP83815_C 0x0302
520#define SRR_DP83815_D 0x0403
521#define SRR_DP83816_A4 0x0504
522#define SRR_DP83816_A5 0x0505
523
524/* The Rx and Tx buffer descriptors. */
525/* Note that using only 32 bit fields simplifies conversion to big-endian
526 architectures. */
527struct netdev_desc {
528 u32 next_desc;
529 s32 cmd_status;
530 u32 addr;
531 u32 software_use;
532};
533
534/* Bits in network_desc.status */
535enum desc_status_bits {
536 DescOwn=0x80000000, DescMore=0x40000000, DescIntr=0x20000000,
537 DescNoCRC=0x10000000, DescPktOK=0x08000000,
538 DescSizeMask=0xfff,
539
540 DescTxAbort=0x04000000, DescTxFIFO=0x02000000,
541 DescTxCarrier=0x01000000, DescTxDefer=0x00800000,
542 DescTxExcDefer=0x00400000, DescTxOOWCol=0x00200000,
543 DescTxExcColl=0x00100000, DescTxCollCount=0x000f0000,
544
545 DescRxAbort=0x04000000, DescRxOver=0x02000000,
546 DescRxDest=0x01800000, DescRxLong=0x00400000,
547 DescRxRunt=0x00200000, DescRxInvalid=0x00100000,
548 DescRxCRC=0x00080000, DescRxAlign=0x00040000,
549 DescRxLoop=0x00020000, DesRxColl=0x00010000,
550};
551
552struct netdev_private {
553 /* Descriptor rings first for alignment */
554 dma_addr_t ring_dma;
555 struct netdev_desc *rx_ring;
556 struct netdev_desc *tx_ring;
557 /* The addresses of receive-in-place skbuffs */
558 struct sk_buff *rx_skbuff[RX_RING_SIZE];
559 dma_addr_t rx_dma[RX_RING_SIZE];
560 /* address of a sent-in-place packet/buffer, for later free() */
561 struct sk_buff *tx_skbuff[TX_RING_SIZE];
562 dma_addr_t tx_dma[TX_RING_SIZE];
Stephen Hemmingerbea33482007-10-03 16:41:36 -0700563 struct net_device *dev;
564 struct napi_struct napi;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700565 struct net_device_stats stats;
566 /* Media monitoring timer */
567 struct timer_list timer;
568 /* Frequently used values: keep some adjacent for cache effect */
569 struct pci_dev *pci_dev;
570 struct netdev_desc *rx_head_desc;
571 /* Producer/consumer ring indices */
572 unsigned int cur_rx, dirty_rx;
573 unsigned int cur_tx, dirty_tx;
574 /* Based on MTU+slack. */
575 unsigned int rx_buf_sz;
576 int oom;
Mark Brownb27a16b2006-02-02 00:00:01 +0000577 /* Interrupt status */
578 u32 intr_status;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700579 /* Do not touch the nic registers */
580 int hands_off;
Mark Brown68c90162007-02-19 20:15:39 +0000581 /* Don't pay attention to the reported link state. */
582 int ignore_phy;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700583 /* external phy that is used: only valid if dev->if_port != PORT_TP */
584 int mii;
585 int phy_addr_external;
586 unsigned int full_duplex;
587 /* Rx filter */
588 u32 cur_rx_mode;
589 u32 rx_filter[16];
590 /* FIFO and PCI burst thresholds */
591 u32 tx_config, rx_config;
592 /* original contents of ClkRun register */
593 u32 SavedClkRun;
594 /* silicon revision */
595 u32 srr;
596 /* expected DSPCFG value */
597 u16 dspcfg;
Mark Brown1a147802007-05-03 10:36:56 +0100598 int dspcfg_workaround;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700599 /* parms saved in ethtool format */
600 u16 speed; /* The forced speed, 10Mb, 100Mb, gigabit */
601 u8 duplex; /* Duplex, half or full */
602 u8 autoneg; /* Autonegotiation enabled */
603 /* MII transceiver section */
604 u16 advertising;
605 unsigned int iosize;
606 spinlock_t lock;
607 u32 msg_enable;
Mark Browna8b4cf42006-03-28 14:08:55 -0800608 /* EEPROM data */
609 int eeprom_size;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700610};
611
612static void move_int_phy(struct net_device *dev, int addr);
613static int eeprom_read(void __iomem *ioaddr, int location);
614static int mdio_read(struct net_device *dev, int reg);
615static void mdio_write(struct net_device *dev, int reg, u16 data);
616static void init_phy_fixup(struct net_device *dev);
617static int miiport_read(struct net_device *dev, int phy_id, int reg);
618static void miiport_write(struct net_device *dev, int phy_id, int reg, u16 data);
619static int find_mii(struct net_device *dev);
620static void natsemi_reset(struct net_device *dev);
621static void natsemi_reload_eeprom(struct net_device *dev);
622static void natsemi_stop_rxtx(struct net_device *dev);
623static int netdev_open(struct net_device *dev);
624static void do_cable_magic(struct net_device *dev);
625static void undo_cable_magic(struct net_device *dev);
626static void check_link(struct net_device *dev);
627static void netdev_timer(unsigned long data);
628static void dump_ring(struct net_device *dev);
629static void tx_timeout(struct net_device *dev);
630static int alloc_ring(struct net_device *dev);
631static void refill_rx(struct net_device *dev);
632static void init_ring(struct net_device *dev);
633static void drain_tx(struct net_device *dev);
634static void drain_ring(struct net_device *dev);
635static void free_ring(struct net_device *dev);
636static void reinit_ring(struct net_device *dev);
637static void init_registers(struct net_device *dev);
638static int start_tx(struct sk_buff *skb, struct net_device *dev);
David Howells7d12e782006-10-05 14:55:46 +0100639static irqreturn_t intr_handler(int irq, void *dev_instance);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700640static void netdev_error(struct net_device *dev, int intr_status);
Stephen Hemmingerbea33482007-10-03 16:41:36 -0700641static int natsemi_poll(struct napi_struct *napi, int budget);
Mark Brownb27a16b2006-02-02 00:00:01 +0000642static void netdev_rx(struct net_device *dev, int *work_done, int work_to_do);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700643static void netdev_tx_done(struct net_device *dev);
644static int natsemi_change_mtu(struct net_device *dev, int new_mtu);
645#ifdef CONFIG_NET_POLL_CONTROLLER
646static void natsemi_poll_controller(struct net_device *dev);
647#endif
648static void __set_rx_mode(struct net_device *dev);
649static void set_rx_mode(struct net_device *dev);
650static void __get_stats(struct net_device *dev);
651static struct net_device_stats *get_stats(struct net_device *dev);
652static int netdev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
653static int netdev_set_wol(struct net_device *dev, u32 newval);
654static int netdev_get_wol(struct net_device *dev, u32 *supported, u32 *cur);
655static int netdev_set_sopass(struct net_device *dev, u8 *newval);
656static int netdev_get_sopass(struct net_device *dev, u8 *data);
657static int netdev_get_ecmd(struct net_device *dev, struct ethtool_cmd *ecmd);
658static int netdev_set_ecmd(struct net_device *dev, struct ethtool_cmd *ecmd);
659static void enable_wol_mode(struct net_device *dev, int enable_intr);
660static int netdev_close(struct net_device *dev);
661static int netdev_get_regs(struct net_device *dev, u8 *buf);
662static int netdev_get_eeprom(struct net_device *dev, u8 *buf);
Jeff Garzik7282d492006-09-13 14:30:00 -0400663static const struct ethtool_ops ethtool_ops;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700664
Mark Brown1a147802007-05-03 10:36:56 +0100665#define NATSEMI_ATTR(_name) \
666static ssize_t natsemi_show_##_name(struct device *dev, \
667 struct device_attribute *attr, char *buf); \
668 static ssize_t natsemi_set_##_name(struct device *dev, \
669 struct device_attribute *attr, \
670 const char *buf, size_t count); \
671 static DEVICE_ATTR(_name, 0644, natsemi_show_##_name, natsemi_set_##_name)
672
673#define NATSEMI_CREATE_FILE(_dev, _name) \
674 device_create_file(&_dev->dev, &dev_attr_##_name)
675#define NATSEMI_REMOVE_FILE(_dev, _name) \
Jeff Garzikf6c42862007-07-17 00:01:09 -0400676 device_remove_file(&_dev->dev, &dev_attr_##_name)
Mark Brown1a147802007-05-03 10:36:56 +0100677
678NATSEMI_ATTR(dspcfg_workaround);
679
680static ssize_t natsemi_show_dspcfg_workaround(struct device *dev,
681 struct device_attribute *attr,
682 char *buf)
683{
684 struct netdev_private *np = netdev_priv(to_net_dev(dev));
685
686 return sprintf(buf, "%s\n", np->dspcfg_workaround ? "on" : "off");
687}
688
689static ssize_t natsemi_set_dspcfg_workaround(struct device *dev,
690 struct device_attribute *attr,
691 const char *buf, size_t count)
692{
693 struct netdev_private *np = netdev_priv(to_net_dev(dev));
694 int new_setting;
Gregory Haskinsd41f2d12007-06-15 17:17:50 -0400695 unsigned long flags;
Mark Brown1a147802007-05-03 10:36:56 +0100696
697 /* Find out the new setting */
698 if (!strncmp("on", buf, count - 1) || !strncmp("1", buf, count - 1))
699 new_setting = 1;
700 else if (!strncmp("off", buf, count - 1)
701 || !strncmp("0", buf, count - 1))
702 new_setting = 0;
703 else
704 return count;
705
706 spin_lock_irqsave(&np->lock, flags);
707
708 np->dspcfg_workaround = new_setting;
709
710 spin_unlock_irqrestore(&np->lock, flags);
711
712 return count;
713}
714
Linus Torvalds1da177e2005-04-16 15:20:36 -0700715static inline void __iomem *ns_ioaddr(struct net_device *dev)
716{
717 return (void __iomem *) dev->base_addr;
718}
719
Mark Brownb27a16b2006-02-02 00:00:01 +0000720static inline void natsemi_irq_enable(struct net_device *dev)
721{
722 writel(1, ns_ioaddr(dev) + IntrEnable);
723 readl(ns_ioaddr(dev) + IntrEnable);
724}
725
726static inline void natsemi_irq_disable(struct net_device *dev)
727{
728 writel(0, ns_ioaddr(dev) + IntrEnable);
729 readl(ns_ioaddr(dev) + IntrEnable);
730}
731
Linus Torvalds1da177e2005-04-16 15:20:36 -0700732static void move_int_phy(struct net_device *dev, int addr)
733{
734 struct netdev_private *np = netdev_priv(dev);
735 void __iomem *ioaddr = ns_ioaddr(dev);
736 int target = 31;
737
Jeff Garzik6aa20a22006-09-13 13:24:59 -0400738 /*
Linus Torvalds1da177e2005-04-16 15:20:36 -0700739 * The internal phy is visible on the external mii bus. Therefore we must
740 * move it away before we can send commands to an external phy.
741 * There are two addresses we must avoid:
742 * - the address on the external phy that is used for transmission.
743 * - the address that we want to access. User space can access phys
744 * on the mii bus with SIOCGMIIREG/SIOCSMIIREG, independant from the
745 * phy that is used for transmission.
746 */
747
748 if (target == addr)
749 target--;
750 if (target == np->phy_addr_external)
751 target--;
752 writew(target, ioaddr + PhyCtrl);
753 readw(ioaddr + PhyCtrl);
754 udelay(1);
755}
756
Jeff Garzik5a40f092006-06-26 22:24:03 -0400757static void __devinit natsemi_init_media (struct net_device *dev)
758{
759 struct netdev_private *np = netdev_priv(dev);
760 u32 tmp;
761
Mark Brown68c90162007-02-19 20:15:39 +0000762 if (np->ignore_phy)
763 netif_carrier_on(dev);
764 else
765 netif_carrier_off(dev);
Jeff Garzik5a40f092006-06-26 22:24:03 -0400766
767 /* get the initial settings from hardware */
768 tmp = mdio_read(dev, MII_BMCR);
769 np->speed = (tmp & BMCR_SPEED100)? SPEED_100 : SPEED_10;
770 np->duplex = (tmp & BMCR_FULLDPLX)? DUPLEX_FULL : DUPLEX_HALF;
771 np->autoneg = (tmp & BMCR_ANENABLE)? AUTONEG_ENABLE: AUTONEG_DISABLE;
772 np->advertising= mdio_read(dev, MII_ADVERTISE);
773
774 if ((np->advertising & ADVERTISE_ALL) != ADVERTISE_ALL
775 && netif_msg_probe(np)) {
776 printk(KERN_INFO "natsemi %s: Transceiver default autonegotiation %s "
777 "10%s %s duplex.\n",
778 pci_name(np->pci_dev),
779 (mdio_read(dev, MII_BMCR) & BMCR_ANENABLE)?
780 "enabled, advertise" : "disabled, force",
781 (np->advertising &
782 (ADVERTISE_100FULL|ADVERTISE_100HALF))?
783 "0" : "",
784 (np->advertising &
785 (ADVERTISE_100FULL|ADVERTISE_10FULL))?
786 "full" : "half");
787 }
788 if (netif_msg_probe(np))
789 printk(KERN_INFO
790 "natsemi %s: Transceiver status %#04x advertising %#04x.\n",
791 pci_name(np->pci_dev), mdio_read(dev, MII_BMSR),
792 np->advertising);
793
794}
795
Linus Torvalds1da177e2005-04-16 15:20:36 -0700796static int __devinit natsemi_probe1 (struct pci_dev *pdev,
797 const struct pci_device_id *ent)
798{
799 struct net_device *dev;
800 struct netdev_private *np;
801 int i, option, irq, chip_idx = ent->driver_data;
802 static int find_cnt = -1;
803 unsigned long iostart, iosize;
804 void __iomem *ioaddr;
805 const int pcibar = 1; /* PCI base address register */
806 int prev_eedata;
807 u32 tmp;
Joe Perches0795af52007-10-03 17:59:30 -0700808 DECLARE_MAC_BUF(mac);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700809
810/* when built into the kernel, we only print version if device is found */
811#ifndef MODULE
812 static int printed_version;
813 if (!printed_version++)
814 printk(version);
815#endif
816
817 i = pci_enable_device(pdev);
818 if (i) return i;
819
820 /* natsemi has a non-standard PM control register
821 * in PCI config space. Some boards apparently need
822 * to be brought to D0 in this manner.
823 */
824 pci_read_config_dword(pdev, PCIPM, &tmp);
825 if (tmp & PCI_PM_CTRL_STATE_MASK) {
826 /* D0 state, disable PME assertion */
827 u32 newtmp = tmp & ~PCI_PM_CTRL_STATE_MASK;
828 pci_write_config_dword(pdev, PCIPM, newtmp);
829 }
830
831 find_cnt++;
832 iostart = pci_resource_start(pdev, pcibar);
833 iosize = pci_resource_len(pdev, pcibar);
834 irq = pdev->irq;
835
Jeff Garzika2b524b2006-06-26 22:48:38 -0400836 pci_set_master(pdev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700837
838 dev = alloc_etherdev(sizeof (struct netdev_private));
839 if (!dev)
840 return -ENOMEM;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700841 SET_NETDEV_DEV(dev, &pdev->dev);
842
843 i = pci_request_regions(pdev, DRV_NAME);
844 if (i)
845 goto err_pci_request_regions;
846
847 ioaddr = ioremap(iostart, iosize);
848 if (!ioaddr) {
849 i = -ENOMEM;
850 goto err_ioremap;
851 }
852
853 /* Work around the dropped serial bit. */
854 prev_eedata = eeprom_read(ioaddr, 6);
855 for (i = 0; i < 3; i++) {
856 int eedata = eeprom_read(ioaddr, i + 7);
857 dev->dev_addr[i*2] = (eedata << 1) + (prev_eedata >> 15);
858 dev->dev_addr[i*2+1] = eedata >> 7;
859 prev_eedata = eedata;
860 }
861
862 dev->base_addr = (unsigned long __force) ioaddr;
863 dev->irq = irq;
864
865 np = netdev_priv(dev);
Stephen Hemmingerbea33482007-10-03 16:41:36 -0700866 netif_napi_add(dev, &np->napi, natsemi_poll, 64);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700867
868 np->pci_dev = pdev;
869 pci_set_drvdata(pdev, dev);
870 np->iosize = iosize;
871 spin_lock_init(&np->lock);
872 np->msg_enable = (debug >= 0) ? (1<<debug)-1 : NATSEMI_DEF_MSG;
873 np->hands_off = 0;
Mark Brownb27a16b2006-02-02 00:00:01 +0000874 np->intr_status = 0;
Jeff Garzika2b524b2006-06-26 22:48:38 -0400875 np->eeprom_size = natsemi_pci_info[chip_idx].eeprom_size;
Mark Brown6aab4442007-02-19 20:15:40 +0000876 if (natsemi_pci_info[chip_idx].flags & NATSEMI_FLAG_IGNORE_PHY)
877 np->ignore_phy = 1;
878 else
879 np->ignore_phy = 0;
Mark Brown1a147802007-05-03 10:36:56 +0100880 np->dspcfg_workaround = dspcfg_workaround;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700881
882 /* Initial port:
Mark Brown68c90162007-02-19 20:15:39 +0000883 * - If configured to ignore the PHY set up for external.
Linus Torvalds1da177e2005-04-16 15:20:36 -0700884 * - If the nic was configured to use an external phy and if find_mii
885 * finds a phy: use external port, first phy that replies.
886 * - Otherwise: internal port.
887 * Note that the phy address for the internal phy doesn't matter:
888 * The address would be used to access a phy over the mii bus, but
889 * the internal phy is accessed through mapped registers.
890 */
Mark Brown68c90162007-02-19 20:15:39 +0000891 if (np->ignore_phy || readl(ioaddr + ChipConfig) & CfgExtPhy)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700892 dev->if_port = PORT_MII;
893 else
894 dev->if_port = PORT_TP;
895 /* Reset the chip to erase previous misconfiguration. */
896 natsemi_reload_eeprom(dev);
897 natsemi_reset(dev);
898
899 if (dev->if_port != PORT_TP) {
900 np->phy_addr_external = find_mii(dev);
Mark Brown68c90162007-02-19 20:15:39 +0000901 /* If we're ignoring the PHY it doesn't matter if we can't
902 * find one. */
903 if (!np->ignore_phy && np->phy_addr_external == PHY_ADDR_NONE) {
Linus Torvalds1da177e2005-04-16 15:20:36 -0700904 dev->if_port = PORT_TP;
905 np->phy_addr_external = PHY_ADDR_INTERNAL;
906 }
907 } else {
908 np->phy_addr_external = PHY_ADDR_INTERNAL;
909 }
910
911 option = find_cnt < MAX_UNITS ? options[find_cnt] : 0;
912 if (dev->mem_start)
913 option = dev->mem_start;
914
915 /* The lower four bits are the media type. */
916 if (option) {
917 if (option & 0x200)
918 np->full_duplex = 1;
919 if (option & 15)
920 printk(KERN_INFO
921 "natsemi %s: ignoring user supplied media type %d",
922 pci_name(np->pci_dev), option & 15);
923 }
924 if (find_cnt < MAX_UNITS && full_duplex[find_cnt])
925 np->full_duplex = 1;
926
927 /* The chip-specific entries in the device structure. */
928 dev->open = &netdev_open;
929 dev->hard_start_xmit = &start_tx;
930 dev->stop = &netdev_close;
931 dev->get_stats = &get_stats;
932 dev->set_multicast_list = &set_rx_mode;
933 dev->change_mtu = &natsemi_change_mtu;
934 dev->do_ioctl = &netdev_ioctl;
935 dev->tx_timeout = &tx_timeout;
936 dev->watchdog_timeo = TX_TIMEOUT;
Mark Brownb27a16b2006-02-02 00:00:01 +0000937
Linus Torvalds1da177e2005-04-16 15:20:36 -0700938#ifdef CONFIG_NET_POLL_CONTROLLER
939 dev->poll_controller = &natsemi_poll_controller;
940#endif
941 SET_ETHTOOL_OPS(dev, &ethtool_ops);
942
943 if (mtu)
944 dev->mtu = mtu;
945
Jeff Garzik5a40f092006-06-26 22:24:03 -0400946 natsemi_init_media(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700947
948 /* save the silicon revision for later querying */
949 np->srr = readl(ioaddr + SiliconRev);
950 if (netif_msg_hw(np))
951 printk(KERN_INFO "natsemi %s: silicon revision %#04x.\n",
952 pci_name(np->pci_dev), np->srr);
953
954 i = register_netdev(dev);
955 if (i)
956 goto err_register_netdev;
957
Mark Brown1a147802007-05-03 10:36:56 +0100958 if (NATSEMI_CREATE_FILE(pdev, dspcfg_workaround))
959 goto err_create_file;
960
Linus Torvalds1da177e2005-04-16 15:20:36 -0700961 if (netif_msg_drv(np)) {
Joe Perches0795af52007-10-03 17:59:30 -0700962 printk(KERN_INFO "natsemi %s: %s at %#08lx "
963 "(%s), %s, IRQ %d",
964 dev->name, natsemi_pci_info[chip_idx].name, iostart,
965 pci_name(np->pci_dev), print_mac(mac, dev->dev_addr), irq);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700966 if (dev->if_port == PORT_TP)
967 printk(", port TP.\n");
Mark Brown68c90162007-02-19 20:15:39 +0000968 else if (np->ignore_phy)
969 printk(", port MII, ignoring PHY\n");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700970 else
971 printk(", port MII, phy ad %d.\n", np->phy_addr_external);
972 }
973 return 0;
974
Mark Brown1a147802007-05-03 10:36:56 +0100975 err_create_file:
976 unregister_netdev(dev);
977
Linus Torvalds1da177e2005-04-16 15:20:36 -0700978 err_register_netdev:
979 iounmap(ioaddr);
980
981 err_ioremap:
982 pci_release_regions(pdev);
983 pci_set_drvdata(pdev, NULL);
984
985 err_pci_request_regions:
986 free_netdev(dev);
987 return i;
988}
989
990
991/* Read the EEPROM and MII Management Data I/O (MDIO) interfaces.
992 The EEPROM code is for the common 93c06/46 EEPROMs with 6 bit addresses. */
993
994/* Delay between EEPROM clock transitions.
995 No extra delay is needed with 33Mhz PCI, but future 66Mhz access may need
996 a delay. Note that pre-2.0.34 kernels had a cache-alignment bug that
997 made udelay() unreliable.
998 The old method of using an ISA access as a delay, __SLOW_DOWN_IO__, is
999 depricated.
1000*/
1001#define eeprom_delay(ee_addr) readl(ee_addr)
1002
1003#define EE_Write0 (EE_ChipSelect)
1004#define EE_Write1 (EE_ChipSelect | EE_DataIn)
1005
1006/* The EEPROM commands include the alway-set leading bit. */
1007enum EEPROM_Cmds {
1008 EE_WriteCmd=(5 << 6), EE_ReadCmd=(6 << 6), EE_EraseCmd=(7 << 6),
1009};
1010
1011static int eeprom_read(void __iomem *addr, int location)
1012{
1013 int i;
1014 int retval = 0;
1015 void __iomem *ee_addr = addr + EECtrl;
1016 int read_cmd = location | EE_ReadCmd;
1017
1018 writel(EE_Write0, ee_addr);
1019
1020 /* Shift the read command bits out. */
1021 for (i = 10; i >= 0; i--) {
1022 short dataval = (read_cmd & (1 << i)) ? EE_Write1 : EE_Write0;
1023 writel(dataval, ee_addr);
1024 eeprom_delay(ee_addr);
1025 writel(dataval | EE_ShiftClk, ee_addr);
1026 eeprom_delay(ee_addr);
1027 }
1028 writel(EE_ChipSelect, ee_addr);
1029 eeprom_delay(ee_addr);
1030
1031 for (i = 0; i < 16; i++) {
1032 writel(EE_ChipSelect | EE_ShiftClk, ee_addr);
1033 eeprom_delay(ee_addr);
1034 retval |= (readl(ee_addr) & EE_DataOut) ? 1 << i : 0;
1035 writel(EE_ChipSelect, ee_addr);
1036 eeprom_delay(ee_addr);
1037 }
1038
1039 /* Terminate the EEPROM access. */
1040 writel(EE_Write0, ee_addr);
1041 writel(0, ee_addr);
1042 return retval;
1043}
1044
1045/* MII transceiver control section.
1046 * The 83815 series has an internal transceiver, and we present the
1047 * internal management registers as if they were MII connected.
1048 * External Phy registers are referenced through the MII interface.
1049 */
1050
1051/* clock transitions >= 20ns (25MHz)
1052 * One readl should be good to PCI @ 100MHz
1053 */
1054#define mii_delay(ioaddr) readl(ioaddr + EECtrl)
1055
1056static int mii_getbit (struct net_device *dev)
1057{
1058 int data;
1059 void __iomem *ioaddr = ns_ioaddr(dev);
1060
1061 writel(MII_ShiftClk, ioaddr + EECtrl);
1062 data = readl(ioaddr + EECtrl);
1063 writel(0, ioaddr + EECtrl);
1064 mii_delay(ioaddr);
1065 return (data & MII_Data)? 1 : 0;
1066}
1067
1068static void mii_send_bits (struct net_device *dev, u32 data, int len)
1069{
1070 u32 i;
1071 void __iomem *ioaddr = ns_ioaddr(dev);
1072
1073 for (i = (1 << (len-1)); i; i >>= 1)
1074 {
1075 u32 mdio_val = MII_Write | ((data & i)? MII_Data : 0);
1076 writel(mdio_val, ioaddr + EECtrl);
1077 mii_delay(ioaddr);
1078 writel(mdio_val | MII_ShiftClk, ioaddr + EECtrl);
1079 mii_delay(ioaddr);
1080 }
1081 writel(0, ioaddr + EECtrl);
1082 mii_delay(ioaddr);
1083}
1084
1085static int miiport_read(struct net_device *dev, int phy_id, int reg)
1086{
1087 u32 cmd;
1088 int i;
1089 u32 retval = 0;
1090
1091 /* Ensure sync */
1092 mii_send_bits (dev, 0xffffffff, 32);
1093 /* ST(2), OP(2), ADDR(5), REG#(5), TA(2), Data(16) total 32 bits */
1094 /* ST,OP = 0110'b for read operation */
1095 cmd = (0x06 << 10) | (phy_id << 5) | reg;
1096 mii_send_bits (dev, cmd, 14);
1097 /* Turnaround */
1098 if (mii_getbit (dev))
1099 return 0;
1100 /* Read data */
1101 for (i = 0; i < 16; i++) {
1102 retval <<= 1;
1103 retval |= mii_getbit (dev);
1104 }
1105 /* End cycle */
1106 mii_getbit (dev);
1107 return retval;
1108}
1109
1110static void miiport_write(struct net_device *dev, int phy_id, int reg, u16 data)
1111{
1112 u32 cmd;
1113
1114 /* Ensure sync */
1115 mii_send_bits (dev, 0xffffffff, 32);
1116 /* ST(2), OP(2), ADDR(5), REG#(5), TA(2), Data(16) total 32 bits */
1117 /* ST,OP,AAAAA,RRRRR,TA = 0101xxxxxxxxxx10'b = 0x5002 for write */
1118 cmd = (0x5002 << 16) | (phy_id << 23) | (reg << 18) | data;
1119 mii_send_bits (dev, cmd, 32);
1120 /* End cycle */
1121 mii_getbit (dev);
1122}
1123
1124static int mdio_read(struct net_device *dev, int reg)
1125{
1126 struct netdev_private *np = netdev_priv(dev);
1127 void __iomem *ioaddr = ns_ioaddr(dev);
1128
1129 /* The 83815 series has two ports:
1130 * - an internal transceiver
1131 * - an external mii bus
1132 */
1133 if (dev->if_port == PORT_TP)
1134 return readw(ioaddr+BasicControl+(reg<<2));
1135 else
1136 return miiport_read(dev, np->phy_addr_external, reg);
1137}
1138
1139static void mdio_write(struct net_device *dev, int reg, u16 data)
1140{
1141 struct netdev_private *np = netdev_priv(dev);
1142 void __iomem *ioaddr = ns_ioaddr(dev);
1143
1144 /* The 83815 series has an internal transceiver; handle separately */
1145 if (dev->if_port == PORT_TP)
1146 writew(data, ioaddr+BasicControl+(reg<<2));
1147 else
1148 miiport_write(dev, np->phy_addr_external, reg, data);
1149}
1150
1151static void init_phy_fixup(struct net_device *dev)
1152{
1153 struct netdev_private *np = netdev_priv(dev);
1154 void __iomem *ioaddr = ns_ioaddr(dev);
1155 int i;
1156 u32 cfg;
1157 u16 tmp;
1158
1159 /* restore stuff lost when power was out */
1160 tmp = mdio_read(dev, MII_BMCR);
1161 if (np->autoneg == AUTONEG_ENABLE) {
1162 /* renegotiate if something changed */
1163 if ((tmp & BMCR_ANENABLE) == 0
1164 || np->advertising != mdio_read(dev, MII_ADVERTISE))
1165 {
1166 /* turn on autonegotiation and force negotiation */
1167 tmp |= (BMCR_ANENABLE | BMCR_ANRESTART);
1168 mdio_write(dev, MII_ADVERTISE, np->advertising);
1169 }
1170 } else {
1171 /* turn off auto negotiation, set speed and duplexity */
1172 tmp &= ~(BMCR_ANENABLE | BMCR_SPEED100 | BMCR_FULLDPLX);
1173 if (np->speed == SPEED_100)
1174 tmp |= BMCR_SPEED100;
1175 if (np->duplex == DUPLEX_FULL)
1176 tmp |= BMCR_FULLDPLX;
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001177 /*
Linus Torvalds1da177e2005-04-16 15:20:36 -07001178 * Note: there is no good way to inform the link partner
1179 * that our capabilities changed. The user has to unplug
1180 * and replug the network cable after some changes, e.g.
1181 * after switching from 10HD, autoneg off to 100 HD,
1182 * autoneg off.
1183 */
1184 }
1185 mdio_write(dev, MII_BMCR, tmp);
1186 readl(ioaddr + ChipConfig);
1187 udelay(1);
1188
1189 /* find out what phy this is */
1190 np->mii = (mdio_read(dev, MII_PHYSID1) << 16)
1191 + mdio_read(dev, MII_PHYSID2);
1192
1193 /* handle external phys here */
1194 switch (np->mii) {
1195 case PHYID_AM79C874:
1196 /* phy specific configuration for fibre/tp operation */
1197 tmp = mdio_read(dev, MII_MCTRL);
1198 tmp &= ~(MII_FX_SEL | MII_EN_SCRM);
1199 if (dev->if_port == PORT_FIBRE)
1200 tmp |= MII_FX_SEL;
1201 else
1202 tmp |= MII_EN_SCRM;
1203 mdio_write(dev, MII_MCTRL, tmp);
1204 break;
1205 default:
1206 break;
1207 }
1208 cfg = readl(ioaddr + ChipConfig);
1209 if (cfg & CfgExtPhy)
1210 return;
1211
1212 /* On page 78 of the spec, they recommend some settings for "optimum
1213 performance" to be done in sequence. These settings optimize some
1214 of the 100Mbit autodetection circuitry. They say we only want to
1215 do this for rev C of the chip, but engineers at NSC (Bradley
1216 Kennedy) recommends always setting them. If you don't, you get
1217 errors on some autonegotiations that make the device unusable.
1218
1219 It seems that the DSP needs a few usec to reinitialize after
1220 the start of the phy. Just retry writing these values until they
1221 stick.
1222 */
1223 for (i=0;i<NATSEMI_HW_TIMEOUT;i++) {
1224
1225 int dspcfg;
1226 writew(1, ioaddr + PGSEL);
1227 writew(PMDCSR_VAL, ioaddr + PMDCSR);
1228 writew(TSTDAT_VAL, ioaddr + TSTDAT);
1229 np->dspcfg = (np->srr <= SRR_DP83815_C)?
1230 DSPCFG_VAL : (DSPCFG_COEF | readw(ioaddr + DSPCFG));
1231 writew(np->dspcfg, ioaddr + DSPCFG);
1232 writew(SDCFG_VAL, ioaddr + SDCFG);
1233 writew(0, ioaddr + PGSEL);
1234 readl(ioaddr + ChipConfig);
1235 udelay(10);
1236
1237 writew(1, ioaddr + PGSEL);
1238 dspcfg = readw(ioaddr + DSPCFG);
1239 writew(0, ioaddr + PGSEL);
1240 if (np->dspcfg == dspcfg)
1241 break;
1242 }
1243
1244 if (netif_msg_link(np)) {
1245 if (i==NATSEMI_HW_TIMEOUT) {
1246 printk(KERN_INFO
1247 "%s: DSPCFG mismatch after retrying for %d usec.\n",
1248 dev->name, i*10);
1249 } else {
1250 printk(KERN_INFO
1251 "%s: DSPCFG accepted after %d usec.\n",
1252 dev->name, i*10);
1253 }
1254 }
1255 /*
1256 * Enable PHY Specific event based interrupts. Link state change
1257 * and Auto-Negotiation Completion are among the affected.
1258 * Read the intr status to clear it (needed for wake events).
1259 */
1260 readw(ioaddr + MIntrStatus);
1261 writew(MICRIntEn, ioaddr + MIntrCtrl);
1262}
1263
1264static int switch_port_external(struct net_device *dev)
1265{
1266 struct netdev_private *np = netdev_priv(dev);
1267 void __iomem *ioaddr = ns_ioaddr(dev);
1268 u32 cfg;
1269
1270 cfg = readl(ioaddr + ChipConfig);
1271 if (cfg & CfgExtPhy)
1272 return 0;
1273
1274 if (netif_msg_link(np)) {
1275 printk(KERN_INFO "%s: switching to external transceiver.\n",
1276 dev->name);
1277 }
1278
1279 /* 1) switch back to external phy */
1280 writel(cfg | (CfgExtPhy | CfgPhyDis), ioaddr + ChipConfig);
1281 readl(ioaddr + ChipConfig);
1282 udelay(1);
1283
1284 /* 2) reset the external phy: */
1285 /* resetting the external PHY has been known to cause a hub supplying
1286 * power over Ethernet to kill the power. We don't want to kill
1287 * power to this computer, so we avoid resetting the phy.
1288 */
1289
1290 /* 3) reinit the phy fixup, it got lost during power down. */
1291 move_int_phy(dev, np->phy_addr_external);
1292 init_phy_fixup(dev);
1293
1294 return 1;
1295}
1296
1297static int switch_port_internal(struct net_device *dev)
1298{
1299 struct netdev_private *np = netdev_priv(dev);
1300 void __iomem *ioaddr = ns_ioaddr(dev);
1301 int i;
1302 u32 cfg;
1303 u16 bmcr;
1304
1305 cfg = readl(ioaddr + ChipConfig);
1306 if (!(cfg &CfgExtPhy))
1307 return 0;
1308
1309 if (netif_msg_link(np)) {
1310 printk(KERN_INFO "%s: switching to internal transceiver.\n",
1311 dev->name);
1312 }
1313 /* 1) switch back to internal phy: */
1314 cfg = cfg & ~(CfgExtPhy | CfgPhyDis);
1315 writel(cfg, ioaddr + ChipConfig);
1316 readl(ioaddr + ChipConfig);
1317 udelay(1);
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001318
Linus Torvalds1da177e2005-04-16 15:20:36 -07001319 /* 2) reset the internal phy: */
1320 bmcr = readw(ioaddr+BasicControl+(MII_BMCR<<2));
1321 writel(bmcr | BMCR_RESET, ioaddr+BasicControl+(MII_BMCR<<2));
1322 readl(ioaddr + ChipConfig);
1323 udelay(10);
1324 for (i=0;i<NATSEMI_HW_TIMEOUT;i++) {
1325 bmcr = readw(ioaddr+BasicControl+(MII_BMCR<<2));
1326 if (!(bmcr & BMCR_RESET))
1327 break;
1328 udelay(10);
1329 }
1330 if (i==NATSEMI_HW_TIMEOUT && netif_msg_link(np)) {
1331 printk(KERN_INFO
1332 "%s: phy reset did not complete in %d usec.\n",
1333 dev->name, i*10);
1334 }
1335 /* 3) reinit the phy fixup, it got lost during power down. */
1336 init_phy_fixup(dev);
1337
1338 return 1;
1339}
1340
1341/* Scan for a PHY on the external mii bus.
1342 * There are two tricky points:
1343 * - Do not scan while the internal phy is enabled. The internal phy will
1344 * crash: e.g. reads from the DSPCFG register will return odd values and
1345 * the nasty random phy reset code will reset the nic every few seconds.
1346 * - The internal phy must be moved around, an external phy could
1347 * have the same address as the internal phy.
1348 */
1349static int find_mii(struct net_device *dev)
1350{
1351 struct netdev_private *np = netdev_priv(dev);
1352 int tmp;
1353 int i;
1354 int did_switch;
1355
1356 /* Switch to external phy */
1357 did_switch = switch_port_external(dev);
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001358
Linus Torvalds1da177e2005-04-16 15:20:36 -07001359 /* Scan the possible phy addresses:
1360 *
1361 * PHY address 0 means that the phy is in isolate mode. Not yet
1362 * supported due to lack of test hardware. User space should
1363 * handle it through ethtool.
1364 */
1365 for (i = 1; i <= 31; i++) {
1366 move_int_phy(dev, i);
1367 tmp = miiport_read(dev, i, MII_BMSR);
1368 if (tmp != 0xffff && tmp != 0x0000) {
1369 /* found something! */
1370 np->mii = (mdio_read(dev, MII_PHYSID1) << 16)
1371 + mdio_read(dev, MII_PHYSID2);
1372 if (netif_msg_probe(np)) {
1373 printk(KERN_INFO "natsemi %s: found external phy %08x at address %d.\n",
1374 pci_name(np->pci_dev), np->mii, i);
1375 }
1376 break;
1377 }
1378 }
1379 /* And switch back to internal phy: */
1380 if (did_switch)
1381 switch_port_internal(dev);
1382 return i;
1383}
1384
1385/* CFG bits [13:16] [18:23] */
1386#define CFG_RESET_SAVE 0xfde000
1387/* WCSR bits [0:4] [9:10] */
1388#define WCSR_RESET_SAVE 0x61f
1389/* RFCR bits [20] [22] [27:31] */
1390#define RFCR_RESET_SAVE 0xf8500000;
1391
1392static void natsemi_reset(struct net_device *dev)
1393{
1394 int i;
1395 u32 cfg;
1396 u32 wcsr;
1397 u32 rfcr;
1398 u16 pmatch[3];
1399 u16 sopass[3];
1400 struct netdev_private *np = netdev_priv(dev);
1401 void __iomem *ioaddr = ns_ioaddr(dev);
1402
1403 /*
1404 * Resetting the chip causes some registers to be lost.
1405 * Natsemi suggests NOT reloading the EEPROM while live, so instead
1406 * we save the state that would have been loaded from EEPROM
1407 * on a normal power-up (see the spec EEPROM map). This assumes
1408 * whoever calls this will follow up with init_registers() eventually.
1409 */
1410
1411 /* CFG */
1412 cfg = readl(ioaddr + ChipConfig) & CFG_RESET_SAVE;
1413 /* WCSR */
1414 wcsr = readl(ioaddr + WOLCmd) & WCSR_RESET_SAVE;
1415 /* RFCR */
1416 rfcr = readl(ioaddr + RxFilterAddr) & RFCR_RESET_SAVE;
1417 /* PMATCH */
1418 for (i = 0; i < 3; i++) {
1419 writel(i*2, ioaddr + RxFilterAddr);
1420 pmatch[i] = readw(ioaddr + RxFilterData);
1421 }
1422 /* SOPAS */
1423 for (i = 0; i < 3; i++) {
1424 writel(0xa+(i*2), ioaddr + RxFilterAddr);
1425 sopass[i] = readw(ioaddr + RxFilterData);
1426 }
1427
1428 /* now whack the chip */
1429 writel(ChipReset, ioaddr + ChipCmd);
1430 for (i=0;i<NATSEMI_HW_TIMEOUT;i++) {
1431 if (!(readl(ioaddr + ChipCmd) & ChipReset))
1432 break;
1433 udelay(5);
1434 }
1435 if (i==NATSEMI_HW_TIMEOUT) {
1436 printk(KERN_WARNING "%s: reset did not complete in %d usec.\n",
1437 dev->name, i*5);
1438 } else if (netif_msg_hw(np)) {
1439 printk(KERN_DEBUG "%s: reset completed in %d usec.\n",
1440 dev->name, i*5);
1441 }
1442
1443 /* restore CFG */
1444 cfg |= readl(ioaddr + ChipConfig) & ~CFG_RESET_SAVE;
1445 /* turn on external phy if it was selected */
1446 if (dev->if_port == PORT_TP)
1447 cfg &= ~(CfgExtPhy | CfgPhyDis);
1448 else
1449 cfg |= (CfgExtPhy | CfgPhyDis);
1450 writel(cfg, ioaddr + ChipConfig);
1451 /* restore WCSR */
1452 wcsr |= readl(ioaddr + WOLCmd) & ~WCSR_RESET_SAVE;
1453 writel(wcsr, ioaddr + WOLCmd);
1454 /* read RFCR */
1455 rfcr |= readl(ioaddr + RxFilterAddr) & ~RFCR_RESET_SAVE;
1456 /* restore PMATCH */
1457 for (i = 0; i < 3; i++) {
1458 writel(i*2, ioaddr + RxFilterAddr);
1459 writew(pmatch[i], ioaddr + RxFilterData);
1460 }
1461 for (i = 0; i < 3; i++) {
1462 writel(0xa+(i*2), ioaddr + RxFilterAddr);
1463 writew(sopass[i], ioaddr + RxFilterData);
1464 }
1465 /* restore RFCR */
1466 writel(rfcr, ioaddr + RxFilterAddr);
1467}
1468
Mark Browne72fd962006-02-02 00:00:02 +00001469static void reset_rx(struct net_device *dev)
1470{
1471 int i;
1472 struct netdev_private *np = netdev_priv(dev);
1473 void __iomem *ioaddr = ns_ioaddr(dev);
1474
1475 np->intr_status &= ~RxResetDone;
1476
1477 writel(RxReset, ioaddr + ChipCmd);
1478
1479 for (i=0;i<NATSEMI_HW_TIMEOUT;i++) {
1480 np->intr_status |= readl(ioaddr + IntrStatus);
1481 if (np->intr_status & RxResetDone)
1482 break;
1483 udelay(15);
1484 }
1485 if (i==NATSEMI_HW_TIMEOUT) {
1486 printk(KERN_WARNING "%s: RX reset did not complete in %d usec.\n",
1487 dev->name, i*15);
1488 } else if (netif_msg_hw(np)) {
1489 printk(KERN_WARNING "%s: RX reset took %d usec.\n",
1490 dev->name, i*15);
1491 }
1492}
1493
Linus Torvalds1da177e2005-04-16 15:20:36 -07001494static void natsemi_reload_eeprom(struct net_device *dev)
1495{
1496 struct netdev_private *np = netdev_priv(dev);
1497 void __iomem *ioaddr = ns_ioaddr(dev);
1498 int i;
1499
1500 writel(EepromReload, ioaddr + PCIBusCfg);
1501 for (i=0;i<NATSEMI_HW_TIMEOUT;i++) {
1502 udelay(50);
1503 if (!(readl(ioaddr + PCIBusCfg) & EepromReload))
1504 break;
1505 }
1506 if (i==NATSEMI_HW_TIMEOUT) {
1507 printk(KERN_WARNING "natsemi %s: EEPROM did not reload in %d usec.\n",
1508 pci_name(np->pci_dev), i*50);
1509 } else if (netif_msg_hw(np)) {
1510 printk(KERN_DEBUG "natsemi %s: EEPROM reloaded in %d usec.\n",
1511 pci_name(np->pci_dev), i*50);
1512 }
1513}
1514
1515static void natsemi_stop_rxtx(struct net_device *dev)
1516{
1517 void __iomem * ioaddr = ns_ioaddr(dev);
1518 struct netdev_private *np = netdev_priv(dev);
1519 int i;
1520
1521 writel(RxOff | TxOff, ioaddr + ChipCmd);
1522 for(i=0;i< NATSEMI_HW_TIMEOUT;i++) {
1523 if ((readl(ioaddr + ChipCmd) & (TxOn|RxOn)) == 0)
1524 break;
1525 udelay(5);
1526 }
1527 if (i==NATSEMI_HW_TIMEOUT) {
1528 printk(KERN_WARNING "%s: Tx/Rx process did not stop in %d usec.\n",
1529 dev->name, i*5);
1530 } else if (netif_msg_hw(np)) {
1531 printk(KERN_DEBUG "%s: Tx/Rx process stopped in %d usec.\n",
1532 dev->name, i*5);
1533 }
1534}
1535
1536static int netdev_open(struct net_device *dev)
1537{
1538 struct netdev_private *np = netdev_priv(dev);
1539 void __iomem * ioaddr = ns_ioaddr(dev);
1540 int i;
1541
1542 /* Reset the chip, just in case. */
1543 natsemi_reset(dev);
1544
Thomas Gleixner1fb9df52006-07-01 19:29:39 -07001545 i = request_irq(dev->irq, &intr_handler, IRQF_SHARED, dev->name, dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001546 if (i) return i;
1547
1548 if (netif_msg_ifup(np))
1549 printk(KERN_DEBUG "%s: netdev_open() irq %d.\n",
1550 dev->name, dev->irq);
1551 i = alloc_ring(dev);
1552 if (i < 0) {
1553 free_irq(dev->irq, dev);
1554 return i;
1555 }
Stephen Hemmingerbea33482007-10-03 16:41:36 -07001556 napi_enable(&np->napi);
1557
Linus Torvalds1da177e2005-04-16 15:20:36 -07001558 init_ring(dev);
1559 spin_lock_irq(&np->lock);
1560 init_registers(dev);
1561 /* now set the MAC address according to dev->dev_addr */
1562 for (i = 0; i < 3; i++) {
1563 u16 mac = (dev->dev_addr[2*i+1]<<8) + dev->dev_addr[2*i];
1564
1565 writel(i*2, ioaddr + RxFilterAddr);
1566 writew(mac, ioaddr + RxFilterData);
1567 }
1568 writel(np->cur_rx_mode, ioaddr + RxFilterAddr);
1569 spin_unlock_irq(&np->lock);
1570
1571 netif_start_queue(dev);
1572
1573 if (netif_msg_ifup(np))
1574 printk(KERN_DEBUG "%s: Done netdev_open(), status: %#08x.\n",
1575 dev->name, (int)readl(ioaddr + ChipCmd));
1576
1577 /* Set the timer to check for link beat. */
1578 init_timer(&np->timer);
1579 np->timer.expires = jiffies + NATSEMI_TIMER_FREQ;
1580 np->timer.data = (unsigned long)dev;
1581 np->timer.function = &netdev_timer; /* timer handler */
1582 add_timer(&np->timer);
1583
1584 return 0;
1585}
1586
1587static void do_cable_magic(struct net_device *dev)
1588{
1589 struct netdev_private *np = netdev_priv(dev);
1590 void __iomem *ioaddr = ns_ioaddr(dev);
1591
1592 if (dev->if_port != PORT_TP)
1593 return;
1594
1595 if (np->srr >= SRR_DP83816_A5)
1596 return;
1597
1598 /*
1599 * 100 MBit links with short cables can trip an issue with the chip.
1600 * The problem manifests as lots of CRC errors and/or flickering
1601 * activity LED while idle. This process is based on instructions
1602 * from engineers at National.
1603 */
1604 if (readl(ioaddr + ChipConfig) & CfgSpeed100) {
1605 u16 data;
1606
1607 writew(1, ioaddr + PGSEL);
1608 /*
1609 * coefficient visibility should already be enabled via
1610 * DSPCFG | 0x1000
1611 */
1612 data = readw(ioaddr + TSTDAT) & 0xff;
1613 /*
1614 * the value must be negative, and within certain values
1615 * (these values all come from National)
1616 */
1617 if (!(data & 0x80) || ((data >= 0xd8) && (data <= 0xff))) {
Stephen Hemmingerddfce6b2007-10-05 17:19:47 -07001618 np = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001619
1620 /* the bug has been triggered - fix the coefficient */
1621 writew(TSTDAT_FIXED, ioaddr + TSTDAT);
1622 /* lock the value */
1623 data = readw(ioaddr + DSPCFG);
1624 np->dspcfg = data | DSPCFG_LOCK;
1625 writew(np->dspcfg, ioaddr + DSPCFG);
1626 }
1627 writew(0, ioaddr + PGSEL);
1628 }
1629}
1630
1631static void undo_cable_magic(struct net_device *dev)
1632{
1633 u16 data;
1634 struct netdev_private *np = netdev_priv(dev);
1635 void __iomem * ioaddr = ns_ioaddr(dev);
1636
1637 if (dev->if_port != PORT_TP)
1638 return;
1639
1640 if (np->srr >= SRR_DP83816_A5)
1641 return;
1642
1643 writew(1, ioaddr + PGSEL);
1644 /* make sure the lock bit is clear */
1645 data = readw(ioaddr + DSPCFG);
1646 np->dspcfg = data & ~DSPCFG_LOCK;
1647 writew(np->dspcfg, ioaddr + DSPCFG);
1648 writew(0, ioaddr + PGSEL);
1649}
1650
1651static void check_link(struct net_device *dev)
1652{
1653 struct netdev_private *np = netdev_priv(dev);
1654 void __iomem * ioaddr = ns_ioaddr(dev);
Mark Brown68c90162007-02-19 20:15:39 +00001655 int duplex = np->duplex;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001656 u16 bmsr;
Jeff Garzik6aa20a22006-09-13 13:24:59 -04001657
Mark Brown68c90162007-02-19 20:15:39 +00001658 /* If we are ignoring the PHY then don't try reading it. */
1659 if (np->ignore_phy)
1660 goto propagate_state;
1661
Linus Torvalds1da177e2005-04-16 15:20:36 -07001662 /* The link status field is latched: it remains low after a temporary
1663 * link failure until it's read. We need the current link status,
1664 * thus read twice.
1665 */
1666 mdio_read(dev, MII_BMSR);
1667 bmsr = mdio_read(dev, MII_BMSR);
1668
1669 if (!(bmsr & BMSR_LSTATUS)) {
1670 if (netif_carrier_ok(dev)) {
1671 if (netif_msg_link(np))
1672 printk(KERN_NOTICE "%s: link down.\n",
Mark Brown68c90162007-02-19 20:15:39 +00001673 dev->name);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001674 netif_carrier_off(dev);
1675 undo_cable_magic(dev);
1676 }
1677 return;
1678 }
1679 if (!netif_carrier_ok(dev)) {
1680 if (netif_msg_link(np))
1681 printk(KERN_NOTICE "%s: link up.\n", dev->name);
1682 netif_carrier_on(dev);
1683 do_cable_magic(dev);
1684 }
1685
1686 duplex = np->full_duplex;
1687 if (!duplex) {
1688 if (bmsr & BMSR_ANEGCOMPLETE) {
1689 int tmp = mii_nway_result(
1690 np->advertising & mdio_read(dev, MII_LPA));
1691 if (tmp == LPA_100FULL || tmp == LPA_10FULL)
1692 duplex = 1;
1693 } else if (mdio_read(dev, MII_BMCR) & BMCR_FULLDPLX)
1694 duplex = 1;
1695 }
1696
Mark Brown68c90162007-02-19 20:15:39 +00001697propagate_state:
Linus Torvalds1da177e2005-04-16 15:20:36 -07001698 /* if duplex is set then bit 28 must be set, too */
1699 if (duplex ^ !!(np->rx_config & RxAcceptTx)) {
1700 if (netif_msg_link(np))
1701 printk(KERN_INFO
1702 "%s: Setting %s-duplex based on negotiated "
1703 "link capability.\n", dev->name,
1704 duplex ? "full" : "half");
1705 if (duplex) {
1706 np->rx_config |= RxAcceptTx;
1707 np->tx_config |= TxCarrierIgn | TxHeartIgn;
1708 } else {
1709 np->rx_config &= ~RxAcceptTx;
1710 np->tx_config &= ~(TxCarrierIgn | TxHeartIgn);
1711 }
1712 writel(np->tx_config, ioaddr + TxConfig);
1713 writel(np->rx_config, ioaddr + RxConfig);
1714 }
1715}
1716
1717static void init_registers(struct net_device *dev)
1718{
1719 struct netdev_private *np = netdev_priv(dev);
1720 void __iomem * ioaddr = ns_ioaddr(dev);
1721
1722 init_phy_fixup(dev);
1723
1724 /* clear any interrupts that are pending, such as wake events */
1725 readl(ioaddr + IntrStatus);
1726
1727 writel(np->ring_dma, ioaddr + RxRingPtr);
1728 writel(np->ring_dma + RX_RING_SIZE * sizeof(struct netdev_desc),
1729 ioaddr + TxRingPtr);
1730
1731 /* Initialize other registers.
1732 * Configure the PCI bus bursts and FIFO thresholds.
1733 * Configure for standard, in-spec Ethernet.
1734 * Start with half-duplex. check_link will update
1735 * to the correct settings.
1736 */
1737
1738 /* DRTH: 2: start tx if 64 bytes are in the fifo
1739 * FLTH: 0x10: refill with next packet if 512 bytes are free
1740 * MXDMA: 0: up to 256 byte bursts.
1741 * MXDMA must be <= FLTH
1742 * ECRETRY=1
1743 * ATP=1
1744 */
1745 np->tx_config = TxAutoPad | TxCollRetry | TxMxdma_256 |
1746 TX_FLTH_VAL | TX_DRTH_VAL_START;
1747 writel(np->tx_config, ioaddr + TxConfig);
1748
1749 /* DRTH 0x10: start copying to memory if 128 bytes are in the fifo
1750 * MXDMA 0: up to 256 byte bursts
1751 */
1752 np->rx_config = RxMxdma_256 | RX_DRTH_VAL;
1753 /* if receive ring now has bigger buffers than normal, enable jumbo */
1754 if (np->rx_buf_sz > NATSEMI_LONGPKT)
1755 np->rx_config |= RxAcceptLong;
1756
1757 writel(np->rx_config, ioaddr + RxConfig);
1758
1759 /* Disable PME:
1760 * The PME bit is initialized from the EEPROM contents.
1761 * PCI cards probably have PME disabled, but motherboard
1762 * implementations may have PME set to enable WakeOnLan.
1763 * With PME set the chip will scan incoming packets but
1764 * nothing will be written to memory. */
1765 np->SavedClkRun = readl(ioaddr + ClkRun);
1766 writel(np->SavedClkRun & ~PMEEnable, ioaddr + ClkRun);
1767 if (np->SavedClkRun & PMEStatus && netif_msg_wol(np)) {
1768 printk(KERN_NOTICE "%s: Wake-up event %#08x\n",
1769 dev->name, readl(ioaddr + WOLCmd));
1770 }
1771
1772 check_link(dev);
1773 __set_rx_mode(dev);
1774
1775 /* Enable interrupts by setting the interrupt mask. */
1776 writel(DEFAULT_INTR, ioaddr + IntrMask);
broonie@sirena.org.uk14fdd902007-03-14 19:49:13 +00001777 natsemi_irq_enable(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001778
1779 writel(RxOn | TxOn, ioaddr + ChipCmd);
1780 writel(StatsClear, ioaddr + StatsCtrl); /* Clear Stats */
1781}
1782
1783/*
1784 * netdev_timer:
1785 * Purpose:
1786 * 1) check for link changes. Usually they are handled by the MII interrupt
1787 * but it doesn't hurt to check twice.
1788 * 2) check for sudden death of the NIC:
1789 * It seems that a reference set for this chip went out with incorrect info,
1790 * and there exist boards that aren't quite right. An unexpected voltage
1791 * drop can cause the PHY to get itself in a weird state (basically reset).
Mark Brown1a147802007-05-03 10:36:56 +01001792 * NOTE: this only seems to affect revC chips. The user can disable
1793 * this check via dspcfg_workaround sysfs option.
Linus Torvalds1da177e2005-04-16 15:20:36 -07001794 * 3) check of death of the RX path due to OOM
1795 */
1796static void netdev_timer(unsigned long data)
1797{
1798 struct net_device *dev = (struct net_device *)data;
1799 struct netdev_private *np = netdev_priv(dev);
1800 void __iomem * ioaddr = ns_ioaddr(dev);
Mark Brownf2cade12007-10-09 22:57:39 +01001801 int next_tick = NATSEMI_TIMER_FREQ;
Linus Torvalds1da177e2005-04-16 15:20:36 -07001802
1803 if (netif_msg_timer(np)) {
1804 /* DO NOT read the IntrStatus register,
1805 * a read clears any pending interrupts.
1806 */
1807 printk(KERN_DEBUG "%s: Media selection timer tick.\n",
1808 dev->name);
1809 }
1810
1811 if (dev->if_port == PORT_TP) {
1812 u16 dspcfg;
1813
1814 spin_lock_irq(&np->lock);
1815 /* check for a nasty random phy-reset - use dspcfg as a flag */
1816 writew(1, ioaddr+PGSEL);
1817 dspcfg = readw(ioaddr+DSPCFG);
1818 writew(0, ioaddr+PGSEL);
Mark Brown1a147802007-05-03 10:36:56 +01001819 if (np->dspcfg_workaround && dspcfg != np->dspcfg) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07001820 if (!netif_queue_stopped(dev)) {
1821 spin_unlock_irq(&np->lock);
Mark Brownd0ed4862007-05-03 10:36:50 +01001822 if (netif_msg_drv(np))
Linus Torvalds1da177e2005-04-16 15:20:36 -07001823 printk(KERN_NOTICE "%s: possible phy reset: "
1824 "re-initializing\n", dev->name);
1825 disable_irq(dev->irq);
1826 spin_lock_irq(&np->lock);
1827 natsemi_stop_rxtx(dev);
1828 dump_ring(dev);
1829 reinit_ring(dev);
1830 init_registers(dev);
1831 spin_unlock_irq(&np->lock);
1832 enable_irq(dev->irq);
1833 } else {
1834 /* hurry back */
1835 next_tick = HZ;
1836 spin_unlock_irq(&np->lock);
1837 }
1838 } else {
1839 /* init_registers() calls check_link() for the above case */
1840 check_link(dev);
1841 spin_unlock_irq(&np->lock);
1842 }
1843 } else {
1844 spin_lock_irq(&np->lock);
1845 check_link(dev);
1846 spin_unlock_irq(&np->lock);
1847 }
1848 if (np->oom) {
1849 disable_irq(dev->irq);
1850 np->oom = 0;
1851 refill_rx(dev);
1852 enable_irq(dev->irq);
1853 if (!np->oom) {
1854 writel(RxOn, ioaddr + ChipCmd);
1855 } else {
1856 next_tick = 1;
1857 }
1858 }
1859 mod_timer(&np->timer, jiffies + next_tick);
1860}
1861
1862static void dump_ring(struct net_device *dev)
1863{
1864 struct netdev_private *np = netdev_priv(dev);
1865
1866 if (netif_msg_pktdata(np)) {
1867 int i;
1868 printk(KERN_DEBUG " Tx ring at %p:\n", np->tx_ring);
1869 for (i = 0; i < TX_RING_SIZE; i++) {
1870 printk(KERN_DEBUG " #%d desc. %#08x %#08x %#08x.\n",
1871 i, np->tx_ring[i].next_desc,
1872 np->tx_ring[i].cmd_status,
1873 np->tx_ring[i].addr);
1874 }
1875 printk(KERN_DEBUG " Rx ring %p:\n", np->rx_ring);
1876 for (i = 0; i < RX_RING_SIZE; i++) {
1877 printk(KERN_DEBUG " #%d desc. %#08x %#08x %#08x.\n",
1878 i, np->rx_ring[i].next_desc,
1879 np->rx_ring[i].cmd_status,
1880 np->rx_ring[i].addr);
1881 }
1882 }
1883}
1884
1885static void tx_timeout(struct net_device *dev)
1886{
1887 struct netdev_private *np = netdev_priv(dev);
1888 void __iomem * ioaddr = ns_ioaddr(dev);
1889
1890 disable_irq(dev->irq);
1891 spin_lock_irq(&np->lock);
1892 if (!np->hands_off) {
1893 if (netif_msg_tx_err(np))
1894 printk(KERN_WARNING
1895 "%s: Transmit timed out, status %#08x,"
1896 " resetting...\n",
1897 dev->name, readl(ioaddr + IntrStatus));
1898 dump_ring(dev);
1899
1900 natsemi_reset(dev);
1901 reinit_ring(dev);
1902 init_registers(dev);
1903 } else {
1904 printk(KERN_WARNING
1905 "%s: tx_timeout while in hands_off state?\n",
1906 dev->name);
1907 }
1908 spin_unlock_irq(&np->lock);
1909 enable_irq(dev->irq);
1910
1911 dev->trans_start = jiffies;
1912 np->stats.tx_errors++;
1913 netif_wake_queue(dev);
1914}
1915
1916static int alloc_ring(struct net_device *dev)
1917{
1918 struct netdev_private *np = netdev_priv(dev);
1919 np->rx_ring = pci_alloc_consistent(np->pci_dev,
1920 sizeof(struct netdev_desc) * (RX_RING_SIZE+TX_RING_SIZE),
1921 &np->ring_dma);
1922 if (!np->rx_ring)
1923 return -ENOMEM;
1924 np->tx_ring = &np->rx_ring[RX_RING_SIZE];
1925 return 0;
1926}
1927
1928static void refill_rx(struct net_device *dev)
1929{
1930 struct netdev_private *np = netdev_priv(dev);
1931
1932 /* Refill the Rx ring buffers. */
1933 for (; np->cur_rx - np->dirty_rx > 0; np->dirty_rx++) {
1934 struct sk_buff *skb;
1935 int entry = np->dirty_rx % RX_RING_SIZE;
1936 if (np->rx_skbuff[entry] == NULL) {
1937 unsigned int buflen = np->rx_buf_sz+NATSEMI_PADDING;
1938 skb = dev_alloc_skb(buflen);
1939 np->rx_skbuff[entry] = skb;
1940 if (skb == NULL)
1941 break; /* Better luck next round. */
1942 skb->dev = dev; /* Mark as being used by this device. */
1943 np->rx_dma[entry] = pci_map_single(np->pci_dev,
David S. Miller689be432005-06-28 15:25:31 -07001944 skb->data, buflen, PCI_DMA_FROMDEVICE);
Linus Torvalds1da177e2005-04-16 15:20:36 -07001945 np->rx_ring[entry].addr = cpu_to_le32(np->rx_dma[entry]);
1946 }
1947 np->rx_ring[entry].cmd_status = cpu_to_le32(np->rx_buf_sz);
1948 }
1949 if (np->cur_rx - np->dirty_rx == RX_RING_SIZE) {
1950 if (netif_msg_rx_err(np))
1951 printk(KERN_WARNING "%s: going OOM.\n", dev->name);
1952 np->oom = 1;
1953 }
1954}
1955
1956static void set_bufsize(struct net_device *dev)
1957{
1958 struct netdev_private *np = netdev_priv(dev);
1959 if (dev->mtu <= ETH_DATA_LEN)
1960 np->rx_buf_sz = ETH_DATA_LEN + NATSEMI_HEADERS;
1961 else
1962 np->rx_buf_sz = dev->mtu + NATSEMI_HEADERS;
1963}
1964
1965/* Initialize the Rx and Tx rings, along with various 'dev' bits. */
1966static void init_ring(struct net_device *dev)
1967{
1968 struct netdev_private *np = netdev_priv(dev);
1969 int i;
1970
1971 /* 1) TX ring */
1972 np->dirty_tx = np->cur_tx = 0;
1973 for (i = 0; i < TX_RING_SIZE; i++) {
1974 np->tx_skbuff[i] = NULL;
1975 np->tx_ring[i].next_desc = cpu_to_le32(np->ring_dma
1976 +sizeof(struct netdev_desc)
1977 *((i+1)%TX_RING_SIZE+RX_RING_SIZE));
1978 np->tx_ring[i].cmd_status = 0;
1979 }
1980
1981 /* 2) RX ring */
1982 np->dirty_rx = 0;
1983 np->cur_rx = RX_RING_SIZE;
1984 np->oom = 0;
1985 set_bufsize(dev);
1986
1987 np->rx_head_desc = &np->rx_ring[0];
1988
1989 /* Please be carefull before changing this loop - at least gcc-2.95.1
1990 * miscompiles it otherwise.
1991 */
1992 /* Initialize all Rx descriptors. */
1993 for (i = 0; i < RX_RING_SIZE; i++) {
1994 np->rx_ring[i].next_desc = cpu_to_le32(np->ring_dma
1995 +sizeof(struct netdev_desc)
1996 *((i+1)%RX_RING_SIZE));
1997 np->rx_ring[i].cmd_status = cpu_to_le32(DescOwn);
1998 np->rx_skbuff[i] = NULL;
1999 }
2000 refill_rx(dev);
2001 dump_ring(dev);
2002}
2003
2004static void drain_tx(struct net_device *dev)
2005{
2006 struct netdev_private *np = netdev_priv(dev);
2007 int i;
2008
2009 for (i = 0; i < TX_RING_SIZE; i++) {
2010 if (np->tx_skbuff[i]) {
2011 pci_unmap_single(np->pci_dev,
2012 np->tx_dma[i], np->tx_skbuff[i]->len,
2013 PCI_DMA_TODEVICE);
2014 dev_kfree_skb(np->tx_skbuff[i]);
2015 np->stats.tx_dropped++;
2016 }
2017 np->tx_skbuff[i] = NULL;
2018 }
2019}
2020
2021static void drain_rx(struct net_device *dev)
2022{
2023 struct netdev_private *np = netdev_priv(dev);
2024 unsigned int buflen = np->rx_buf_sz;
2025 int i;
2026
2027 /* Free all the skbuffs in the Rx queue. */
2028 for (i = 0; i < RX_RING_SIZE; i++) {
2029 np->rx_ring[i].cmd_status = 0;
2030 np->rx_ring[i].addr = 0xBADF00D0; /* An invalid address. */
2031 if (np->rx_skbuff[i]) {
2032 pci_unmap_single(np->pci_dev,
2033 np->rx_dma[i], buflen,
2034 PCI_DMA_FROMDEVICE);
2035 dev_kfree_skb(np->rx_skbuff[i]);
2036 }
2037 np->rx_skbuff[i] = NULL;
2038 }
2039}
2040
2041static void drain_ring(struct net_device *dev)
2042{
2043 drain_rx(dev);
2044 drain_tx(dev);
2045}
2046
2047static void free_ring(struct net_device *dev)
2048{
2049 struct netdev_private *np = netdev_priv(dev);
2050 pci_free_consistent(np->pci_dev,
2051 sizeof(struct netdev_desc) * (RX_RING_SIZE+TX_RING_SIZE),
2052 np->rx_ring, np->ring_dma);
2053}
2054
2055static void reinit_rx(struct net_device *dev)
2056{
2057 struct netdev_private *np = netdev_priv(dev);
2058 int i;
2059
2060 /* RX Ring */
2061 np->dirty_rx = 0;
2062 np->cur_rx = RX_RING_SIZE;
2063 np->rx_head_desc = &np->rx_ring[0];
2064 /* Initialize all Rx descriptors. */
2065 for (i = 0; i < RX_RING_SIZE; i++)
2066 np->rx_ring[i].cmd_status = cpu_to_le32(DescOwn);
2067
2068 refill_rx(dev);
2069}
2070
2071static void reinit_ring(struct net_device *dev)
2072{
2073 struct netdev_private *np = netdev_priv(dev);
2074 int i;
2075
2076 /* drain TX ring */
2077 drain_tx(dev);
2078 np->dirty_tx = np->cur_tx = 0;
2079 for (i=0;i<TX_RING_SIZE;i++)
2080 np->tx_ring[i].cmd_status = 0;
2081
2082 reinit_rx(dev);
2083}
2084
2085static int start_tx(struct sk_buff *skb, struct net_device *dev)
2086{
2087 struct netdev_private *np = netdev_priv(dev);
2088 void __iomem * ioaddr = ns_ioaddr(dev);
2089 unsigned entry;
Sergei Shtylyov6006f7f2007-03-06 00:10:08 +04002090 unsigned long flags;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002091
2092 /* Note: Ordering is important here, set the field with the
2093 "ownership" bit last, and only then increment cur_tx. */
2094
2095 /* Calculate the next Tx descriptor entry. */
2096 entry = np->cur_tx % TX_RING_SIZE;
2097
2098 np->tx_skbuff[entry] = skb;
2099 np->tx_dma[entry] = pci_map_single(np->pci_dev,
2100 skb->data,skb->len, PCI_DMA_TODEVICE);
2101
2102 np->tx_ring[entry].addr = cpu_to_le32(np->tx_dma[entry]);
2103
Sergei Shtylyov6006f7f2007-03-06 00:10:08 +04002104 spin_lock_irqsave(&np->lock, flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002105
2106 if (!np->hands_off) {
2107 np->tx_ring[entry].cmd_status = cpu_to_le32(DescOwn | skb->len);
2108 /* StrongARM: Explicitly cache flush np->tx_ring and
2109 * skb->data,skb->len. */
2110 wmb();
2111 np->cur_tx++;
2112 if (np->cur_tx - np->dirty_tx >= TX_QUEUE_LEN - 1) {
2113 netdev_tx_done(dev);
2114 if (np->cur_tx - np->dirty_tx >= TX_QUEUE_LEN - 1)
2115 netif_stop_queue(dev);
2116 }
2117 /* Wake the potentially-idle transmit channel. */
2118 writel(TxOn, ioaddr + ChipCmd);
2119 } else {
2120 dev_kfree_skb_irq(skb);
2121 np->stats.tx_dropped++;
2122 }
Sergei Shtylyov6006f7f2007-03-06 00:10:08 +04002123 spin_unlock_irqrestore(&np->lock, flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002124
2125 dev->trans_start = jiffies;
2126
2127 if (netif_msg_tx_queued(np)) {
2128 printk(KERN_DEBUG "%s: Transmit frame #%d queued in slot %d.\n",
2129 dev->name, np->cur_tx, entry);
2130 }
2131 return 0;
2132}
2133
2134static void netdev_tx_done(struct net_device *dev)
2135{
2136 struct netdev_private *np = netdev_priv(dev);
2137
2138 for (; np->cur_tx - np->dirty_tx > 0; np->dirty_tx++) {
2139 int entry = np->dirty_tx % TX_RING_SIZE;
2140 if (np->tx_ring[entry].cmd_status & cpu_to_le32(DescOwn))
2141 break;
2142 if (netif_msg_tx_done(np))
2143 printk(KERN_DEBUG
2144 "%s: tx frame #%d finished, status %#08x.\n",
2145 dev->name, np->dirty_tx,
2146 le32_to_cpu(np->tx_ring[entry].cmd_status));
2147 if (np->tx_ring[entry].cmd_status & cpu_to_le32(DescPktOK)) {
2148 np->stats.tx_packets++;
2149 np->stats.tx_bytes += np->tx_skbuff[entry]->len;
2150 } else { /* Various Tx errors */
2151 int tx_status =
2152 le32_to_cpu(np->tx_ring[entry].cmd_status);
2153 if (tx_status & (DescTxAbort|DescTxExcColl))
2154 np->stats.tx_aborted_errors++;
2155 if (tx_status & DescTxFIFO)
2156 np->stats.tx_fifo_errors++;
2157 if (tx_status & DescTxCarrier)
2158 np->stats.tx_carrier_errors++;
2159 if (tx_status & DescTxOOWCol)
2160 np->stats.tx_window_errors++;
2161 np->stats.tx_errors++;
2162 }
2163 pci_unmap_single(np->pci_dev,np->tx_dma[entry],
2164 np->tx_skbuff[entry]->len,
2165 PCI_DMA_TODEVICE);
2166 /* Free the original skb. */
2167 dev_kfree_skb_irq(np->tx_skbuff[entry]);
2168 np->tx_skbuff[entry] = NULL;
2169 }
2170 if (netif_queue_stopped(dev)
2171 && np->cur_tx - np->dirty_tx < TX_QUEUE_LEN - 4) {
2172 /* The ring is no longer full, wake queue. */
2173 netif_wake_queue(dev);
2174 }
2175}
2176
Mark Brownb27a16b2006-02-02 00:00:01 +00002177/* The interrupt handler doesn't actually handle interrupts itself, it
2178 * schedules a NAPI poll if there is anything to do. */
David Howells7d12e782006-10-05 14:55:46 +01002179static irqreturn_t intr_handler(int irq, void *dev_instance)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002180{
2181 struct net_device *dev = dev_instance;
2182 struct netdev_private *np = netdev_priv(dev);
2183 void __iomem * ioaddr = ns_ioaddr(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002184
broonie@sirena.org.uk069f8252007-03-14 19:49:14 +00002185 /* Reading IntrStatus automatically acknowledges so don't do
2186 * that while interrupts are disabled, (for example, while a
2187 * poll is scheduled). */
2188 if (np->hands_off || !readl(ioaddr + IntrEnable))
Linus Torvalds1da177e2005-04-16 15:20:36 -07002189 return IRQ_NONE;
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002190
Mark Brownb27a16b2006-02-02 00:00:01 +00002191 np->intr_status = readl(ioaddr + IntrStatus);
2192
broonie@sirena.org.uk069f8252007-03-14 19:49:14 +00002193 if (!np->intr_status)
2194 return IRQ_NONE;
2195
Mark Brownb27a16b2006-02-02 00:00:01 +00002196 if (netif_msg_intr(np))
2197 printk(KERN_DEBUG
2198 "%s: Interrupt, status %#08x, mask %#08x.\n",
2199 dev->name, np->intr_status,
2200 readl(ioaddr + IntrMask));
2201
Mark Brownb27a16b2006-02-02 00:00:01 +00002202 prefetch(&np->rx_skbuff[np->cur_rx % RX_RING_SIZE]);
2203
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002204 if (netif_rx_schedule_prep(dev, &np->napi)) {
Mark Brownb27a16b2006-02-02 00:00:01 +00002205 /* Disable interrupts and register for poll */
2206 natsemi_irq_disable(dev);
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002207 __netif_rx_schedule(dev, &np->napi);
broonie@sirena.org.uk069f8252007-03-14 19:49:14 +00002208 } else
2209 printk(KERN_WARNING
2210 "%s: Ignoring interrupt, status %#08x, mask %#08x.\n",
2211 dev->name, np->intr_status,
2212 readl(ioaddr + IntrMask));
2213
Mark Brownb27a16b2006-02-02 00:00:01 +00002214 return IRQ_HANDLED;
2215}
2216
2217/* This is the NAPI poll routine. As well as the standard RX handling
2218 * it also handles all other interrupts that the chip might raise.
2219 */
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002220static int natsemi_poll(struct napi_struct *napi, int budget)
Mark Brownb27a16b2006-02-02 00:00:01 +00002221{
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002222 struct netdev_private *np = container_of(napi, struct netdev_private, napi);
2223 struct net_device *dev = np->dev;
Mark Brownb27a16b2006-02-02 00:00:01 +00002224 void __iomem * ioaddr = ns_ioaddr(dev);
Mark Brownb27a16b2006-02-02 00:00:01 +00002225 int work_done = 0;
2226
Linus Torvalds1da177e2005-04-16 15:20:36 -07002227 do {
broonie@sirena.org.uk069f8252007-03-14 19:49:14 +00002228 if (netif_msg_intr(np))
2229 printk(KERN_DEBUG
2230 "%s: Poll, status %#08x, mask %#08x.\n",
2231 dev->name, np->intr_status,
2232 readl(ioaddr + IntrMask));
2233
broonie@sirena.org.ukd2a90032007-03-14 19:49:15 +00002234 /* netdev_rx() may read IntrStatus again if the RX state
2235 * machine falls over so do it first. */
2236 if (np->intr_status &
2237 (IntrRxDone | IntrRxIntr | RxStatusFIFOOver |
2238 IntrRxErr | IntrRxOverrun)) {
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002239 netdev_rx(dev, &work_done, budget);
broonie@sirena.org.ukd2a90032007-03-14 19:49:15 +00002240 }
2241
Mark Brownb27a16b2006-02-02 00:00:01 +00002242 if (np->intr_status &
2243 (IntrTxDone | IntrTxIntr | IntrTxIdle | IntrTxErr)) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07002244 spin_lock(&np->lock);
2245 netdev_tx_done(dev);
2246 spin_unlock(&np->lock);
2247 }
2248
2249 /* Abnormal error summary/uncommon events handlers. */
Mark Brownb27a16b2006-02-02 00:00:01 +00002250 if (np->intr_status & IntrAbnormalSummary)
2251 netdev_error(dev, np->intr_status);
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002252
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002253 if (work_done >= budget)
2254 return work_done;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002255
Mark Brownb27a16b2006-02-02 00:00:01 +00002256 np->intr_status = readl(ioaddr + IntrStatus);
2257 } while (np->intr_status);
2258
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002259 netif_rx_complete(dev, napi);
Mark Brownb27a16b2006-02-02 00:00:01 +00002260
2261 /* Reenable interrupts providing nothing is trying to shut
2262 * the chip down. */
2263 spin_lock(&np->lock);
2264 if (!np->hands_off && netif_running(dev))
2265 natsemi_irq_enable(dev);
2266 spin_unlock(&np->lock);
2267
Stephen Hemmingerbea33482007-10-03 16:41:36 -07002268 return work_done;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002269}
2270
2271/* This routine is logically part of the interrupt handler, but separated
2272 for clarity and better register allocation. */
Mark Brownb27a16b2006-02-02 00:00:01 +00002273static void netdev_rx(struct net_device *dev, int *work_done, int work_to_do)
Linus Torvalds1da177e2005-04-16 15:20:36 -07002274{
2275 struct netdev_private *np = netdev_priv(dev);
2276 int entry = np->cur_rx % RX_RING_SIZE;
2277 int boguscnt = np->dirty_rx + RX_RING_SIZE - np->cur_rx;
2278 s32 desc_status = le32_to_cpu(np->rx_head_desc->cmd_status);
2279 unsigned int buflen = np->rx_buf_sz;
2280 void __iomem * ioaddr = ns_ioaddr(dev);
2281
2282 /* If the driver owns the next entry it's a new packet. Send it up. */
2283 while (desc_status < 0) { /* e.g. & DescOwn */
2284 int pkt_len;
2285 if (netif_msg_rx_status(np))
2286 printk(KERN_DEBUG
2287 " netdev_rx() entry %d status was %#08x.\n",
2288 entry, desc_status);
2289 if (--boguscnt < 0)
2290 break;
Mark Brownb27a16b2006-02-02 00:00:01 +00002291
2292 if (*work_done >= work_to_do)
2293 break;
2294
2295 (*work_done)++;
2296
Linus Torvalds1da177e2005-04-16 15:20:36 -07002297 pkt_len = (desc_status & DescSizeMask) - 4;
2298 if ((desc_status&(DescMore|DescPktOK|DescRxLong)) != DescPktOK){
2299 if (desc_status & DescMore) {
Sergei Shtylyov6006f7f2007-03-06 00:10:08 +04002300 unsigned long flags;
2301
Linus Torvalds1da177e2005-04-16 15:20:36 -07002302 if (netif_msg_rx_err(np))
2303 printk(KERN_WARNING
2304 "%s: Oversized(?) Ethernet "
2305 "frame spanned multiple "
2306 "buffers, entry %#08x "
2307 "status %#08x.\n", dev->name,
2308 np->cur_rx, desc_status);
2309 np->stats.rx_length_errors++;
Mark Browne72fd962006-02-02 00:00:02 +00002310
2311 /* The RX state machine has probably
2312 * locked up beneath us. Follow the
2313 * reset procedure documented in
2314 * AN-1287. */
2315
Sergei Shtylyov6006f7f2007-03-06 00:10:08 +04002316 spin_lock_irqsave(&np->lock, flags);
Mark Browne72fd962006-02-02 00:00:02 +00002317 reset_rx(dev);
2318 reinit_rx(dev);
2319 writel(np->ring_dma, ioaddr + RxRingPtr);
2320 check_link(dev);
Sergei Shtylyov6006f7f2007-03-06 00:10:08 +04002321 spin_unlock_irqrestore(&np->lock, flags);
Mark Browne72fd962006-02-02 00:00:02 +00002322
2323 /* We'll enable RX on exit from this
2324 * function. */
2325 break;
2326
Linus Torvalds1da177e2005-04-16 15:20:36 -07002327 } else {
2328 /* There was an error. */
2329 np->stats.rx_errors++;
2330 if (desc_status & (DescRxAbort|DescRxOver))
2331 np->stats.rx_over_errors++;
2332 if (desc_status & (DescRxLong|DescRxRunt))
2333 np->stats.rx_length_errors++;
2334 if (desc_status & (DescRxInvalid|DescRxAlign))
2335 np->stats.rx_frame_errors++;
2336 if (desc_status & DescRxCRC)
2337 np->stats.rx_crc_errors++;
2338 }
2339 } else if (pkt_len > np->rx_buf_sz) {
2340 /* if this is the tail of a double buffer
2341 * packet, we've already counted the error
2342 * on the first part. Ignore the second half.
2343 */
2344 } else {
2345 struct sk_buff *skb;
2346 /* Omit CRC size. */
2347 /* Check if the packet is long enough to accept
2348 * without copying to a minimally-sized skbuff. */
2349 if (pkt_len < rx_copybreak
2350 && (skb = dev_alloc_skb(pkt_len + RX_OFFSET)) != NULL) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07002351 /* 16 byte align the IP header */
2352 skb_reserve(skb, RX_OFFSET);
2353 pci_dma_sync_single_for_cpu(np->pci_dev,
2354 np->rx_dma[entry],
2355 buflen,
2356 PCI_DMA_FROMDEVICE);
David S. Miller8c7b7fa2007-07-10 22:08:12 -07002357 skb_copy_to_linear_data(skb,
2358 np->rx_skbuff[entry]->data, pkt_len);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002359 skb_put(skb, pkt_len);
2360 pci_dma_sync_single_for_device(np->pci_dev,
2361 np->rx_dma[entry],
2362 buflen,
2363 PCI_DMA_FROMDEVICE);
2364 } else {
2365 pci_unmap_single(np->pci_dev, np->rx_dma[entry],
2366 buflen, PCI_DMA_FROMDEVICE);
2367 skb_put(skb = np->rx_skbuff[entry], pkt_len);
2368 np->rx_skbuff[entry] = NULL;
2369 }
2370 skb->protocol = eth_type_trans(skb, dev);
Mark Brownb27a16b2006-02-02 00:00:01 +00002371 netif_receive_skb(skb);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002372 dev->last_rx = jiffies;
2373 np->stats.rx_packets++;
2374 np->stats.rx_bytes += pkt_len;
2375 }
2376 entry = (++np->cur_rx) % RX_RING_SIZE;
2377 np->rx_head_desc = &np->rx_ring[entry];
2378 desc_status = le32_to_cpu(np->rx_head_desc->cmd_status);
2379 }
2380 refill_rx(dev);
2381
2382 /* Restart Rx engine if stopped. */
2383 if (np->oom)
2384 mod_timer(&np->timer, jiffies + 1);
2385 else
2386 writel(RxOn, ioaddr + ChipCmd);
2387}
2388
2389static void netdev_error(struct net_device *dev, int intr_status)
2390{
2391 struct netdev_private *np = netdev_priv(dev);
2392 void __iomem * ioaddr = ns_ioaddr(dev);
2393
2394 spin_lock(&np->lock);
2395 if (intr_status & LinkChange) {
2396 u16 lpa = mdio_read(dev, MII_LPA);
2397 if (mdio_read(dev, MII_BMCR) & BMCR_ANENABLE
2398 && netif_msg_link(np)) {
2399 printk(KERN_INFO
2400 "%s: Autonegotiation advertising"
2401 " %#04x partner %#04x.\n", dev->name,
2402 np->advertising, lpa);
2403 }
2404
2405 /* read MII int status to clear the flag */
2406 readw(ioaddr + MIntrStatus);
2407 check_link(dev);
2408 }
2409 if (intr_status & StatsMax) {
2410 __get_stats(dev);
2411 }
2412 if (intr_status & IntrTxUnderrun) {
2413 if ((np->tx_config & TxDrthMask) < TX_DRTH_VAL_LIMIT) {
2414 np->tx_config += TX_DRTH_VAL_INC;
2415 if (netif_msg_tx_err(np))
2416 printk(KERN_NOTICE
2417 "%s: increased tx threshold, txcfg %#08x.\n",
2418 dev->name, np->tx_config);
2419 } else {
2420 if (netif_msg_tx_err(np))
2421 printk(KERN_NOTICE
2422 "%s: tx underrun with maximum tx threshold, txcfg %#08x.\n",
2423 dev->name, np->tx_config);
2424 }
2425 writel(np->tx_config, ioaddr + TxConfig);
2426 }
2427 if (intr_status & WOLPkt && netif_msg_wol(np)) {
2428 int wol_status = readl(ioaddr + WOLCmd);
2429 printk(KERN_NOTICE "%s: Link wake-up event %#08x\n",
2430 dev->name, wol_status);
2431 }
2432 if (intr_status & RxStatusFIFOOver) {
2433 if (netif_msg_rx_err(np) && netif_msg_intr(np)) {
2434 printk(KERN_NOTICE "%s: Rx status FIFO overrun\n",
2435 dev->name);
2436 }
2437 np->stats.rx_fifo_errors++;
Andrew Mortonc76720c2007-08-10 14:05:23 -07002438 np->stats.rx_errors++;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002439 }
2440 /* Hmmmmm, it's not clear how to recover from PCI faults. */
2441 if (intr_status & IntrPCIErr) {
2442 printk(KERN_NOTICE "%s: PCI error %#08x\n", dev->name,
2443 intr_status & IntrPCIErr);
2444 np->stats.tx_fifo_errors++;
Andrew Mortonc76720c2007-08-10 14:05:23 -07002445 np->stats.tx_errors++;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002446 np->stats.rx_fifo_errors++;
Andrew Mortonc76720c2007-08-10 14:05:23 -07002447 np->stats.rx_errors++;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002448 }
2449 spin_unlock(&np->lock);
2450}
2451
2452static void __get_stats(struct net_device *dev)
2453{
2454 void __iomem * ioaddr = ns_ioaddr(dev);
2455 struct netdev_private *np = netdev_priv(dev);
2456
2457 /* The chip only need report frame silently dropped. */
2458 np->stats.rx_crc_errors += readl(ioaddr + RxCRCErrs);
2459 np->stats.rx_missed_errors += readl(ioaddr + RxMissed);
2460}
2461
2462static struct net_device_stats *get_stats(struct net_device *dev)
2463{
2464 struct netdev_private *np = netdev_priv(dev);
2465
2466 /* The chip only need report frame silently dropped. */
2467 spin_lock_irq(&np->lock);
2468 if (netif_running(dev) && !np->hands_off)
2469 __get_stats(dev);
2470 spin_unlock_irq(&np->lock);
2471
2472 return &np->stats;
2473}
2474
2475#ifdef CONFIG_NET_POLL_CONTROLLER
2476static void natsemi_poll_controller(struct net_device *dev)
2477{
2478 disable_irq(dev->irq);
broonie@sirena.org.uk069f8252007-03-14 19:49:14 +00002479 intr_handler(dev->irq, dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002480 enable_irq(dev->irq);
2481}
2482#endif
2483
2484#define HASH_TABLE 0x200
2485static void __set_rx_mode(struct net_device *dev)
2486{
2487 void __iomem * ioaddr = ns_ioaddr(dev);
2488 struct netdev_private *np = netdev_priv(dev);
2489 u8 mc_filter[64]; /* Multicast hash filter */
2490 u32 rx_mode;
2491
2492 if (dev->flags & IFF_PROMISC) { /* Set promiscuous. */
Linus Torvalds1da177e2005-04-16 15:20:36 -07002493 rx_mode = RxFilterEnable | AcceptBroadcast
2494 | AcceptAllMulticast | AcceptAllPhys | AcceptMyPhys;
2495 } else if ((dev->mc_count > multicast_filter_limit)
2496 || (dev->flags & IFF_ALLMULTI)) {
2497 rx_mode = RxFilterEnable | AcceptBroadcast
2498 | AcceptAllMulticast | AcceptMyPhys;
2499 } else {
2500 struct dev_mc_list *mclist;
2501 int i;
2502 memset(mc_filter, 0, sizeof(mc_filter));
2503 for (i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count;
2504 i++, mclist = mclist->next) {
Stephen Hemmingerddfce6b2007-10-05 17:19:47 -07002505 int b = (ether_crc(ETH_ALEN, mclist->dmi_addr) >> 23) & 0x1ff;
2506 mc_filter[b/8] |= (1 << (b & 0x07));
Linus Torvalds1da177e2005-04-16 15:20:36 -07002507 }
2508 rx_mode = RxFilterEnable | AcceptBroadcast
2509 | AcceptMulticast | AcceptMyPhys;
2510 for (i = 0; i < 64; i += 2) {
Herbert Xu760f86d2005-04-16 16:24:16 +10002511 writel(HASH_TABLE + i, ioaddr + RxFilterAddr);
2512 writel((mc_filter[i + 1] << 8) + mc_filter[i],
2513 ioaddr + RxFilterData);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002514 }
2515 }
2516 writel(rx_mode, ioaddr + RxFilterAddr);
2517 np->cur_rx_mode = rx_mode;
2518}
2519
2520static int natsemi_change_mtu(struct net_device *dev, int new_mtu)
2521{
2522 if (new_mtu < 64 || new_mtu > NATSEMI_RX_LIMIT-NATSEMI_HEADERS)
2523 return -EINVAL;
2524
2525 dev->mtu = new_mtu;
2526
2527 /* synchronized against open : rtnl_lock() held by caller */
2528 if (netif_running(dev)) {
2529 struct netdev_private *np = netdev_priv(dev);
2530 void __iomem * ioaddr = ns_ioaddr(dev);
2531
2532 disable_irq(dev->irq);
2533 spin_lock(&np->lock);
2534 /* stop engines */
2535 natsemi_stop_rxtx(dev);
2536 /* drain rx queue */
2537 drain_rx(dev);
2538 /* change buffers */
2539 set_bufsize(dev);
2540 reinit_rx(dev);
2541 writel(np->ring_dma, ioaddr + RxRingPtr);
2542 /* restart engines */
2543 writel(RxOn | TxOn, ioaddr + ChipCmd);
2544 spin_unlock(&np->lock);
2545 enable_irq(dev->irq);
2546 }
2547 return 0;
2548}
2549
2550static void set_rx_mode(struct net_device *dev)
2551{
2552 struct netdev_private *np = netdev_priv(dev);
2553 spin_lock_irq(&np->lock);
2554 if (!np->hands_off)
2555 __set_rx_mode(dev);
2556 spin_unlock_irq(&np->lock);
2557}
2558
2559static void get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
2560{
2561 struct netdev_private *np = netdev_priv(dev);
2562 strncpy(info->driver, DRV_NAME, ETHTOOL_BUSINFO_LEN);
2563 strncpy(info->version, DRV_VERSION, ETHTOOL_BUSINFO_LEN);
2564 strncpy(info->bus_info, pci_name(np->pci_dev), ETHTOOL_BUSINFO_LEN);
2565}
2566
2567static int get_regs_len(struct net_device *dev)
2568{
2569 return NATSEMI_REGS_SIZE;
2570}
2571
2572static int get_eeprom_len(struct net_device *dev)
2573{
Mark Browna8b4cf42006-03-28 14:08:55 -08002574 struct netdev_private *np = netdev_priv(dev);
2575 return np->eeprom_size;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002576}
2577
2578static int get_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
2579{
2580 struct netdev_private *np = netdev_priv(dev);
2581 spin_lock_irq(&np->lock);
2582 netdev_get_ecmd(dev, ecmd);
2583 spin_unlock_irq(&np->lock);
2584 return 0;
2585}
2586
2587static int set_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
2588{
2589 struct netdev_private *np = netdev_priv(dev);
2590 int res;
2591 spin_lock_irq(&np->lock);
2592 res = netdev_set_ecmd(dev, ecmd);
2593 spin_unlock_irq(&np->lock);
2594 return res;
2595}
2596
2597static void get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
2598{
2599 struct netdev_private *np = netdev_priv(dev);
2600 spin_lock_irq(&np->lock);
2601 netdev_get_wol(dev, &wol->supported, &wol->wolopts);
2602 netdev_get_sopass(dev, wol->sopass);
2603 spin_unlock_irq(&np->lock);
2604}
2605
2606static int set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
2607{
2608 struct netdev_private *np = netdev_priv(dev);
2609 int res;
2610 spin_lock_irq(&np->lock);
2611 netdev_set_wol(dev, wol->wolopts);
2612 res = netdev_set_sopass(dev, wol->sopass);
2613 spin_unlock_irq(&np->lock);
2614 return res;
2615}
2616
2617static void get_regs(struct net_device *dev, struct ethtool_regs *regs, void *buf)
2618{
2619 struct netdev_private *np = netdev_priv(dev);
2620 regs->version = NATSEMI_REGS_VER;
2621 spin_lock_irq(&np->lock);
2622 netdev_get_regs(dev, buf);
2623 spin_unlock_irq(&np->lock);
2624}
2625
2626static u32 get_msglevel(struct net_device *dev)
2627{
2628 struct netdev_private *np = netdev_priv(dev);
2629 return np->msg_enable;
2630}
2631
2632static void set_msglevel(struct net_device *dev, u32 val)
2633{
2634 struct netdev_private *np = netdev_priv(dev);
2635 np->msg_enable = val;
2636}
2637
2638static int nway_reset(struct net_device *dev)
2639{
2640 int tmp;
2641 int r = -EINVAL;
2642 /* if autoneg is off, it's an error */
2643 tmp = mdio_read(dev, MII_BMCR);
2644 if (tmp & BMCR_ANENABLE) {
2645 tmp |= (BMCR_ANRESTART);
2646 mdio_write(dev, MII_BMCR, tmp);
2647 r = 0;
2648 }
2649 return r;
2650}
2651
2652static u32 get_link(struct net_device *dev)
2653{
2654 /* LSTATUS is latched low until a read - so read twice */
2655 mdio_read(dev, MII_BMSR);
2656 return (mdio_read(dev, MII_BMSR)&BMSR_LSTATUS) ? 1:0;
2657}
2658
2659static int get_eeprom(struct net_device *dev, struct ethtool_eeprom *eeprom, u8 *data)
2660{
2661 struct netdev_private *np = netdev_priv(dev);
Mark Browna8b4cf42006-03-28 14:08:55 -08002662 u8 *eebuf;
Linus Torvalds1da177e2005-04-16 15:20:36 -07002663 int res;
2664
Mark Browna8b4cf42006-03-28 14:08:55 -08002665 eebuf = kmalloc(np->eeprom_size, GFP_KERNEL);
2666 if (!eebuf)
2667 return -ENOMEM;
2668
Linus Torvalds1da177e2005-04-16 15:20:36 -07002669 eeprom->magic = PCI_VENDOR_ID_NS | (PCI_DEVICE_ID_NS_83815<<16);
2670 spin_lock_irq(&np->lock);
2671 res = netdev_get_eeprom(dev, eebuf);
2672 spin_unlock_irq(&np->lock);
2673 if (!res)
2674 memcpy(data, eebuf+eeprom->offset, eeprom->len);
Mark Browna8b4cf42006-03-28 14:08:55 -08002675 kfree(eebuf);
Linus Torvalds1da177e2005-04-16 15:20:36 -07002676 return res;
2677}
2678
Jeff Garzik7282d492006-09-13 14:30:00 -04002679static const struct ethtool_ops ethtool_ops = {
Linus Torvalds1da177e2005-04-16 15:20:36 -07002680 .get_drvinfo = get_drvinfo,
2681 .get_regs_len = get_regs_len,
2682 .get_eeprom_len = get_eeprom_len,
2683 .get_settings = get_settings,
2684 .set_settings = set_settings,
2685 .get_wol = get_wol,
2686 .set_wol = set_wol,
2687 .get_regs = get_regs,
2688 .get_msglevel = get_msglevel,
2689 .set_msglevel = set_msglevel,
2690 .nway_reset = nway_reset,
2691 .get_link = get_link,
2692 .get_eeprom = get_eeprom,
2693};
2694
2695static int netdev_set_wol(struct net_device *dev, u32 newval)
2696{
2697 struct netdev_private *np = netdev_priv(dev);
2698 void __iomem * ioaddr = ns_ioaddr(dev);
2699 u32 data = readl(ioaddr + WOLCmd) & ~WakeOptsSummary;
2700
2701 /* translate to bitmasks this chip understands */
2702 if (newval & WAKE_PHY)
2703 data |= WakePhy;
2704 if (newval & WAKE_UCAST)
2705 data |= WakeUnicast;
2706 if (newval & WAKE_MCAST)
2707 data |= WakeMulticast;
2708 if (newval & WAKE_BCAST)
2709 data |= WakeBroadcast;
2710 if (newval & WAKE_ARP)
2711 data |= WakeArp;
2712 if (newval & WAKE_MAGIC)
2713 data |= WakeMagic;
2714 if (np->srr >= SRR_DP83815_D) {
2715 if (newval & WAKE_MAGICSECURE) {
2716 data |= WakeMagicSecure;
2717 }
2718 }
2719
2720 writel(data, ioaddr + WOLCmd);
2721
2722 return 0;
2723}
2724
2725static int netdev_get_wol(struct net_device *dev, u32 *supported, u32 *cur)
2726{
2727 struct netdev_private *np = netdev_priv(dev);
2728 void __iomem * ioaddr = ns_ioaddr(dev);
2729 u32 regval = readl(ioaddr + WOLCmd);
2730
2731 *supported = (WAKE_PHY | WAKE_UCAST | WAKE_MCAST | WAKE_BCAST
2732 | WAKE_ARP | WAKE_MAGIC);
2733
2734 if (np->srr >= SRR_DP83815_D) {
2735 /* SOPASS works on revD and higher */
2736 *supported |= WAKE_MAGICSECURE;
2737 }
2738 *cur = 0;
2739
2740 /* translate from chip bitmasks */
2741 if (regval & WakePhy)
2742 *cur |= WAKE_PHY;
2743 if (regval & WakeUnicast)
2744 *cur |= WAKE_UCAST;
2745 if (regval & WakeMulticast)
2746 *cur |= WAKE_MCAST;
2747 if (regval & WakeBroadcast)
2748 *cur |= WAKE_BCAST;
2749 if (regval & WakeArp)
2750 *cur |= WAKE_ARP;
2751 if (regval & WakeMagic)
2752 *cur |= WAKE_MAGIC;
2753 if (regval & WakeMagicSecure) {
2754 /* this can be on in revC, but it's broken */
2755 *cur |= WAKE_MAGICSECURE;
2756 }
2757
2758 return 0;
2759}
2760
2761static int netdev_set_sopass(struct net_device *dev, u8 *newval)
2762{
2763 struct netdev_private *np = netdev_priv(dev);
2764 void __iomem * ioaddr = ns_ioaddr(dev);
2765 u16 *sval = (u16 *)newval;
2766 u32 addr;
2767
2768 if (np->srr < SRR_DP83815_D) {
2769 return 0;
2770 }
2771
2772 /* enable writing to these registers by disabling the RX filter */
2773 addr = readl(ioaddr + RxFilterAddr) & ~RFCRAddressMask;
2774 addr &= ~RxFilterEnable;
2775 writel(addr, ioaddr + RxFilterAddr);
2776
2777 /* write the three words to (undocumented) RFCR vals 0xa, 0xc, 0xe */
2778 writel(addr | 0xa, ioaddr + RxFilterAddr);
2779 writew(sval[0], ioaddr + RxFilterData);
2780
2781 writel(addr | 0xc, ioaddr + RxFilterAddr);
2782 writew(sval[1], ioaddr + RxFilterData);
2783
2784 writel(addr | 0xe, ioaddr + RxFilterAddr);
2785 writew(sval[2], ioaddr + RxFilterData);
2786
2787 /* re-enable the RX filter */
2788 writel(addr | RxFilterEnable, ioaddr + RxFilterAddr);
2789
2790 return 0;
2791}
2792
2793static int netdev_get_sopass(struct net_device *dev, u8 *data)
2794{
2795 struct netdev_private *np = netdev_priv(dev);
2796 void __iomem * ioaddr = ns_ioaddr(dev);
2797 u16 *sval = (u16 *)data;
2798 u32 addr;
2799
2800 if (np->srr < SRR_DP83815_D) {
2801 sval[0] = sval[1] = sval[2] = 0;
2802 return 0;
2803 }
2804
2805 /* read the three words from (undocumented) RFCR vals 0xa, 0xc, 0xe */
2806 addr = readl(ioaddr + RxFilterAddr) & ~RFCRAddressMask;
2807
2808 writel(addr | 0xa, ioaddr + RxFilterAddr);
2809 sval[0] = readw(ioaddr + RxFilterData);
2810
2811 writel(addr | 0xc, ioaddr + RxFilterAddr);
2812 sval[1] = readw(ioaddr + RxFilterData);
2813
2814 writel(addr | 0xe, ioaddr + RxFilterAddr);
2815 sval[2] = readw(ioaddr + RxFilterData);
2816
2817 writel(addr, ioaddr + RxFilterAddr);
2818
2819 return 0;
2820}
2821
2822static int netdev_get_ecmd(struct net_device *dev, struct ethtool_cmd *ecmd)
2823{
2824 struct netdev_private *np = netdev_priv(dev);
2825 u32 tmp;
2826
2827 ecmd->port = dev->if_port;
2828 ecmd->speed = np->speed;
2829 ecmd->duplex = np->duplex;
2830 ecmd->autoneg = np->autoneg;
2831 ecmd->advertising = 0;
2832 if (np->advertising & ADVERTISE_10HALF)
2833 ecmd->advertising |= ADVERTISED_10baseT_Half;
2834 if (np->advertising & ADVERTISE_10FULL)
2835 ecmd->advertising |= ADVERTISED_10baseT_Full;
2836 if (np->advertising & ADVERTISE_100HALF)
2837 ecmd->advertising |= ADVERTISED_100baseT_Half;
2838 if (np->advertising & ADVERTISE_100FULL)
2839 ecmd->advertising |= ADVERTISED_100baseT_Full;
2840 ecmd->supported = (SUPPORTED_Autoneg |
2841 SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full |
2842 SUPPORTED_100baseT_Half | SUPPORTED_100baseT_Full |
2843 SUPPORTED_TP | SUPPORTED_MII | SUPPORTED_FIBRE);
2844 ecmd->phy_address = np->phy_addr_external;
2845 /*
2846 * We intentionally report the phy address of the external
2847 * phy, even if the internal phy is used. This is necessary
2848 * to work around a deficiency of the ethtool interface:
2849 * It's only possible to query the settings of the active
Jeff Garzik6aa20a22006-09-13 13:24:59 -04002850 * port. Therefore
Linus Torvalds1da177e2005-04-16 15:20:36 -07002851 * # ethtool -s ethX port mii
2852 * actually sends an ioctl to switch to port mii with the
2853 * settings that are used for the current active port.
2854 * If we would report a different phy address in this
2855 * command, then
2856 * # ethtool -s ethX port tp;ethtool -s ethX port mii
2857 * would unintentionally change the phy address.
2858 *
2859 * Fortunately the phy address doesn't matter with the
2860 * internal phy...
2861 */
2862
2863 /* set information based on active port type */
2864 switch (ecmd->port) {
2865 default:
2866 case PORT_TP:
2867 ecmd->advertising |= ADVERTISED_TP;
2868 ecmd->transceiver = XCVR_INTERNAL;
2869 break;
2870 case PORT_MII:
2871 ecmd->advertising |= ADVERTISED_MII;
2872 ecmd->transceiver = XCVR_EXTERNAL;
2873 break;
2874 case PORT_FIBRE:
2875 ecmd->advertising |= ADVERTISED_FIBRE;
2876 ecmd->transceiver = XCVR_EXTERNAL;
2877 break;
2878 }
2879
2880 /* if autonegotiation is on, try to return the active speed/duplex */
2881 if (ecmd->autoneg == AUTONEG_ENABLE) {
2882 ecmd->advertising |= ADVERTISED_Autoneg;
2883 tmp = mii_nway_result(
2884 np->advertising & mdio_read(dev, MII_LPA));
2885 if (tmp == LPA_100FULL || tmp == LPA_100HALF)
2886 ecmd->speed = SPEED_100;
2887 else
2888 ecmd->speed = SPEED_10;
2889 if (tmp == LPA_100FULL || tmp == LPA_10FULL)
2890 ecmd->duplex = DUPLEX_FULL;
2891 else
2892 ecmd->duplex = DUPLEX_HALF;
2893 }
2894
2895 /* ignore maxtxpkt, maxrxpkt for now */
2896
2897 return 0;
2898}
2899
2900static int netdev_set_ecmd(struct net_device *dev, struct ethtool_cmd *ecmd)
2901{
2902 struct netdev_private *np = netdev_priv(dev);
2903
2904 if (ecmd->port != PORT_TP && ecmd->port != PORT_MII && ecmd->port != PORT_FIBRE)
2905 return -EINVAL;
2906 if (ecmd->transceiver != XCVR_INTERNAL && ecmd->transceiver != XCVR_EXTERNAL)
2907 return -EINVAL;
2908 if (ecmd->autoneg == AUTONEG_ENABLE) {
2909 if ((ecmd->advertising & (ADVERTISED_10baseT_Half |
2910 ADVERTISED_10baseT_Full |
2911 ADVERTISED_100baseT_Half |
2912 ADVERTISED_100baseT_Full)) == 0) {
2913 return -EINVAL;
2914 }
2915 } else if (ecmd->autoneg == AUTONEG_DISABLE) {
2916 if (ecmd->speed != SPEED_10 && ecmd->speed != SPEED_100)
2917 return -EINVAL;
2918 if (ecmd->duplex != DUPLEX_HALF && ecmd->duplex != DUPLEX_FULL)
2919 return -EINVAL;
2920 } else {
2921 return -EINVAL;
2922 }
2923
2924 /*
Mark Brown68c90162007-02-19 20:15:39 +00002925 * If we're ignoring the PHY then autoneg and the internal
2926 * transciever are really not going to work so don't let the
2927 * user select them.
2928 */
2929 if (np->ignore_phy && (ecmd->autoneg == AUTONEG_ENABLE ||
2930 ecmd->port == PORT_TP))
2931 return -EINVAL;
2932
2933 /*
Linus Torvalds1da177e2005-04-16 15:20:36 -07002934 * maxtxpkt, maxrxpkt: ignored for now.
2935 *
2936 * transceiver:
2937 * PORT_TP is always XCVR_INTERNAL, PORT_MII and PORT_FIBRE are always
2938 * XCVR_EXTERNAL. The implementation thus ignores ecmd->transceiver and
2939 * selects based on ecmd->port.
2940 *
2941 * Actually PORT_FIBRE is nearly identical to PORT_MII: it's for fibre
2942 * phys that are connected to the mii bus. It's used to apply fibre
2943 * specific updates.
2944 */
2945
2946 /* WHEW! now lets bang some bits */
2947
2948 /* save the parms */
2949 dev->if_port = ecmd->port;
2950 np->autoneg = ecmd->autoneg;
2951 np->phy_addr_external = ecmd->phy_address & PhyAddrMask;
2952 if (np->autoneg == AUTONEG_ENABLE) {
2953 /* advertise only what has been requested */
2954 np->advertising &= ~(ADVERTISE_ALL | ADVERTISE_100BASE4);
2955 if (ecmd->advertising & ADVERTISED_10baseT_Half)
2956 np->advertising |= ADVERTISE_10HALF;
2957 if (ecmd->advertising & ADVERTISED_10baseT_Full)
2958 np->advertising |= ADVERTISE_10FULL;
2959 if (ecmd->advertising & ADVERTISED_100baseT_Half)
2960 np->advertising |= ADVERTISE_100HALF;
2961 if (ecmd->advertising & ADVERTISED_100baseT_Full)
2962 np->advertising |= ADVERTISE_100FULL;
2963 } else {
2964 np->speed = ecmd->speed;
2965 np->duplex = ecmd->duplex;
2966 /* user overriding the initial full duplex parm? */
2967 if (np->duplex == DUPLEX_HALF)
2968 np->full_duplex = 0;
2969 }
2970
2971 /* get the right phy enabled */
2972 if (ecmd->port == PORT_TP)
2973 switch_port_internal(dev);
2974 else
2975 switch_port_external(dev);
2976
2977 /* set parms and see how this affected our link status */
2978 init_phy_fixup(dev);
2979 check_link(dev);
2980 return 0;
2981}
2982
2983static int netdev_get_regs(struct net_device *dev, u8 *buf)
2984{
2985 int i;
2986 int j;
2987 u32 rfcr;
2988 u32 *rbuf = (u32 *)buf;
2989 void __iomem * ioaddr = ns_ioaddr(dev);
2990
2991 /* read non-mii page 0 of registers */
2992 for (i = 0; i < NATSEMI_PG0_NREGS/2; i++) {
2993 rbuf[i] = readl(ioaddr + i*4);
2994 }
2995
2996 /* read current mii registers */
2997 for (i = NATSEMI_PG0_NREGS/2; i < NATSEMI_PG0_NREGS; i++)
2998 rbuf[i] = mdio_read(dev, i & 0x1f);
2999
3000 /* read only the 'magic' registers from page 1 */
3001 writew(1, ioaddr + PGSEL);
3002 rbuf[i++] = readw(ioaddr + PMDCSR);
3003 rbuf[i++] = readw(ioaddr + TSTDAT);
3004 rbuf[i++] = readw(ioaddr + DSPCFG);
3005 rbuf[i++] = readw(ioaddr + SDCFG);
3006 writew(0, ioaddr + PGSEL);
3007
3008 /* read RFCR indexed registers */
3009 rfcr = readl(ioaddr + RxFilterAddr);
3010 for (j = 0; j < NATSEMI_RFDR_NREGS; j++) {
3011 writel(j*2, ioaddr + RxFilterAddr);
3012 rbuf[i++] = readw(ioaddr + RxFilterData);
3013 }
3014 writel(rfcr, ioaddr + RxFilterAddr);
3015
3016 /* the interrupt status is clear-on-read - see if we missed any */
3017 if (rbuf[4] & rbuf[5]) {
3018 printk(KERN_WARNING
3019 "%s: shoot, we dropped an interrupt (%#08x)\n",
3020 dev->name, rbuf[4] & rbuf[5]);
3021 }
3022
3023 return 0;
3024}
3025
3026#define SWAP_BITS(x) ( (((x) & 0x0001) << 15) | (((x) & 0x0002) << 13) \
3027 | (((x) & 0x0004) << 11) | (((x) & 0x0008) << 9) \
3028 | (((x) & 0x0010) << 7) | (((x) & 0x0020) << 5) \
3029 | (((x) & 0x0040) << 3) | (((x) & 0x0080) << 1) \
3030 | (((x) & 0x0100) >> 1) | (((x) & 0x0200) >> 3) \
3031 | (((x) & 0x0400) >> 5) | (((x) & 0x0800) >> 7) \
3032 | (((x) & 0x1000) >> 9) | (((x) & 0x2000) >> 11) \
3033 | (((x) & 0x4000) >> 13) | (((x) & 0x8000) >> 15) )
3034
3035static int netdev_get_eeprom(struct net_device *dev, u8 *buf)
3036{
3037 int i;
3038 u16 *ebuf = (u16 *)buf;
3039 void __iomem * ioaddr = ns_ioaddr(dev);
Mark Browna8b4cf42006-03-28 14:08:55 -08003040 struct netdev_private *np = netdev_priv(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003041
3042 /* eeprom_read reads 16 bits, and indexes by 16 bits */
Mark Browna8b4cf42006-03-28 14:08:55 -08003043 for (i = 0; i < np->eeprom_size/2; i++) {
Linus Torvalds1da177e2005-04-16 15:20:36 -07003044 ebuf[i] = eeprom_read(ioaddr, i);
3045 /* The EEPROM itself stores data bit-swapped, but eeprom_read
3046 * reads it back "sanely". So we swap it back here in order to
3047 * present it to userland as it is stored. */
3048 ebuf[i] = SWAP_BITS(ebuf[i]);
3049 }
3050 return 0;
3051}
3052
3053static int netdev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
3054{
3055 struct mii_ioctl_data *data = if_mii(rq);
3056 struct netdev_private *np = netdev_priv(dev);
3057
3058 switch(cmd) {
3059 case SIOCGMIIPHY: /* Get address of MII PHY in use. */
3060 case SIOCDEVPRIVATE: /* for binary compat, remove in 2.5 */
3061 data->phy_id = np->phy_addr_external;
3062 /* Fall Through */
3063
3064 case SIOCGMIIREG: /* Read MII PHY register. */
3065 case SIOCDEVPRIVATE+1: /* for binary compat, remove in 2.5 */
3066 /* The phy_id is not enough to uniquely identify
3067 * the intended target. Therefore the command is sent to
3068 * the given mii on the current port.
3069 */
3070 if (dev->if_port == PORT_TP) {
3071 if ((data->phy_id & 0x1f) == np->phy_addr_external)
3072 data->val_out = mdio_read(dev,
3073 data->reg_num & 0x1f);
3074 else
3075 data->val_out = 0;
3076 } else {
3077 move_int_phy(dev, data->phy_id & 0x1f);
3078 data->val_out = miiport_read(dev, data->phy_id & 0x1f,
3079 data->reg_num & 0x1f);
3080 }
3081 return 0;
3082
3083 case SIOCSMIIREG: /* Write MII PHY register. */
3084 case SIOCDEVPRIVATE+2: /* for binary compat, remove in 2.5 */
3085 if (!capable(CAP_NET_ADMIN))
3086 return -EPERM;
3087 if (dev->if_port == PORT_TP) {
3088 if ((data->phy_id & 0x1f) == np->phy_addr_external) {
3089 if ((data->reg_num & 0x1f) == MII_ADVERTISE)
3090 np->advertising = data->val_in;
3091 mdio_write(dev, data->reg_num & 0x1f,
3092 data->val_in);
3093 }
3094 } else {
3095 if ((data->phy_id & 0x1f) == np->phy_addr_external) {
3096 if ((data->reg_num & 0x1f) == MII_ADVERTISE)
3097 np->advertising = data->val_in;
3098 }
3099 move_int_phy(dev, data->phy_id & 0x1f);
3100 miiport_write(dev, data->phy_id & 0x1f,
3101 data->reg_num & 0x1f,
3102 data->val_in);
3103 }
3104 return 0;
3105 default:
3106 return -EOPNOTSUPP;
3107 }
3108}
3109
3110static void enable_wol_mode(struct net_device *dev, int enable_intr)
3111{
3112 void __iomem * ioaddr = ns_ioaddr(dev);
3113 struct netdev_private *np = netdev_priv(dev);
3114
3115 if (netif_msg_wol(np))
3116 printk(KERN_INFO "%s: remaining active for wake-on-lan\n",
3117 dev->name);
3118
3119 /* For WOL we must restart the rx process in silent mode.
3120 * Write NULL to the RxRingPtr. Only possible if
3121 * rx process is stopped
3122 */
3123 writel(0, ioaddr + RxRingPtr);
3124
3125 /* read WoL status to clear */
3126 readl(ioaddr + WOLCmd);
3127
3128 /* PME on, clear status */
3129 writel(np->SavedClkRun | PMEEnable | PMEStatus, ioaddr + ClkRun);
3130
3131 /* and restart the rx process */
3132 writel(RxOn, ioaddr + ChipCmd);
3133
3134 if (enable_intr) {
3135 /* enable the WOL interrupt.
3136 * Could be used to send a netlink message.
3137 */
3138 writel(WOLPkt | LinkChange, ioaddr + IntrMask);
broonie@sirena.org.uk14fdd902007-03-14 19:49:13 +00003139 natsemi_irq_enable(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003140 }
3141}
3142
3143static int netdev_close(struct net_device *dev)
3144{
3145 void __iomem * ioaddr = ns_ioaddr(dev);
3146 struct netdev_private *np = netdev_priv(dev);
3147
3148 if (netif_msg_ifdown(np))
3149 printk(KERN_DEBUG
3150 "%s: Shutting down ethercard, status was %#04x.\n",
3151 dev->name, (int)readl(ioaddr + ChipCmd));
3152 if (netif_msg_pktdata(np))
3153 printk(KERN_DEBUG
3154 "%s: Queue pointers were Tx %d / %d, Rx %d / %d.\n",
3155 dev->name, np->cur_tx, np->dirty_tx,
3156 np->cur_rx, np->dirty_rx);
3157
Stephen Hemmingerbea33482007-10-03 16:41:36 -07003158 napi_disable(&np->napi);
3159
Linus Torvalds1da177e2005-04-16 15:20:36 -07003160 /*
3161 * FIXME: what if someone tries to close a device
3162 * that is suspended?
3163 * Should we reenable the nic to switch to
3164 * the final WOL settings?
3165 */
3166
3167 del_timer_sync(&np->timer);
3168 disable_irq(dev->irq);
3169 spin_lock_irq(&np->lock);
Mark Brownb27a16b2006-02-02 00:00:01 +00003170 natsemi_irq_disable(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003171 np->hands_off = 1;
3172 spin_unlock_irq(&np->lock);
3173 enable_irq(dev->irq);
3174
3175 free_irq(dev->irq, dev);
3176
3177 /* Interrupt disabled, interrupt handler released,
3178 * queue stopped, timer deleted, rtnl_lock held
3179 * All async codepaths that access the driver are disabled.
3180 */
3181 spin_lock_irq(&np->lock);
3182 np->hands_off = 0;
3183 readl(ioaddr + IntrMask);
3184 readw(ioaddr + MIntrStatus);
3185
3186 /* Freeze Stats */
3187 writel(StatsFreeze, ioaddr + StatsCtrl);
3188
3189 /* Stop the chip's Tx and Rx processes. */
3190 natsemi_stop_rxtx(dev);
3191
3192 __get_stats(dev);
3193 spin_unlock_irq(&np->lock);
3194
3195 /* clear the carrier last - an interrupt could reenable it otherwise */
3196 netif_carrier_off(dev);
3197 netif_stop_queue(dev);
3198
3199 dump_ring(dev);
3200 drain_ring(dev);
3201 free_ring(dev);
3202
3203 {
3204 u32 wol = readl(ioaddr + WOLCmd) & WakeOptsSummary;
3205 if (wol) {
3206 /* restart the NIC in WOL mode.
3207 * The nic must be stopped for this.
3208 */
3209 enable_wol_mode(dev, 0);
3210 } else {
3211 /* Restore PME enable bit unmolested */
3212 writel(np->SavedClkRun, ioaddr + ClkRun);
3213 }
3214 }
3215 return 0;
3216}
3217
3218
3219static void __devexit natsemi_remove1 (struct pci_dev *pdev)
3220{
3221 struct net_device *dev = pci_get_drvdata(pdev);
3222 void __iomem * ioaddr = ns_ioaddr(dev);
3223
Mark Brown1a147802007-05-03 10:36:56 +01003224 NATSEMI_REMOVE_FILE(pdev, dspcfg_workaround);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003225 unregister_netdev (dev);
3226 pci_release_regions (pdev);
3227 iounmap(ioaddr);
3228 free_netdev (dev);
3229 pci_set_drvdata(pdev, NULL);
3230}
3231
3232#ifdef CONFIG_PM
3233
3234/*
3235 * The ns83815 chip doesn't have explicit RxStop bits.
3236 * Kicking the Rx or Tx process for a new packet reenables the Rx process
3237 * of the nic, thus this function must be very careful:
3238 *
3239 * suspend/resume synchronization:
3240 * entry points:
3241 * netdev_open, netdev_close, netdev_ioctl, set_rx_mode, intr_handler,
3242 * start_tx, tx_timeout
3243 *
3244 * No function accesses the hardware without checking np->hands_off.
3245 * the check occurs under spin_lock_irq(&np->lock);
3246 * exceptions:
3247 * * netdev_ioctl: noncritical access.
3248 * * netdev_open: cannot happen due to the device_detach
3249 * * netdev_close: doesn't hurt.
3250 * * netdev_timer: timer stopped by natsemi_suspend.
3251 * * intr_handler: doesn't acquire the spinlock. suspend calls
3252 * disable_irq() to enforce synchronization.
Mark Brownb27a16b2006-02-02 00:00:01 +00003253 * * natsemi_poll: checks before reenabling interrupts. suspend
3254 * sets hands_off, disables interrupts and then waits with
Stephen Hemmingerbea33482007-10-03 16:41:36 -07003255 * napi_disable().
Linus Torvalds1da177e2005-04-16 15:20:36 -07003256 *
3257 * Interrupts must be disabled, otherwise hands_off can cause irq storms.
3258 */
3259
3260static int natsemi_suspend (struct pci_dev *pdev, pm_message_t state)
3261{
3262 struct net_device *dev = pci_get_drvdata (pdev);
3263 struct netdev_private *np = netdev_priv(dev);
3264 void __iomem * ioaddr = ns_ioaddr(dev);
3265
3266 rtnl_lock();
3267 if (netif_running (dev)) {
3268 del_timer_sync(&np->timer);
3269
3270 disable_irq(dev->irq);
3271 spin_lock_irq(&np->lock);
3272
broonie@sirena.org.uk14fdd902007-03-14 19:49:13 +00003273 natsemi_irq_disable(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003274 np->hands_off = 1;
3275 natsemi_stop_rxtx(dev);
3276 netif_stop_queue(dev);
3277
3278 spin_unlock_irq(&np->lock);
3279 enable_irq(dev->irq);
3280
Stephen Hemmingerbea33482007-10-03 16:41:36 -07003281 napi_disable(&np->napi);
Mark Brownb27a16b2006-02-02 00:00:01 +00003282
Linus Torvalds1da177e2005-04-16 15:20:36 -07003283 /* Update the error counts. */
3284 __get_stats(dev);
3285
3286 /* pci_power_off(pdev, -1); */
3287 drain_ring(dev);
3288 {
3289 u32 wol = readl(ioaddr + WOLCmd) & WakeOptsSummary;
3290 /* Restore PME enable bit */
3291 if (wol) {
3292 /* restart the NIC in WOL mode.
3293 * The nic must be stopped for this.
3294 * FIXME: use the WOL interrupt
3295 */
3296 enable_wol_mode(dev, 0);
3297 } else {
3298 /* Restore PME enable bit unmolested */
3299 writel(np->SavedClkRun, ioaddr + ClkRun);
3300 }
3301 }
3302 }
3303 netif_device_detach(dev);
3304 rtnl_unlock();
3305 return 0;
3306}
3307
3308
3309static int natsemi_resume (struct pci_dev *pdev)
3310{
3311 struct net_device *dev = pci_get_drvdata (pdev);
3312 struct netdev_private *np = netdev_priv(dev);
3313
3314 rtnl_lock();
3315 if (netif_device_present(dev))
3316 goto out;
3317 if (netif_running(dev)) {
3318 BUG_ON(!np->hands_off);
3319 pci_enable_device(pdev);
3320 /* pci_power_on(pdev); */
3321
Stephen Hemmingerbea33482007-10-03 16:41:36 -07003322 napi_enable(&np->napi);
3323
Linus Torvalds1da177e2005-04-16 15:20:36 -07003324 natsemi_reset(dev);
3325 init_ring(dev);
3326 disable_irq(dev->irq);
3327 spin_lock_irq(&np->lock);
3328 np->hands_off = 0;
3329 init_registers(dev);
3330 netif_device_attach(dev);
3331 spin_unlock_irq(&np->lock);
3332 enable_irq(dev->irq);
3333
3334 mod_timer(&np->timer, jiffies + 1*HZ);
3335 }
3336 netif_device_attach(dev);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003337out:
3338 rtnl_unlock();
3339 return 0;
3340}
3341
3342#endif /* CONFIG_PM */
3343
3344static struct pci_driver natsemi_driver = {
3345 .name = DRV_NAME,
3346 .id_table = natsemi_pci_tbl,
3347 .probe = natsemi_probe1,
3348 .remove = __devexit_p(natsemi_remove1),
3349#ifdef CONFIG_PM
3350 .suspend = natsemi_suspend,
3351 .resume = natsemi_resume,
3352#endif
3353};
3354
3355static int __init natsemi_init_mod (void)
3356{
3357/* when a module, this is printed whether or not devices are found in probe */
3358#ifdef MODULE
3359 printk(version);
3360#endif
3361
Jeff Garzik29917622006-08-19 17:48:59 -04003362 return pci_register_driver(&natsemi_driver);
Linus Torvalds1da177e2005-04-16 15:20:36 -07003363}
3364
3365static void __exit natsemi_exit_mod (void)
3366{
3367 pci_unregister_driver (&natsemi_driver);
3368}
3369
3370module_init(natsemi_init_mod);
3371module_exit(natsemi_exit_mod);
3372