Deepak Saxena | 8ae6e16 | 2006-06-25 05:47:38 -0700 | [diff] [blame] | 1 | /* |
| 2 | * drivers/rtc/rtc-pl031.c |
| 3 | * |
| 4 | * Real Time Clock interface for ARM AMBA PrimeCell 031 RTC |
| 5 | * |
| 6 | * Author: Deepak Saxena <dsaxena@plexity.net> |
| 7 | * |
| 8 | * Copyright 2006 (c) MontaVista Software, Inc. |
| 9 | * |
Linus Walleij | c72881e | 2010-02-04 12:50:13 +0100 | [diff] [blame] | 10 | * Author: Mian Yousaf Kaukab <mian.yousaf.kaukab@stericsson.com> |
| 11 | * Copyright 2010 (c) ST-Ericsson AB |
| 12 | * |
Deepak Saxena | 8ae6e16 | 2006-06-25 05:47:38 -0700 | [diff] [blame] | 13 | * This program is free software; you can redistribute it and/or |
| 14 | * modify it under the terms of the GNU General Public License |
| 15 | * as published by the Free Software Foundation; either version |
| 16 | * 2 of the License, or (at your option) any later version. |
| 17 | */ |
Deepak Saxena | 8ae6e16 | 2006-06-25 05:47:38 -0700 | [diff] [blame] | 18 | #include <linux/module.h> |
| 19 | #include <linux/rtc.h> |
| 20 | #include <linux/init.h> |
Deepak Saxena | 8ae6e16 | 2006-06-25 05:47:38 -0700 | [diff] [blame] | 21 | #include <linux/interrupt.h> |
Deepak Saxena | 8ae6e16 | 2006-06-25 05:47:38 -0700 | [diff] [blame] | 22 | #include <linux/amba/bus.h> |
Russell King | 2dba851 | 2008-04-20 12:08:04 +0100 | [diff] [blame] | 23 | #include <linux/io.h> |
Linus Walleij | c72881e | 2010-02-04 12:50:13 +0100 | [diff] [blame] | 24 | #include <linux/bcd.h> |
| 25 | #include <linux/delay.h> |
| 26 | #include <linux/version.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 27 | #include <linux/slab.h> |
Deepak Saxena | 8ae6e16 | 2006-06-25 05:47:38 -0700 | [diff] [blame] | 28 | |
| 29 | /* |
| 30 | * Register definitions |
| 31 | */ |
| 32 | #define RTC_DR 0x00 /* Data read register */ |
| 33 | #define RTC_MR 0x04 /* Match register */ |
| 34 | #define RTC_LR 0x08 /* Data load register */ |
| 35 | #define RTC_CR 0x0c /* Control register */ |
| 36 | #define RTC_IMSC 0x10 /* Interrupt mask and set register */ |
| 37 | #define RTC_RIS 0x14 /* Raw interrupt status register */ |
| 38 | #define RTC_MIS 0x18 /* Masked interrupt status register */ |
| 39 | #define RTC_ICR 0x1c /* Interrupt clear register */ |
Linus Walleij | c72881e | 2010-02-04 12:50:13 +0100 | [diff] [blame] | 40 | /* ST variants have additional timer functionality */ |
| 41 | #define RTC_TDR 0x20 /* Timer data read register */ |
| 42 | #define RTC_TLR 0x24 /* Timer data load register */ |
| 43 | #define RTC_TCR 0x28 /* Timer control register */ |
| 44 | #define RTC_YDR 0x30 /* Year data read register */ |
| 45 | #define RTC_YMR 0x34 /* Year match register */ |
| 46 | #define RTC_YLR 0x38 /* Year data load register */ |
| 47 | |
| 48 | #define RTC_CR_CWEN (1 << 26) /* Clockwatch enable bit */ |
| 49 | |
| 50 | #define RTC_TCR_EN (1 << 1) /* Periodic timer enable bit */ |
| 51 | |
| 52 | /* Common bit definitions for Interrupt status and control registers */ |
| 53 | #define RTC_BIT_AI (1 << 0) /* Alarm interrupt bit */ |
| 54 | #define RTC_BIT_PI (1 << 1) /* Periodic interrupt bit. ST variants only. */ |
| 55 | |
| 56 | /* Common bit definations for ST v2 for reading/writing time */ |
| 57 | #define RTC_SEC_SHIFT 0 |
| 58 | #define RTC_SEC_MASK (0x3F << RTC_SEC_SHIFT) /* Second [0-59] */ |
| 59 | #define RTC_MIN_SHIFT 6 |
| 60 | #define RTC_MIN_MASK (0x3F << RTC_MIN_SHIFT) /* Minute [0-59] */ |
| 61 | #define RTC_HOUR_SHIFT 12 |
| 62 | #define RTC_HOUR_MASK (0x1F << RTC_HOUR_SHIFT) /* Hour [0-23] */ |
| 63 | #define RTC_WDAY_SHIFT 17 |
| 64 | #define RTC_WDAY_MASK (0x7 << RTC_WDAY_SHIFT) /* Day of Week [1-7] 1=Sunday */ |
| 65 | #define RTC_MDAY_SHIFT 20 |
| 66 | #define RTC_MDAY_MASK (0x1F << RTC_MDAY_SHIFT) /* Day of Month [1-31] */ |
| 67 | #define RTC_MON_SHIFT 25 |
| 68 | #define RTC_MON_MASK (0xF << RTC_MON_SHIFT) /* Month [1-12] 1=January */ |
| 69 | |
| 70 | #define RTC_TIMER_FREQ 32768 |
Deepak Saxena | 8ae6e16 | 2006-06-25 05:47:38 -0700 | [diff] [blame] | 71 | |
| 72 | struct pl031_local { |
| 73 | struct rtc_device *rtc; |
| 74 | void __iomem *base; |
Linus Walleij | c72881e | 2010-02-04 12:50:13 +0100 | [diff] [blame] | 75 | u8 hw_designer; |
| 76 | u8 hw_revision:4; |
Deepak Saxena | 8ae6e16 | 2006-06-25 05:47:38 -0700 | [diff] [blame] | 77 | }; |
| 78 | |
Linus Walleij | c72881e | 2010-02-04 12:50:13 +0100 | [diff] [blame] | 79 | static int pl031_alarm_irq_enable(struct device *dev, |
| 80 | unsigned int enabled) |
Deepak Saxena | 8ae6e16 | 2006-06-25 05:47:38 -0700 | [diff] [blame] | 81 | { |
Linus Walleij | c72881e | 2010-02-04 12:50:13 +0100 | [diff] [blame] | 82 | struct pl031_local *ldata = dev_get_drvdata(dev); |
| 83 | unsigned long imsc; |
Deepak Saxena | 8ae6e16 | 2006-06-25 05:47:38 -0700 | [diff] [blame] | 84 | |
Linus Walleij | c72881e | 2010-02-04 12:50:13 +0100 | [diff] [blame] | 85 | /* Clear any pending alarm interrupts. */ |
| 86 | writel(RTC_BIT_AI, ldata->base + RTC_ICR); |
Deepak Saxena | 8ae6e16 | 2006-06-25 05:47:38 -0700 | [diff] [blame] | 87 | |
Linus Walleij | c72881e | 2010-02-04 12:50:13 +0100 | [diff] [blame] | 88 | imsc = readl(ldata->base + RTC_IMSC); |
| 89 | |
| 90 | if (enabled == 1) |
| 91 | writel(imsc | RTC_BIT_AI, ldata->base + RTC_IMSC); |
| 92 | else |
| 93 | writel(imsc & ~RTC_BIT_AI, ldata->base + RTC_IMSC); |
| 94 | |
| 95 | return 0; |
Deepak Saxena | 8ae6e16 | 2006-06-25 05:47:38 -0700 | [diff] [blame] | 96 | } |
| 97 | |
Linus Walleij | c72881e | 2010-02-04 12:50:13 +0100 | [diff] [blame] | 98 | /* |
| 99 | * Convert Gregorian date to ST v2 RTC format. |
| 100 | */ |
| 101 | static int pl031_stv2_tm_to_time(struct device *dev, |
| 102 | struct rtc_time *tm, unsigned long *st_time, |
| 103 | unsigned long *bcd_year) |
| 104 | { |
| 105 | int year = tm->tm_year + 1900; |
| 106 | int wday = tm->tm_wday; |
| 107 | |
| 108 | /* wday masking is not working in hardware so wday must be valid */ |
| 109 | if (wday < -1 || wday > 6) { |
| 110 | dev_err(dev, "invalid wday value %d\n", tm->tm_wday); |
| 111 | return -EINVAL; |
| 112 | } else if (wday == -1) { |
| 113 | /* wday is not provided, calculate it here */ |
| 114 | unsigned long time; |
| 115 | struct rtc_time calc_tm; |
| 116 | |
| 117 | rtc_tm_to_time(tm, &time); |
| 118 | rtc_time_to_tm(time, &calc_tm); |
| 119 | wday = calc_tm.tm_wday; |
| 120 | } |
| 121 | |
| 122 | *bcd_year = (bin2bcd(year % 100) | bin2bcd(year / 100) << 8); |
| 123 | |
| 124 | *st_time = ((tm->tm_mon + 1) << RTC_MON_SHIFT) |
| 125 | | (tm->tm_mday << RTC_MDAY_SHIFT) |
| 126 | | ((wday + 1) << RTC_WDAY_SHIFT) |
| 127 | | (tm->tm_hour << RTC_HOUR_SHIFT) |
| 128 | | (tm->tm_min << RTC_MIN_SHIFT) |
| 129 | | (tm->tm_sec << RTC_SEC_SHIFT); |
| 130 | |
| 131 | return 0; |
| 132 | } |
| 133 | |
| 134 | /* |
| 135 | * Convert ST v2 RTC format to Gregorian date. |
| 136 | */ |
| 137 | static int pl031_stv2_time_to_tm(unsigned long st_time, unsigned long bcd_year, |
| 138 | struct rtc_time *tm) |
| 139 | { |
| 140 | tm->tm_year = bcd2bin(bcd_year) + (bcd2bin(bcd_year >> 8) * 100); |
| 141 | tm->tm_mon = ((st_time & RTC_MON_MASK) >> RTC_MON_SHIFT) - 1; |
| 142 | tm->tm_mday = ((st_time & RTC_MDAY_MASK) >> RTC_MDAY_SHIFT); |
| 143 | tm->tm_wday = ((st_time & RTC_WDAY_MASK) >> RTC_WDAY_SHIFT) - 1; |
| 144 | tm->tm_hour = ((st_time & RTC_HOUR_MASK) >> RTC_HOUR_SHIFT); |
| 145 | tm->tm_min = ((st_time & RTC_MIN_MASK) >> RTC_MIN_SHIFT); |
| 146 | tm->tm_sec = ((st_time & RTC_SEC_MASK) >> RTC_SEC_SHIFT); |
| 147 | |
| 148 | tm->tm_yday = rtc_year_days(tm->tm_mday, tm->tm_mon, tm->tm_year); |
| 149 | tm->tm_year -= 1900; |
| 150 | |
| 151 | return 0; |
| 152 | } |
| 153 | |
| 154 | static int pl031_stv2_read_time(struct device *dev, struct rtc_time *tm) |
Deepak Saxena | 8ae6e16 | 2006-06-25 05:47:38 -0700 | [diff] [blame] | 155 | { |
| 156 | struct pl031_local *ldata = dev_get_drvdata(dev); |
| 157 | |
Linus Walleij | c72881e | 2010-02-04 12:50:13 +0100 | [diff] [blame] | 158 | pl031_stv2_time_to_tm(readl(ldata->base + RTC_DR), |
| 159 | readl(ldata->base + RTC_YDR), tm); |
| 160 | |
| 161 | return 0; |
| 162 | } |
| 163 | |
| 164 | static int pl031_stv2_set_time(struct device *dev, struct rtc_time *tm) |
| 165 | { |
| 166 | unsigned long time; |
| 167 | unsigned long bcd_year; |
| 168 | struct pl031_local *ldata = dev_get_drvdata(dev); |
| 169 | int ret; |
| 170 | |
| 171 | ret = pl031_stv2_tm_to_time(dev, tm, &time, &bcd_year); |
| 172 | if (ret == 0) { |
| 173 | writel(bcd_year, ldata->base + RTC_YLR); |
| 174 | writel(time, ldata->base + RTC_LR); |
Deepak Saxena | 8ae6e16 | 2006-06-25 05:47:38 -0700 | [diff] [blame] | 175 | } |
| 176 | |
Linus Walleij | c72881e | 2010-02-04 12:50:13 +0100 | [diff] [blame] | 177 | return ret; |
| 178 | } |
| 179 | |
| 180 | static int pl031_stv2_read_alarm(struct device *dev, struct rtc_wkalrm *alarm) |
| 181 | { |
| 182 | struct pl031_local *ldata = dev_get_drvdata(dev); |
| 183 | int ret; |
| 184 | |
| 185 | ret = pl031_stv2_time_to_tm(readl(ldata->base + RTC_MR), |
| 186 | readl(ldata->base + RTC_YMR), &alarm->time); |
| 187 | |
| 188 | alarm->pending = readl(ldata->base + RTC_RIS) & RTC_BIT_AI; |
| 189 | alarm->enabled = readl(ldata->base + RTC_IMSC) & RTC_BIT_AI; |
| 190 | |
| 191 | return ret; |
| 192 | } |
| 193 | |
| 194 | static int pl031_stv2_set_alarm(struct device *dev, struct rtc_wkalrm *alarm) |
| 195 | { |
| 196 | struct pl031_local *ldata = dev_get_drvdata(dev); |
| 197 | unsigned long time; |
| 198 | unsigned long bcd_year; |
| 199 | int ret; |
| 200 | |
| 201 | /* At the moment, we can only deal with non-wildcarded alarm times. */ |
| 202 | ret = rtc_valid_tm(&alarm->time); |
| 203 | if (ret == 0) { |
| 204 | ret = pl031_stv2_tm_to_time(dev, &alarm->time, |
| 205 | &time, &bcd_year); |
| 206 | if (ret == 0) { |
| 207 | writel(bcd_year, ldata->base + RTC_YMR); |
| 208 | writel(time, ldata->base + RTC_MR); |
| 209 | |
| 210 | pl031_alarm_irq_enable(dev, alarm->enabled); |
| 211 | } |
| 212 | } |
| 213 | |
| 214 | return ret; |
| 215 | } |
| 216 | |
| 217 | static irqreturn_t pl031_interrupt(int irq, void *dev_id) |
| 218 | { |
| 219 | struct pl031_local *ldata = dev_id; |
| 220 | unsigned long rtcmis; |
| 221 | unsigned long events = 0; |
| 222 | |
| 223 | rtcmis = readl(ldata->base + RTC_MIS); |
| 224 | if (rtcmis) { |
| 225 | writel(rtcmis, ldata->base + RTC_ICR); |
| 226 | |
| 227 | if (rtcmis & RTC_BIT_AI) |
| 228 | events |= (RTC_AF | RTC_IRQF); |
| 229 | |
| 230 | /* Timer interrupt is only available in ST variants */ |
| 231 | if ((rtcmis & RTC_BIT_PI) && |
| 232 | (ldata->hw_designer == AMBA_VENDOR_ST)) |
| 233 | events |= (RTC_PF | RTC_IRQF); |
| 234 | |
| 235 | rtc_update_irq(ldata->rtc, 1, events); |
| 236 | |
| 237 | return IRQ_HANDLED; |
| 238 | } |
| 239 | |
| 240 | return IRQ_NONE; |
Deepak Saxena | 8ae6e16 | 2006-06-25 05:47:38 -0700 | [diff] [blame] | 241 | } |
| 242 | |
| 243 | static int pl031_read_time(struct device *dev, struct rtc_time *tm) |
| 244 | { |
| 245 | struct pl031_local *ldata = dev_get_drvdata(dev); |
| 246 | |
Linus Walleij | 2934d6a | 2009-12-15 16:46:13 -0800 | [diff] [blame] | 247 | rtc_time_to_tm(readl(ldata->base + RTC_DR), tm); |
Deepak Saxena | 8ae6e16 | 2006-06-25 05:47:38 -0700 | [diff] [blame] | 248 | |
| 249 | return 0; |
| 250 | } |
| 251 | |
| 252 | static int pl031_set_time(struct device *dev, struct rtc_time *tm) |
| 253 | { |
| 254 | unsigned long time; |
| 255 | struct pl031_local *ldata = dev_get_drvdata(dev); |
Linus Walleij | c72881e | 2010-02-04 12:50:13 +0100 | [diff] [blame] | 256 | int ret; |
Deepak Saxena | 8ae6e16 | 2006-06-25 05:47:38 -0700 | [diff] [blame] | 257 | |
Linus Walleij | c72881e | 2010-02-04 12:50:13 +0100 | [diff] [blame] | 258 | ret = rtc_tm_to_time(tm, &time); |
Deepak Saxena | 8ae6e16 | 2006-06-25 05:47:38 -0700 | [diff] [blame] | 259 | |
Linus Walleij | c72881e | 2010-02-04 12:50:13 +0100 | [diff] [blame] | 260 | if (ret == 0) |
| 261 | writel(time, ldata->base + RTC_LR); |
| 262 | |
| 263 | return ret; |
Deepak Saxena | 8ae6e16 | 2006-06-25 05:47:38 -0700 | [diff] [blame] | 264 | } |
| 265 | |
| 266 | static int pl031_read_alarm(struct device *dev, struct rtc_wkalrm *alarm) |
| 267 | { |
| 268 | struct pl031_local *ldata = dev_get_drvdata(dev); |
| 269 | |
Linus Walleij | 2934d6a | 2009-12-15 16:46:13 -0800 | [diff] [blame] | 270 | rtc_time_to_tm(readl(ldata->base + RTC_MR), &alarm->time); |
Linus Walleij | c72881e | 2010-02-04 12:50:13 +0100 | [diff] [blame] | 271 | |
| 272 | alarm->pending = readl(ldata->base + RTC_RIS) & RTC_BIT_AI; |
| 273 | alarm->enabled = readl(ldata->base + RTC_IMSC) & RTC_BIT_AI; |
Deepak Saxena | 8ae6e16 | 2006-06-25 05:47:38 -0700 | [diff] [blame] | 274 | |
| 275 | return 0; |
| 276 | } |
| 277 | |
| 278 | static int pl031_set_alarm(struct device *dev, struct rtc_wkalrm *alarm) |
| 279 | { |
| 280 | struct pl031_local *ldata = dev_get_drvdata(dev); |
| 281 | unsigned long time; |
Linus Walleij | c72881e | 2010-02-04 12:50:13 +0100 | [diff] [blame] | 282 | int ret; |
Deepak Saxena | 8ae6e16 | 2006-06-25 05:47:38 -0700 | [diff] [blame] | 283 | |
Linus Walleij | c72881e | 2010-02-04 12:50:13 +0100 | [diff] [blame] | 284 | /* At the moment, we can only deal with non-wildcarded alarm times. */ |
| 285 | ret = rtc_valid_tm(&alarm->time); |
| 286 | if (ret == 0) { |
| 287 | ret = rtc_tm_to_time(&alarm->time, &time); |
| 288 | if (ret == 0) { |
| 289 | writel(time, ldata->base + RTC_MR); |
| 290 | pl031_alarm_irq_enable(dev, alarm->enabled); |
| 291 | } |
| 292 | } |
Deepak Saxena | 8ae6e16 | 2006-06-25 05:47:38 -0700 | [diff] [blame] | 293 | |
Linus Walleij | c72881e | 2010-02-04 12:50:13 +0100 | [diff] [blame] | 294 | return ret; |
| 295 | } |
| 296 | |
| 297 | /* Periodic interrupt is only available in ST variants. */ |
| 298 | static int pl031_irq_set_state(struct device *dev, int enabled) |
| 299 | { |
| 300 | struct pl031_local *ldata = dev_get_drvdata(dev); |
| 301 | |
| 302 | if (enabled == 1) { |
| 303 | /* Clear any pending timer interrupt. */ |
| 304 | writel(RTC_BIT_PI, ldata->base + RTC_ICR); |
| 305 | |
| 306 | writel(readl(ldata->base + RTC_IMSC) | RTC_BIT_PI, |
| 307 | ldata->base + RTC_IMSC); |
| 308 | |
| 309 | /* Now start the timer */ |
| 310 | writel(readl(ldata->base + RTC_TCR) | RTC_TCR_EN, |
| 311 | ldata->base + RTC_TCR); |
| 312 | |
| 313 | } else { |
| 314 | writel(readl(ldata->base + RTC_IMSC) & (~RTC_BIT_PI), |
| 315 | ldata->base + RTC_IMSC); |
| 316 | |
| 317 | /* Also stop the timer */ |
| 318 | writel(readl(ldata->base + RTC_TCR) & (~RTC_TCR_EN), |
| 319 | ldata->base + RTC_TCR); |
| 320 | } |
| 321 | /* Wait at least 1 RTC32 clock cycle to ensure next access |
| 322 | * to RTC_TCR will succeed. |
| 323 | */ |
| 324 | udelay(40); |
Deepak Saxena | 8ae6e16 | 2006-06-25 05:47:38 -0700 | [diff] [blame] | 325 | |
| 326 | return 0; |
| 327 | } |
| 328 | |
Linus Walleij | c72881e | 2010-02-04 12:50:13 +0100 | [diff] [blame] | 329 | static int pl031_irq_set_freq(struct device *dev, int freq) |
| 330 | { |
| 331 | struct pl031_local *ldata = dev_get_drvdata(dev); |
| 332 | |
| 333 | /* Cant set timer if it is already enabled */ |
| 334 | if (readl(ldata->base + RTC_TCR) & RTC_TCR_EN) { |
| 335 | dev_err(dev, "can't change frequency while timer enabled\n"); |
| 336 | return -EINVAL; |
| 337 | } |
| 338 | |
| 339 | /* If self start bit in RTC_TCR is set timer will start here, |
| 340 | * but we never set that bit. Instead we start the timer when |
| 341 | * set_state is called with enabled == 1. |
| 342 | */ |
| 343 | writel(RTC_TIMER_FREQ / freq, ldata->base + RTC_TLR); |
| 344 | |
| 345 | return 0; |
| 346 | } |
Deepak Saxena | 8ae6e16 | 2006-06-25 05:47:38 -0700 | [diff] [blame] | 347 | |
| 348 | static int pl031_remove(struct amba_device *adev) |
| 349 | { |
| 350 | struct pl031_local *ldata = dev_get_drvdata(&adev->dev); |
| 351 | |
Russell King | 2dba851 | 2008-04-20 12:08:04 +0100 | [diff] [blame] | 352 | amba_set_drvdata(adev, NULL); |
| 353 | free_irq(adev->irq[0], ldata->rtc); |
| 354 | rtc_device_unregister(ldata->rtc); |
| 355 | iounmap(ldata->base); |
| 356 | kfree(ldata); |
| 357 | amba_release_regions(adev); |
Deepak Saxena | 8ae6e16 | 2006-06-25 05:47:38 -0700 | [diff] [blame] | 358 | |
| 359 | return 0; |
| 360 | } |
| 361 | |
Alessandro Rubini | 03fbdb1 | 2009-05-20 22:39:08 +0100 | [diff] [blame] | 362 | static int pl031_probe(struct amba_device *adev, struct amba_id *id) |
Deepak Saxena | 8ae6e16 | 2006-06-25 05:47:38 -0700 | [diff] [blame] | 363 | { |
| 364 | int ret; |
| 365 | struct pl031_local *ldata; |
Linus Walleij | c72881e | 2010-02-04 12:50:13 +0100 | [diff] [blame] | 366 | struct rtc_class_ops *ops = id->data; |
Deepak Saxena | 8ae6e16 | 2006-06-25 05:47:38 -0700 | [diff] [blame] | 367 | |
Russell King | 2dba851 | 2008-04-20 12:08:04 +0100 | [diff] [blame] | 368 | ret = amba_request_regions(adev, NULL); |
| 369 | if (ret) |
| 370 | goto err_req; |
Deepak Saxena | 8ae6e16 | 2006-06-25 05:47:38 -0700 | [diff] [blame] | 371 | |
Linus Walleij | c72881e | 2010-02-04 12:50:13 +0100 | [diff] [blame] | 372 | ldata = kzalloc(sizeof(struct pl031_local), GFP_KERNEL); |
Deepak Saxena | 8ae6e16 | 2006-06-25 05:47:38 -0700 | [diff] [blame] | 373 | if (!ldata) { |
| 374 | ret = -ENOMEM; |
| 375 | goto out; |
| 376 | } |
Deepak Saxena | 8ae6e16 | 2006-06-25 05:47:38 -0700 | [diff] [blame] | 377 | |
Linus Walleij | dc890c2 | 2009-06-07 23:27:31 +0100 | [diff] [blame] | 378 | ldata->base = ioremap(adev->res.start, resource_size(&adev->res)); |
Linus Walleij | c72881e | 2010-02-04 12:50:13 +0100 | [diff] [blame] | 379 | |
Deepak Saxena | 8ae6e16 | 2006-06-25 05:47:38 -0700 | [diff] [blame] | 380 | if (!ldata->base) { |
| 381 | ret = -ENOMEM; |
| 382 | goto out_no_remap; |
| 383 | } |
| 384 | |
Russell King | 2dba851 | 2008-04-20 12:08:04 +0100 | [diff] [blame] | 385 | amba_set_drvdata(adev, ldata); |
| 386 | |
Linus Walleij | c72881e | 2010-02-04 12:50:13 +0100 | [diff] [blame] | 387 | ldata->hw_designer = amba_manf(adev); |
| 388 | ldata->hw_revision = amba_rev(adev); |
Deepak Saxena | 8ae6e16 | 2006-06-25 05:47:38 -0700 | [diff] [blame] | 389 | |
Linus Walleij | c72881e | 2010-02-04 12:50:13 +0100 | [diff] [blame] | 390 | dev_dbg(&adev->dev, "designer ID = 0x%02x\n", ldata->hw_designer); |
| 391 | dev_dbg(&adev->dev, "revision = 0x%01x\n", ldata->hw_revision); |
| 392 | |
| 393 | /* Enable the clockwatch on ST Variants */ |
| 394 | if ((ldata->hw_designer == AMBA_VENDOR_ST) && |
| 395 | (ldata->hw_revision > 1)) |
| 396 | writel(readl(ldata->base + RTC_CR) | RTC_CR_CWEN, |
| 397 | ldata->base + RTC_CR); |
| 398 | |
| 399 | ldata->rtc = rtc_device_register("pl031", &adev->dev, ops, |
| 400 | THIS_MODULE); |
Deepak Saxena | 8ae6e16 | 2006-06-25 05:47:38 -0700 | [diff] [blame] | 401 | if (IS_ERR(ldata->rtc)) { |
| 402 | ret = PTR_ERR(ldata->rtc); |
| 403 | goto out_no_rtc; |
| 404 | } |
| 405 | |
Linus Walleij | c72881e | 2010-02-04 12:50:13 +0100 | [diff] [blame] | 406 | if (request_irq(adev->irq[0], pl031_interrupt, |
| 407 | IRQF_DISABLED | IRQF_SHARED, "rtc-pl031", ldata)) { |
| 408 | ret = -EIO; |
| 409 | goto out_no_irq; |
| 410 | } |
| 411 | |
Deepak Saxena | 8ae6e16 | 2006-06-25 05:47:38 -0700 | [diff] [blame] | 412 | return 0; |
| 413 | |
Deepak Saxena | 8ae6e16 | 2006-06-25 05:47:38 -0700 | [diff] [blame] | 414 | out_no_irq: |
Linus Walleij | c72881e | 2010-02-04 12:50:13 +0100 | [diff] [blame] | 415 | rtc_device_unregister(ldata->rtc); |
| 416 | out_no_rtc: |
Deepak Saxena | 8ae6e16 | 2006-06-25 05:47:38 -0700 | [diff] [blame] | 417 | iounmap(ldata->base); |
Russell King | 2dba851 | 2008-04-20 12:08:04 +0100 | [diff] [blame] | 418 | amba_set_drvdata(adev, NULL); |
Deepak Saxena | 8ae6e16 | 2006-06-25 05:47:38 -0700 | [diff] [blame] | 419 | out_no_remap: |
Deepak Saxena | 8ae6e16 | 2006-06-25 05:47:38 -0700 | [diff] [blame] | 420 | kfree(ldata); |
| 421 | out: |
Russell King | 2dba851 | 2008-04-20 12:08:04 +0100 | [diff] [blame] | 422 | amba_release_regions(adev); |
| 423 | err_req: |
Linus Walleij | c72881e | 2010-02-04 12:50:13 +0100 | [diff] [blame] | 424 | |
Deepak Saxena | 8ae6e16 | 2006-06-25 05:47:38 -0700 | [diff] [blame] | 425 | return ret; |
| 426 | } |
| 427 | |
Linus Walleij | c72881e | 2010-02-04 12:50:13 +0100 | [diff] [blame] | 428 | /* Operations for the original ARM version */ |
| 429 | static struct rtc_class_ops arm_pl031_ops = { |
| 430 | .read_time = pl031_read_time, |
| 431 | .set_time = pl031_set_time, |
| 432 | .read_alarm = pl031_read_alarm, |
| 433 | .set_alarm = pl031_set_alarm, |
| 434 | .alarm_irq_enable = pl031_alarm_irq_enable, |
| 435 | }; |
| 436 | |
| 437 | /* The First ST derivative */ |
| 438 | static struct rtc_class_ops stv1_pl031_ops = { |
| 439 | .read_time = pl031_read_time, |
| 440 | .set_time = pl031_set_time, |
| 441 | .read_alarm = pl031_read_alarm, |
| 442 | .set_alarm = pl031_set_alarm, |
| 443 | .alarm_irq_enable = pl031_alarm_irq_enable, |
| 444 | .irq_set_state = pl031_irq_set_state, |
| 445 | .irq_set_freq = pl031_irq_set_freq, |
| 446 | }; |
| 447 | |
| 448 | /* And the second ST derivative */ |
| 449 | static struct rtc_class_ops stv2_pl031_ops = { |
| 450 | .read_time = pl031_stv2_read_time, |
| 451 | .set_time = pl031_stv2_set_time, |
| 452 | .read_alarm = pl031_stv2_read_alarm, |
| 453 | .set_alarm = pl031_stv2_set_alarm, |
| 454 | .alarm_irq_enable = pl031_alarm_irq_enable, |
| 455 | .irq_set_state = pl031_irq_set_state, |
| 456 | .irq_set_freq = pl031_irq_set_freq, |
| 457 | }; |
| 458 | |
Russell King | 2c39c9e | 2010-07-27 08:50:16 +0100 | [diff] [blame] | 459 | static struct amba_id pl031_ids[] = { |
Deepak Saxena | 8ae6e16 | 2006-06-25 05:47:38 -0700 | [diff] [blame] | 460 | { |
Linus Walleij | 2934d6a | 2009-12-15 16:46:13 -0800 | [diff] [blame] | 461 | .id = 0x00041031, |
| 462 | .mask = 0x000fffff, |
Linus Walleij | c72881e | 2010-02-04 12:50:13 +0100 | [diff] [blame] | 463 | .data = &arm_pl031_ops, |
| 464 | }, |
| 465 | /* ST Micro variants */ |
| 466 | { |
| 467 | .id = 0x00180031, |
| 468 | .mask = 0x00ffffff, |
| 469 | .data = &stv1_pl031_ops, |
| 470 | }, |
| 471 | { |
| 472 | .id = 0x00280031, |
| 473 | .mask = 0x00ffffff, |
| 474 | .data = &stv2_pl031_ops, |
Linus Walleij | 2934d6a | 2009-12-15 16:46:13 -0800 | [diff] [blame] | 475 | }, |
Deepak Saxena | 8ae6e16 | 2006-06-25 05:47:38 -0700 | [diff] [blame] | 476 | {0, 0}, |
| 477 | }; |
| 478 | |
| 479 | static struct amba_driver pl031_driver = { |
| 480 | .drv = { |
| 481 | .name = "rtc-pl031", |
| 482 | }, |
| 483 | .id_table = pl031_ids, |
| 484 | .probe = pl031_probe, |
| 485 | .remove = pl031_remove, |
| 486 | }; |
| 487 | |
| 488 | static int __init pl031_init(void) |
| 489 | { |
| 490 | return amba_driver_register(&pl031_driver); |
| 491 | } |
| 492 | |
| 493 | static void __exit pl031_exit(void) |
| 494 | { |
| 495 | amba_driver_unregister(&pl031_driver); |
| 496 | } |
| 497 | |
| 498 | module_init(pl031_init); |
| 499 | module_exit(pl031_exit); |
| 500 | |
| 501 | MODULE_AUTHOR("Deepak Saxena <dsaxena@plexity.net"); |
| 502 | MODULE_DESCRIPTION("ARM AMBA PL031 RTC Driver"); |
| 503 | MODULE_LICENSE("GPL"); |