blob: 276151df3a703537ba01a315c90e7842d82ce4a8 [file] [log] [blame]
Ben Hutchings8ceee662008-04-27 12:55:59 +01001/****************************************************************************
2 * Driver for Solarflare Solarstorm network controllers and boards
3 * Copyright 2006-2008 Solarflare Communications Inc.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 as published
7 * by the Free Software Foundation, incorporated herein by reference.
8 */
9/*
10 * Driver for XFP optical PHYs (plus some support specific to the Quake 2032)
11 * See www.amcc.com for details (search for qt2032)
12 */
13
14#include <linux/timer.h>
15#include <linux/delay.h>
16#include "efx.h"
17#include "gmii.h"
18#include "mdio_10g.h"
19#include "xenpack.h"
20#include "phy.h"
21#include "mac.h"
22
23#define XFP_REQUIRED_DEVS (MDIO_MMDREG_DEVS0_PCS | \
24 MDIO_MMDREG_DEVS0_PMAPMD | \
25 MDIO_MMDREG_DEVS0_PHYXS)
26
Ben Hutchings3273c2e2008-05-07 13:36:19 +010027#define XFP_LOOPBACKS ((1 << LOOPBACK_PCS) | \
28 (1 << LOOPBACK_PMAPMD) | \
29 (1 << LOOPBACK_NETWORK))
30
Ben Hutchings8ceee662008-04-27 12:55:59 +010031/****************************************************************************/
32/* Quake-specific MDIO registers */
33#define MDIO_QUAKE_LED0_REG (0xD006)
34
35void xfp_set_led(struct efx_nic *p, int led, int mode)
36{
37 int addr = MDIO_QUAKE_LED0_REG + led;
38 mdio_clause45_write(p, p->mii.phy_id, MDIO_MMD_PMAPMD, addr,
39 mode);
40}
41
Ben Hutchings3273c2e2008-05-07 13:36:19 +010042struct xfp_phy_data {
Ben Hutchingsf8b87c12008-09-01 12:48:17 +010043 enum efx_phy_mode phy_mode;
Ben Hutchings3273c2e2008-05-07 13:36:19 +010044};
45
Ben Hutchings8ceee662008-04-27 12:55:59 +010046#define XFP_MAX_RESET_TIME 500
47#define XFP_RESET_WAIT 10
48
49/* Reset the PHYXS MMD. This is documented (for the Quake PHY) as doing
50 * a complete soft reset.
51 */
52static int xfp_reset_phy(struct efx_nic *efx)
53{
54 int rc;
55
56 rc = mdio_clause45_reset_mmd(efx, MDIO_MMD_PHYXS,
57 XFP_MAX_RESET_TIME / XFP_RESET_WAIT,
58 XFP_RESET_WAIT);
59 if (rc < 0)
60 goto fail;
61
62 /* Wait 250ms for the PHY to complete bootup */
63 msleep(250);
64
65 /* Check that all the MMDs we expect are present and responding. We
66 * expect faults on some if the link is down, but not on the PHY XS */
67 rc = mdio_clause45_check_mmds(efx, XFP_REQUIRED_DEVS,
68 MDIO_MMDREG_DEVS0_PHYXS);
69 if (rc < 0)
70 goto fail;
71
72 efx->board_info.init_leds(efx);
73
74 return rc;
75
76 fail:
77 EFX_ERR(efx, "XFP: reset timed out!\n");
78 return rc;
79}
80
81static int xfp_phy_init(struct efx_nic *efx)
82{
Ben Hutchings3273c2e2008-05-07 13:36:19 +010083 struct xfp_phy_data *phy_data;
Ben Hutchings8ceee662008-04-27 12:55:59 +010084 u32 devid = mdio_clause45_read_id(efx, MDIO_MMD_PHYXS);
85 int rc;
86
Ben Hutchings3273c2e2008-05-07 13:36:19 +010087 phy_data = kzalloc(sizeof(struct xfp_phy_data), GFP_KERNEL);
Ben Hutchings9b7bfc42008-05-16 21:20:20 +010088 if (!phy_data)
89 return -ENOMEM;
Ben Hutchingsd3208b52008-05-16 21:20:00 +010090 efx->phy_data = phy_data;
Ben Hutchings3273c2e2008-05-07 13:36:19 +010091
Ben Hutchings8ceee662008-04-27 12:55:59 +010092 EFX_INFO(efx, "XFP: PHY ID reg %x (OUI %x model %x revision"
93 " %x)\n", devid, MDIO_ID_OUI(devid), MDIO_ID_MODEL(devid),
94 MDIO_ID_REV(devid));
95
Ben Hutchingsf8b87c12008-09-01 12:48:17 +010096 phy_data->phy_mode = efx->phy_mode;
Ben Hutchings3273c2e2008-05-07 13:36:19 +010097
Ben Hutchings8ceee662008-04-27 12:55:59 +010098 rc = xfp_reset_phy(efx);
99
100 EFX_INFO(efx, "XFP: PHY init %s.\n",
101 rc ? "failed" : "successful");
Ben Hutchings3273c2e2008-05-07 13:36:19 +0100102 if (rc < 0)
103 goto fail;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100104
Ben Hutchings3273c2e2008-05-07 13:36:19 +0100105 return 0;
106
107 fail:
108 kfree(efx->phy_data);
109 efx->phy_data = NULL;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100110 return rc;
111}
112
113static void xfp_phy_clear_interrupt(struct efx_nic *efx)
114{
115 xenpack_clear_lasi_irqs(efx);
116}
117
118static int xfp_link_ok(struct efx_nic *efx)
119{
120 return mdio_clause45_links_ok(efx, XFP_REQUIRED_DEVS);
121}
122
123static int xfp_phy_check_hw(struct efx_nic *efx)
124{
125 int rc = 0;
126 int link_up = xfp_link_ok(efx);
127 /* Simulate a PHY event if link state has changed */
128 if (link_up != efx->link_up)
129 falcon_xmac_sim_phy_event(efx);
130
131 return rc;
132}
133
134static void xfp_phy_reconfigure(struct efx_nic *efx)
135{
Ben Hutchings3273c2e2008-05-07 13:36:19 +0100136 struct xfp_phy_data *phy_data = efx->phy_data;
137
138 /* Reset the PHY when moving from tx off to tx on */
Ben Hutchingsf8b87c12008-09-01 12:48:17 +0100139 if (!(efx->phy_mode & PHY_MODE_TX_DISABLED) &&
140 (phy_data->phy_mode & PHY_MODE_TX_DISABLED))
Ben Hutchings3273c2e2008-05-07 13:36:19 +0100141 xfp_reset_phy(efx);
142
143 mdio_clause45_transmit_disable(efx);
144 mdio_clause45_phy_reconfigure(efx);
145
Ben Hutchingsf8b87c12008-09-01 12:48:17 +0100146 phy_data->phy_mode = efx->phy_mode;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100147 efx->link_up = xfp_link_ok(efx);
148 efx->link_options = GM_LPA_10000FULL;
149}
150
151
152static void xfp_phy_fini(struct efx_nic *efx)
153{
154 /* Clobber the LED if it was blinking */
Ben Hutchingsdc8cfa52008-09-01 12:46:50 +0100155 efx->board_info.blink(efx, false);
Ben Hutchings3273c2e2008-05-07 13:36:19 +0100156
157 /* Free the context block */
158 kfree(efx->phy_data);
159 efx->phy_data = NULL;
Ben Hutchings8ceee662008-04-27 12:55:59 +0100160}
161
162struct efx_phy_operations falcon_xfp_phy_ops = {
163 .init = xfp_phy_init,
164 .reconfigure = xfp_phy_reconfigure,
165 .check_hw = xfp_phy_check_hw,
166 .fini = xfp_phy_fini,
167 .clear_interrupt = xfp_phy_clear_interrupt,
Ben Hutchings8ceee662008-04-27 12:55:59 +0100168 .mmds = XFP_REQUIRED_DEVS,
Ben Hutchings3273c2e2008-05-07 13:36:19 +0100169 .loopbacks = XFP_LOOPBACKS,
Ben Hutchings8ceee662008-04-27 12:55:59 +0100170};