| Fabio Estevam | c20736f | 2012-11-28 15:55:30 -0200 | [diff] [blame] | 1 | * Clock bindings for Freescale i.MX27 |
| 2 | |
| 3 | Required properties: |
| 4 | - compatible: Should be "fsl,imx27-ccm" |
| 5 | - reg: Address and length of the register set |
| 6 | - interrupts: Should contain CCM interrupt |
| 7 | - #clock-cells: Should be <1> |
| 8 | |
| 9 | The clock consumer should specify the desired clock by having the clock |
| Alexander Shiyan | e8e3faa | 2014-07-05 09:36:06 +0400 | [diff] [blame] | 10 | ID in its "clocks" phandle cell. See include/dt-bindings/clock/imx27-clock.h |
| 11 | for the full list of i.MX27 clock IDs. |
| Fabio Estevam | c20736f | 2012-11-28 15:55:30 -0200 | [diff] [blame] | 12 | |
| 13 | Examples: |
| Alexander Shiyan | e8e3faa | 2014-07-05 09:36:06 +0400 | [diff] [blame] | 14 | clks: ccm@10027000{ |
| 15 | compatible = "fsl,imx27-ccm"; |
| 16 | reg = <0x10027000 0x1000>; |
| 17 | #clock-cells = <1>; |
| 18 | }; |
| Fabio Estevam | c20736f | 2012-11-28 15:55:30 -0200 | [diff] [blame] | 19 | |
| Alexander Shiyan | e8e3faa | 2014-07-05 09:36:06 +0400 | [diff] [blame] | 20 | uart1: serial@1000a000 { |
| 21 | compatible = "fsl,imx27-uart", "fsl,imx21-uart"; |
| 22 | reg = <0x1000a000 0x1000>; |
| 23 | interrupts = <20>; |
| 24 | clocks = <&clks IMX27_CLK_UART1_IPG_GATE>, |
| 25 | <&clks IMX27_CLK_PER1_GATE>; |
| 26 | clock-names = "ipg", "per"; |
| 27 | status = "disabled"; |
| 28 | }; |