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Leif Lindholm0c9030d2011-12-12 19:31:55 +01001/*
2 * arch/arm/include/asm/opcodes.h
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9#ifndef __ASM_ARM_OPCODES_H
10#define __ASM_ARM_OPCODES_H
11
12#ifndef __ASSEMBLY__
Will Deacon6d63f642012-12-12 19:13:42 +000013#include <linux/linkage.h>
Leif Lindholm0c9030d2011-12-12 19:31:55 +010014extern asmlinkage unsigned int arm_check_condition(u32 opcode, u32 psr);
15#endif
16
17#define ARM_OPCODE_CONDTEST_FAIL 0
18#define ARM_OPCODE_CONDTEST_PASS 1
19#define ARM_OPCODE_CONDTEST_UNCOND 2
20
Dave Martinf5f51952012-02-01 10:42:22 +010021
22/*
Dave Martin0ce3de22012-09-03 13:49:23 +010023 * Assembler opcode byteswap helpers.
24 * These are only intended for use by this header: don't use them directly,
25 * because they will be suboptimal in most cases.
26 */
27#define ___asm_opcode_swab32(x) ( \
28 (((x) << 24) & 0xFF000000) \
29 | (((x) << 8) & 0x00FF0000) \
30 | (((x) >> 8) & 0x0000FF00) \
31 | (((x) >> 24) & 0x000000FF) \
32)
33#define ___asm_opcode_swab16(x) ( \
34 (((x) << 8) & 0xFF00) \
35 | (((x) >> 8) & 0x00FF) \
36)
37#define ___asm_opcode_swahb32(x) ( \
38 (((x) << 8) & 0xFF00FF00) \
39 | (((x) >> 8) & 0x00FF00FF) \
40)
41#define ___asm_opcode_swahw32(x) ( \
42 (((x) << 16) & 0xFFFF0000) \
43 | (((x) >> 16) & 0x0000FFFF) \
44)
45#define ___asm_opcode_identity32(x) ((x) & 0xFFFFFFFF)
46#define ___asm_opcode_identity16(x) ((x) & 0xFFFF)
47
48
49/*
Dave Martinf5f51952012-02-01 10:42:22 +010050 * Opcode byteswap helpers
51 *
52 * These macros help with converting instructions between a canonical integer
53 * format and in-memory representation, in an endianness-agnostic manner.
54 *
55 * __mem_to_opcode_*() convert from in-memory representation to canonical form.
56 * __opcode_to_mem_*() convert from canonical form to in-memory representation.
57 *
58 *
59 * Canonical instruction representation:
60 *
61 * ARM: 0xKKLLMMNN
62 * Thumb 16-bit: 0x0000KKLL, where KK < 0xE8
63 * Thumb 32-bit: 0xKKLLMMNN, where KK >= 0xE8
64 *
65 * There is no way to distinguish an ARM instruction in canonical representation
66 * from a Thumb instruction (just as these cannot be distinguished in memory).
67 * Where this distinction is important, it needs to be tracked separately.
68 *
69 * Note that values in the range 0x0000E800..0xE7FFFFFF intentionally do not
70 * represent any valid Thumb-2 instruction. For this range,
71 * __opcode_is_thumb32() and __opcode_is_thumb16() will both be false.
Dave Martin0ce3de22012-09-03 13:49:23 +010072 *
73 * The ___asm variants are intended only for use by this header, in situations
74 * involving inline assembler. For .S files, the normal __opcode_*() macros
75 * should do the right thing.
Dave Martinf5f51952012-02-01 10:42:22 +010076 */
Dave Martin0ce3de22012-09-03 13:49:23 +010077#ifdef __ASSEMBLY__
Dave Martinf5f51952012-02-01 10:42:22 +010078
Dave Martin0ce3de22012-09-03 13:49:23 +010079#define ___opcode_swab32(x) ___asm_opcode_swab32(x)
80#define ___opcode_swab16(x) ___asm_opcode_swab16(x)
81#define ___opcode_swahb32(x) ___asm_opcode_swahb32(x)
82#define ___opcode_swahw32(x) ___asm_opcode_swahw32(x)
83#define ___opcode_identity32(x) ___asm_opcode_identity32(x)
84#define ___opcode_identity16(x) ___asm_opcode_identity16(x)
85
86#else /* ! __ASSEMBLY__ */
Dave Martinf5f51952012-02-01 10:42:22 +010087
88#include <linux/types.h>
89#include <linux/swab.h>
90
Dave Martin0ce3de22012-09-03 13:49:23 +010091#define ___opcode_swab32(x) swab32(x)
92#define ___opcode_swab16(x) swab16(x)
93#define ___opcode_swahb32(x) swahb32(x)
94#define ___opcode_swahw32(x) swahw32(x)
95#define ___opcode_identity32(x) ((u32)(x))
96#define ___opcode_identity16(x) ((u16)(x))
97
98#endif /* ! __ASSEMBLY__ */
99
100
Dave Martinf5f51952012-02-01 10:42:22 +0100101#ifdef CONFIG_CPU_ENDIAN_BE8
Dave Martin57b9da32012-09-03 13:49:22 +0100102
Dave Martin0ce3de22012-09-03 13:49:23 +0100103#define __opcode_to_mem_arm(x) ___opcode_swab32(x)
104#define __opcode_to_mem_thumb16(x) ___opcode_swab16(x)
105#define __opcode_to_mem_thumb32(x) ___opcode_swahb32(x)
106#define ___asm_opcode_to_mem_arm(x) ___asm_opcode_swab32(x)
107#define ___asm_opcode_to_mem_thumb16(x) ___asm_opcode_swab16(x)
108#define ___asm_opcode_to_mem_thumb32(x) ___asm_opcode_swahb32(x)
Dave Martin57b9da32012-09-03 13:49:22 +0100109
110#else /* ! CONFIG_CPU_ENDIAN_BE8 */
111
Dave Martin0ce3de22012-09-03 13:49:23 +0100112#define __opcode_to_mem_arm(x) ___opcode_identity32(x)
113#define __opcode_to_mem_thumb16(x) ___opcode_identity16(x)
114#define ___asm_opcode_to_mem_arm(x) ___asm_opcode_identity32(x)
115#define ___asm_opcode_to_mem_thumb16(x) ___asm_opcode_identity16(x)
Dave Martin57b9da32012-09-03 13:49:22 +0100116#ifndef CONFIG_CPU_ENDIAN_BE32
117/*
118 * On BE32 systems, using 32-bit accesses to store Thumb instructions will not
119 * work in all cases, due to alignment constraints. For now, a correct
120 * version is not provided for BE32.
121 */
Dave Martin0ce3de22012-09-03 13:49:23 +0100122#define __opcode_to_mem_thumb32(x) ___opcode_swahw32(x)
123#define ___asm_opcode_to_mem_thumb32(x) ___asm_opcode_swahw32(x)
Dave Martinf5f51952012-02-01 10:42:22 +0100124#endif
125
Dave Martin57b9da32012-09-03 13:49:22 +0100126#endif /* ! CONFIG_CPU_ENDIAN_BE8 */
127
Dave Martinf5f51952012-02-01 10:42:22 +0100128#define __mem_to_opcode_arm(x) __opcode_to_mem_arm(x)
129#define __mem_to_opcode_thumb16(x) __opcode_to_mem_thumb16(x)
Dave Martin57b9da32012-09-03 13:49:22 +0100130#ifndef CONFIG_CPU_ENDIAN_BE32
Dave Martinf5f51952012-02-01 10:42:22 +0100131#define __mem_to_opcode_thumb32(x) __opcode_to_mem_thumb32(x)
Dave Martin57b9da32012-09-03 13:49:22 +0100132#endif
Dave Martinf5f51952012-02-01 10:42:22 +0100133
134/* Operations specific to Thumb opcodes */
135
136/* Instruction size checks: */
Dave Martin0ce3de22012-09-03 13:49:23 +0100137#define __opcode_is_thumb32(x) ( \
138 ((x) & 0xF8000000) == 0xE8000000 \
139 || ((x) & 0xF0000000) == 0xF0000000 \
140)
141#define __opcode_is_thumb16(x) ( \
142 ((x) & 0xFFFF0000) == 0 \
143 && !(((x) & 0xF800) == 0xE800 || ((x) & 0xF000) == 0xF000) \
144)
Dave Martinf5f51952012-02-01 10:42:22 +0100145
146/* Operations to construct or split 32-bit Thumb instructions: */
Dave Martin0ce3de22012-09-03 13:49:23 +0100147#define __opcode_thumb32_first(x) (___opcode_identity16((x) >> 16))
148#define __opcode_thumb32_second(x) (___opcode_identity16(x))
149#define __opcode_thumb32_compose(first, second) ( \
150 (___opcode_identity32(___opcode_identity16(first)) << 16) \
151 | ___opcode_identity32(___opcode_identity16(second)) \
152)
153#define ___asm_opcode_thumb32_first(x) (___asm_opcode_identity16((x) >> 16))
154#define ___asm_opcode_thumb32_second(x) (___asm_opcode_identity16(x))
155#define ___asm_opcode_thumb32_compose(first, second) ( \
156 (___asm_opcode_identity32(___asm_opcode_identity16(first)) << 16) \
157 | ___asm_opcode_identity32(___asm_opcode_identity16(second)) \
158)
Dave Martinf5f51952012-02-01 10:42:22 +0100159
Dave Martina61a41a2012-09-03 13:49:24 +0100160/*
161 * Opcode injection helpers
162 *
163 * In rare cases it is necessary to assemble an opcode which the
164 * assembler does not support directly, or which would normally be
165 * rejected because of the CFLAGS or AFLAGS used to build the affected
166 * file.
167 *
168 * Before using these macros, consider carefully whether it is feasible
169 * instead to change the build flags for your file, or whether it really
170 * makes sense to support old assembler versions when building that
171 * particular kernel feature.
172 *
173 * The macros defined here should only be used where there is no viable
174 * alternative.
175 *
176 *
177 * __inst_arm(x): emit the specified ARM opcode
178 * __inst_thumb16(x): emit the specified 16-bit Thumb opcode
179 * __inst_thumb32(x): emit the specified 32-bit Thumb opcode
180 *
181 * __inst_arm_thumb16(arm, thumb): emit either the specified arm or
182 * 16-bit Thumb opcode, depending on whether an ARM or Thumb-2
183 * kernel is being built
184 *
185 * __inst_arm_thumb32(arm, thumb): emit either the specified arm or
186 * 32-bit Thumb opcode, depending on whether an ARM or Thumb-2
187 * kernel is being built
188 *
189 *
190 * Note that using these macros directly is poor practice. Instead, you
191 * should use them to define human-readable wrapper macros to encode the
192 * instructions that you care about. In code which might run on ARMv7 or
193 * above, you can usually use the __inst_arm_thumb{16,32} macros to
194 * specify the ARM and Thumb alternatives at the same time. This ensures
195 * that the correct opcode gets emitted depending on the instruction set
196 * used for the kernel build.
Dave Martin508514e2012-09-03 13:49:25 +0100197 *
198 * Look at opcodes-virt.h for an example of how to use these macros.
Dave Martina61a41a2012-09-03 13:49:24 +0100199 */
200#include <linux/stringify.h>
201
202#define __inst_arm(x) ___inst_arm(___asm_opcode_to_mem_arm(x))
203#define __inst_thumb32(x) ___inst_thumb32( \
204 ___asm_opcode_to_mem_thumb16(___asm_opcode_thumb32_first(x)), \
205 ___asm_opcode_to_mem_thumb16(___asm_opcode_thumb32_second(x)) \
206)
207#define __inst_thumb16(x) ___inst_thumb16(___asm_opcode_to_mem_thumb16(x))
208
209#ifdef CONFIG_THUMB2_KERNEL
210#define __inst_arm_thumb16(arm_opcode, thumb_opcode) \
211 __inst_thumb16(thumb_opcode)
212#define __inst_arm_thumb32(arm_opcode, thumb_opcode) \
213 __inst_thumb32(thumb_opcode)
214#else
215#define __inst_arm_thumb16(arm_opcode, thumb_opcode) __inst_arm(arm_opcode)
216#define __inst_arm_thumb32(arm_opcode, thumb_opcode) __inst_arm(arm_opcode)
217#endif
218
219/* Helpers for the helpers. Don't use these directly. */
220#ifdef __ASSEMBLY__
221#define ___inst_arm(x) .long x
222#define ___inst_thumb16(x) .short x
223#define ___inst_thumb32(first, second) .short first, second
224#else
225#define ___inst_arm(x) ".long " __stringify(x) "\n\t"
226#define ___inst_thumb16(x) ".short " __stringify(x) "\n\t"
227#define ___inst_thumb32(first, second) \
228 ".short " __stringify(first) ", " __stringify(second) "\n\t"
229#endif
230
Leif Lindholm0c9030d2011-12-12 19:31:55 +0100231#endif /* __ASM_ARM_OPCODES_H */