Valentine Barshak | ba3eb9f | 2013-10-29 20:12:51 +0400 | [diff] [blame] | 1 | /* |
| 2 | * pci-rcar-gen2: internal PCI bus support |
| 3 | * |
| 4 | * Copyright (C) 2013 Renesas Solutions Corp. |
| 5 | * Copyright (C) 2013 Cogent Embedded, Inc. |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License version 2 as |
| 9 | * published by the Free Software Foundation. |
| 10 | */ |
| 11 | |
| 12 | #include <linux/delay.h> |
| 13 | #include <linux/init.h> |
| 14 | #include <linux/interrupt.h> |
| 15 | #include <linux/io.h> |
| 16 | #include <linux/kernel.h> |
| 17 | #include <linux/module.h> |
Lucas Stach | f8f2fe7 | 2014-04-16 10:24:09 -0600 | [diff] [blame] | 18 | #include <linux/of_pci.h> |
Valentine Barshak | ba3eb9f | 2013-10-29 20:12:51 +0400 | [diff] [blame] | 19 | #include <linux/pci.h> |
| 20 | #include <linux/platform_device.h> |
Valentine Barshak | fb178d8 | 2013-12-04 20:33:35 +0400 | [diff] [blame] | 21 | #include <linux/pm_runtime.h> |
Magnus Damm | 33966fd | 2014-02-18 11:11:32 +0900 | [diff] [blame] | 22 | #include <linux/sizes.h> |
Valentine Barshak | ba3eb9f | 2013-10-29 20:12:51 +0400 | [diff] [blame] | 23 | #include <linux/slab.h> |
| 24 | |
| 25 | /* AHB-PCI Bridge PCI communication registers */ |
| 26 | #define RCAR_AHBPCI_PCICOM_OFFSET 0x800 |
| 27 | |
| 28 | #define RCAR_PCIAHB_WIN1_CTR_REG (RCAR_AHBPCI_PCICOM_OFFSET + 0x00) |
| 29 | #define RCAR_PCIAHB_WIN2_CTR_REG (RCAR_AHBPCI_PCICOM_OFFSET + 0x04) |
| 30 | #define RCAR_PCIAHB_PREFETCH0 0x0 |
| 31 | #define RCAR_PCIAHB_PREFETCH4 0x1 |
| 32 | #define RCAR_PCIAHB_PREFETCH8 0x2 |
| 33 | #define RCAR_PCIAHB_PREFETCH16 0x3 |
| 34 | |
| 35 | #define RCAR_AHBPCI_WIN1_CTR_REG (RCAR_AHBPCI_PCICOM_OFFSET + 0x10) |
| 36 | #define RCAR_AHBPCI_WIN2_CTR_REG (RCAR_AHBPCI_PCICOM_OFFSET + 0x14) |
| 37 | #define RCAR_AHBPCI_WIN_CTR_MEM (3 << 1) |
| 38 | #define RCAR_AHBPCI_WIN_CTR_CFG (5 << 1) |
| 39 | #define RCAR_AHBPCI_WIN1_HOST (1 << 30) |
| 40 | #define RCAR_AHBPCI_WIN1_DEVICE (1 << 31) |
| 41 | |
| 42 | #define RCAR_PCI_INT_ENABLE_REG (RCAR_AHBPCI_PCICOM_OFFSET + 0x20) |
| 43 | #define RCAR_PCI_INT_STATUS_REG (RCAR_AHBPCI_PCICOM_OFFSET + 0x24) |
Ben Dooks | 80a595d | 2014-02-18 11:11:01 +0900 | [diff] [blame] | 44 | #define RCAR_PCI_INT_SIGTABORT (1 << 0) |
| 45 | #define RCAR_PCI_INT_SIGRETABORT (1 << 1) |
| 46 | #define RCAR_PCI_INT_REMABORT (1 << 2) |
| 47 | #define RCAR_PCI_INT_PERR (1 << 3) |
| 48 | #define RCAR_PCI_INT_SIGSERR (1 << 4) |
| 49 | #define RCAR_PCI_INT_RESERR (1 << 5) |
| 50 | #define RCAR_PCI_INT_WIN1ERR (1 << 12) |
| 51 | #define RCAR_PCI_INT_WIN2ERR (1 << 13) |
Valentine Barshak | ba3eb9f | 2013-10-29 20:12:51 +0400 | [diff] [blame] | 52 | #define RCAR_PCI_INT_A (1 << 16) |
| 53 | #define RCAR_PCI_INT_B (1 << 17) |
| 54 | #define RCAR_PCI_INT_PME (1 << 19) |
Ben Dooks | 80a595d | 2014-02-18 11:11:01 +0900 | [diff] [blame] | 55 | #define RCAR_PCI_INT_ALLERRORS (RCAR_PCI_INT_SIGTABORT | \ |
| 56 | RCAR_PCI_INT_SIGRETABORT | \ |
| 57 | RCAR_PCI_INT_SIGRETABORT | \ |
| 58 | RCAR_PCI_INT_REMABORT | \ |
| 59 | RCAR_PCI_INT_PERR | \ |
| 60 | RCAR_PCI_INT_SIGSERR | \ |
| 61 | RCAR_PCI_INT_RESERR | \ |
| 62 | RCAR_PCI_INT_WIN1ERR | \ |
| 63 | RCAR_PCI_INT_WIN2ERR) |
Valentine Barshak | ba3eb9f | 2013-10-29 20:12:51 +0400 | [diff] [blame] | 64 | |
| 65 | #define RCAR_AHB_BUS_CTR_REG (RCAR_AHBPCI_PCICOM_OFFSET + 0x30) |
| 66 | #define RCAR_AHB_BUS_MMODE_HTRANS (1 << 0) |
| 67 | #define RCAR_AHB_BUS_MMODE_BYTE_BURST (1 << 1) |
| 68 | #define RCAR_AHB_BUS_MMODE_WR_INCR (1 << 2) |
| 69 | #define RCAR_AHB_BUS_MMODE_HBUS_REQ (1 << 7) |
| 70 | #define RCAR_AHB_BUS_SMODE_READYCTR (1 << 17) |
| 71 | #define RCAR_AHB_BUS_MODE (RCAR_AHB_BUS_MMODE_HTRANS | \ |
| 72 | RCAR_AHB_BUS_MMODE_BYTE_BURST | \ |
| 73 | RCAR_AHB_BUS_MMODE_WR_INCR | \ |
| 74 | RCAR_AHB_BUS_MMODE_HBUS_REQ | \ |
| 75 | RCAR_AHB_BUS_SMODE_READYCTR) |
| 76 | |
| 77 | #define RCAR_USBCTR_REG (RCAR_AHBPCI_PCICOM_OFFSET + 0x34) |
| 78 | #define RCAR_USBCTR_USBH_RST (1 << 0) |
| 79 | #define RCAR_USBCTR_PCICLK_MASK (1 << 1) |
| 80 | #define RCAR_USBCTR_PLL_RST (1 << 2) |
| 81 | #define RCAR_USBCTR_DIRPD (1 << 8) |
| 82 | #define RCAR_USBCTR_PCIAHB_WIN2_EN (1 << 9) |
| 83 | #define RCAR_USBCTR_PCIAHB_WIN1_256M (0 << 10) |
| 84 | #define RCAR_USBCTR_PCIAHB_WIN1_512M (1 << 10) |
| 85 | #define RCAR_USBCTR_PCIAHB_WIN1_1G (2 << 10) |
| 86 | #define RCAR_USBCTR_PCIAHB_WIN1_2G (3 << 10) |
| 87 | #define RCAR_USBCTR_PCIAHB_WIN1_MASK (3 << 10) |
| 88 | |
| 89 | #define RCAR_PCI_ARBITER_CTR_REG (RCAR_AHBPCI_PCICOM_OFFSET + 0x40) |
| 90 | #define RCAR_PCI_ARBITER_PCIREQ0 (1 << 0) |
| 91 | #define RCAR_PCI_ARBITER_PCIREQ1 (1 << 1) |
| 92 | #define RCAR_PCI_ARBITER_PCIBP_MODE (1 << 12) |
| 93 | |
| 94 | #define RCAR_PCI_UNIT_REV_REG (RCAR_AHBPCI_PCICOM_OFFSET + 0x48) |
| 95 | |
Valentine Barshak | ba3eb9f | 2013-10-29 20:12:51 +0400 | [diff] [blame] | 96 | struct rcar_pci_priv { |
Valentine Barshak | fb178d8 | 2013-12-04 20:33:35 +0400 | [diff] [blame] | 97 | struct device *dev; |
Valentine Barshak | ba3eb9f | 2013-10-29 20:12:51 +0400 | [diff] [blame] | 98 | void __iomem *reg; |
| 99 | struct resource io_res; |
| 100 | struct resource mem_res; |
| 101 | struct resource *cfg_res; |
| 102 | int irq; |
Magnus Damm | 33966fd | 2014-02-18 11:11:32 +0900 | [diff] [blame] | 103 | unsigned long window_size; |
Valentine Barshak | ba3eb9f | 2013-10-29 20:12:51 +0400 | [diff] [blame] | 104 | }; |
| 105 | |
| 106 | /* PCI configuration space operations */ |
| 107 | static void __iomem *rcar_pci_cfg_base(struct pci_bus *bus, unsigned int devfn, |
| 108 | int where) |
| 109 | { |
| 110 | struct pci_sys_data *sys = bus->sysdata; |
| 111 | struct rcar_pci_priv *priv = sys->private_data; |
| 112 | int slot, val; |
| 113 | |
| 114 | if (sys->busnr != bus->number || PCI_FUNC(devfn)) |
| 115 | return NULL; |
| 116 | |
| 117 | /* Only one EHCI/OHCI device built-in */ |
| 118 | slot = PCI_SLOT(devfn); |
| 119 | if (slot > 2) |
| 120 | return NULL; |
| 121 | |
Ben Dooks | e64a2a9 | 2014-02-18 11:11:11 +0900 | [diff] [blame] | 122 | /* bridge logic only has registers to 0x40 */ |
| 123 | if (slot == 0x0 && where >= 0x40) |
| 124 | return NULL; |
| 125 | |
Valentine Barshak | ba3eb9f | 2013-10-29 20:12:51 +0400 | [diff] [blame] | 126 | val = slot ? RCAR_AHBPCI_WIN1_DEVICE | RCAR_AHBPCI_WIN_CTR_CFG : |
| 127 | RCAR_AHBPCI_WIN1_HOST | RCAR_AHBPCI_WIN_CTR_CFG; |
| 128 | |
| 129 | iowrite32(val, priv->reg + RCAR_AHBPCI_WIN1_CTR_REG); |
| 130 | return priv->reg + (slot >> 1) * 0x100 + where; |
| 131 | } |
| 132 | |
| 133 | static int rcar_pci_read_config(struct pci_bus *bus, unsigned int devfn, |
| 134 | int where, int size, u32 *val) |
| 135 | { |
| 136 | void __iomem *reg = rcar_pci_cfg_base(bus, devfn, where); |
| 137 | |
| 138 | if (!reg) |
| 139 | return PCIBIOS_DEVICE_NOT_FOUND; |
| 140 | |
| 141 | switch (size) { |
| 142 | case 1: |
| 143 | *val = ioread8(reg); |
| 144 | break; |
| 145 | case 2: |
| 146 | *val = ioread16(reg); |
| 147 | break; |
| 148 | default: |
| 149 | *val = ioread32(reg); |
| 150 | break; |
| 151 | } |
| 152 | |
| 153 | return PCIBIOS_SUCCESSFUL; |
| 154 | } |
| 155 | |
| 156 | static int rcar_pci_write_config(struct pci_bus *bus, unsigned int devfn, |
| 157 | int where, int size, u32 val) |
| 158 | { |
| 159 | void __iomem *reg = rcar_pci_cfg_base(bus, devfn, where); |
| 160 | |
| 161 | if (!reg) |
| 162 | return PCIBIOS_DEVICE_NOT_FOUND; |
| 163 | |
| 164 | switch (size) { |
| 165 | case 1: |
| 166 | iowrite8(val, reg); |
| 167 | break; |
| 168 | case 2: |
| 169 | iowrite16(val, reg); |
| 170 | break; |
| 171 | default: |
| 172 | iowrite32(val, reg); |
| 173 | break; |
| 174 | } |
| 175 | |
| 176 | return PCIBIOS_SUCCESSFUL; |
| 177 | } |
| 178 | |
| 179 | /* PCI interrupt mapping */ |
Magnus Damm | 546cadd | 2014-02-18 11:11:21 +0900 | [diff] [blame] | 180 | static int rcar_pci_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) |
Valentine Barshak | ba3eb9f | 2013-10-29 20:12:51 +0400 | [diff] [blame] | 181 | { |
| 182 | struct pci_sys_data *sys = dev->bus->sysdata; |
| 183 | struct rcar_pci_priv *priv = sys->private_data; |
Lucas Stach | f8f2fe7 | 2014-04-16 10:24:09 -0600 | [diff] [blame] | 184 | int irq; |
Valentine Barshak | ba3eb9f | 2013-10-29 20:12:51 +0400 | [diff] [blame] | 185 | |
Lucas Stach | f8f2fe7 | 2014-04-16 10:24:09 -0600 | [diff] [blame] | 186 | irq = of_irq_parse_and_map_pci(dev, slot, pin); |
| 187 | if (!irq) |
| 188 | irq = priv->irq; |
| 189 | |
| 190 | return irq; |
Valentine Barshak | ba3eb9f | 2013-10-29 20:12:51 +0400 | [diff] [blame] | 191 | } |
| 192 | |
Ben Dooks | 80a595d | 2014-02-18 11:11:01 +0900 | [diff] [blame] | 193 | #ifdef CONFIG_PCI_DEBUG |
| 194 | /* if debug enabled, then attach an error handler irq to the bridge */ |
| 195 | |
| 196 | static irqreturn_t rcar_pci_err_irq(int irq, void *pw) |
| 197 | { |
| 198 | struct rcar_pci_priv *priv = pw; |
| 199 | u32 status = ioread32(priv->reg + RCAR_PCI_INT_STATUS_REG); |
| 200 | |
| 201 | if (status & RCAR_PCI_INT_ALLERRORS) { |
| 202 | dev_err(priv->dev, "error irq: status %08x\n", status); |
| 203 | |
| 204 | /* clear the error(s) */ |
| 205 | iowrite32(status & RCAR_PCI_INT_ALLERRORS, |
| 206 | priv->reg + RCAR_PCI_INT_STATUS_REG); |
| 207 | return IRQ_HANDLED; |
| 208 | } |
| 209 | |
| 210 | return IRQ_NONE; |
| 211 | } |
| 212 | |
| 213 | static void rcar_pci_setup_errirq(struct rcar_pci_priv *priv) |
| 214 | { |
| 215 | int ret; |
| 216 | u32 val; |
| 217 | |
| 218 | ret = devm_request_irq(priv->dev, priv->irq, rcar_pci_err_irq, |
| 219 | IRQF_SHARED, "error irq", priv); |
| 220 | if (ret) { |
| 221 | dev_err(priv->dev, "cannot claim IRQ for error handling\n"); |
| 222 | return; |
| 223 | } |
| 224 | |
| 225 | val = ioread32(priv->reg + RCAR_PCI_INT_ENABLE_REG); |
| 226 | val |= RCAR_PCI_INT_ALLERRORS; |
| 227 | iowrite32(val, priv->reg + RCAR_PCI_INT_ENABLE_REG); |
| 228 | } |
| 229 | #else |
| 230 | static inline void rcar_pci_setup_errirq(struct rcar_pci_priv *priv) { } |
| 231 | #endif |
| 232 | |
Valentine Barshak | ba3eb9f | 2013-10-29 20:12:51 +0400 | [diff] [blame] | 233 | /* PCI host controller setup */ |
Magnus Damm | 546cadd | 2014-02-18 11:11:21 +0900 | [diff] [blame] | 234 | static int rcar_pci_setup(int nr, struct pci_sys_data *sys) |
Valentine Barshak | ba3eb9f | 2013-10-29 20:12:51 +0400 | [diff] [blame] | 235 | { |
| 236 | struct rcar_pci_priv *priv = sys->private_data; |
| 237 | void __iomem *reg = priv->reg; |
| 238 | u32 val; |
| 239 | |
Valentine Barshak | fb178d8 | 2013-12-04 20:33:35 +0400 | [diff] [blame] | 240 | pm_runtime_enable(priv->dev); |
| 241 | pm_runtime_get_sync(priv->dev); |
| 242 | |
Valentine Barshak | ba3eb9f | 2013-10-29 20:12:51 +0400 | [diff] [blame] | 243 | val = ioread32(reg + RCAR_PCI_UNIT_REV_REG); |
Valentine Barshak | fb178d8 | 2013-12-04 20:33:35 +0400 | [diff] [blame] | 244 | dev_info(priv->dev, "PCI: bus%u revision %x\n", sys->busnr, val); |
Valentine Barshak | ba3eb9f | 2013-10-29 20:12:51 +0400 | [diff] [blame] | 245 | |
| 246 | /* Disable Direct Power Down State and assert reset */ |
| 247 | val = ioread32(reg + RCAR_USBCTR_REG) & ~RCAR_USBCTR_DIRPD; |
| 248 | val |= RCAR_USBCTR_USBH_RST | RCAR_USBCTR_PLL_RST; |
| 249 | iowrite32(val, reg + RCAR_USBCTR_REG); |
| 250 | udelay(4); |
| 251 | |
Magnus Damm | 33966fd | 2014-02-18 11:11:32 +0900 | [diff] [blame] | 252 | /* De-assert reset and reset PCIAHB window1 size */ |
Valentine Barshak | ba3eb9f | 2013-10-29 20:12:51 +0400 | [diff] [blame] | 253 | val &= ~(RCAR_USBCTR_PCIAHB_WIN1_MASK | RCAR_USBCTR_PCICLK_MASK | |
| 254 | RCAR_USBCTR_USBH_RST | RCAR_USBCTR_PLL_RST); |
Magnus Damm | 33966fd | 2014-02-18 11:11:32 +0900 | [diff] [blame] | 255 | |
| 256 | /* Setup PCIAHB window1 size */ |
| 257 | switch (priv->window_size) { |
| 258 | case SZ_2G: |
| 259 | val |= RCAR_USBCTR_PCIAHB_WIN1_2G; |
| 260 | break; |
| 261 | case SZ_1G: |
| 262 | val |= RCAR_USBCTR_PCIAHB_WIN1_1G; |
| 263 | break; |
| 264 | case SZ_512M: |
| 265 | val |= RCAR_USBCTR_PCIAHB_WIN1_512M; |
| 266 | break; |
| 267 | default: |
| 268 | pr_warn("unknown window size %ld - defaulting to 256M\n", |
| 269 | priv->window_size); |
| 270 | priv->window_size = SZ_256M; |
| 271 | /* fall-through */ |
| 272 | case SZ_256M: |
| 273 | val |= RCAR_USBCTR_PCIAHB_WIN1_256M; |
| 274 | break; |
| 275 | } |
| 276 | iowrite32(val, reg + RCAR_USBCTR_REG); |
Valentine Barshak | ba3eb9f | 2013-10-29 20:12:51 +0400 | [diff] [blame] | 277 | |
| 278 | /* Configure AHB master and slave modes */ |
| 279 | iowrite32(RCAR_AHB_BUS_MODE, reg + RCAR_AHB_BUS_CTR_REG); |
| 280 | |
| 281 | /* Configure PCI arbiter */ |
| 282 | val = ioread32(reg + RCAR_PCI_ARBITER_CTR_REG); |
| 283 | val |= RCAR_PCI_ARBITER_PCIREQ0 | RCAR_PCI_ARBITER_PCIREQ1 | |
| 284 | RCAR_PCI_ARBITER_PCIBP_MODE; |
| 285 | iowrite32(val, reg + RCAR_PCI_ARBITER_CTR_REG); |
| 286 | |
Magnus Damm | 33966fd | 2014-02-18 11:11:32 +0900 | [diff] [blame] | 287 | /* PCI-AHB mapping: 0x40000000 base */ |
Valentine Barshak | ba3eb9f | 2013-10-29 20:12:51 +0400 | [diff] [blame] | 288 | iowrite32(0x40000000 | RCAR_PCIAHB_PREFETCH16, |
| 289 | reg + RCAR_PCIAHB_WIN1_CTR_REG); |
| 290 | |
| 291 | /* AHB-PCI mapping: OHCI/EHCI registers */ |
| 292 | val = priv->mem_res.start | RCAR_AHBPCI_WIN_CTR_MEM; |
| 293 | iowrite32(val, reg + RCAR_AHBPCI_WIN2_CTR_REG); |
| 294 | |
| 295 | /* Enable AHB-PCI bridge PCI configuration access */ |
| 296 | iowrite32(RCAR_AHBPCI_WIN1_HOST | RCAR_AHBPCI_WIN_CTR_CFG, |
| 297 | reg + RCAR_AHBPCI_WIN1_CTR_REG); |
| 298 | /* Set PCI-AHB Window1 address */ |
| 299 | iowrite32(0x40000000 | PCI_BASE_ADDRESS_MEM_PREFETCH, |
| 300 | reg + PCI_BASE_ADDRESS_1); |
| 301 | /* Set AHB-PCI bridge PCI communication area address */ |
| 302 | val = priv->cfg_res->start + RCAR_AHBPCI_PCICOM_OFFSET; |
| 303 | iowrite32(val, reg + PCI_BASE_ADDRESS_0); |
| 304 | |
| 305 | val = ioread32(reg + PCI_COMMAND); |
| 306 | val |= PCI_COMMAND_SERR | PCI_COMMAND_PARITY | |
| 307 | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER; |
| 308 | iowrite32(val, reg + PCI_COMMAND); |
| 309 | |
| 310 | /* Enable PCI interrupts */ |
| 311 | iowrite32(RCAR_PCI_INT_A | RCAR_PCI_INT_B | RCAR_PCI_INT_PME, |
| 312 | reg + RCAR_PCI_INT_ENABLE_REG); |
| 313 | |
Ben Dooks | 80a595d | 2014-02-18 11:11:01 +0900 | [diff] [blame] | 314 | if (priv->irq > 0) |
| 315 | rcar_pci_setup_errirq(priv); |
| 316 | |
Valentine Barshak | ba3eb9f | 2013-10-29 20:12:51 +0400 | [diff] [blame] | 317 | /* Add PCI resources */ |
| 318 | pci_add_resource(&sys->resources, &priv->io_res); |
| 319 | pci_add_resource(&sys->resources, &priv->mem_res); |
| 320 | |
Magnus Damm | 546cadd | 2014-02-18 11:11:21 +0900 | [diff] [blame] | 321 | /* Setup bus number based on platform device id */ |
| 322 | sys->busnr = to_platform_device(priv->dev)->id; |
Valentine Barshak | ba3eb9f | 2013-10-29 20:12:51 +0400 | [diff] [blame] | 323 | return 1; |
| 324 | } |
| 325 | |
| 326 | static struct pci_ops rcar_pci_ops = { |
| 327 | .read = rcar_pci_read_config, |
| 328 | .write = rcar_pci_write_config, |
| 329 | }; |
| 330 | |
Magnus Damm | 546cadd | 2014-02-18 11:11:21 +0900 | [diff] [blame] | 331 | static int rcar_pci_probe(struct platform_device *pdev) |
Valentine Barshak | ba3eb9f | 2013-10-29 20:12:51 +0400 | [diff] [blame] | 332 | { |
| 333 | struct resource *cfg_res, *mem_res; |
| 334 | struct rcar_pci_priv *priv; |
| 335 | void __iomem *reg; |
Magnus Damm | 546cadd | 2014-02-18 11:11:21 +0900 | [diff] [blame] | 336 | struct hw_pci hw; |
| 337 | void *hw_private[1]; |
Valentine Barshak | ba3eb9f | 2013-10-29 20:12:51 +0400 | [diff] [blame] | 338 | |
| 339 | cfg_res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 340 | reg = devm_ioremap_resource(&pdev->dev, cfg_res); |
Wei Yongjun | c176d1c | 2013-11-19 11:40:28 +0800 | [diff] [blame] | 341 | if (IS_ERR(reg)) |
| 342 | return PTR_ERR(reg); |
Valentine Barshak | ba3eb9f | 2013-10-29 20:12:51 +0400 | [diff] [blame] | 343 | |
| 344 | mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 1); |
| 345 | if (!mem_res || !mem_res->start) |
| 346 | return -ENODEV; |
| 347 | |
| 348 | priv = devm_kzalloc(&pdev->dev, |
| 349 | sizeof(struct rcar_pci_priv), GFP_KERNEL); |
| 350 | if (!priv) |
| 351 | return -ENOMEM; |
| 352 | |
| 353 | priv->mem_res = *mem_res; |
| 354 | /* |
| 355 | * The controller does not support/use port I/O, |
| 356 | * so setup a dummy port I/O region here. |
| 357 | */ |
| 358 | priv->io_res.start = priv->mem_res.start; |
| 359 | priv->io_res.end = priv->mem_res.end; |
| 360 | priv->io_res.flags = IORESOURCE_IO; |
| 361 | |
| 362 | priv->cfg_res = cfg_res; |
| 363 | |
| 364 | priv->irq = platform_get_irq(pdev, 0); |
| 365 | priv->reg = reg; |
Valentine Barshak | fb178d8 | 2013-12-04 20:33:35 +0400 | [diff] [blame] | 366 | priv->dev = &pdev->dev; |
Valentine Barshak | ba3eb9f | 2013-10-29 20:12:51 +0400 | [diff] [blame] | 367 | |
Ben Dooks | ed65b78 | 2014-02-18 11:10:51 +0900 | [diff] [blame] | 368 | if (priv->irq < 0) { |
| 369 | dev_err(&pdev->dev, "no valid irq found\n"); |
| 370 | return priv->irq; |
| 371 | } |
| 372 | |
Magnus Damm | 33966fd | 2014-02-18 11:11:32 +0900 | [diff] [blame] | 373 | priv->window_size = SZ_1G; |
| 374 | |
Magnus Damm | 546cadd | 2014-02-18 11:11:21 +0900 | [diff] [blame] | 375 | hw_private[0] = priv; |
| 376 | memset(&hw, 0, sizeof(hw)); |
| 377 | hw.nr_controllers = ARRAY_SIZE(hw_private); |
| 378 | hw.private_data = hw_private; |
| 379 | hw.map_irq = rcar_pci_map_irq; |
| 380 | hw.ops = &rcar_pci_ops; |
| 381 | hw.setup = rcar_pci_setup; |
| 382 | pci_common_init_dev(&pdev->dev, &hw); |
| 383 | return 0; |
Valentine Barshak | ba3eb9f | 2013-10-29 20:12:51 +0400 | [diff] [blame] | 384 | } |
| 385 | |
| 386 | static struct platform_driver rcar_pci_driver = { |
| 387 | .driver = { |
| 388 | .name = "pci-rcar-gen2", |
Magnus Damm | 546cadd | 2014-02-18 11:11:21 +0900 | [diff] [blame] | 389 | .owner = THIS_MODULE, |
| 390 | .suppress_bind_attrs = true, |
Valentine Barshak | ba3eb9f | 2013-10-29 20:12:51 +0400 | [diff] [blame] | 391 | }, |
Magnus Damm | 546cadd | 2014-02-18 11:11:21 +0900 | [diff] [blame] | 392 | .probe = rcar_pci_probe, |
Valentine Barshak | ba3eb9f | 2013-10-29 20:12:51 +0400 | [diff] [blame] | 393 | }; |
| 394 | |
Magnus Damm | 546cadd | 2014-02-18 11:11:21 +0900 | [diff] [blame] | 395 | module_platform_driver(rcar_pci_driver); |
Valentine Barshak | ba3eb9f | 2013-10-29 20:12:51 +0400 | [diff] [blame] | 396 | |
| 397 | MODULE_LICENSE("GPL v2"); |
| 398 | MODULE_DESCRIPTION("Renesas R-Car Gen2 internal PCI"); |
| 399 | MODULE_AUTHOR("Valentine Barshak <valentine.barshak@cogentembedded.com>"); |