Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * |
| 3 | * tdfxfb.c |
| 4 | * |
| 5 | * Author: Hannu Mallat <hmallat@cc.hut.fi> |
| 6 | * |
| 7 | * Copyright © 1999 Hannu Mallat |
| 8 | * All rights reserved |
| 9 | * |
| 10 | * Created : Thu Sep 23 18:17:43 1999, hmallat |
| 11 | * Last modified: Tue Nov 2 21:19:47 1999, hmallat |
| 12 | * |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 13 | * Lots of the information here comes from the Daryll Strauss' Banshee |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 14 | * patches to the XF86 server, and the rest comes from the 3dfx |
| 15 | * Banshee specification. I'm very much indebted to Daryll for his |
| 16 | * work on the X server. |
| 17 | * |
| 18 | * Voodoo3 support was contributed Harold Oga. Lots of additions |
| 19 | * (proper acceleration, 24 bpp, hardware cursor) and bug fixes by Attila |
| 20 | * Kesmarki. Thanks guys! |
| 21 | * |
| 22 | * Voodoo1 and Voodoo2 support aren't relevant to this driver as they |
| 23 | * behave very differently from the Voodoo3/4/5. For anyone wanting to |
| 24 | * use frame buffer on the Voodoo1/2, see the sstfb driver (which is |
| 25 | * located at http://www.sourceforge.net/projects/sstfb). |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 26 | * |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 27 | * While I _am_ grateful to 3Dfx for releasing the specs for Banshee, |
| 28 | * I do wish the next version is a bit more complete. Without the XF86 |
| 29 | * patches I couldn't have gotten even this far... for instance, the |
| 30 | * extensions to the VGA register set go completely unmentioned in the |
| 31 | * spec! Also, lots of references are made to the 'SST core', but no |
| 32 | * spec is publicly available, AFAIK. |
| 33 | * |
| 34 | * The structure of this driver comes pretty much from the Permedia |
| 35 | * driver by Ilario Nardinocchi, which in turn is based on skeletonfb. |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 36 | * |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 37 | * TODO: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 38 | * - multihead support (basically need to support an array of fb_infos) |
| 39 | * - support other architectures (PPC, Alpha); does the fact that the VGA |
| 40 | * core can be accessed only thru I/O (not memory mapped) complicate |
| 41 | * things? |
| 42 | * |
| 43 | * Version history: |
| 44 | * |
| 45 | * 0.1.4 (released 2002-05-28) ported over to new fbdev api by James Simmons |
| 46 | * |
| 47 | * 0.1.3 (released 1999-11-02) added Attila's panning support, code |
| 48 | * reorg, hwcursor address page size alignment |
| 49 | * (for mmaping both frame buffer and regs), |
| 50 | * and my changes to get rid of hardcoded |
| 51 | * VGA i/o register locations (uses PCI |
| 52 | * configuration info now) |
| 53 | * 0.1.2 (released 1999-10-19) added Attila Kesmarki's bug fixes and |
| 54 | * improvements |
| 55 | * 0.1.1 (released 1999-10-07) added Voodoo3 support by Harold Oga. |
| 56 | * 0.1.0 (released 1999-10-06) initial version |
| 57 | * |
| 58 | */ |
| 59 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 60 | #include <linux/module.h> |
| 61 | #include <linux/kernel.h> |
| 62 | #include <linux/errno.h> |
| 63 | #include <linux/string.h> |
| 64 | #include <linux/mm.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 65 | #include <linux/slab.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 66 | #include <linux/fb.h> |
| 67 | #include <linux/init.h> |
| 68 | #include <linux/pci.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 69 | #include <asm/io.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 70 | |
| 71 | #include <video/tdfx.h> |
| 72 | |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 73 | #undef TDFXFB_DEBUG |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 74 | #ifdef TDFXFB_DEBUG |
| 75 | #define DPRINTK(a,b...) printk(KERN_DEBUG "fb: %s: " a, __FUNCTION__ , ## b) |
| 76 | #else |
| 77 | #define DPRINTK(a,b...) |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 78 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 79 | |
Krzysztof Helt | 0960bd3 | 2007-10-16 01:28:49 -0700 | [diff] [blame] | 80 | #ifdef CONFIG_MTRR |
| 81 | #include <asm/mtrr.h> |
| 82 | #else |
| 83 | /* duplicate asm/mtrr.h defines to work on archs without mtrr */ |
| 84 | #define MTRR_TYPE_WRCOMB 1 |
| 85 | |
| 86 | static inline int mtrr_add(unsigned long base, unsigned long size, |
| 87 | unsigned int type, char increment) |
| 88 | { |
| 89 | return -ENODEV; |
| 90 | } |
| 91 | static inline int mtrr_del(int reg, unsigned long base, |
| 92 | unsigned long size) |
| 93 | { |
| 94 | return -ENODEV; |
| 95 | } |
| 96 | #endif |
| 97 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 98 | #define BANSHEE_MAX_PIXCLOCK 270000 |
| 99 | #define VOODOO3_MAX_PIXCLOCK 300000 |
| 100 | #define VOODOO5_MAX_PIXCLOCK 350000 |
| 101 | |
| 102 | static struct fb_fix_screeninfo tdfx_fix __devinitdata = { |
| 103 | .id = "3Dfx", |
| 104 | .type = FB_TYPE_PACKED_PIXELS, |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 105 | .visual = FB_VISUAL_PSEUDOCOLOR, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 106 | .ypanstep = 1, |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 107 | .ywrapstep = 1, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 108 | .accel = FB_ACCEL_3DFX_BANSHEE |
| 109 | }; |
| 110 | |
| 111 | static struct fb_var_screeninfo tdfx_var __devinitdata = { |
| 112 | /* "640x480, 8 bpp @ 60 Hz */ |
| 113 | .xres = 640, |
| 114 | .yres = 480, |
| 115 | .xres_virtual = 640, |
| 116 | .yres_virtual = 1024, |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 117 | .bits_per_pixel = 8, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 118 | .red = {0, 8, 0}, |
| 119 | .blue = {0, 8, 0}, |
| 120 | .green = {0, 8, 0}, |
| 121 | .activate = FB_ACTIVATE_NOW, |
| 122 | .height = -1, |
| 123 | .width = -1, |
| 124 | .accel_flags = FB_ACCELF_TEXT, |
| 125 | .pixclock = 39722, |
| 126 | .left_margin = 40, |
| 127 | .right_margin = 24, |
| 128 | .upper_margin = 32, |
| 129 | .lower_margin = 11, |
| 130 | .hsync_len = 96, |
| 131 | .vsync_len = 2, |
| 132 | .vmode = FB_VMODE_NONINTERLACED |
| 133 | }; |
| 134 | |
| 135 | /* |
| 136 | * PCI driver prototypes |
| 137 | */ |
| 138 | static int __devinit tdfxfb_probe(struct pci_dev *pdev, |
| 139 | const struct pci_device_id *id); |
| 140 | static void __devexit tdfxfb_remove(struct pci_dev *pdev); |
| 141 | |
| 142 | static struct pci_device_id tdfxfb_id_table[] = { |
| 143 | { PCI_VENDOR_ID_3DFX, PCI_DEVICE_ID_3DFX_BANSHEE, |
| 144 | PCI_ANY_ID, PCI_ANY_ID, PCI_BASE_CLASS_DISPLAY << 16, |
| 145 | 0xff0000, 0 }, |
| 146 | { PCI_VENDOR_ID_3DFX, PCI_DEVICE_ID_3DFX_VOODOO3, |
| 147 | PCI_ANY_ID, PCI_ANY_ID, PCI_BASE_CLASS_DISPLAY << 16, |
| 148 | 0xff0000, 0 }, |
| 149 | { PCI_VENDOR_ID_3DFX, PCI_DEVICE_ID_3DFX_VOODOO5, |
| 150 | PCI_ANY_ID, PCI_ANY_ID, PCI_BASE_CLASS_DISPLAY << 16, |
| 151 | 0xff0000, 0 }, |
| 152 | { 0, } |
| 153 | }; |
| 154 | |
| 155 | static struct pci_driver tdfxfb_driver = { |
| 156 | .name = "tdfxfb", |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 157 | .id_table = tdfxfb_id_table, |
| 158 | .probe = tdfxfb_probe, |
| 159 | .remove = __devexit_p(tdfxfb_remove), |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 160 | }; |
| 161 | |
| 162 | MODULE_DEVICE_TABLE(pci, tdfxfb_id_table); |
| 163 | |
| 164 | /* |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 165 | * Driver data |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 166 | */ |
Krzysztof Helt | 90b0f08 | 2007-10-16 01:28:48 -0700 | [diff] [blame] | 167 | static int nopan; |
| 168 | static int nowrap = 1; /* not implemented (yet) */ |
| 169 | static int hwcursor = 1; |
Krzysztof Helt | 0960bd3 | 2007-10-16 01:28:49 -0700 | [diff] [blame] | 170 | static char *mode_option __devinitdata; |
| 171 | /* mtrr option */ |
| 172 | static int nomtrr __devinitdata; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 173 | |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 174 | /* ------------------------------------------------------------------------- |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 175 | * Hardware-specific funcions |
| 176 | * ------------------------------------------------------------------------- */ |
| 177 | |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 178 | static inline u8 vga_inb(struct tdfx_par *par, u32 reg) |
| 179 | { |
| 180 | return inb(par->iobase + reg - 0x300); |
| 181 | } |
Krzysztof Helt | 4f05b53 | 2007-10-16 01:28:48 -0700 | [diff] [blame] | 182 | |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 183 | static inline void vga_outb(struct tdfx_par *par, u32 reg, u8 val) |
| 184 | { |
| 185 | outb(val, par->iobase + reg - 0x300); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 186 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 187 | |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 188 | static inline void gra_outb(struct tdfx_par *par, u32 idx, u8 val) |
| 189 | { |
| 190 | vga_outb(par, GRA_I, idx); |
Krzysztof Helt | 254c947 | 2007-10-16 01:28:46 -0700 | [diff] [blame] | 191 | wmb(); |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 192 | vga_outb(par, GRA_D, val); |
Krzysztof Helt | 254c947 | 2007-10-16 01:28:46 -0700 | [diff] [blame] | 193 | wmb(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 194 | } |
| 195 | |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 196 | static inline void seq_outb(struct tdfx_par *par, u32 idx, u8 val) |
| 197 | { |
| 198 | vga_outb(par, SEQ_I, idx); |
Krzysztof Helt | 254c947 | 2007-10-16 01:28:46 -0700 | [diff] [blame] | 199 | wmb(); |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 200 | vga_outb(par, SEQ_D, val); |
Krzysztof Helt | 254c947 | 2007-10-16 01:28:46 -0700 | [diff] [blame] | 201 | wmb(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 202 | } |
| 203 | |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 204 | static inline u8 seq_inb(struct tdfx_par *par, u32 idx) |
| 205 | { |
| 206 | vga_outb(par, SEQ_I, idx); |
Krzysztof Helt | 254c947 | 2007-10-16 01:28:46 -0700 | [diff] [blame] | 207 | mb(); |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 208 | return vga_inb(par, SEQ_D); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 209 | } |
| 210 | |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 211 | static inline void crt_outb(struct tdfx_par *par, u32 idx, u8 val) |
| 212 | { |
| 213 | vga_outb(par, CRT_I, idx); |
Krzysztof Helt | 254c947 | 2007-10-16 01:28:46 -0700 | [diff] [blame] | 214 | wmb(); |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 215 | vga_outb(par, CRT_D, val); |
Krzysztof Helt | 254c947 | 2007-10-16 01:28:46 -0700 | [diff] [blame] | 216 | wmb(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 217 | } |
| 218 | |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 219 | static inline u8 crt_inb(struct tdfx_par *par, u32 idx) |
| 220 | { |
| 221 | vga_outb(par, CRT_I, idx); |
Krzysztof Helt | 254c947 | 2007-10-16 01:28:46 -0700 | [diff] [blame] | 222 | mb(); |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 223 | return vga_inb(par, CRT_D); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 224 | } |
| 225 | |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 226 | static inline void att_outb(struct tdfx_par *par, u32 idx, u8 val) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 227 | { |
| 228 | unsigned char tmp; |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 229 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 230 | tmp = vga_inb(par, IS1_R); |
| 231 | vga_outb(par, ATT_IW, idx); |
| 232 | vga_outb(par, ATT_IW, val); |
| 233 | } |
| 234 | |
| 235 | static inline void vga_disable_video(struct tdfx_par *par) |
| 236 | { |
| 237 | unsigned char s; |
| 238 | |
| 239 | s = seq_inb(par, 0x01) | 0x20; |
| 240 | seq_outb(par, 0x00, 0x01); |
| 241 | seq_outb(par, 0x01, s); |
| 242 | seq_outb(par, 0x00, 0x03); |
| 243 | } |
| 244 | |
| 245 | static inline void vga_enable_video(struct tdfx_par *par) |
| 246 | { |
| 247 | unsigned char s; |
| 248 | |
| 249 | s = seq_inb(par, 0x01) & 0xdf; |
| 250 | seq_outb(par, 0x00, 0x01); |
| 251 | seq_outb(par, 0x01, s); |
| 252 | seq_outb(par, 0x00, 0x03); |
| 253 | } |
| 254 | |
| 255 | static inline void vga_enable_palette(struct tdfx_par *par) |
| 256 | { |
| 257 | vga_inb(par, IS1_R); |
Krzysztof Helt | 254c947 | 2007-10-16 01:28:46 -0700 | [diff] [blame] | 258 | mb(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 259 | vga_outb(par, ATT_IW, 0x20); |
| 260 | } |
| 261 | |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 262 | static inline u32 tdfx_inl(struct tdfx_par *par, unsigned int reg) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 263 | { |
| 264 | return readl(par->regbase_virt + reg); |
| 265 | } |
| 266 | |
| 267 | static inline void tdfx_outl(struct tdfx_par *par, unsigned int reg, u32 val) |
| 268 | { |
| 269 | writel(val, par->regbase_virt + reg); |
| 270 | } |
| 271 | |
| 272 | static inline void banshee_make_room(struct tdfx_par *par, int size) |
| 273 | { |
| 274 | /* Note: The Voodoo3's onboard FIFO has 32 slots. This loop |
| 275 | * won't quit if you ask for more. */ |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 276 | while ((tdfx_inl(par, STATUS) & 0x1f) < size - 1) ; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 277 | } |
| 278 | |
| 279 | static int banshee_wait_idle(struct fb_info *info) |
| 280 | { |
Antonino A. Daplas | a807f61 | 2006-01-09 20:53:11 -0800 | [diff] [blame] | 281 | struct tdfx_par *par = info->par; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 282 | int i = 0; |
| 283 | |
| 284 | banshee_make_room(par, 1); |
| 285 | tdfx_outl(par, COMMAND_3D, COMMAND_3D_NOP); |
| 286 | |
Krzysztof Helt | 4f05b53 | 2007-10-16 01:28:48 -0700 | [diff] [blame] | 287 | do { |
| 288 | if ((tdfx_inl(par, STATUS) & STATUS_BUSY) == 0) |
| 289 | i++; |
| 290 | } while (i < 3); |
| 291 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 292 | return 0; |
| 293 | } |
| 294 | |
| 295 | /* |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 296 | * Set the color of a palette entry in 8bpp mode |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 297 | */ |
| 298 | static inline void do_setpalentry(struct tdfx_par *par, unsigned regno, u32 c) |
| 299 | { |
| 300 | banshee_make_room(par, 2); |
| 301 | tdfx_outl(par, DACADDR, regno); |
Krzysztof Helt | 254c947 | 2007-10-16 01:28:46 -0700 | [diff] [blame] | 302 | /* read after write makes it working */ |
| 303 | tdfx_inl(par, DACADDR); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 304 | tdfx_outl(par, DACDATA, c); |
| 305 | } |
| 306 | |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 307 | static u32 do_calc_pll(int freq, int *freq_out) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 308 | { |
Richard Drummond | 0fbe9ca | 2005-05-01 08:59:24 -0700 | [diff] [blame] | 309 | int m, n, k, best_m, best_n, best_k, best_error; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 310 | int fref = 14318; |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 311 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 312 | best_error = freq; |
| 313 | best_n = best_m = best_k = 0; |
Richard Drummond | 0fbe9ca | 2005-05-01 08:59:24 -0700 | [diff] [blame] | 314 | |
| 315 | for (k = 3; k >= 0; k--) { |
| 316 | for (m = 63; m >= 0; m--) { |
| 317 | /* |
| 318 | * Estimate value of n that produces target frequency |
| 319 | * with current m and k |
| 320 | */ |
Krzysztof Helt | 4f05b53 | 2007-10-16 01:28:48 -0700 | [diff] [blame] | 321 | int n_estimated = ((freq * (m + 2) << k) / fref) - 2; |
Richard Drummond | 0fbe9ca | 2005-05-01 08:59:24 -0700 | [diff] [blame] | 322 | |
| 323 | /* Search neighborhood of estimated n */ |
Krzysztof Helt | 4f05b53 | 2007-10-16 01:28:48 -0700 | [diff] [blame] | 324 | for (n = max(0, n_estimated); |
| 325 | n <= min(255, n_estimated + 1); |
| 326 | n++) { |
Richard Drummond | 0fbe9ca | 2005-05-01 08:59:24 -0700 | [diff] [blame] | 327 | /* |
| 328 | * Calculate PLL freqency with current m, k and |
| 329 | * estimated n |
| 330 | */ |
Krzysztof Helt | 4f05b53 | 2007-10-16 01:28:48 -0700 | [diff] [blame] | 331 | int f = (fref * (n + 2) / (m + 2)) >> k; |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 332 | int error = abs(f - freq); |
Richard Drummond | 0fbe9ca | 2005-05-01 08:59:24 -0700 | [diff] [blame] | 333 | |
| 334 | /* |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 335 | * If this is the closest we've come to the |
Richard Drummond | 0fbe9ca | 2005-05-01 08:59:24 -0700 | [diff] [blame] | 336 | * target frequency then remember n, m and k |
| 337 | */ |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 338 | if (error < best_error) { |
Richard Drummond | 0fbe9ca | 2005-05-01 08:59:24 -0700 | [diff] [blame] | 339 | best_error = error; |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 340 | best_n = n; |
| 341 | best_m = m; |
| 342 | best_k = k; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 343 | } |
| 344 | } |
| 345 | } |
| 346 | } |
Richard Drummond | 0fbe9ca | 2005-05-01 08:59:24 -0700 | [diff] [blame] | 347 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 348 | n = best_n; |
| 349 | m = best_m; |
| 350 | k = best_k; |
Krzysztof Helt | 4f05b53 | 2007-10-16 01:28:48 -0700 | [diff] [blame] | 351 | *freq_out = (fref * (n + 2) / (m + 2)) >> k; |
Richard Drummond | 0fbe9ca | 2005-05-01 08:59:24 -0700 | [diff] [blame] | 352 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 353 | return (n << 8) | (m << 2) | k; |
| 354 | } |
| 355 | |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 356 | static void do_write_regs(struct fb_info *info, struct banshee_reg *reg) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 357 | { |
Antonino A. Daplas | a807f61 | 2006-01-09 20:53:11 -0800 | [diff] [blame] | 358 | struct tdfx_par *par = info->par; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 359 | int i; |
| 360 | |
| 361 | banshee_wait_idle(info); |
| 362 | |
| 363 | tdfx_outl(par, MISCINIT1, tdfx_inl(par, MISCINIT1) | 0x01); |
| 364 | |
| 365 | crt_outb(par, 0x11, crt_inb(par, 0x11) & 0x7f); /* CRT unprotect */ |
| 366 | |
| 367 | banshee_make_room(par, 3); |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 368 | tdfx_outl(par, VGAINIT1, reg->vgainit1 & 0x001FFFFF); |
| 369 | tdfx_outl(par, VIDPROCCFG, reg->vidcfg & ~0x00000001); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 370 | #if 0 |
| 371 | tdfx_outl(par, PLLCTRL1, reg->mempll); |
| 372 | tdfx_outl(par, PLLCTRL2, reg->gfxpll); |
| 373 | #endif |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 374 | tdfx_outl(par, PLLCTRL0, reg->vidpll); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 375 | |
| 376 | vga_outb(par, MISC_W, reg->misc[0x00] | 0x01); |
| 377 | |
| 378 | for (i = 0; i < 5; i++) |
| 379 | seq_outb(par, i, reg->seq[i]); |
| 380 | |
| 381 | for (i = 0; i < 25; i++) |
| 382 | crt_outb(par, i, reg->crt[i]); |
| 383 | |
| 384 | for (i = 0; i < 9; i++) |
| 385 | gra_outb(par, i, reg->gra[i]); |
| 386 | |
| 387 | for (i = 0; i < 21; i++) |
| 388 | att_outb(par, i, reg->att[i]); |
| 389 | |
| 390 | crt_outb(par, 0x1a, reg->ext[0]); |
| 391 | crt_outb(par, 0x1b, reg->ext[1]); |
| 392 | |
| 393 | vga_enable_palette(par); |
| 394 | vga_enable_video(par); |
| 395 | |
Krzysztof Helt | 4f05b53 | 2007-10-16 01:28:48 -0700 | [diff] [blame] | 396 | banshee_make_room(par, 9); |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 397 | tdfx_outl(par, VGAINIT0, reg->vgainit0); |
| 398 | tdfx_outl(par, DACMODE, reg->dacmode); |
| 399 | tdfx_outl(par, VIDDESKSTRIDE, reg->stride); |
Krzysztof Helt | 90b0f08 | 2007-10-16 01:28:48 -0700 | [diff] [blame] | 400 | tdfx_outl(par, HWCURPATADDR, reg->curspataddr); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 401 | |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 402 | tdfx_outl(par, VIDSCREENSIZE, reg->screensize); |
| 403 | tdfx_outl(par, VIDDESKSTART, reg->startaddr); |
| 404 | tdfx_outl(par, VIDPROCCFG, reg->vidcfg); |
| 405 | tdfx_outl(par, VGAINIT1, reg->vgainit1); |
| 406 | tdfx_outl(par, MISCINIT0, reg->miscinit0); |
| 407 | |
| 408 | banshee_make_room(par, 8); |
Krzysztof Helt | 4f05b53 | 2007-10-16 01:28:48 -0700 | [diff] [blame] | 409 | tdfx_outl(par, SRCBASE, reg->startaddr); |
| 410 | tdfx_outl(par, DSTBASE, reg->startaddr); |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 411 | tdfx_outl(par, COMMANDEXTRA_2D, 0); |
| 412 | tdfx_outl(par, CLIP0MIN, 0); |
| 413 | tdfx_outl(par, CLIP0MAX, 0x0fff0fff); |
| 414 | tdfx_outl(par, CLIP1MIN, 0); |
| 415 | tdfx_outl(par, CLIP1MAX, 0x0fff0fff); |
| 416 | tdfx_outl(par, SRCXY, 0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 417 | |
| 418 | banshee_wait_idle(info); |
| 419 | } |
| 420 | |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 421 | static unsigned long do_lfb_size(struct tdfx_par *par, unsigned short dev_id) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 422 | { |
Krzysztof Helt | 4f05b53 | 2007-10-16 01:28:48 -0700 | [diff] [blame] | 423 | u32 draminit0 = tdfx_inl(par, DRAMINIT0); |
| 424 | u32 draminit1 = tdfx_inl(par, DRAMINIT1); |
Richard Drummond | 333f981 | 2005-05-01 08:59:25 -0700 | [diff] [blame] | 425 | u32 miscinit1; |
Krzysztof Helt | 4f05b53 | 2007-10-16 01:28:48 -0700 | [diff] [blame] | 426 | int num_chips = (draminit0 & DRAMINIT0_SGRAM_NUM) ? 8 : 4; |
Richard Drummond | 333f981 | 2005-05-01 08:59:25 -0700 | [diff] [blame] | 427 | int chip_size; /* in MB */ |
Krzysztof Helt | 4f05b53 | 2007-10-16 01:28:48 -0700 | [diff] [blame] | 428 | int has_sgram = draminit1 & DRAMINIT1_MEM_SDRAM; |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 429 | |
Richard Drummond | 333f981 | 2005-05-01 08:59:25 -0700 | [diff] [blame] | 430 | if (dev_id < PCI_DEVICE_ID_3DFX_VOODOO5) { |
| 431 | /* Banshee/Voodoo3 */ |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 432 | chip_size = 2; |
Krzysztof Helt | 4f05b53 | 2007-10-16 01:28:48 -0700 | [diff] [blame] | 433 | if (has_sgram && (draminit0 & DRAMINIT0_SGRAM_TYPE)) |
| 434 | chip_size = 1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 435 | } else { |
| 436 | /* Voodoo4/5 */ |
Richard Drummond | 333f981 | 2005-05-01 08:59:25 -0700 | [diff] [blame] | 437 | has_sgram = 0; |
Krzysztof Helt | 4f05b53 | 2007-10-16 01:28:48 -0700 | [diff] [blame] | 438 | chip_size = draminit0 & DRAMINIT0_SGRAM_TYPE_MASK; |
| 439 | chip_size = 1 << (chip_size >> DRAMINIT0_SGRAM_TYPE_SHIFT); |
Richard Drummond | 333f981 | 2005-05-01 08:59:25 -0700 | [diff] [blame] | 440 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 441 | |
Richard Drummond | 333f981 | 2005-05-01 08:59:25 -0700 | [diff] [blame] | 442 | /* disable block writes for SDRAM */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 443 | miscinit1 = tdfx_inl(par, MISCINIT1); |
Richard Drummond | 333f981 | 2005-05-01 08:59:25 -0700 | [diff] [blame] | 444 | miscinit1 |= has_sgram ? 0 : MISCINIT1_2DBLOCK_DIS; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 445 | miscinit1 |= MISCINIT1_CLUT_INV; |
| 446 | |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 447 | banshee_make_room(par, 1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 448 | tdfx_outl(par, MISCINIT1, miscinit1); |
Krzysztof Helt | 4f05b53 | 2007-10-16 01:28:48 -0700 | [diff] [blame] | 449 | return num_chips * chip_size * 1024l * 1024; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 450 | } |
| 451 | |
| 452 | /* ------------------------------------------------------------------------- */ |
| 453 | |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 454 | static int tdfxfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 455 | { |
Antonino A. Daplas | a807f61 | 2006-01-09 20:53:11 -0800 | [diff] [blame] | 456 | struct tdfx_par *par = info->par; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 457 | u32 lpitch; |
| 458 | |
| 459 | if (var->bits_per_pixel != 8 && var->bits_per_pixel != 16 && |
| 460 | var->bits_per_pixel != 24 && var->bits_per_pixel != 32) { |
| 461 | DPRINTK("depth not supported: %u\n", var->bits_per_pixel); |
| 462 | return -EINVAL; |
| 463 | } |
| 464 | |
| 465 | if (var->xres != var->xres_virtual) |
| 466 | var->xres_virtual = var->xres; |
| 467 | |
| 468 | if (var->yres > var->yres_virtual) |
| 469 | var->yres_virtual = var->yres; |
| 470 | |
| 471 | if (var->xoffset) { |
| 472 | DPRINTK("xoffset not supported\n"); |
| 473 | return -EINVAL; |
| 474 | } |
Krzysztof Helt | 90b0f08 | 2007-10-16 01:28:48 -0700 | [diff] [blame] | 475 | var->yoffset = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 476 | |
| 477 | /* Banshee doesn't support interlace, but Voodoo4/5 and probably Voodoo3 do. */ |
| 478 | /* no direct information about device id now? use max_pixclock for this... */ |
| 479 | if (((var->vmode & FB_VMODE_MASK) == FB_VMODE_INTERLACED) && |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 480 | (par->max_pixclock < VOODOO3_MAX_PIXCLOCK)) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 481 | DPRINTK("interlace not supported\n"); |
| 482 | return -EINVAL; |
| 483 | } |
| 484 | |
| 485 | var->xres = (var->xres + 15) & ~15; /* could sometimes be 8 */ |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 486 | lpitch = var->xres * ((var->bits_per_pixel + 7) >> 3); |
| 487 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 488 | if (var->xres < 320 || var->xres > 2048) { |
| 489 | DPRINTK("width not supported: %u\n", var->xres); |
| 490 | return -EINVAL; |
| 491 | } |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 492 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 493 | if (var->yres < 200 || var->yres > 2048) { |
| 494 | DPRINTK("height not supported: %u\n", var->yres); |
| 495 | return -EINVAL; |
| 496 | } |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 497 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 498 | if (lpitch * var->yres_virtual > info->fix.smem_len) { |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 499 | var->yres_virtual = info->fix.smem_len / lpitch; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 500 | if (var->yres_virtual < var->yres) { |
| 501 | DPRINTK("no memory for screen (%ux%ux%u)\n", |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 502 | var->xres, var->yres_virtual, |
| 503 | var->bits_per_pixel); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 504 | return -EINVAL; |
| 505 | } |
| 506 | } |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 507 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 508 | if (PICOS2KHZ(var->pixclock) > par->max_pixclock) { |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 509 | DPRINTK("pixclock too high (%ldKHz)\n", |
| 510 | PICOS2KHZ(var->pixclock)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 511 | return -EINVAL; |
| 512 | } |
| 513 | |
Krzysztof Helt | 92744dd | 2007-10-16 01:28:45 -0700 | [diff] [blame] | 514 | var->transp.offset = 0; |
| 515 | var->transp.length = 0; |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 516 | switch (var->bits_per_pixel) { |
| 517 | case 8: |
| 518 | var->red.length = var->green.length = var->blue.length = 8; |
| 519 | break; |
| 520 | case 16: |
| 521 | var->red.offset = 11; |
| 522 | var->red.length = 5; |
| 523 | var->green.offset = 5; |
| 524 | var->green.length = 6; |
| 525 | var->blue.offset = 0; |
| 526 | var->blue.length = 5; |
| 527 | break; |
| 528 | case 32: |
Krzysztof Helt | 92744dd | 2007-10-16 01:28:45 -0700 | [diff] [blame] | 529 | var->transp.offset = 24; |
| 530 | var->transp.length = 8; |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 531 | case 24: |
Krzysztof Helt | 92744dd | 2007-10-16 01:28:45 -0700 | [diff] [blame] | 532 | var->red.offset = 16; |
| 533 | var->green.offset = 8; |
| 534 | var->blue.offset = 0; |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 535 | var->red.length = var->green.length = var->blue.length = 8; |
| 536 | break; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 537 | } |
| 538 | var->height = var->width = -1; |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 539 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 540 | var->accel_flags = FB_ACCELF_TEXT; |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 541 | |
| 542 | DPRINTK("Checking graphics mode at %dx%d depth %d\n", |
| 543 | var->xres, var->yres, var->bits_per_pixel); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 544 | return 0; |
| 545 | } |
| 546 | |
| 547 | static int tdfxfb_set_par(struct fb_info *info) |
| 548 | { |
Antonino A. Daplas | a807f61 | 2006-01-09 20:53:11 -0800 | [diff] [blame] | 549 | struct tdfx_par *par = info->par; |
Krzysztof Helt | 4f05b53 | 2007-10-16 01:28:48 -0700 | [diff] [blame] | 550 | u32 hdispend = info->var.xres; |
| 551 | u32 hsyncsta = hdispend + info->var.right_margin; |
| 552 | u32 hsyncend = hsyncsta + info->var.hsync_len; |
| 553 | u32 htotal = hsyncend + info->var.left_margin; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 554 | u32 hd, hs, he, ht, hbs, hbe; |
| 555 | u32 vd, vs, ve, vt, vbs, vbe; |
| 556 | struct banshee_reg reg; |
| 557 | int fout, freq; |
Krzysztof Helt | 4f05b53 | 2007-10-16 01:28:48 -0700 | [diff] [blame] | 558 | u32 wd; |
| 559 | u32 cpp = (info->var.bits_per_pixel + 7) >> 3; |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 560 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 561 | memset(®, 0, sizeof(reg)); |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 562 | |
| 563 | reg.vidcfg = VIDCFG_VIDPROC_ENABLE | VIDCFG_DESK_ENABLE | |
| 564 | VIDCFG_CURS_X11 | |
| 565 | ((cpp - 1) << VIDCFG_PIXFMT_SHIFT) | |
| 566 | (cpp != 1 ? VIDCFG_CLUT_BYPASS : 0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 567 | |
| 568 | /* PLL settings */ |
| 569 | freq = PICOS2KHZ(info->var.pixclock); |
| 570 | |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 571 | reg.vidcfg &= ~VIDCFG_2X; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 572 | |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 573 | if (freq > par->max_pixclock / 2) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 574 | freq = freq > par->max_pixclock ? par->max_pixclock : freq; |
| 575 | reg.dacmode |= DACMODE_2X; |
| 576 | reg.vidcfg |= VIDCFG_2X; |
| 577 | hdispend >>= 1; |
| 578 | hsyncsta >>= 1; |
| 579 | hsyncend >>= 1; |
| 580 | htotal >>= 1; |
| 581 | } |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 582 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 583 | hd = wd = (hdispend >> 3) - 1; |
| 584 | hs = (hsyncsta >> 3) - 1; |
| 585 | he = (hsyncend >> 3) - 1; |
| 586 | ht = (htotal >> 3) - 1; |
| 587 | hbs = hd; |
| 588 | hbe = ht; |
| 589 | |
| 590 | if ((info->var.vmode & FB_VMODE_MASK) == FB_VMODE_DOUBLE) { |
| 591 | vbs = vd = (info->var.yres << 1) - 1; |
| 592 | vs = vd + (info->var.lower_margin << 1); |
| 593 | ve = vs + (info->var.vsync_len << 1); |
| 594 | vbe = vt = ve + (info->var.upper_margin << 1) - 1; |
Krzysztof Helt | 4f05b53 | 2007-10-16 01:28:48 -0700 | [diff] [blame] | 595 | reg.screensize = info->var.xres | (info->var.yres << 13); |
| 596 | reg.vidcfg |= VIDCFG_HALF_MODE; |
| 597 | reg.crt[0x09] = 0x80; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 598 | } else { |
| 599 | vbs = vd = info->var.yres - 1; |
| 600 | vs = vd + info->var.lower_margin; |
| 601 | ve = vs + info->var.vsync_len; |
| 602 | vbe = vt = ve + info->var.upper_margin - 1; |
Krzysztof Helt | 4f05b53 | 2007-10-16 01:28:48 -0700 | [diff] [blame] | 603 | reg.screensize = info->var.xres | (info->var.yres << 12); |
| 604 | reg.vidcfg &= ~VIDCFG_HALF_MODE; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 605 | } |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 606 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 607 | /* this is all pretty standard VGA register stuffing */ |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 608 | reg.misc[0x00] = 0x0f | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 609 | (info->var.xres < 400 ? 0xa0 : |
| 610 | info->var.xres < 480 ? 0x60 : |
| 611 | info->var.xres < 768 ? 0xe0 : 0x20); |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 612 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 613 | reg.gra[0x05] = 0x40; |
| 614 | reg.gra[0x06] = 0x05; |
| 615 | reg.gra[0x07] = 0x0f; |
| 616 | reg.gra[0x08] = 0xff; |
| 617 | |
| 618 | reg.att[0x00] = 0x00; |
| 619 | reg.att[0x01] = 0x01; |
| 620 | reg.att[0x02] = 0x02; |
| 621 | reg.att[0x03] = 0x03; |
| 622 | reg.att[0x04] = 0x04; |
| 623 | reg.att[0x05] = 0x05; |
| 624 | reg.att[0x06] = 0x06; |
| 625 | reg.att[0x07] = 0x07; |
| 626 | reg.att[0x08] = 0x08; |
| 627 | reg.att[0x09] = 0x09; |
| 628 | reg.att[0x0a] = 0x0a; |
| 629 | reg.att[0x0b] = 0x0b; |
| 630 | reg.att[0x0c] = 0x0c; |
| 631 | reg.att[0x0d] = 0x0d; |
| 632 | reg.att[0x0e] = 0x0e; |
| 633 | reg.att[0x0f] = 0x0f; |
| 634 | reg.att[0x10] = 0x41; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 635 | reg.att[0x12] = 0x0f; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 636 | |
| 637 | reg.seq[0x00] = 0x03; |
| 638 | reg.seq[0x01] = 0x01; /* fixme: clkdiv2? */ |
| 639 | reg.seq[0x02] = 0x0f; |
| 640 | reg.seq[0x03] = 0x00; |
| 641 | reg.seq[0x04] = 0x0e; |
| 642 | |
| 643 | reg.crt[0x00] = ht - 4; |
| 644 | reg.crt[0x01] = hd; |
| 645 | reg.crt[0x02] = hbs; |
| 646 | reg.crt[0x03] = 0x80 | (hbe & 0x1f); |
| 647 | reg.crt[0x04] = hs; |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 648 | reg.crt[0x05] = ((hbe & 0x20) << 2) | (he & 0x1f); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 649 | reg.crt[0x06] = vt; |
| 650 | reg.crt[0x07] = ((vs & 0x200) >> 2) | |
| 651 | ((vd & 0x200) >> 3) | |
| 652 | ((vt & 0x200) >> 4) | 0x10 | |
| 653 | ((vbs & 0x100) >> 5) | |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 654 | ((vs & 0x100) >> 6) | |
| 655 | ((vd & 0x100) >> 7) | |
| 656 | ((vt & 0x100) >> 8); |
Krzysztof Helt | 4f05b53 | 2007-10-16 01:28:48 -0700 | [diff] [blame] | 657 | reg.crt[0x09] |= 0x40 | ((vbs & 0x200) >> 4); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 658 | reg.crt[0x10] = vs; |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 659 | reg.crt[0x11] = (ve & 0x0f) | 0x20; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 660 | reg.crt[0x12] = vd; |
| 661 | reg.crt[0x13] = wd; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 662 | reg.crt[0x15] = vbs; |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 663 | reg.crt[0x16] = vbe + 1; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 664 | reg.crt[0x17] = 0xc3; |
| 665 | reg.crt[0x18] = 0xff; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 666 | |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 667 | /* Banshee's nonvga stuff */ |
| 668 | reg.ext[0x00] = (((ht & 0x100) >> 8) | |
| 669 | ((hd & 0x100) >> 6) | |
| 670 | ((hbs & 0x100) >> 4) | |
| 671 | ((hbe & 0x40) >> 1) | |
| 672 | ((hs & 0x100) >> 2) | |
| 673 | ((he & 0x20) << 2)); |
| 674 | reg.ext[0x01] = (((vt & 0x400) >> 10) | |
| 675 | ((vd & 0x400) >> 8) | |
| 676 | ((vbs & 0x400) >> 6) | |
| 677 | ((vbe & 0x400) >> 4)); |
| 678 | |
| 679 | reg.vgainit0 = VGAINIT0_8BIT_DAC | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 680 | VGAINIT0_EXT_ENABLE | |
| 681 | VGAINIT0_WAKEUP_3C3 | |
| 682 | VGAINIT0_ALT_READBACK | |
| 683 | VGAINIT0_EXTSHIFTOUT; |
| 684 | reg.vgainit1 = tdfx_inl(par, VGAINIT1) & 0x1fffff; |
| 685 | |
Krzysztof Helt | 90b0f08 | 2007-10-16 01:28:48 -0700 | [diff] [blame] | 686 | if (hwcursor) |
| 687 | reg.curspataddr = info->fix.smem_len; |
| 688 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 689 | reg.cursloc = 0; |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 690 | |
| 691 | reg.cursc0 = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 692 | reg.cursc1 = 0xffffff; |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 693 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 694 | reg.stride = info->var.xres * cpp; |
Krzysztof Helt | 4f05b53 | 2007-10-16 01:28:48 -0700 | [diff] [blame] | 695 | reg.startaddr = info->var.yoffset * reg.stride |
| 696 | + info->var.xoffset * cpp; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 697 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 698 | reg.vidpll = do_calc_pll(freq, &fout); |
| 699 | #if 0 |
| 700 | reg.mempll = do_calc_pll(..., &fout); |
| 701 | reg.gfxpll = do_calc_pll(..., &fout); |
| 702 | #endif |
| 703 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 704 | if ((info->var.vmode & FB_VMODE_MASK) == FB_VMODE_INTERLACED) |
| 705 | reg.vidcfg |= VIDCFG_INTERLACE; |
| 706 | reg.miscinit0 = tdfx_inl(par, MISCINIT0); |
| 707 | |
| 708 | #if defined(__BIG_ENDIAN) |
| 709 | switch (info->var.bits_per_pixel) { |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 710 | case 8: |
| 711 | case 24: |
| 712 | reg.miscinit0 &= ~(1 << 30); |
| 713 | reg.miscinit0 &= ~(1 << 31); |
| 714 | break; |
| 715 | case 16: |
| 716 | reg.miscinit0 |= (1 << 30); |
| 717 | reg.miscinit0 |= (1 << 31); |
| 718 | break; |
| 719 | case 32: |
| 720 | reg.miscinit0 |= (1 << 30); |
| 721 | reg.miscinit0 &= ~(1 << 31); |
| 722 | break; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 723 | } |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 724 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 725 | do_write_regs(info, ®); |
| 726 | |
| 727 | /* Now change fb_fix_screeninfo according to changes in par */ |
Krzysztof Helt | 4f05b53 | 2007-10-16 01:28:48 -0700 | [diff] [blame] | 728 | info->fix.line_length = reg.stride; |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 729 | info->fix.visual = (info->var.bits_per_pixel == 8) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 730 | ? FB_VISUAL_PSEUDOCOLOR |
| 731 | : FB_VISUAL_TRUECOLOR; |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 732 | DPRINTK("Graphics mode is now set at %dx%d depth %d\n", |
| 733 | info->var.xres, info->var.yres, info->var.bits_per_pixel); |
| 734 | return 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 735 | } |
| 736 | |
| 737 | /* A handy macro shamelessly pinched from matroxfb */ |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 738 | #define CNVT_TOHW(val, width) ((((val)<<(width))+0x7FFF-(val))>>16) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 739 | |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 740 | static int tdfxfb_setcolreg(unsigned regno, unsigned red, unsigned green, |
| 741 | unsigned blue, unsigned transp, |
| 742 | struct fb_info *info) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 743 | { |
Antonino A. Daplas | a807f61 | 2006-01-09 20:53:11 -0800 | [diff] [blame] | 744 | struct tdfx_par *par = info->par; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 745 | u32 rgbcol; |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 746 | |
| 747 | if (regno >= info->cmap.len || regno > 255) |
| 748 | return 1; |
| 749 | |
Krzysztof Helt | 254c947 | 2007-10-16 01:28:46 -0700 | [diff] [blame] | 750 | /* grayscale works only partially under directcolor */ |
| 751 | if (info->var.grayscale) { |
| 752 | /* grayscale = 0.30*R + 0.59*G + 0.11*B */ |
| 753 | red = green = blue = (red * 77 + green * 151 + blue * 28) >> 8; |
| 754 | } |
| 755 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 756 | switch (info->fix.visual) { |
Antonino A. Daplas | 54243ce | 2006-03-11 03:27:26 -0800 | [diff] [blame] | 757 | case FB_VISUAL_PSEUDOCOLOR: |
| 758 | rgbcol =(((u32)red & 0xff00) << 8) | |
| 759 | (((u32)green & 0xff00) << 0) | |
| 760 | (((u32)blue & 0xff00) >> 8); |
| 761 | do_setpalentry(par, regno, rgbcol); |
| 762 | break; |
| 763 | /* Truecolor has no hardware color palettes. */ |
| 764 | case FB_VISUAL_TRUECOLOR: |
| 765 | if (regno < 16) { |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 766 | rgbcol = (CNVT_TOHW(red, info->var.red.length) << |
Antonino A. Daplas | a807f61 | 2006-01-09 20:53:11 -0800 | [diff] [blame] | 767 | info->var.red.offset) | |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 768 | (CNVT_TOHW(green, info->var.green.length) << |
Antonino A. Daplas | 54243ce | 2006-03-11 03:27:26 -0800 | [diff] [blame] | 769 | info->var.green.offset) | |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 770 | (CNVT_TOHW(blue, info->var.blue.length) << |
Antonino A. Daplas | 54243ce | 2006-03-11 03:27:26 -0800 | [diff] [blame] | 771 | info->var.blue.offset) | |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 772 | (CNVT_TOHW(transp, info->var.transp.length) << |
Antonino A. Daplas | 54243ce | 2006-03-11 03:27:26 -0800 | [diff] [blame] | 773 | info->var.transp.offset); |
| 774 | par->palette[regno] = rgbcol; |
| 775 | } |
| 776 | |
| 777 | break; |
| 778 | default: |
| 779 | DPRINTK("bad depth %u\n", info->var.bits_per_pixel); |
| 780 | break; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 781 | } |
Antonino A. Daplas | 54243ce | 2006-03-11 03:27:26 -0800 | [diff] [blame] | 782 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 783 | return 0; |
| 784 | } |
| 785 | |
| 786 | /* 0 unblank, 1 blank, 2 no vsync, 3 no hsync, 4 off */ |
| 787 | static int tdfxfb_blank(int blank, struct fb_info *info) |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 788 | { |
Antonino A. Daplas | a807f61 | 2006-01-09 20:53:11 -0800 | [diff] [blame] | 789 | struct tdfx_par *par = info->par; |
Krzysztof Helt | 4f05b53 | 2007-10-16 01:28:48 -0700 | [diff] [blame] | 790 | int vgablank = 1; |
| 791 | u32 dacmode = tdfx_inl(par, DACMODE); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 792 | |
Krzysztof Helt | 4f05b53 | 2007-10-16 01:28:48 -0700 | [diff] [blame] | 793 | dacmode &= ~(BIT(1) | BIT(3)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 794 | |
| 795 | switch (blank) { |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 796 | case FB_BLANK_UNBLANK: /* Screen: On; HSync: On, VSync: On */ |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 797 | vgablank = 0; |
| 798 | break; |
| 799 | case FB_BLANK_NORMAL: /* Screen: Off; HSync: On, VSync: On */ |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 800 | break; |
| 801 | case FB_BLANK_VSYNC_SUSPEND: /* Screen: Off; HSync: On, VSync: Off */ |
Krzysztof Helt | 4f05b53 | 2007-10-16 01:28:48 -0700 | [diff] [blame] | 802 | dacmode |= BIT(3); |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 803 | break; |
| 804 | case FB_BLANK_HSYNC_SUSPEND: /* Screen: Off; HSync: Off, VSync: On */ |
Krzysztof Helt | 4f05b53 | 2007-10-16 01:28:48 -0700 | [diff] [blame] | 805 | dacmode |= BIT(1); |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 806 | break; |
| 807 | case FB_BLANK_POWERDOWN: /* Screen: Off; HSync: Off, VSync: Off */ |
Krzysztof Helt | 4f05b53 | 2007-10-16 01:28:48 -0700 | [diff] [blame] | 808 | dacmode |= BIT(1) | BIT(3); |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 809 | break; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 810 | } |
| 811 | |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 812 | banshee_make_room(par, 1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 813 | tdfx_outl(par, DACMODE, dacmode); |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 814 | if (vgablank) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 815 | vga_disable_video(par); |
| 816 | else |
| 817 | vga_enable_video(par); |
| 818 | return 0; |
| 819 | } |
| 820 | |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 821 | /* |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 822 | * Set the starting position of the visible screen to var->yoffset |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 823 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 824 | static int tdfxfb_pan_display(struct fb_var_screeninfo *var, |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 825 | struct fb_info *info) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 826 | { |
Antonino A. Daplas | a807f61 | 2006-01-09 20:53:11 -0800 | [diff] [blame] | 827 | struct tdfx_par *par = info->par; |
Krzysztof Helt | 4f05b53 | 2007-10-16 01:28:48 -0700 | [diff] [blame] | 828 | u32 addr = var->yoffset * info->fix.line_length; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 829 | |
| 830 | if (nopan || var->xoffset || (var->yoffset > var->yres_virtual)) |
| 831 | return -EINVAL; |
| 832 | if ((var->yoffset + var->yres > var->yres_virtual && nowrap)) |
| 833 | return -EINVAL; |
| 834 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 835 | banshee_make_room(par, 1); |
| 836 | tdfx_outl(par, VIDDESKSTART, addr); |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 837 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 838 | info->var.xoffset = var->xoffset; |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 839 | info->var.yoffset = var->yoffset; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 840 | return 0; |
| 841 | } |
| 842 | |
| 843 | #ifdef CONFIG_FB_3DFX_ACCEL |
| 844 | /* |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 845 | * FillRect 2D command (solidfill or invert (via ROP_XOR)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 846 | */ |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 847 | static void tdfxfb_fillrect(struct fb_info *info, |
| 848 | const struct fb_fillrect *rect) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 849 | { |
Antonino A. Daplas | a807f61 | 2006-01-09 20:53:11 -0800 | [diff] [blame] | 850 | struct tdfx_par *par = info->par; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 851 | u32 bpp = info->var.bits_per_pixel; |
| 852 | u32 stride = info->fix.line_length; |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 853 | u32 fmt= stride | ((bpp + ((bpp == 8) ? 0 : 8)) << 13); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 854 | int tdfx_rop; |
Krzysztof Helt | 92744dd | 2007-10-16 01:28:45 -0700 | [diff] [blame] | 855 | u32 dx = rect->dx; |
| 856 | u32 dy = rect->dy; |
| 857 | u32 dstbase = 0; |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 858 | |
| 859 | if (rect->rop == ROP_COPY) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 860 | tdfx_rop = TDFX_ROP_COPY; |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 861 | else |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 862 | tdfx_rop = TDFX_ROP_XOR; |
| 863 | |
Krzysztof Helt | 92744dd | 2007-10-16 01:28:45 -0700 | [diff] [blame] | 864 | /* asume always rect->height < 4096 */ |
| 865 | if (dy + rect->height > 4095) { |
| 866 | dstbase = stride * dy; |
| 867 | dy = 0; |
| 868 | } |
| 869 | /* asume always rect->width < 4096 */ |
| 870 | if (dx + rect->width > 4095) { |
| 871 | dstbase += dx * bpp >> 3; |
| 872 | dx = 0; |
| 873 | } |
| 874 | banshee_make_room(par, 6); |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 875 | tdfx_outl(par, DSTFORMAT, fmt); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 876 | if (info->fix.visual == FB_VISUAL_PSEUDOCOLOR) { |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 877 | tdfx_outl(par, COLORFORE, rect->color); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 878 | } else { /* FB_VISUAL_TRUECOLOR */ |
Antonino A. Daplas | a807f61 | 2006-01-09 20:53:11 -0800 | [diff] [blame] | 879 | tdfx_outl(par, COLORFORE, par->palette[rect->color]); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 880 | } |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 881 | tdfx_outl(par, COMMAND_2D, COMMAND_2D_FILLRECT | (tdfx_rop << 24)); |
Krzysztof Helt | 92744dd | 2007-10-16 01:28:45 -0700 | [diff] [blame] | 882 | tdfx_outl(par, DSTBASE, dstbase); |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 883 | tdfx_outl(par, DSTSIZE, rect->width | (rect->height << 16)); |
Krzysztof Helt | 92744dd | 2007-10-16 01:28:45 -0700 | [diff] [blame] | 884 | tdfx_outl(par, LAUNCH_2D, dx | (dy << 16)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 885 | } |
| 886 | |
| 887 | /* |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 888 | * Screen-to-Screen BitBlt 2D command (for the bmove fb op.) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 889 | */ |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 890 | static void tdfxfb_copyarea(struct fb_info *info, |
| 891 | const struct fb_copyarea *area) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 892 | { |
Antonino A. Daplas | a807f61 | 2006-01-09 20:53:11 -0800 | [diff] [blame] | 893 | struct tdfx_par *par = info->par; |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 894 | u32 sx = area->sx, sy = area->sy, dx = area->dx, dy = area->dy; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 895 | u32 bpp = info->var.bits_per_pixel; |
| 896 | u32 stride = info->fix.line_length; |
| 897 | u32 blitcmd = COMMAND_2D_S2S_BITBLT | (TDFX_ROP_COPY << 24); |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 898 | u32 fmt = stride | ((bpp + ((bpp == 8) ? 0 : 8)) << 13); |
Krzysztof Helt | 92744dd | 2007-10-16 01:28:45 -0700 | [diff] [blame] | 899 | u32 dstbase = 0; |
| 900 | u32 srcbase = 0; |
| 901 | |
| 902 | /* asume always area->height < 4096 */ |
| 903 | if (sy + area->height > 4095) { |
| 904 | srcbase = stride * sy; |
| 905 | sy = 0; |
| 906 | } |
| 907 | /* asume always area->width < 4096 */ |
| 908 | if (sx + area->width > 4095) { |
| 909 | srcbase += sx * bpp >> 3; |
| 910 | sx = 0; |
| 911 | } |
| 912 | /* asume always area->height < 4096 */ |
| 913 | if (dy + area->height > 4095) { |
| 914 | dstbase = stride * dy; |
| 915 | dy = 0; |
| 916 | } |
| 917 | /* asume always area->width < 4096 */ |
| 918 | if (dx + area->width > 4095) { |
| 919 | dstbase += dx * bpp >> 3; |
| 920 | dx = 0; |
| 921 | } |
| 922 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 923 | if (area->sx <= area->dx) { |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 924 | //-X |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 925 | blitcmd |= BIT(14); |
| 926 | sx += area->width - 1; |
| 927 | dx += area->width - 1; |
| 928 | } |
| 929 | if (area->sy <= area->dy) { |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 930 | //-Y |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 931 | blitcmd |= BIT(15); |
| 932 | sy += area->height - 1; |
| 933 | dy += area->height - 1; |
| 934 | } |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 935 | |
Krzysztof Helt | 92744dd | 2007-10-16 01:28:45 -0700 | [diff] [blame] | 936 | banshee_make_room(par, 8); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 937 | |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 938 | tdfx_outl(par, SRCFORMAT, fmt); |
| 939 | tdfx_outl(par, DSTFORMAT, fmt); |
| 940 | tdfx_outl(par, COMMAND_2D, blitcmd); |
| 941 | tdfx_outl(par, DSTSIZE, area->width | (area->height << 16)); |
| 942 | tdfx_outl(par, DSTXY, dx | (dy << 16)); |
Krzysztof Helt | 92744dd | 2007-10-16 01:28:45 -0700 | [diff] [blame] | 943 | tdfx_outl(par, SRCBASE, srcbase); |
| 944 | tdfx_outl(par, DSTBASE, dstbase); |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 945 | tdfx_outl(par, LAUNCH_2D, sx | (sy << 16)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 946 | } |
| 947 | |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 948 | static void tdfxfb_imageblit(struct fb_info *info, const struct fb_image *image) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 949 | { |
Antonino A. Daplas | a807f61 | 2006-01-09 20:53:11 -0800 | [diff] [blame] | 950 | struct tdfx_par *par = info->par; |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 951 | int size = image->height * ((image->width * image->depth + 7) >> 3); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 952 | int fifo_free; |
| 953 | int i, stride = info->fix.line_length; |
| 954 | u32 bpp = info->var.bits_per_pixel; |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 955 | u32 dstfmt = stride | ((bpp + ((bpp == 8) ? 0 : 8)) << 13); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 956 | u8 *chardata = (u8 *) image->data; |
| 957 | u32 srcfmt; |
Krzysztof Helt | 92744dd | 2007-10-16 01:28:45 -0700 | [diff] [blame] | 958 | u32 dx = image->dx; |
| 959 | u32 dy = image->dy; |
| 960 | u32 dstbase = 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 961 | |
| 962 | if (image->depth != 1) { |
| 963 | //banshee_make_room(par, 6 + ((size + 3) >> 2)); |
| 964 | //srcfmt = stride | ((bpp+((bpp==8) ? 0 : 8)) << 13) | 0x400000; |
| 965 | cfb_imageblit(info, image); |
| 966 | return; |
Krzysztof Helt | 92744dd | 2007-10-16 01:28:45 -0700 | [diff] [blame] | 967 | } |
| 968 | banshee_make_room(par, 9); |
| 969 | switch (info->fix.visual) { |
| 970 | case FB_VISUAL_PSEUDOCOLOR: |
| 971 | tdfx_outl(par, COLORFORE, image->fg_color); |
| 972 | tdfx_outl(par, COLORBACK, image->bg_color); |
| 973 | break; |
| 974 | case FB_VISUAL_TRUECOLOR: |
| 975 | default: |
| 976 | tdfx_outl(par, COLORFORE, |
| 977 | par->palette[image->fg_color]); |
| 978 | tdfx_outl(par, COLORBACK, |
| 979 | par->palette[image->bg_color]); |
| 980 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 981 | #ifdef __BIG_ENDIAN |
Krzysztof Helt | 92744dd | 2007-10-16 01:28:45 -0700 | [diff] [blame] | 982 | srcfmt = 0x400000 | BIT(20); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 983 | #else |
Krzysztof Helt | 92744dd | 2007-10-16 01:28:45 -0700 | [diff] [blame] | 984 | srcfmt = 0x400000; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 985 | #endif |
Krzysztof Helt | 92744dd | 2007-10-16 01:28:45 -0700 | [diff] [blame] | 986 | /* asume always image->height < 4096 */ |
| 987 | if (dy + image->height > 4095) { |
| 988 | dstbase = stride * dy; |
| 989 | dy = 0; |
| 990 | } |
| 991 | /* asume always image->width < 4096 */ |
| 992 | if (dx + image->width > 4095) { |
| 993 | dstbase += dx * bpp >> 3; |
| 994 | dx = 0; |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 995 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 996 | |
Krzysztof Helt | 92744dd | 2007-10-16 01:28:45 -0700 | [diff] [blame] | 997 | tdfx_outl(par, DSTBASE, dstbase); |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 998 | tdfx_outl(par, SRCXY, 0); |
Krzysztof Helt | 92744dd | 2007-10-16 01:28:45 -0700 | [diff] [blame] | 999 | tdfx_outl(par, DSTXY, dx | (dy << 16)); |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 1000 | tdfx_outl(par, COMMAND_2D, COMMAND_2D_H2S_BITBLT | (TDFX_ROP_COPY << 24)); |
| 1001 | tdfx_outl(par, SRCFORMAT, srcfmt); |
| 1002 | tdfx_outl(par, DSTFORMAT, dstfmt); |
| 1003 | tdfx_outl(par, DSTSIZE, image->width | (image->height << 16)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1004 | |
| 1005 | /* A count of how many free FIFO entries we've requested. |
| 1006 | * When this goes negative, we need to request more. */ |
| 1007 | fifo_free = 0; |
| 1008 | |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 1009 | /* Send four bytes at a time of data */ |
| 1010 | for (i = (size >> 2); i > 0; i--) { |
| 1011 | if (--fifo_free < 0) { |
| 1012 | fifo_free = 31; |
| 1013 | banshee_make_room(par, fifo_free); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1014 | } |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 1015 | tdfx_outl(par, LAUNCH_2D, *(u32*)chardata); |
| 1016 | chardata += 4; |
| 1017 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1018 | |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 1019 | /* Send the leftovers now */ |
| 1020 | banshee_make_room(par, 3); |
Krzysztof Helt | 4f05b53 | 2007-10-16 01:28:48 -0700 | [diff] [blame] | 1021 | switch (size % 4) { |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 1022 | case 0: |
| 1023 | break; |
| 1024 | case 1: |
| 1025 | tdfx_outl(par, LAUNCH_2D, *chardata); |
| 1026 | break; |
| 1027 | case 2: |
| 1028 | tdfx_outl(par, LAUNCH_2D, *(u16*)chardata); |
| 1029 | break; |
| 1030 | case 3: |
| 1031 | tdfx_outl(par, LAUNCH_2D, |
| 1032 | *(u16*)chardata | ((chardata[3]) << 24)); |
| 1033 | break; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1034 | } |
| 1035 | } |
| 1036 | #endif /* CONFIG_FB_3DFX_ACCEL */ |
| 1037 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1038 | static int tdfxfb_cursor(struct fb_info *info, struct fb_cursor *cursor) |
| 1039 | { |
Antonino A. Daplas | a807f61 | 2006-01-09 20:53:11 -0800 | [diff] [blame] | 1040 | struct tdfx_par *par = info->par; |
Krzysztof Helt | 90b0f08 | 2007-10-16 01:28:48 -0700 | [diff] [blame] | 1041 | u32 vidcfg; |
| 1042 | |
| 1043 | if (!hwcursor) |
| 1044 | return -EINVAL; /* just to force soft_cursor() call */ |
| 1045 | |
| 1046 | /* Too large of a cursor or wrong bpp :-( */ |
| 1047 | if (cursor->image.width > 64 || |
| 1048 | cursor->image.height > 64 || |
| 1049 | cursor->image.depth > 1) |
| 1050 | return -EINVAL; |
| 1051 | |
| 1052 | vidcfg = tdfx_inl(par, VIDPROCCFG); |
| 1053 | if (cursor->enable) |
| 1054 | tdfx_outl(par, VIDPROCCFG, vidcfg | VIDCFG_HWCURSOR_ENABLE); |
| 1055 | else |
| 1056 | tdfx_outl(par, VIDPROCCFG, vidcfg & ~VIDCFG_HWCURSOR_ENABLE); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1057 | |
| 1058 | /* |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 1059 | * If the cursor is not be changed this means either we want the |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1060 | * current cursor state (if enable is set) or we want to query what |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 1061 | * we can do with the cursor (if enable is not set) |
| 1062 | */ |
| 1063 | if (!cursor->set) |
| 1064 | return 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1065 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1066 | /* fix cursor color - XFree86 forgets to restore it properly */ |
Krzysztof Helt | 90b0f08 | 2007-10-16 01:28:48 -0700 | [diff] [blame] | 1067 | if (cursor->set & FB_CUR_SETCMAP) { |
| 1068 | struct fb_cmap cmap = info->cmap; |
| 1069 | u32 bg_idx = cursor->image.bg_color; |
| 1070 | u32 fg_idx = cursor->image.fg_color; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1071 | unsigned long bg_color, fg_color; |
| 1072 | |
Krzysztof Helt | 90b0f08 | 2007-10-16 01:28:48 -0700 | [diff] [blame] | 1073 | fg_color = (((u32)cmap.red[fg_idx] & 0xff00) << 8) | |
| 1074 | (((u32)cmap.green[fg_idx] & 0xff00) << 0) | |
| 1075 | (((u32)cmap.blue[fg_idx] & 0xff00) >> 8); |
| 1076 | bg_color = (((u32)cmap.red[bg_idx] & 0xff00) << 8) | |
| 1077 | (((u32)cmap.green[bg_idx] & 0xff00) << 0) | |
| 1078 | (((u32)cmap.blue[bg_idx] & 0xff00) >> 8); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1079 | banshee_make_room(par, 2); |
| 1080 | tdfx_outl(par, HWCURC0, bg_color); |
| 1081 | tdfx_outl(par, HWCURC1, fg_color); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1082 | } |
| 1083 | |
Krzysztof Helt | 90b0f08 | 2007-10-16 01:28:48 -0700 | [diff] [blame] | 1084 | if (cursor->set & FB_CUR_SETPOS) { |
| 1085 | int x = cursor->image.dx; |
| 1086 | int y = cursor->image.dy - info->var.yoffset; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1087 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1088 | x += 63; |
| 1089 | y += 63; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1090 | banshee_make_room(par, 1); |
| 1091 | tdfx_outl(par, HWCURLOC, (y << 16) + x); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1092 | } |
Krzysztof Helt | 90b0f08 | 2007-10-16 01:28:48 -0700 | [diff] [blame] | 1093 | if (cursor->set & (FB_CUR_SETIMAGE | FB_CUR_SETSHAPE)) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1094 | /* |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 1095 | * Voodoo 3 and above cards use 2 monochrome cursor patterns. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1096 | * The reason is so the card can fetch 8 words at a time |
| 1097 | * and are stored on chip for use for the next 8 scanlines. |
| 1098 | * This reduces the number of times for access to draw the |
| 1099 | * cursor for each screen refresh. |
| 1100 | * Each pattern is a bitmap of 64 bit wide and 64 bit high |
Krzysztof Helt | 90b0f08 | 2007-10-16 01:28:48 -0700 | [diff] [blame] | 1101 | * (total of 8192 bits or 1024 bytes). The two patterns are |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1102 | * stored in such a way that pattern 0 always resides in the |
| 1103 | * lower half (least significant 64 bits) of a 128 bit word |
| 1104 | * and pattern 1 the upper half. If you examine the data of |
| 1105 | * the cursor image the graphics card uses then from the |
| 1106 | * begining you see line one of pattern 0, line one of |
| 1107 | * pattern 1, line two of pattern 0, line two of pattern 1, |
| 1108 | * etc etc. The linear stride for the cursor is always 16 bytes |
| 1109 | * (128 bits) which is the maximum cursor width times two for |
| 1110 | * the two monochrome patterns. |
| 1111 | */ |
Krzysztof Helt | 90b0f08 | 2007-10-16 01:28:48 -0700 | [diff] [blame] | 1112 | u8 __iomem *cursorbase = info->screen_base + info->fix.smem_len; |
| 1113 | u8 *bitmap = (u8 *)cursor->image.data; |
| 1114 | u8 *mask = (u8 *)cursor->mask; |
| 1115 | int i; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1116 | |
Krzysztof Helt | 90b0f08 | 2007-10-16 01:28:48 -0700 | [diff] [blame] | 1117 | fb_memset(cursorbase, 0, 1024); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1118 | |
Krzysztof Helt | 90b0f08 | 2007-10-16 01:28:48 -0700 | [diff] [blame] | 1119 | for (i = 0; i < cursor->image.height; i++) { |
| 1120 | int h = 0; |
| 1121 | int j = (cursor->image.width + 7) >> 3; |
| 1122 | |
| 1123 | for (; j > 0; j--) { |
| 1124 | u8 data = *mask ^ *bitmap; |
| 1125 | if (cursor->rop == ROP_COPY) |
| 1126 | data = *mask & *bitmap; |
| 1127 | /* Pattern 0. Copy the cursor mask to it */ |
| 1128 | fb_writeb(*mask, cursorbase + h); |
| 1129 | mask++; |
| 1130 | /* Pattern 1. Copy the cursor bitmap to it */ |
| 1131 | fb_writeb(data, cursorbase + h + 8); |
| 1132 | bitmap++; |
| 1133 | h++; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1134 | } |
Krzysztof Helt | 90b0f08 | 2007-10-16 01:28:48 -0700 | [diff] [blame] | 1135 | cursorbase += 16; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1136 | } |
| 1137 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1138 | return 0; |
| 1139 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1140 | |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 1141 | static struct fb_ops tdfxfb_ops = { |
| 1142 | .owner = THIS_MODULE, |
| 1143 | .fb_check_var = tdfxfb_check_var, |
| 1144 | .fb_set_par = tdfxfb_set_par, |
| 1145 | .fb_setcolreg = tdfxfb_setcolreg, |
| 1146 | .fb_blank = tdfxfb_blank, |
| 1147 | .fb_pan_display = tdfxfb_pan_display, |
| 1148 | .fb_sync = banshee_wait_idle, |
Krzysztof Helt | 90b0f08 | 2007-10-16 01:28:48 -0700 | [diff] [blame] | 1149 | .fb_cursor = tdfxfb_cursor, |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 1150 | #ifdef CONFIG_FB_3DFX_ACCEL |
| 1151 | .fb_fillrect = tdfxfb_fillrect, |
| 1152 | .fb_copyarea = tdfxfb_copyarea, |
| 1153 | .fb_imageblit = tdfxfb_imageblit, |
| 1154 | #else |
| 1155 | .fb_fillrect = cfb_fillrect, |
| 1156 | .fb_copyarea = cfb_copyarea, |
| 1157 | .fb_imageblit = cfb_imageblit, |
| 1158 | #endif |
| 1159 | }; |
| 1160 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1161 | /** |
| 1162 | * tdfxfb_probe - Device Initializiation |
| 1163 | * |
| 1164 | * @pdev: PCI Device to initialize |
| 1165 | * @id: PCI Device ID |
| 1166 | * |
| 1167 | * Initializes and allocates resources for PCI device @pdev. |
| 1168 | * |
| 1169 | */ |
| 1170 | static int __devinit tdfxfb_probe(struct pci_dev *pdev, |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 1171 | const struct pci_device_id *id) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1172 | { |
| 1173 | struct tdfx_par *default_par; |
| 1174 | struct fb_info *info; |
Antonino A. Daplas | a807f61 | 2006-01-09 20:53:11 -0800 | [diff] [blame] | 1175 | int err, lpitch; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1176 | |
| 1177 | if ((err = pci_enable_device(pdev))) { |
| 1178 | printk(KERN_WARNING "tdfxfb: Can't enable pdev: %d\n", err); |
| 1179 | return err; |
| 1180 | } |
| 1181 | |
Antonino A. Daplas | a807f61 | 2006-01-09 20:53:11 -0800 | [diff] [blame] | 1182 | info = framebuffer_alloc(sizeof(struct tdfx_par), &pdev->dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1183 | |
Antonino A. Daplas | a807f61 | 2006-01-09 20:53:11 -0800 | [diff] [blame] | 1184 | if (!info) |
| 1185 | return -ENOMEM; |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 1186 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1187 | default_par = info->par; |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 1188 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1189 | /* Configure the default fb_fix_screeninfo first */ |
| 1190 | switch (pdev->device) { |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 1191 | case PCI_DEVICE_ID_3DFX_BANSHEE: |
| 1192 | strcat(tdfx_fix.id, " Banshee"); |
| 1193 | default_par->max_pixclock = BANSHEE_MAX_PIXCLOCK; |
| 1194 | break; |
| 1195 | case PCI_DEVICE_ID_3DFX_VOODOO3: |
| 1196 | strcat(tdfx_fix.id, " Voodoo3"); |
| 1197 | default_par->max_pixclock = VOODOO3_MAX_PIXCLOCK; |
| 1198 | break; |
| 1199 | case PCI_DEVICE_ID_3DFX_VOODOO5: |
| 1200 | strcat(tdfx_fix.id, " Voodoo5"); |
| 1201 | default_par->max_pixclock = VOODOO5_MAX_PIXCLOCK; |
| 1202 | break; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1203 | } |
| 1204 | |
| 1205 | tdfx_fix.mmio_start = pci_resource_start(pdev, 0); |
| 1206 | tdfx_fix.mmio_len = pci_resource_len(pdev, 0); |
Krzysztof Helt | 92744dd | 2007-10-16 01:28:45 -0700 | [diff] [blame] | 1207 | if (!request_mem_region(tdfx_fix.mmio_start, tdfx_fix.mmio_len, |
| 1208 | "tdfx regbase")) { |
| 1209 | printk(KERN_WARNING "tdfxfb: Can't reserve regbase\n"); |
| 1210 | goto out_err; |
| 1211 | } |
| 1212 | |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 1213 | default_par->regbase_virt = |
| 1214 | ioremap_nocache(tdfx_fix.mmio_start, tdfx_fix.mmio_len); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1215 | if (!default_par->regbase_virt) { |
| 1216 | printk("fb: Can't remap %s register area.\n", tdfx_fix.id); |
Krzysztof Helt | 92744dd | 2007-10-16 01:28:45 -0700 | [diff] [blame] | 1217 | goto out_err_regbase; |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 1218 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1219 | |
| 1220 | tdfx_fix.smem_start = pci_resource_start(pdev, 1); |
| 1221 | if (!(tdfx_fix.smem_len = do_lfb_size(default_par, pdev->device))) { |
| 1222 | printk("fb: Can't count %s memory.\n", tdfx_fix.id); |
Krzysztof Helt | 92744dd | 2007-10-16 01:28:45 -0700 | [diff] [blame] | 1223 | goto out_err_regbase; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1224 | } |
| 1225 | |
Krzysztof Helt | 92744dd | 2007-10-16 01:28:45 -0700 | [diff] [blame] | 1226 | if (!request_mem_region(tdfx_fix.smem_start, |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 1227 | pci_resource_len(pdev, 1), "tdfx smem")) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1228 | printk(KERN_WARNING "tdfxfb: Can't reserve smem\n"); |
Krzysztof Helt | 92744dd | 2007-10-16 01:28:45 -0700 | [diff] [blame] | 1229 | goto out_err_regbase; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1230 | } |
| 1231 | |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 1232 | info->screen_base = ioremap_nocache(tdfx_fix.smem_start, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1233 | tdfx_fix.smem_len); |
| 1234 | if (!info->screen_base) { |
| 1235 | printk("fb: Can't remap %s framebuffer.\n", tdfx_fix.id); |
Krzysztof Helt | 92744dd | 2007-10-16 01:28:45 -0700 | [diff] [blame] | 1236 | goto out_err_screenbase; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1237 | } |
| 1238 | |
| 1239 | default_par->iobase = pci_resource_start(pdev, 2); |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 1240 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1241 | if (!request_region(pci_resource_start(pdev, 2), |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 1242 | pci_resource_len(pdev, 2), "tdfx iobase")) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1243 | printk(KERN_WARNING "tdfxfb: Can't reserve iobase\n"); |
Krzysztof Helt | 92744dd | 2007-10-16 01:28:45 -0700 | [diff] [blame] | 1244 | goto out_err_screenbase; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1245 | } |
| 1246 | |
| 1247 | printk("fb: %s memory = %dK\n", tdfx_fix.id, tdfx_fix.smem_len >> 10); |
| 1248 | |
Krzysztof Helt | 0960bd3 | 2007-10-16 01:28:49 -0700 | [diff] [blame] | 1249 | default_par->mtrr_handle = -1; |
| 1250 | if (!nomtrr) |
| 1251 | default_par->mtrr_handle = |
| 1252 | mtrr_add(tdfx_fix.smem_start, tdfx_fix.smem_len, |
| 1253 | MTRR_TYPE_WRCOMB, 1); |
| 1254 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1255 | tdfx_fix.ypanstep = nopan ? 0 : 1; |
| 1256 | tdfx_fix.ywrapstep = nowrap ? 0 : 1; |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 1257 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1258 | info->fbops = &tdfxfb_ops; |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 1259 | info->fix = tdfx_fix; |
Antonino A. Daplas | a807f61 | 2006-01-09 20:53:11 -0800 | [diff] [blame] | 1260 | info->pseudo_palette = default_par->palette; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1261 | info->flags = FBINFO_DEFAULT | FBINFO_HWACCEL_YPAN; |
| 1262 | #ifdef CONFIG_FB_3DFX_ACCEL |
| 1263 | info->flags |= FBINFO_HWACCEL_FILLRECT | |
Krzysztof Helt | 92744dd | 2007-10-16 01:28:45 -0700 | [diff] [blame] | 1264 | FBINFO_HWACCEL_COPYAREA | |
| 1265 | FBINFO_HWACCEL_IMAGEBLIT | |
| 1266 | FBINFO_READS_FAST; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1267 | #endif |
Krzysztof Helt | 90b0f08 | 2007-10-16 01:28:48 -0700 | [diff] [blame] | 1268 | /* reserve 8192 bits for cursor */ |
| 1269 | /* the 2.4 driver says PAGE_MASK boundary is not enough for Voodoo4 */ |
| 1270 | if (hwcursor) |
| 1271 | info->fix.smem_len = (info->fix.smem_len - 1024) & |
| 1272 | (PAGE_MASK << 1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1273 | |
| 1274 | if (!mode_option) |
| 1275 | mode_option = "640x480@60"; |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 1276 | |
| 1277 | err = fb_find_mode(&info->var, info, mode_option, NULL, 0, NULL, 8); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1278 | if (!err || err == 4) |
| 1279 | info->var = tdfx_var; |
| 1280 | |
| 1281 | /* maximize virtual vertical length */ |
| 1282 | lpitch = info->var.xres_virtual * ((info->var.bits_per_pixel + 7) >> 3); |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 1283 | info->var.yres_virtual = info->fix.smem_len / lpitch; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1284 | if (info->var.yres_virtual < info->var.yres) |
Krzysztof Helt | 92744dd | 2007-10-16 01:28:45 -0700 | [diff] [blame] | 1285 | goto out_err_iobase; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1286 | |
| 1287 | if (fb_alloc_cmap(&info->cmap, 256, 0) < 0) { |
| 1288 | printk(KERN_WARNING "tdfxfb: Can't allocate color map\n"); |
Krzysztof Helt | 92744dd | 2007-10-16 01:28:45 -0700 | [diff] [blame] | 1289 | goto out_err_iobase; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1290 | } |
| 1291 | |
| 1292 | if (register_framebuffer(info) < 0) { |
| 1293 | printk("tdfxfb: can't register framebuffer\n"); |
| 1294 | fb_dealloc_cmap(&info->cmap); |
Krzysztof Helt | 92744dd | 2007-10-16 01:28:45 -0700 | [diff] [blame] | 1295 | goto out_err_iobase; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1296 | } |
| 1297 | /* |
| 1298 | * Our driver data |
| 1299 | */ |
| 1300 | pci_set_drvdata(pdev, info); |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 1301 | return 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1302 | |
Krzysztof Helt | 92744dd | 2007-10-16 01:28:45 -0700 | [diff] [blame] | 1303 | out_err_iobase: |
Krzysztof Helt | 0960bd3 | 2007-10-16 01:28:49 -0700 | [diff] [blame] | 1304 | if (default_par->mtrr_handle >= 0) |
| 1305 | mtrr_del(default_par->mtrr_handle, info->fix.smem_start, |
| 1306 | info->fix.smem_len); |
Krzysztof Helt | 92744dd | 2007-10-16 01:28:45 -0700 | [diff] [blame] | 1307 | release_mem_region(pci_resource_start(pdev, 2), |
| 1308 | pci_resource_len(pdev, 2)); |
| 1309 | out_err_screenbase: |
| 1310 | if (info->screen_base) |
| 1311 | iounmap(info->screen_base); |
| 1312 | release_mem_region(tdfx_fix.smem_start, pci_resource_len(pdev, 1)); |
| 1313 | out_err_regbase: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1314 | /* |
| 1315 | * Cleanup after anything that was remapped/allocated. |
| 1316 | */ |
| 1317 | if (default_par->regbase_virt) |
| 1318 | iounmap(default_par->regbase_virt); |
Krzysztof Helt | 92744dd | 2007-10-16 01:28:45 -0700 | [diff] [blame] | 1319 | release_mem_region(tdfx_fix.mmio_start, tdfx_fix.mmio_len); |
| 1320 | out_err: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1321 | framebuffer_release(info); |
| 1322 | return -ENXIO; |
| 1323 | } |
| 1324 | |
| 1325 | #ifndef MODULE |
Adrian Bunk | a0aa7d0 | 2006-01-09 20:54:04 -0800 | [diff] [blame] | 1326 | static void tdfxfb_setup(char *options) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1327 | { |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 1328 | char *this_opt; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1329 | |
| 1330 | if (!options || !*options) |
| 1331 | return; |
| 1332 | |
| 1333 | while ((this_opt = strsep(&options, ",")) != NULL) { |
| 1334 | if (!*this_opt) |
| 1335 | continue; |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 1336 | if (!strcmp(this_opt, "nopan")) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1337 | nopan = 1; |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 1338 | } else if (!strcmp(this_opt, "nowrap")) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1339 | nowrap = 1; |
Krzysztof Helt | 0960bd3 | 2007-10-16 01:28:49 -0700 | [diff] [blame] | 1340 | } else if (!strncmp(this_opt, "hwcursor=", 9)) { |
| 1341 | hwcursor = simple_strtoul(this_opt + 9, NULL, 0); |
| 1342 | #ifdef CONFIG_MTRR |
| 1343 | } else if (!strncmp(this_opt, "nomtrr", 6)) { |
| 1344 | nomtrr = 1; |
| 1345 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1346 | } else { |
| 1347 | mode_option = this_opt; |
| 1348 | } |
| 1349 | } |
| 1350 | } |
| 1351 | #endif |
| 1352 | |
| 1353 | /** |
| 1354 | * tdfxfb_remove - Device removal |
| 1355 | * |
| 1356 | * @pdev: PCI Device to cleanup |
| 1357 | * |
| 1358 | * Releases all resources allocated during the course of the driver's |
| 1359 | * lifetime for the PCI device @pdev. |
| 1360 | * |
| 1361 | */ |
| 1362 | static void __devexit tdfxfb_remove(struct pci_dev *pdev) |
| 1363 | { |
| 1364 | struct fb_info *info = pci_get_drvdata(pdev); |
Antonino A. Daplas | a807f61 | 2006-01-09 20:53:11 -0800 | [diff] [blame] | 1365 | struct tdfx_par *par = info->par; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1366 | |
| 1367 | unregister_framebuffer(info); |
Krzysztof Helt | 0960bd3 | 2007-10-16 01:28:49 -0700 | [diff] [blame] | 1368 | if (par->mtrr_handle >= 0) |
| 1369 | mtrr_del(par->mtrr_handle, info->fix.smem_start, |
| 1370 | info->fix.smem_len); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1371 | iounmap(par->regbase_virt); |
| 1372 | iounmap(info->screen_base); |
| 1373 | |
| 1374 | /* Clean up after reserved regions */ |
| 1375 | release_region(pci_resource_start(pdev, 2), |
| 1376 | pci_resource_len(pdev, 2)); |
| 1377 | release_mem_region(pci_resource_start(pdev, 1), |
| 1378 | pci_resource_len(pdev, 1)); |
| 1379 | release_mem_region(pci_resource_start(pdev, 0), |
| 1380 | pci_resource_len(pdev, 0)); |
| 1381 | pci_set_drvdata(pdev, NULL); |
| 1382 | framebuffer_release(info); |
| 1383 | } |
| 1384 | |
| 1385 | static int __init tdfxfb_init(void) |
| 1386 | { |
| 1387 | #ifndef MODULE |
| 1388 | char *option = NULL; |
| 1389 | |
| 1390 | if (fb_get_options("tdfxfb", &option)) |
| 1391 | return -ENODEV; |
| 1392 | |
| 1393 | tdfxfb_setup(option); |
| 1394 | #endif |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 1395 | return pci_register_driver(&tdfxfb_driver); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1396 | } |
| 1397 | |
| 1398 | static void __exit tdfxfb_exit(void) |
| 1399 | { |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 1400 | pci_unregister_driver(&tdfxfb_driver); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1401 | } |
| 1402 | |
| 1403 | MODULE_AUTHOR("Hannu Mallat <hmallat@cc.hut.fi>"); |
| 1404 | MODULE_DESCRIPTION("3Dfx framebuffer device driver"); |
| 1405 | MODULE_LICENSE("GPL"); |
Krzysztof Helt | 8af1d50 | 2007-10-16 01:28:43 -0700 | [diff] [blame] | 1406 | |
Krzysztof Helt | 90b0f08 | 2007-10-16 01:28:48 -0700 | [diff] [blame] | 1407 | module_param(hwcursor, int, 0644); |
| 1408 | MODULE_PARM_DESC(hwcursor, "Enable hardware cursor " |
| 1409 | "(1=enable, 0=disable, default=1)"); |
Krzysztof Helt | 0960bd3 | 2007-10-16 01:28:49 -0700 | [diff] [blame] | 1410 | #ifdef CONFIG_MTRR |
| 1411 | module_param(nomtrr, bool, 0); |
| 1412 | MODULE_PARM_DESC(nomtrr, "Disable MTRR support (default: enabled)"); |
| 1413 | #endif |
Krzysztof Helt | 90b0f08 | 2007-10-16 01:28:48 -0700 | [diff] [blame] | 1414 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1415 | module_init(tdfxfb_init); |
| 1416 | module_exit(tdfxfb_exit); |