Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* pcnet32.c: An AMD PCnet32 ethernet driver for linux. */ |
| 2 | /* |
| 3 | * Copyright 1996-1999 Thomas Bogendoerfer |
| 4 | * |
| 5 | * Derived from the lance driver written 1993,1994,1995 by Donald Becker. |
| 6 | * |
| 7 | * Copyright 1993 United States Government as represented by the |
| 8 | * Director, National Security Agency. |
| 9 | * |
| 10 | * This software may be used and distributed according to the terms |
| 11 | * of the GNU General Public License, incorporated herein by reference. |
| 12 | * |
| 13 | * This driver is for PCnet32 and PCnetPCI based ethercards |
| 14 | */ |
| 15 | /************************************************************************** |
| 16 | * 23 Oct, 2000. |
| 17 | * Fixed a few bugs, related to running the controller in 32bit mode. |
| 18 | * |
| 19 | * Carsten Langgaard, carstenl@mips.com |
| 20 | * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved. |
| 21 | * |
| 22 | *************************************************************************/ |
| 23 | |
| 24 | #define DRV_NAME "pcnet32" |
Don Fry | 1bcd315 | 2005-04-29 14:51:17 -0700 | [diff] [blame] | 25 | #define DRV_VERSION "1.30j" |
| 26 | #define DRV_RELDATE "29.04.2005" |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 27 | #define PFX DRV_NAME ": " |
| 28 | |
| 29 | static const char *version = |
| 30 | DRV_NAME ".c:v" DRV_VERSION " " DRV_RELDATE " tsbogend@alpha.franken.de\n"; |
| 31 | |
| 32 | #include <linux/module.h> |
| 33 | #include <linux/kernel.h> |
| 34 | #include <linux/string.h> |
| 35 | #include <linux/errno.h> |
| 36 | #include <linux/ioport.h> |
| 37 | #include <linux/slab.h> |
| 38 | #include <linux/interrupt.h> |
| 39 | #include <linux/pci.h> |
| 40 | #include <linux/delay.h> |
| 41 | #include <linux/init.h> |
| 42 | #include <linux/ethtool.h> |
| 43 | #include <linux/mii.h> |
| 44 | #include <linux/crc32.h> |
| 45 | #include <linux/netdevice.h> |
| 46 | #include <linux/etherdevice.h> |
| 47 | #include <linux/skbuff.h> |
| 48 | #include <linux/spinlock.h> |
| 49 | #include <linux/moduleparam.h> |
| 50 | #include <linux/bitops.h> |
| 51 | |
| 52 | #include <asm/dma.h> |
| 53 | #include <asm/io.h> |
| 54 | #include <asm/uaccess.h> |
| 55 | #include <asm/irq.h> |
| 56 | |
| 57 | /* |
| 58 | * PCI device identifiers for "new style" Linux PCI Device Drivers |
| 59 | */ |
| 60 | static struct pci_device_id pcnet32_pci_tbl[] = { |
| 61 | { PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_LANCE_HOME, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, |
| 62 | { PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_LANCE, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, |
| 63 | /* |
| 64 | * Adapters that were sold with IBM's RS/6000 or pSeries hardware have |
| 65 | * the incorrect vendor id. |
| 66 | */ |
| 67 | { PCI_VENDOR_ID_TRIDENT, PCI_DEVICE_ID_AMD_LANCE, PCI_ANY_ID, PCI_ANY_ID, |
| 68 | PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, 0 }, |
| 69 | { 0, } |
| 70 | }; |
| 71 | |
| 72 | MODULE_DEVICE_TABLE (pci, pcnet32_pci_tbl); |
| 73 | |
| 74 | static int cards_found; |
| 75 | |
| 76 | /* |
| 77 | * VLB I/O addresses |
| 78 | */ |
| 79 | static unsigned int pcnet32_portlist[] __initdata = |
| 80 | { 0x300, 0x320, 0x340, 0x360, 0 }; |
| 81 | |
| 82 | |
| 83 | |
| 84 | static int pcnet32_debug = 0; |
| 85 | static int tx_start = 1; /* Mapping -- 0:20, 1:64, 2:128, 3:~220 (depends on chip vers) */ |
| 86 | static int pcnet32vlb; /* check for VLB cards ? */ |
| 87 | |
| 88 | static struct net_device *pcnet32_dev; |
| 89 | |
| 90 | static int max_interrupt_work = 2; |
| 91 | static int rx_copybreak = 200; |
| 92 | |
| 93 | #define PCNET32_PORT_AUI 0x00 |
| 94 | #define PCNET32_PORT_10BT 0x01 |
| 95 | #define PCNET32_PORT_GPSI 0x02 |
| 96 | #define PCNET32_PORT_MII 0x03 |
| 97 | |
| 98 | #define PCNET32_PORT_PORTSEL 0x03 |
| 99 | #define PCNET32_PORT_ASEL 0x04 |
| 100 | #define PCNET32_PORT_100 0x40 |
| 101 | #define PCNET32_PORT_FD 0x80 |
| 102 | |
| 103 | #define PCNET32_DMA_MASK 0xffffffff |
| 104 | |
| 105 | #define PCNET32_WATCHDOG_TIMEOUT (jiffies + (2 * HZ)) |
| 106 | #define PCNET32_BLINK_TIMEOUT (jiffies + (HZ/4)) |
| 107 | |
| 108 | /* |
| 109 | * table to translate option values from tulip |
| 110 | * to internal options |
| 111 | */ |
| 112 | static unsigned char options_mapping[] = { |
| 113 | PCNET32_PORT_ASEL, /* 0 Auto-select */ |
| 114 | PCNET32_PORT_AUI, /* 1 BNC/AUI */ |
| 115 | PCNET32_PORT_AUI, /* 2 AUI/BNC */ |
| 116 | PCNET32_PORT_ASEL, /* 3 not supported */ |
| 117 | PCNET32_PORT_10BT | PCNET32_PORT_FD, /* 4 10baseT-FD */ |
| 118 | PCNET32_PORT_ASEL, /* 5 not supported */ |
| 119 | PCNET32_PORT_ASEL, /* 6 not supported */ |
| 120 | PCNET32_PORT_ASEL, /* 7 not supported */ |
| 121 | PCNET32_PORT_ASEL, /* 8 not supported */ |
| 122 | PCNET32_PORT_MII, /* 9 MII 10baseT */ |
| 123 | PCNET32_PORT_MII | PCNET32_PORT_FD, /* 10 MII 10baseT-FD */ |
| 124 | PCNET32_PORT_MII, /* 11 MII (autosel) */ |
| 125 | PCNET32_PORT_10BT, /* 12 10BaseT */ |
| 126 | PCNET32_PORT_MII | PCNET32_PORT_100, /* 13 MII 100BaseTx */ |
| 127 | PCNET32_PORT_MII | PCNET32_PORT_100 | PCNET32_PORT_FD, /* 14 MII 100BaseTx-FD */ |
| 128 | PCNET32_PORT_ASEL /* 15 not supported */ |
| 129 | }; |
| 130 | |
| 131 | static const char pcnet32_gstrings_test[][ETH_GSTRING_LEN] = { |
| 132 | "Loopback test (offline)" |
| 133 | }; |
| 134 | #define PCNET32_TEST_LEN (sizeof(pcnet32_gstrings_test) / ETH_GSTRING_LEN) |
| 135 | |
| 136 | #define PCNET32_NUM_REGS 168 |
| 137 | |
| 138 | #define MAX_UNITS 8 /* More are supported, limit only on options */ |
| 139 | static int options[MAX_UNITS]; |
| 140 | static int full_duplex[MAX_UNITS]; |
| 141 | static int homepna[MAX_UNITS]; |
| 142 | |
| 143 | /* |
| 144 | * Theory of Operation |
| 145 | * |
| 146 | * This driver uses the same software structure as the normal lance |
| 147 | * driver. So look for a verbose description in lance.c. The differences |
| 148 | * to the normal lance driver is the use of the 32bit mode of PCnet32 |
| 149 | * and PCnetPCI chips. Because these chips are 32bit chips, there is no |
| 150 | * 16MB limitation and we don't need bounce buffers. |
| 151 | */ |
| 152 | |
| 153 | /* |
| 154 | * History: |
| 155 | * v0.01: Initial version |
| 156 | * only tested on Alpha Noname Board |
| 157 | * v0.02: changed IRQ handling for new interrupt scheme (dev_id) |
| 158 | * tested on a ASUS SP3G |
| 159 | * v0.10: fixed an odd problem with the 79C974 in a Compaq Deskpro XL |
| 160 | * looks like the 974 doesn't like stopping and restarting in a |
| 161 | * short period of time; now we do a reinit of the lance; the |
| 162 | * bug was triggered by doing ifconfig eth0 <ip> broadcast <addr> |
| 163 | * and hangs the machine (thanks to Klaus Liedl for debugging) |
| 164 | * v0.12: by suggestion from Donald Becker: Renamed driver to pcnet32, |
| 165 | * made it standalone (no need for lance.c) |
| 166 | * v0.13: added additional PCI detecting for special PCI devices (Compaq) |
| 167 | * v0.14: stripped down additional PCI probe (thanks to David C Niemi |
| 168 | * and sveneric@xs4all.nl for testing this on their Compaq boxes) |
| 169 | * v0.15: added 79C965 (VLB) probe |
| 170 | * added interrupt sharing for PCI chips |
| 171 | * v0.16: fixed set_multicast_list on Alpha machines |
| 172 | * v0.17: removed hack from dev.c; now pcnet32 uses ethif_probe in Space.c |
| 173 | * v0.19: changed setting of autoselect bit |
| 174 | * v0.20: removed additional Compaq PCI probe; there is now a working one |
| 175 | * in arch/i386/bios32.c |
| 176 | * v0.21: added endian conversion for ppc, from work by cort@cs.nmt.edu |
| 177 | * v0.22: added printing of status to ring dump |
| 178 | * v0.23: changed enet_statistics to net_devive_stats |
| 179 | * v0.90: added multicast filter |
| 180 | * added module support |
| 181 | * changed irq probe to new style |
| 182 | * added PCnetFast chip id |
| 183 | * added fix for receive stalls with Intel saturn chipsets |
| 184 | * added in-place rx skbs like in the tulip driver |
| 185 | * minor cleanups |
| 186 | * v0.91: added PCnetFast+ chip id |
| 187 | * back port to 2.0.x |
| 188 | * v1.00: added some stuff from Donald Becker's 2.0.34 version |
| 189 | * added support for byte counters in net_dev_stats |
| 190 | * v1.01: do ring dumps, only when debugging the driver |
| 191 | * increased the transmit timeout |
| 192 | * v1.02: fixed memory leak in pcnet32_init_ring() |
| 193 | * v1.10: workaround for stopped transmitter |
| 194 | * added port selection for modules |
| 195 | * detect special T1/E1 WAN card and setup port selection |
| 196 | * v1.11: fixed wrong checking of Tx errors |
| 197 | * v1.20: added check of return value kmalloc (cpeterso@cs.washington.edu) |
| 198 | * added save original kmalloc addr for freeing (mcr@solidum.com) |
| 199 | * added support for PCnetHome chip (joe@MIT.EDU) |
| 200 | * rewritten PCI card detection |
| 201 | * added dwio mode to get driver working on some PPC machines |
| 202 | * v1.21: added mii selection and mii ioctl |
| 203 | * v1.22: changed pci scanning code to make PPC people happy |
| 204 | * fixed switching to 32bit mode in pcnet32_open() (thanks |
| 205 | * to Michael Richard <mcr@solidum.com> for noticing this one) |
| 206 | * added sub vendor/device id matching (thanks again to |
| 207 | * Michael Richard <mcr@solidum.com>) |
| 208 | * added chip id for 79c973/975 (thanks to Zach Brown <zab@zabbo.net>) |
| 209 | * v1.23 fixed small bug, when manual selecting MII speed/duplex |
| 210 | * v1.24 Applied Thomas' patch to use TxStartPoint and thus decrease TxFIFO |
| 211 | * underflows. Added tx_start_pt module parameter. Increased |
| 212 | * TX_RING_SIZE from 16 to 32. Added #ifdef'd code to use DXSUFLO |
| 213 | * for FAST[+] chipsets. <kaf@fc.hp.com> |
| 214 | * v1.24ac Added SMP spinlocking - Alan Cox <alan@redhat.com> |
| 215 | * v1.25kf Added No Interrupt on successful Tx for some Tx's <kaf@fc.hp.com> |
| 216 | * v1.26 Converted to pci_alloc_consistent, Jamey Hicks / George France |
| 217 | * <jamey@crl.dec.com> |
| 218 | * - Fixed a few bugs, related to running the controller in 32bit mode. |
| 219 | * 23 Oct, 2000. Carsten Langgaard, carstenl@mips.com |
| 220 | * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved. |
| 221 | * v1.26p Fix oops on rmmod+insmod; plug i/o resource leak - Paul Gortmaker |
| 222 | * v1.27 improved CSR/PROM address detection, lots of cleanups, |
| 223 | * new pcnet32vlb module option, HP-PARISC support, |
| 224 | * added module parameter descriptions, |
| 225 | * initial ethtool support - Helge Deller <deller@gmx.de> |
| 226 | * v1.27a Sun Feb 10 2002 Go Taniguchi <go@turbolinux.co.jp> |
| 227 | * use alloc_etherdev and register_netdev |
| 228 | * fix pci probe not increment cards_found |
| 229 | * FD auto negotiate error workaround for xSeries250 |
| 230 | * clean up and using new mii module |
| 231 | * v1.27b Sep 30 2002 Kent Yoder <yoder1@us.ibm.com> |
| 232 | * Added timer for cable connection state changes. |
| 233 | * v1.28 20 Feb 2004 Don Fry <brazilnut@us.ibm.com> |
| 234 | * Jon Mason <jonmason@us.ibm.com>, Chinmay Albal <albal@in.ibm.com> |
| 235 | * Now uses ethtool_ops, netif_msg_* and generic_mii_ioctl. |
| 236 | * Fixes bogus 'Bus master arbitration failure', pci_[un]map_single |
| 237 | * length errors, and transmit hangs. Cleans up after errors in open. |
| 238 | * Jim Lewis <jklewis@us.ibm.com> added ethernet loopback test. |
| 239 | * Thomas Munck Steenholdt <tmus@tmus.dk> non-mii ioctl corrections. |
| 240 | * v1.29 6 Apr 2004 Jim Lewis <jklewis@us.ibm.com> added physical |
| 241 | * identification code (blink led's) and register dump. |
| 242 | * Don Fry added timer for 971/972 so skbufs don't remain on tx ring |
| 243 | * forever. |
| 244 | * v1.30 18 May 2004 Don Fry removed timer and Last Transmit Interrupt |
| 245 | * (ltint) as they added complexity and didn't give good throughput. |
| 246 | * v1.30a 22 May 2004 Don Fry limit frames received during interrupt. |
| 247 | * v1.30b 24 May 2004 Don Fry fix bogus tx carrier errors with 79c973, |
| 248 | * assisted by Bruce Penrod <bmpenrod@endruntechnologies.com>. |
| 249 | * v1.30c 25 May 2004 Don Fry added netif_wake_queue after pcnet32_restart. |
| 250 | * v1.30d 01 Jun 2004 Don Fry discard oversize rx packets. |
| 251 | * v1.30e 11 Jun 2004 Don Fry recover after fifo error and rx hang. |
| 252 | * v1.30f 16 Jun 2004 Don Fry cleanup IRQ to allow 0 and 1 for PCI, |
| 253 | * expanding on suggestions from Ralf Baechle <ralf@linux-mips.org>, |
| 254 | * and Brian Murphy <brian@murphy.dk>. |
| 255 | * v1.30g 22 Jun 2004 Patrick Simmons <psimmons@flash.net> added option |
| 256 | * homepna for selecting HomePNA mode for PCNet/Home 79C978. |
| 257 | * v1.30h 24 Jun 2004 Don Fry correctly select auto, speed, duplex in bcr32. |
| 258 | * v1.30i 28 Jun 2004 Don Fry change to use module_param. |
Don Fry | 1bcd315 | 2005-04-29 14:51:17 -0700 | [diff] [blame] | 259 | * v1.30j 29 Apr 2005 Don Fry fix skb/map leak with loopback test. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 260 | */ |
| 261 | |
| 262 | |
| 263 | /* |
| 264 | * Set the number of Tx and Rx buffers, using Log_2(# buffers). |
| 265 | * Reasonable default values are 4 Tx buffers, and 16 Rx buffers. |
| 266 | * That translates to 2 (4 == 2^^2) and 4 (16 == 2^^4). |
| 267 | */ |
| 268 | #ifndef PCNET32_LOG_TX_BUFFERS |
| 269 | #define PCNET32_LOG_TX_BUFFERS 4 |
| 270 | #define PCNET32_LOG_RX_BUFFERS 5 |
| 271 | #endif |
| 272 | |
| 273 | #define TX_RING_SIZE (1 << (PCNET32_LOG_TX_BUFFERS)) |
| 274 | #define TX_RING_MOD_MASK (TX_RING_SIZE - 1) |
| 275 | #define TX_RING_LEN_BITS ((PCNET32_LOG_TX_BUFFERS) << 12) |
| 276 | |
| 277 | #define RX_RING_SIZE (1 << (PCNET32_LOG_RX_BUFFERS)) |
| 278 | #define RX_RING_MOD_MASK (RX_RING_SIZE - 1) |
| 279 | #define RX_RING_LEN_BITS ((PCNET32_LOG_RX_BUFFERS) << 4) |
| 280 | |
| 281 | #define PKT_BUF_SZ 1544 |
| 282 | |
| 283 | /* Offsets from base I/O address. */ |
| 284 | #define PCNET32_WIO_RDP 0x10 |
| 285 | #define PCNET32_WIO_RAP 0x12 |
| 286 | #define PCNET32_WIO_RESET 0x14 |
| 287 | #define PCNET32_WIO_BDP 0x16 |
| 288 | |
| 289 | #define PCNET32_DWIO_RDP 0x10 |
| 290 | #define PCNET32_DWIO_RAP 0x14 |
| 291 | #define PCNET32_DWIO_RESET 0x18 |
| 292 | #define PCNET32_DWIO_BDP 0x1C |
| 293 | |
| 294 | #define PCNET32_TOTAL_SIZE 0x20 |
| 295 | |
| 296 | /* The PCNET32 Rx and Tx ring descriptors. */ |
| 297 | struct pcnet32_rx_head { |
| 298 | u32 base; |
| 299 | s16 buf_length; |
| 300 | s16 status; |
| 301 | u32 msg_length; |
| 302 | u32 reserved; |
| 303 | }; |
| 304 | |
| 305 | struct pcnet32_tx_head { |
| 306 | u32 base; |
| 307 | s16 length; |
| 308 | s16 status; |
| 309 | u32 misc; |
| 310 | u32 reserved; |
| 311 | }; |
| 312 | |
| 313 | /* The PCNET32 32-Bit initialization block, described in databook. */ |
| 314 | struct pcnet32_init_block { |
| 315 | u16 mode; |
| 316 | u16 tlen_rlen; |
| 317 | u8 phys_addr[6]; |
| 318 | u16 reserved; |
| 319 | u32 filter[2]; |
| 320 | /* Receive and transmit ring base, along with extra bits. */ |
| 321 | u32 rx_ring; |
| 322 | u32 tx_ring; |
| 323 | }; |
| 324 | |
| 325 | /* PCnet32 access functions */ |
| 326 | struct pcnet32_access { |
| 327 | u16 (*read_csr)(unsigned long, int); |
| 328 | void (*write_csr)(unsigned long, int, u16); |
| 329 | u16 (*read_bcr)(unsigned long, int); |
| 330 | void (*write_bcr)(unsigned long, int, u16); |
| 331 | u16 (*read_rap)(unsigned long); |
| 332 | void (*write_rap)(unsigned long, u16); |
| 333 | void (*reset)(unsigned long); |
| 334 | }; |
| 335 | |
| 336 | /* |
| 337 | * The first three fields of pcnet32_private are read by the ethernet device |
| 338 | * so we allocate the structure should be allocated by pci_alloc_consistent(). |
| 339 | */ |
| 340 | struct pcnet32_private { |
| 341 | /* The Tx and Rx ring entries must be aligned on 16-byte boundaries in 32bit mode. */ |
| 342 | struct pcnet32_rx_head rx_ring[RX_RING_SIZE]; |
| 343 | struct pcnet32_tx_head tx_ring[TX_RING_SIZE]; |
| 344 | struct pcnet32_init_block init_block; |
| 345 | dma_addr_t dma_addr; /* DMA address of beginning of this |
| 346 | object, returned by |
| 347 | pci_alloc_consistent */ |
| 348 | struct pci_dev *pci_dev; /* Pointer to the associated pci device |
| 349 | structure */ |
| 350 | const char *name; |
| 351 | /* The saved address of a sent-in-place packet/buffer, for skfree(). */ |
| 352 | struct sk_buff *tx_skbuff[TX_RING_SIZE]; |
| 353 | struct sk_buff *rx_skbuff[RX_RING_SIZE]; |
| 354 | dma_addr_t tx_dma_addr[TX_RING_SIZE]; |
| 355 | dma_addr_t rx_dma_addr[RX_RING_SIZE]; |
| 356 | struct pcnet32_access a; |
| 357 | spinlock_t lock; /* Guard lock */ |
| 358 | unsigned int cur_rx, cur_tx; /* The next free ring entry */ |
| 359 | unsigned int dirty_rx, dirty_tx; /* The ring entries to be free()ed. */ |
| 360 | struct net_device_stats stats; |
| 361 | char tx_full; |
| 362 | int options; |
| 363 | unsigned int shared_irq:1, /* shared irq possible */ |
| 364 | dxsuflo:1, /* disable transmit stop on uflo */ |
| 365 | mii:1; /* mii port available */ |
| 366 | struct net_device *next; |
| 367 | struct mii_if_info mii_if; |
| 368 | struct timer_list watchdog_timer; |
| 369 | struct timer_list blink_timer; |
| 370 | u32 msg_enable; /* debug message level */ |
| 371 | }; |
| 372 | |
| 373 | static void pcnet32_probe_vlbus(void); |
| 374 | static int pcnet32_probe_pci(struct pci_dev *, const struct pci_device_id *); |
| 375 | static int pcnet32_probe1(unsigned long, int, struct pci_dev *); |
| 376 | static int pcnet32_open(struct net_device *); |
| 377 | static int pcnet32_init_ring(struct net_device *); |
| 378 | static int pcnet32_start_xmit(struct sk_buff *, struct net_device *); |
| 379 | static int pcnet32_rx(struct net_device *); |
| 380 | static void pcnet32_tx_timeout (struct net_device *dev); |
| 381 | static irqreturn_t pcnet32_interrupt(int, void *, struct pt_regs *); |
| 382 | static int pcnet32_close(struct net_device *); |
| 383 | static struct net_device_stats *pcnet32_get_stats(struct net_device *); |
| 384 | static void pcnet32_load_multicast(struct net_device *dev); |
| 385 | static void pcnet32_set_multicast_list(struct net_device *); |
| 386 | static int pcnet32_ioctl(struct net_device *, struct ifreq *, int); |
| 387 | static void pcnet32_watchdog(struct net_device *); |
| 388 | static int mdio_read(struct net_device *dev, int phy_id, int reg_num); |
| 389 | static void mdio_write(struct net_device *dev, int phy_id, int reg_num, int val); |
| 390 | static void pcnet32_restart(struct net_device *dev, unsigned int csr0_bits); |
| 391 | static void pcnet32_ethtool_test(struct net_device *dev, |
| 392 | struct ethtool_test *eth_test, u64 *data); |
| 393 | static int pcnet32_loopback_test(struct net_device *dev, uint64_t *data1); |
| 394 | static int pcnet32_phys_id(struct net_device *dev, u32 data); |
| 395 | static void pcnet32_led_blink_callback(struct net_device *dev); |
| 396 | static int pcnet32_get_regs_len(struct net_device *dev); |
| 397 | static void pcnet32_get_regs(struct net_device *dev, struct ethtool_regs *regs, |
| 398 | void *ptr); |
Don Fry | 1bcd315 | 2005-04-29 14:51:17 -0700 | [diff] [blame] | 399 | static void pcnet32_purge_tx_ring(struct net_device *dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 400 | |
| 401 | enum pci_flags_bit { |
| 402 | PCI_USES_IO=1, PCI_USES_MEM=2, PCI_USES_MASTER=4, |
| 403 | PCI_ADDR0=0x10<<0, PCI_ADDR1=0x10<<1, PCI_ADDR2=0x10<<2, PCI_ADDR3=0x10<<3, |
| 404 | }; |
| 405 | |
| 406 | |
| 407 | static u16 pcnet32_wio_read_csr (unsigned long addr, int index) |
| 408 | { |
| 409 | outw (index, addr+PCNET32_WIO_RAP); |
| 410 | return inw (addr+PCNET32_WIO_RDP); |
| 411 | } |
| 412 | |
| 413 | static void pcnet32_wio_write_csr (unsigned long addr, int index, u16 val) |
| 414 | { |
| 415 | outw (index, addr+PCNET32_WIO_RAP); |
| 416 | outw (val, addr+PCNET32_WIO_RDP); |
| 417 | } |
| 418 | |
| 419 | static u16 pcnet32_wio_read_bcr (unsigned long addr, int index) |
| 420 | { |
| 421 | outw (index, addr+PCNET32_WIO_RAP); |
| 422 | return inw (addr+PCNET32_WIO_BDP); |
| 423 | } |
| 424 | |
| 425 | static void pcnet32_wio_write_bcr (unsigned long addr, int index, u16 val) |
| 426 | { |
| 427 | outw (index, addr+PCNET32_WIO_RAP); |
| 428 | outw (val, addr+PCNET32_WIO_BDP); |
| 429 | } |
| 430 | |
| 431 | static u16 pcnet32_wio_read_rap (unsigned long addr) |
| 432 | { |
| 433 | return inw (addr+PCNET32_WIO_RAP); |
| 434 | } |
| 435 | |
| 436 | static void pcnet32_wio_write_rap (unsigned long addr, u16 val) |
| 437 | { |
| 438 | outw (val, addr+PCNET32_WIO_RAP); |
| 439 | } |
| 440 | |
| 441 | static void pcnet32_wio_reset (unsigned long addr) |
| 442 | { |
| 443 | inw (addr+PCNET32_WIO_RESET); |
| 444 | } |
| 445 | |
| 446 | static int pcnet32_wio_check (unsigned long addr) |
| 447 | { |
| 448 | outw (88, addr+PCNET32_WIO_RAP); |
| 449 | return (inw (addr+PCNET32_WIO_RAP) == 88); |
| 450 | } |
| 451 | |
| 452 | static struct pcnet32_access pcnet32_wio = { |
| 453 | .read_csr = pcnet32_wio_read_csr, |
| 454 | .write_csr = pcnet32_wio_write_csr, |
| 455 | .read_bcr = pcnet32_wio_read_bcr, |
| 456 | .write_bcr = pcnet32_wio_write_bcr, |
| 457 | .read_rap = pcnet32_wio_read_rap, |
| 458 | .write_rap = pcnet32_wio_write_rap, |
| 459 | .reset = pcnet32_wio_reset |
| 460 | }; |
| 461 | |
| 462 | static u16 pcnet32_dwio_read_csr (unsigned long addr, int index) |
| 463 | { |
| 464 | outl (index, addr+PCNET32_DWIO_RAP); |
| 465 | return (inl (addr+PCNET32_DWIO_RDP) & 0xffff); |
| 466 | } |
| 467 | |
| 468 | static void pcnet32_dwio_write_csr (unsigned long addr, int index, u16 val) |
| 469 | { |
| 470 | outl (index, addr+PCNET32_DWIO_RAP); |
| 471 | outl (val, addr+PCNET32_DWIO_RDP); |
| 472 | } |
| 473 | |
| 474 | static u16 pcnet32_dwio_read_bcr (unsigned long addr, int index) |
| 475 | { |
| 476 | outl (index, addr+PCNET32_DWIO_RAP); |
| 477 | return (inl (addr+PCNET32_DWIO_BDP) & 0xffff); |
| 478 | } |
| 479 | |
| 480 | static void pcnet32_dwio_write_bcr (unsigned long addr, int index, u16 val) |
| 481 | { |
| 482 | outl (index, addr+PCNET32_DWIO_RAP); |
| 483 | outl (val, addr+PCNET32_DWIO_BDP); |
| 484 | } |
| 485 | |
| 486 | static u16 pcnet32_dwio_read_rap (unsigned long addr) |
| 487 | { |
| 488 | return (inl (addr+PCNET32_DWIO_RAP) & 0xffff); |
| 489 | } |
| 490 | |
| 491 | static void pcnet32_dwio_write_rap (unsigned long addr, u16 val) |
| 492 | { |
| 493 | outl (val, addr+PCNET32_DWIO_RAP); |
| 494 | } |
| 495 | |
| 496 | static void pcnet32_dwio_reset (unsigned long addr) |
| 497 | { |
| 498 | inl (addr+PCNET32_DWIO_RESET); |
| 499 | } |
| 500 | |
| 501 | static int pcnet32_dwio_check (unsigned long addr) |
| 502 | { |
| 503 | outl (88, addr+PCNET32_DWIO_RAP); |
| 504 | return ((inl (addr+PCNET32_DWIO_RAP) & 0xffff) == 88); |
| 505 | } |
| 506 | |
| 507 | static struct pcnet32_access pcnet32_dwio = { |
| 508 | .read_csr = pcnet32_dwio_read_csr, |
| 509 | .write_csr = pcnet32_dwio_write_csr, |
| 510 | .read_bcr = pcnet32_dwio_read_bcr, |
| 511 | .write_bcr = pcnet32_dwio_write_bcr, |
| 512 | .read_rap = pcnet32_dwio_read_rap, |
| 513 | .write_rap = pcnet32_dwio_write_rap, |
| 514 | .reset = pcnet32_dwio_reset |
| 515 | }; |
| 516 | |
| 517 | #ifdef CONFIG_NET_POLL_CONTROLLER |
| 518 | static void pcnet32_poll_controller(struct net_device *dev) |
| 519 | { |
| 520 | disable_irq(dev->irq); |
| 521 | pcnet32_interrupt(0, dev, NULL); |
| 522 | enable_irq(dev->irq); |
| 523 | } |
| 524 | #endif |
| 525 | |
| 526 | |
| 527 | static int pcnet32_get_settings(struct net_device *dev, struct ethtool_cmd *cmd) |
| 528 | { |
| 529 | struct pcnet32_private *lp = dev->priv; |
| 530 | unsigned long flags; |
| 531 | int r = -EOPNOTSUPP; |
| 532 | |
| 533 | if (lp->mii) { |
| 534 | spin_lock_irqsave(&lp->lock, flags); |
| 535 | mii_ethtool_gset(&lp->mii_if, cmd); |
| 536 | spin_unlock_irqrestore(&lp->lock, flags); |
| 537 | r = 0; |
| 538 | } |
| 539 | return r; |
| 540 | } |
| 541 | |
| 542 | static int pcnet32_set_settings(struct net_device *dev, struct ethtool_cmd *cmd) |
| 543 | { |
| 544 | struct pcnet32_private *lp = dev->priv; |
| 545 | unsigned long flags; |
| 546 | int r = -EOPNOTSUPP; |
| 547 | |
| 548 | if (lp->mii) { |
| 549 | spin_lock_irqsave(&lp->lock, flags); |
| 550 | r = mii_ethtool_sset(&lp->mii_if, cmd); |
| 551 | spin_unlock_irqrestore(&lp->lock, flags); |
| 552 | } |
| 553 | return r; |
| 554 | } |
| 555 | |
| 556 | static void pcnet32_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info) |
| 557 | { |
| 558 | struct pcnet32_private *lp = dev->priv; |
| 559 | |
| 560 | strcpy (info->driver, DRV_NAME); |
| 561 | strcpy (info->version, DRV_VERSION); |
| 562 | if (lp->pci_dev) |
| 563 | strcpy (info->bus_info, pci_name(lp->pci_dev)); |
| 564 | else |
| 565 | sprintf(info->bus_info, "VLB 0x%lx", dev->base_addr); |
| 566 | } |
| 567 | |
| 568 | static u32 pcnet32_get_link(struct net_device *dev) |
| 569 | { |
| 570 | struct pcnet32_private *lp = dev->priv; |
| 571 | unsigned long flags; |
| 572 | int r; |
| 573 | |
| 574 | spin_lock_irqsave(&lp->lock, flags); |
| 575 | if (lp->mii) { |
| 576 | r = mii_link_ok(&lp->mii_if); |
| 577 | } else { |
| 578 | ulong ioaddr = dev->base_addr; /* card base I/O address */ |
| 579 | r = (lp->a.read_bcr(ioaddr, 4) != 0xc0); |
| 580 | } |
| 581 | spin_unlock_irqrestore(&lp->lock, flags); |
| 582 | |
| 583 | return r; |
| 584 | } |
| 585 | |
| 586 | static u32 pcnet32_get_msglevel(struct net_device *dev) |
| 587 | { |
| 588 | struct pcnet32_private *lp = dev->priv; |
| 589 | return lp->msg_enable; |
| 590 | } |
| 591 | |
| 592 | static void pcnet32_set_msglevel(struct net_device *dev, u32 value) |
| 593 | { |
| 594 | struct pcnet32_private *lp = dev->priv; |
| 595 | lp->msg_enable = value; |
| 596 | } |
| 597 | |
| 598 | static int pcnet32_nway_reset(struct net_device *dev) |
| 599 | { |
| 600 | struct pcnet32_private *lp = dev->priv; |
| 601 | unsigned long flags; |
| 602 | int r = -EOPNOTSUPP; |
| 603 | |
| 604 | if (lp->mii) { |
| 605 | spin_lock_irqsave(&lp->lock, flags); |
| 606 | r = mii_nway_restart(&lp->mii_if); |
| 607 | spin_unlock_irqrestore(&lp->lock, flags); |
| 608 | } |
| 609 | return r; |
| 610 | } |
| 611 | |
| 612 | static void pcnet32_get_ringparam(struct net_device *dev, struct ethtool_ringparam *ering) |
| 613 | { |
| 614 | struct pcnet32_private *lp = dev->priv; |
| 615 | |
| 616 | ering->tx_max_pending = TX_RING_SIZE - 1; |
| 617 | ering->tx_pending = lp->cur_tx - lp->dirty_tx; |
| 618 | ering->rx_max_pending = RX_RING_SIZE - 1; |
| 619 | ering->rx_pending = lp->cur_rx & RX_RING_MOD_MASK; |
| 620 | } |
| 621 | |
| 622 | static void pcnet32_get_strings(struct net_device *dev, u32 stringset, u8 *data) |
| 623 | { |
| 624 | memcpy(data, pcnet32_gstrings_test, sizeof(pcnet32_gstrings_test)); |
| 625 | } |
| 626 | |
| 627 | static int pcnet32_self_test_count(struct net_device *dev) |
| 628 | { |
| 629 | return PCNET32_TEST_LEN; |
| 630 | } |
| 631 | |
| 632 | static void pcnet32_ethtool_test(struct net_device *dev, |
| 633 | struct ethtool_test *test, u64 *data) |
| 634 | { |
| 635 | struct pcnet32_private *lp = dev->priv; |
| 636 | int rc; |
| 637 | |
| 638 | if (test->flags == ETH_TEST_FL_OFFLINE) { |
| 639 | rc = pcnet32_loopback_test(dev, data); |
| 640 | if (rc) { |
| 641 | if (netif_msg_hw(lp)) |
| 642 | printk(KERN_DEBUG "%s: Loopback test failed.\n", dev->name); |
| 643 | test->flags |= ETH_TEST_FL_FAILED; |
| 644 | } else if (netif_msg_hw(lp)) |
| 645 | printk(KERN_DEBUG "%s: Loopback test passed.\n", dev->name); |
| 646 | } else if (netif_msg_hw(lp)) |
| 647 | printk(KERN_DEBUG "%s: No tests to run (specify 'Offline' on ethtool).", dev->name); |
| 648 | } /* end pcnet32_ethtool_test */ |
| 649 | |
| 650 | static int pcnet32_loopback_test(struct net_device *dev, uint64_t *data1) |
| 651 | { |
| 652 | struct pcnet32_private *lp = dev->priv; |
| 653 | struct pcnet32_access *a = &lp->a; /* access to registers */ |
| 654 | ulong ioaddr = dev->base_addr; /* card base I/O address */ |
| 655 | struct sk_buff *skb; /* sk buff */ |
| 656 | int x, i; /* counters */ |
| 657 | int numbuffs = 4; /* number of TX/RX buffers and descs */ |
| 658 | u16 status = 0x8300; /* TX ring status */ |
| 659 | u16 teststatus; /* test of ring status */ |
| 660 | int rc; /* return code */ |
| 661 | int size; /* size of packets */ |
| 662 | unsigned char *packet; /* source packet data */ |
| 663 | static int data_len = 60; /* length of source packets */ |
| 664 | unsigned long flags; |
| 665 | unsigned long ticks; |
| 666 | |
| 667 | *data1 = 1; /* status of test, default to fail */ |
| 668 | rc = 1; /* default to fail */ |
| 669 | |
| 670 | if (netif_running(dev)) |
| 671 | pcnet32_close(dev); |
| 672 | |
| 673 | spin_lock_irqsave(&lp->lock, flags); |
| 674 | |
| 675 | /* Reset the PCNET32 */ |
| 676 | lp->a.reset (ioaddr); |
| 677 | |
| 678 | /* switch pcnet32 to 32bit mode */ |
| 679 | lp->a.write_bcr (ioaddr, 20, 2); |
| 680 | |
| 681 | lp->init_block.mode = le16_to_cpu((lp->options & PCNET32_PORT_PORTSEL) << 7); |
| 682 | lp->init_block.filter[0] = 0; |
| 683 | lp->init_block.filter[1] = 0; |
| 684 | |
| 685 | /* purge & init rings but don't actually restart */ |
| 686 | pcnet32_restart(dev, 0x0000); |
| 687 | |
| 688 | lp->a.write_csr(ioaddr, 0, 0x0004); /* Set STOP bit */ |
| 689 | |
| 690 | /* Initialize Transmit buffers. */ |
| 691 | size = data_len + 15; |
| 692 | for (x=0; x<numbuffs; x++) { |
| 693 | if (!(skb = dev_alloc_skb(size))) { |
| 694 | if (netif_msg_hw(lp)) |
| 695 | printk(KERN_DEBUG "%s: Cannot allocate skb at line: %d!\n", |
| 696 | dev->name, __LINE__); |
| 697 | goto clean_up; |
| 698 | } else { |
| 699 | packet = skb->data; |
| 700 | skb_put(skb, size); /* create space for data */ |
| 701 | lp->tx_skbuff[x] = skb; |
| 702 | lp->tx_ring[x].length = le16_to_cpu(-skb->len); |
| 703 | lp->tx_ring[x].misc = 0; |
| 704 | |
| 705 | /* put DA and SA into the skb */ |
| 706 | for (i=0; i<6; i++) |
| 707 | *packet++ = dev->dev_addr[i]; |
| 708 | for (i=0; i<6; i++) |
| 709 | *packet++ = dev->dev_addr[i]; |
| 710 | /* type */ |
| 711 | *packet++ = 0x08; |
| 712 | *packet++ = 0x06; |
| 713 | /* packet number */ |
| 714 | *packet++ = x; |
| 715 | /* fill packet with data */ |
| 716 | for (i=0; i<data_len; i++) |
| 717 | *packet++ = i; |
| 718 | |
| 719 | lp->tx_dma_addr[x] = pci_map_single(lp->pci_dev, skb->data, |
| 720 | skb->len, PCI_DMA_TODEVICE); |
| 721 | lp->tx_ring[x].base = (u32)le32_to_cpu(lp->tx_dma_addr[x]); |
| 722 | wmb(); /* Make sure owner changes after all others are visible */ |
| 723 | lp->tx_ring[x].status = le16_to_cpu(status); |
| 724 | } |
| 725 | } |
| 726 | |
| 727 | x = a->read_bcr(ioaddr, 32); /* set internal loopback in BSR32 */ |
| 728 | x = x | 0x0002; |
| 729 | a->write_bcr(ioaddr, 32, x); |
| 730 | |
| 731 | lp->a.write_csr (ioaddr, 15, 0x0044); /* set int loopback in CSR15 */ |
| 732 | |
| 733 | teststatus = le16_to_cpu(0x8000); |
| 734 | lp->a.write_csr(ioaddr, 0, 0x0002); /* Set STRT bit */ |
| 735 | |
| 736 | /* Check status of descriptors */ |
| 737 | for (x=0; x<numbuffs; x++) { |
| 738 | ticks = 0; |
| 739 | rmb(); |
| 740 | while ((lp->rx_ring[x].status & teststatus) && (ticks < 200)) { |
| 741 | spin_unlock_irqrestore(&lp->lock, flags); |
| 742 | mdelay(1); |
| 743 | spin_lock_irqsave(&lp->lock, flags); |
| 744 | rmb(); |
| 745 | ticks++; |
| 746 | } |
| 747 | if (ticks == 200) { |
| 748 | if (netif_msg_hw(lp)) |
| 749 | printk("%s: Desc %d failed to reset!\n",dev->name,x); |
| 750 | break; |
| 751 | } |
| 752 | } |
| 753 | |
| 754 | lp->a.write_csr(ioaddr, 0, 0x0004); /* Set STOP bit */ |
| 755 | wmb(); |
| 756 | if (netif_msg_hw(lp) && netif_msg_pktdata(lp)) { |
| 757 | printk(KERN_DEBUG "%s: RX loopback packets:\n", dev->name); |
| 758 | |
| 759 | for (x=0; x<numbuffs; x++) { |
| 760 | printk(KERN_DEBUG "%s: Packet %d:\n", dev->name, x); |
| 761 | skb = lp->rx_skbuff[x]; |
| 762 | for (i=0; i<size; i++) { |
| 763 | printk("%02x ", *(skb->data+i)); |
| 764 | } |
| 765 | printk("\n"); |
| 766 | } |
| 767 | } |
| 768 | |
| 769 | x = 0; |
| 770 | rc = 0; |
| 771 | while (x<numbuffs && !rc) { |
| 772 | skb = lp->rx_skbuff[x]; |
| 773 | packet = lp->tx_skbuff[x]->data; |
| 774 | for (i=0; i<size; i++) { |
| 775 | if (*(skb->data+i) != packet[i]) { |
| 776 | if (netif_msg_hw(lp)) |
| 777 | printk(KERN_DEBUG "%s: Error in compare! %2x - %02x %02x\n", |
| 778 | dev->name, i, *(skb->data+i), packet[i]); |
| 779 | rc = 1; |
| 780 | break; |
| 781 | } |
| 782 | } |
| 783 | x++; |
| 784 | } |
| 785 | if (!rc) { |
| 786 | *data1 = 0; |
| 787 | } |
| 788 | |
| 789 | clean_up: |
Don Fry | 1bcd315 | 2005-04-29 14:51:17 -0700 | [diff] [blame] | 790 | pcnet32_purge_tx_ring(dev); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 791 | x = a->read_csr(ioaddr, 15) & 0xFFFF; |
| 792 | a->write_csr(ioaddr, 15, (x & ~0x0044)); /* reset bits 6 and 2 */ |
| 793 | |
| 794 | x = a->read_bcr(ioaddr, 32); /* reset internal loopback */ |
| 795 | x = x & ~0x0002; |
| 796 | a->write_bcr(ioaddr, 32, x); |
| 797 | |
| 798 | spin_unlock_irqrestore(&lp->lock, flags); |
| 799 | |
| 800 | if (netif_running(dev)) { |
| 801 | pcnet32_open(dev); |
| 802 | } else { |
| 803 | lp->a.write_bcr (ioaddr, 20, 4); /* return to 16bit mode */ |
| 804 | } |
| 805 | |
| 806 | return(rc); |
| 807 | } /* end pcnet32_loopback_test */ |
| 808 | |
| 809 | static void pcnet32_led_blink_callback(struct net_device *dev) |
| 810 | { |
| 811 | struct pcnet32_private *lp = dev->priv; |
| 812 | struct pcnet32_access *a = &lp->a; |
| 813 | ulong ioaddr = dev->base_addr; |
| 814 | unsigned long flags; |
| 815 | int i; |
| 816 | |
| 817 | spin_lock_irqsave(&lp->lock, flags); |
| 818 | for (i=4; i<8; i++) { |
| 819 | a->write_bcr(ioaddr, i, a->read_bcr(ioaddr, i) ^ 0x4000); |
| 820 | } |
| 821 | spin_unlock_irqrestore(&lp->lock, flags); |
| 822 | |
| 823 | mod_timer(&lp->blink_timer, PCNET32_BLINK_TIMEOUT); |
| 824 | } |
| 825 | |
| 826 | static int pcnet32_phys_id(struct net_device *dev, u32 data) |
| 827 | { |
| 828 | struct pcnet32_private *lp = dev->priv; |
| 829 | struct pcnet32_access *a = &lp->a; |
| 830 | ulong ioaddr = dev->base_addr; |
| 831 | unsigned long flags; |
| 832 | int i, regs[4]; |
| 833 | |
| 834 | if (!lp->blink_timer.function) { |
| 835 | init_timer(&lp->blink_timer); |
| 836 | lp->blink_timer.function = (void *) pcnet32_led_blink_callback; |
| 837 | lp->blink_timer.data = (unsigned long) dev; |
| 838 | } |
| 839 | |
| 840 | /* Save the current value of the bcrs */ |
| 841 | spin_lock_irqsave(&lp->lock, flags); |
| 842 | for (i=4; i<8; i++) { |
| 843 | regs[i-4] = a->read_bcr(ioaddr, i); |
| 844 | } |
| 845 | spin_unlock_irqrestore(&lp->lock, flags); |
| 846 | |
| 847 | mod_timer(&lp->blink_timer, jiffies); |
| 848 | set_current_state(TASK_INTERRUPTIBLE); |
| 849 | |
| 850 | if ((!data) || (data > (u32)(MAX_SCHEDULE_TIMEOUT / HZ))) |
| 851 | data = (u32)(MAX_SCHEDULE_TIMEOUT / HZ); |
| 852 | |
Nishanth Aravamudan | f17697a | 2005-06-20 23:54:12 +0200 | [diff] [blame] | 853 | msleep_interruptible(data * 1000); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 854 | del_timer_sync(&lp->blink_timer); |
| 855 | |
| 856 | /* Restore the original value of the bcrs */ |
| 857 | spin_lock_irqsave(&lp->lock, flags); |
| 858 | for (i=4; i<8; i++) { |
| 859 | a->write_bcr(ioaddr, i, regs[i-4]); |
| 860 | } |
| 861 | spin_unlock_irqrestore(&lp->lock, flags); |
| 862 | |
| 863 | return 0; |
| 864 | } |
| 865 | |
| 866 | static int pcnet32_get_regs_len(struct net_device *dev) |
| 867 | { |
| 868 | return(PCNET32_NUM_REGS * sizeof(u16)); |
| 869 | } |
| 870 | |
| 871 | static void pcnet32_get_regs(struct net_device *dev, struct ethtool_regs *regs, |
| 872 | void *ptr) |
| 873 | { |
| 874 | int i, csr0; |
| 875 | u16 *buff = ptr; |
| 876 | struct pcnet32_private *lp = dev->priv; |
| 877 | struct pcnet32_access *a = &lp->a; |
| 878 | ulong ioaddr = dev->base_addr; |
| 879 | int ticks; |
| 880 | unsigned long flags; |
| 881 | |
| 882 | spin_lock_irqsave(&lp->lock, flags); |
| 883 | |
| 884 | csr0 = a->read_csr(ioaddr, 0); |
| 885 | if (!(csr0 & 0x0004)) { /* If not stopped */ |
| 886 | /* set SUSPEND (SPND) - CSR5 bit 0 */ |
| 887 | a->write_csr(ioaddr, 5, 0x0001); |
| 888 | |
| 889 | /* poll waiting for bit to be set */ |
| 890 | ticks = 0; |
| 891 | while (!(a->read_csr(ioaddr, 5) & 0x0001)) { |
| 892 | spin_unlock_irqrestore(&lp->lock, flags); |
| 893 | mdelay(1); |
| 894 | spin_lock_irqsave(&lp->lock, flags); |
| 895 | ticks++; |
| 896 | if (ticks > 200) { |
| 897 | if (netif_msg_hw(lp)) |
| 898 | printk(KERN_DEBUG "%s: Error getting into suspend!\n", |
| 899 | dev->name); |
| 900 | break; |
| 901 | } |
| 902 | } |
| 903 | } |
| 904 | |
| 905 | /* read address PROM */ |
| 906 | for (i=0; i<16; i += 2) |
| 907 | *buff++ = inw(ioaddr + i); |
| 908 | |
| 909 | /* read control and status registers */ |
| 910 | for (i=0; i<90; i++) { |
| 911 | *buff++ = a->read_csr(ioaddr, i); |
| 912 | } |
| 913 | |
| 914 | *buff++ = a->read_csr(ioaddr, 112); |
| 915 | *buff++ = a->read_csr(ioaddr, 114); |
| 916 | |
| 917 | /* read bus configuration registers */ |
| 918 | for (i=0; i<36; i++) { |
| 919 | *buff++ = a->read_bcr(ioaddr, i); |
| 920 | } |
| 921 | |
| 922 | /* read mii phy registers */ |
| 923 | if (lp->mii) { |
| 924 | for (i=0; i<32; i++) { |
| 925 | lp->a.write_bcr(ioaddr, 33, ((lp->mii_if.phy_id) << 5) | i); |
| 926 | *buff++ = lp->a.read_bcr(ioaddr, 34); |
| 927 | } |
| 928 | } |
| 929 | |
| 930 | if (!(csr0 & 0x0004)) { /* If not stopped */ |
| 931 | /* clear SUSPEND (SPND) - CSR5 bit 0 */ |
| 932 | a->write_csr(ioaddr, 5, 0x0000); |
| 933 | } |
| 934 | |
| 935 | i = buff - (u16 *)ptr; |
| 936 | for (; i < PCNET32_NUM_REGS; i++) |
| 937 | *buff++ = 0; |
| 938 | |
| 939 | spin_unlock_irqrestore(&lp->lock, flags); |
| 940 | } |
| 941 | |
| 942 | static struct ethtool_ops pcnet32_ethtool_ops = { |
| 943 | .get_settings = pcnet32_get_settings, |
| 944 | .set_settings = pcnet32_set_settings, |
| 945 | .get_drvinfo = pcnet32_get_drvinfo, |
| 946 | .get_msglevel = pcnet32_get_msglevel, |
| 947 | .set_msglevel = pcnet32_set_msglevel, |
| 948 | .nway_reset = pcnet32_nway_reset, |
| 949 | .get_link = pcnet32_get_link, |
| 950 | .get_ringparam = pcnet32_get_ringparam, |
| 951 | .get_tx_csum = ethtool_op_get_tx_csum, |
| 952 | .get_sg = ethtool_op_get_sg, |
| 953 | .get_tso = ethtool_op_get_tso, |
| 954 | .get_strings = pcnet32_get_strings, |
| 955 | .self_test_count = pcnet32_self_test_count, |
| 956 | .self_test = pcnet32_ethtool_test, |
| 957 | .phys_id = pcnet32_phys_id, |
| 958 | .get_regs_len = pcnet32_get_regs_len, |
| 959 | .get_regs = pcnet32_get_regs, |
| 960 | }; |
| 961 | |
| 962 | /* only probes for non-PCI devices, the rest are handled by |
| 963 | * pci_register_driver via pcnet32_probe_pci */ |
| 964 | |
| 965 | static void __devinit |
| 966 | pcnet32_probe_vlbus(void) |
| 967 | { |
| 968 | unsigned int *port, ioaddr; |
| 969 | |
| 970 | /* search for PCnet32 VLB cards at known addresses */ |
| 971 | for (port = pcnet32_portlist; (ioaddr = *port); port++) { |
| 972 | if (request_region(ioaddr, PCNET32_TOTAL_SIZE, "pcnet32_probe_vlbus")) { |
| 973 | /* check if there is really a pcnet chip on that ioaddr */ |
| 974 | if ((inb(ioaddr + 14) == 0x57) && (inb(ioaddr + 15) == 0x57)) { |
| 975 | pcnet32_probe1(ioaddr, 0, NULL); |
| 976 | } else { |
| 977 | release_region(ioaddr, PCNET32_TOTAL_SIZE); |
| 978 | } |
| 979 | } |
| 980 | } |
| 981 | } |
| 982 | |
| 983 | |
| 984 | static int __devinit |
| 985 | pcnet32_probe_pci(struct pci_dev *pdev, const struct pci_device_id *ent) |
| 986 | { |
| 987 | unsigned long ioaddr; |
| 988 | int err; |
| 989 | |
| 990 | err = pci_enable_device(pdev); |
| 991 | if (err < 0) { |
| 992 | if (pcnet32_debug & NETIF_MSG_PROBE) |
| 993 | printk(KERN_ERR PFX "failed to enable device -- err=%d\n", err); |
| 994 | return err; |
| 995 | } |
| 996 | pci_set_master(pdev); |
| 997 | |
| 998 | ioaddr = pci_resource_start (pdev, 0); |
| 999 | if (!ioaddr) { |
| 1000 | if (pcnet32_debug & NETIF_MSG_PROBE) |
| 1001 | printk (KERN_ERR PFX "card has no PCI IO resources, aborting\n"); |
| 1002 | return -ENODEV; |
| 1003 | } |
| 1004 | |
| 1005 | if (!pci_dma_supported(pdev, PCNET32_DMA_MASK)) { |
| 1006 | if (pcnet32_debug & NETIF_MSG_PROBE) |
| 1007 | printk(KERN_ERR PFX "architecture does not support 32bit PCI busmaster DMA\n"); |
| 1008 | return -ENODEV; |
| 1009 | } |
| 1010 | if (request_region(ioaddr, PCNET32_TOTAL_SIZE, "pcnet32_probe_pci") == NULL) { |
| 1011 | if (pcnet32_debug & NETIF_MSG_PROBE) |
| 1012 | printk(KERN_ERR PFX "io address range already allocated\n"); |
| 1013 | return -EBUSY; |
| 1014 | } |
| 1015 | |
| 1016 | err = pcnet32_probe1(ioaddr, 1, pdev); |
| 1017 | if (err < 0) { |
| 1018 | pci_disable_device(pdev); |
| 1019 | } |
| 1020 | return err; |
| 1021 | } |
| 1022 | |
| 1023 | |
| 1024 | /* pcnet32_probe1 |
| 1025 | * Called from both pcnet32_probe_vlbus and pcnet_probe_pci. |
| 1026 | * pdev will be NULL when called from pcnet32_probe_vlbus. |
| 1027 | */ |
| 1028 | static int __devinit |
| 1029 | pcnet32_probe1(unsigned long ioaddr, int shared, struct pci_dev *pdev) |
| 1030 | { |
| 1031 | struct pcnet32_private *lp; |
| 1032 | dma_addr_t lp_dma_addr; |
| 1033 | int i, media; |
| 1034 | int fdx, mii, fset, dxsuflo; |
| 1035 | int chip_version; |
| 1036 | char *chipname; |
| 1037 | struct net_device *dev; |
| 1038 | struct pcnet32_access *a = NULL; |
| 1039 | u8 promaddr[6]; |
| 1040 | int ret = -ENODEV; |
| 1041 | |
| 1042 | /* reset the chip */ |
| 1043 | pcnet32_wio_reset(ioaddr); |
| 1044 | |
| 1045 | /* NOTE: 16-bit check is first, otherwise some older PCnet chips fail */ |
| 1046 | if (pcnet32_wio_read_csr(ioaddr, 0) == 4 && pcnet32_wio_check(ioaddr)) { |
| 1047 | a = &pcnet32_wio; |
| 1048 | } else { |
| 1049 | pcnet32_dwio_reset(ioaddr); |
| 1050 | if (pcnet32_dwio_read_csr(ioaddr, 0) == 4 && pcnet32_dwio_check(ioaddr)) { |
| 1051 | a = &pcnet32_dwio; |
| 1052 | } else |
| 1053 | goto err_release_region; |
| 1054 | } |
| 1055 | |
| 1056 | chip_version = a->read_csr(ioaddr, 88) | (a->read_csr(ioaddr,89) << 16); |
| 1057 | if ((pcnet32_debug & NETIF_MSG_PROBE) && (pcnet32_debug & NETIF_MSG_HW)) |
| 1058 | printk(KERN_INFO " PCnet chip version is %#x.\n", chip_version); |
| 1059 | if ((chip_version & 0xfff) != 0x003) { |
| 1060 | if (pcnet32_debug & NETIF_MSG_PROBE) |
| 1061 | printk(KERN_INFO PFX "Unsupported chip version.\n"); |
| 1062 | goto err_release_region; |
| 1063 | } |
| 1064 | |
| 1065 | /* initialize variables */ |
| 1066 | fdx = mii = fset = dxsuflo = 0; |
| 1067 | chip_version = (chip_version >> 12) & 0xffff; |
| 1068 | |
| 1069 | switch (chip_version) { |
| 1070 | case 0x2420: |
| 1071 | chipname = "PCnet/PCI 79C970"; /* PCI */ |
| 1072 | break; |
| 1073 | case 0x2430: |
| 1074 | if (shared) |
| 1075 | chipname = "PCnet/PCI 79C970"; /* 970 gives the wrong chip id back */ |
| 1076 | else |
| 1077 | chipname = "PCnet/32 79C965"; /* 486/VL bus */ |
| 1078 | break; |
| 1079 | case 0x2621: |
| 1080 | chipname = "PCnet/PCI II 79C970A"; /* PCI */ |
| 1081 | fdx = 1; |
| 1082 | break; |
| 1083 | case 0x2623: |
| 1084 | chipname = "PCnet/FAST 79C971"; /* PCI */ |
| 1085 | fdx = 1; mii = 1; fset = 1; |
| 1086 | break; |
| 1087 | case 0x2624: |
| 1088 | chipname = "PCnet/FAST+ 79C972"; /* PCI */ |
| 1089 | fdx = 1; mii = 1; fset = 1; |
| 1090 | break; |
| 1091 | case 0x2625: |
| 1092 | chipname = "PCnet/FAST III 79C973"; /* PCI */ |
| 1093 | fdx = 1; mii = 1; |
| 1094 | break; |
| 1095 | case 0x2626: |
| 1096 | chipname = "PCnet/Home 79C978"; /* PCI */ |
| 1097 | fdx = 1; |
| 1098 | /* |
| 1099 | * This is based on specs published at www.amd.com. This section |
| 1100 | * assumes that a card with a 79C978 wants to go into standard |
| 1101 | * ethernet mode. The 79C978 can also go into 1Mb HomePNA mode, |
| 1102 | * and the module option homepna=1 can select this instead. |
| 1103 | */ |
| 1104 | media = a->read_bcr(ioaddr, 49); |
| 1105 | media &= ~3; /* default to 10Mb ethernet */ |
| 1106 | if (cards_found < MAX_UNITS && homepna[cards_found]) |
| 1107 | media |= 1; /* switch to home wiring mode */ |
| 1108 | if (pcnet32_debug & NETIF_MSG_PROBE) |
| 1109 | printk(KERN_DEBUG PFX "media set to %sMbit mode.\n", |
| 1110 | (media & 1) ? "1" : "10"); |
| 1111 | a->write_bcr(ioaddr, 49, media); |
| 1112 | break; |
| 1113 | case 0x2627: |
| 1114 | chipname = "PCnet/FAST III 79C975"; /* PCI */ |
| 1115 | fdx = 1; mii = 1; |
| 1116 | break; |
| 1117 | case 0x2628: |
| 1118 | chipname = "PCnet/PRO 79C976"; |
| 1119 | fdx = 1; mii = 1; |
| 1120 | break; |
| 1121 | default: |
| 1122 | if (pcnet32_debug & NETIF_MSG_PROBE) |
| 1123 | printk(KERN_INFO PFX "PCnet version %#x, no PCnet32 chip.\n", |
| 1124 | chip_version); |
| 1125 | goto err_release_region; |
| 1126 | } |
| 1127 | |
| 1128 | /* |
| 1129 | * On selected chips turn on the BCR18:NOUFLO bit. This stops transmit |
| 1130 | * starting until the packet is loaded. Strike one for reliability, lose |
| 1131 | * one for latency - although on PCI this isnt a big loss. Older chips |
| 1132 | * have FIFO's smaller than a packet, so you can't do this. |
| 1133 | * Turn on BCR18:BurstRdEn and BCR18:BurstWrEn. |
| 1134 | */ |
| 1135 | |
| 1136 | if (fset) { |
| 1137 | a->write_bcr(ioaddr, 18, (a->read_bcr(ioaddr, 18) | 0x0860)); |
| 1138 | a->write_csr(ioaddr, 80, (a->read_csr(ioaddr, 80) & 0x0C00) | 0x0c00); |
| 1139 | dxsuflo = 1; |
| 1140 | } |
| 1141 | |
| 1142 | dev = alloc_etherdev(0); |
| 1143 | if (!dev) { |
| 1144 | if (pcnet32_debug & NETIF_MSG_PROBE) |
| 1145 | printk(KERN_ERR PFX "Memory allocation failed.\n"); |
| 1146 | ret = -ENOMEM; |
| 1147 | goto err_release_region; |
| 1148 | } |
| 1149 | SET_NETDEV_DEV(dev, &pdev->dev); |
| 1150 | |
| 1151 | if (pcnet32_debug & NETIF_MSG_PROBE) |
| 1152 | printk(KERN_INFO PFX "%s at %#3lx,", chipname, ioaddr); |
| 1153 | |
| 1154 | /* In most chips, after a chip reset, the ethernet address is read from the |
| 1155 | * station address PROM at the base address and programmed into the |
| 1156 | * "Physical Address Registers" CSR12-14. |
| 1157 | * As a precautionary measure, we read the PROM values and complain if |
| 1158 | * they disagree with the CSRs. Either way, we use the CSR values, and |
| 1159 | * double check that they are valid. |
| 1160 | */ |
| 1161 | for (i = 0; i < 3; i++) { |
| 1162 | unsigned int val; |
| 1163 | val = a->read_csr(ioaddr, i+12) & 0x0ffff; |
| 1164 | /* There may be endianness issues here. */ |
| 1165 | dev->dev_addr[2*i] = val & 0x0ff; |
| 1166 | dev->dev_addr[2*i+1] = (val >> 8) & 0x0ff; |
| 1167 | } |
| 1168 | |
| 1169 | /* read PROM address and compare with CSR address */ |
| 1170 | for (i = 0; i < 6; i++) |
| 1171 | promaddr[i] = inb(ioaddr + i); |
| 1172 | |
| 1173 | if (memcmp(promaddr, dev->dev_addr, 6) |
| 1174 | || !is_valid_ether_addr(dev->dev_addr)) { |
| 1175 | #ifndef __powerpc__ |
| 1176 | if (is_valid_ether_addr(promaddr)) { |
| 1177 | #else |
| 1178 | if (!is_valid_ether_addr(dev->dev_addr) |
| 1179 | && is_valid_ether_addr(promaddr)) { |
| 1180 | #endif |
| 1181 | if (pcnet32_debug & NETIF_MSG_PROBE) { |
| 1182 | printk(" warning: CSR address invalid,\n"); |
| 1183 | printk(KERN_INFO " using instead PROM address of"); |
| 1184 | } |
| 1185 | memcpy(dev->dev_addr, promaddr, 6); |
| 1186 | } |
| 1187 | } |
| 1188 | |
| 1189 | /* if the ethernet address is not valid, force to 00:00:00:00:00:00 */ |
| 1190 | if (!is_valid_ether_addr(dev->dev_addr)) |
| 1191 | memset(dev->dev_addr, 0, sizeof(dev->dev_addr)); |
| 1192 | |
| 1193 | if (pcnet32_debug & NETIF_MSG_PROBE) { |
| 1194 | for (i = 0; i < 6; i++) |
| 1195 | printk(" %2.2x", dev->dev_addr[i]); |
| 1196 | |
| 1197 | /* Version 0x2623 and 0x2624 */ |
| 1198 | if (((chip_version + 1) & 0xfffe) == 0x2624) { |
| 1199 | i = a->read_csr(ioaddr, 80) & 0x0C00; /* Check tx_start_pt */ |
| 1200 | printk("\n" KERN_INFO " tx_start_pt(0x%04x):",i); |
| 1201 | switch(i>>10) { |
| 1202 | case 0: printk(" 20 bytes,"); break; |
| 1203 | case 1: printk(" 64 bytes,"); break; |
| 1204 | case 2: printk(" 128 bytes,"); break; |
| 1205 | case 3: printk("~220 bytes,"); break; |
| 1206 | } |
| 1207 | i = a->read_bcr(ioaddr, 18); /* Check Burst/Bus control */ |
| 1208 | printk(" BCR18(%x):",i&0xffff); |
| 1209 | if (i & (1<<5)) printk("BurstWrEn "); |
| 1210 | if (i & (1<<6)) printk("BurstRdEn "); |
| 1211 | if (i & (1<<7)) printk("DWordIO "); |
| 1212 | if (i & (1<<11)) printk("NoUFlow "); |
| 1213 | i = a->read_bcr(ioaddr, 25); |
| 1214 | printk("\n" KERN_INFO " SRAMSIZE=0x%04x,",i<<8); |
| 1215 | i = a->read_bcr(ioaddr, 26); |
| 1216 | printk(" SRAM_BND=0x%04x,",i<<8); |
| 1217 | i = a->read_bcr(ioaddr, 27); |
| 1218 | if (i & (1<<14)) printk("LowLatRx"); |
| 1219 | } |
| 1220 | } |
| 1221 | |
| 1222 | dev->base_addr = ioaddr; |
| 1223 | /* pci_alloc_consistent returns page-aligned memory, so we do not have to check the alignment */ |
| 1224 | if ((lp = pci_alloc_consistent(pdev, sizeof(*lp), &lp_dma_addr)) == NULL) { |
| 1225 | if (pcnet32_debug & NETIF_MSG_PROBE) |
| 1226 | printk(KERN_ERR PFX "Consistent memory allocation failed.\n"); |
| 1227 | ret = -ENOMEM; |
| 1228 | goto err_free_netdev; |
| 1229 | } |
| 1230 | |
| 1231 | memset(lp, 0, sizeof(*lp)); |
| 1232 | lp->dma_addr = lp_dma_addr; |
| 1233 | lp->pci_dev = pdev; |
| 1234 | |
| 1235 | spin_lock_init(&lp->lock); |
| 1236 | |
| 1237 | SET_MODULE_OWNER(dev); |
| 1238 | SET_NETDEV_DEV(dev, &pdev->dev); |
| 1239 | dev->priv = lp; |
| 1240 | lp->name = chipname; |
| 1241 | lp->shared_irq = shared; |
| 1242 | lp->mii_if.full_duplex = fdx; |
| 1243 | lp->mii_if.phy_id_mask = 0x1f; |
| 1244 | lp->mii_if.reg_num_mask = 0x1f; |
| 1245 | lp->dxsuflo = dxsuflo; |
| 1246 | lp->mii = mii; |
| 1247 | lp->msg_enable = pcnet32_debug; |
| 1248 | if ((cards_found >= MAX_UNITS) || (options[cards_found] > sizeof(options_mapping))) |
| 1249 | lp->options = PCNET32_PORT_ASEL; |
| 1250 | else |
| 1251 | lp->options = options_mapping[options[cards_found]]; |
| 1252 | lp->mii_if.dev = dev; |
| 1253 | lp->mii_if.mdio_read = mdio_read; |
| 1254 | lp->mii_if.mdio_write = mdio_write; |
| 1255 | |
| 1256 | if (fdx && !(lp->options & PCNET32_PORT_ASEL) && |
| 1257 | ((cards_found>=MAX_UNITS) || full_duplex[cards_found])) |
| 1258 | lp->options |= PCNET32_PORT_FD; |
| 1259 | |
| 1260 | if (!a) { |
| 1261 | if (pcnet32_debug & NETIF_MSG_PROBE) |
| 1262 | printk(KERN_ERR PFX "No access methods\n"); |
| 1263 | ret = -ENODEV; |
| 1264 | goto err_free_consistent; |
| 1265 | } |
| 1266 | lp->a = *a; |
| 1267 | |
| 1268 | /* detect special T1/E1 WAN card by checking for MAC address */ |
| 1269 | if (dev->dev_addr[0] == 0x00 && dev->dev_addr[1] == 0xe0 |
| 1270 | && dev->dev_addr[2] == 0x75) |
| 1271 | lp->options = PCNET32_PORT_FD | PCNET32_PORT_GPSI; |
| 1272 | |
| 1273 | lp->init_block.mode = le16_to_cpu(0x0003); /* Disable Rx and Tx. */ |
| 1274 | lp->init_block.tlen_rlen = le16_to_cpu(TX_RING_LEN_BITS | RX_RING_LEN_BITS); |
| 1275 | for (i = 0; i < 6; i++) |
| 1276 | lp->init_block.phys_addr[i] = dev->dev_addr[i]; |
| 1277 | lp->init_block.filter[0] = 0x00000000; |
| 1278 | lp->init_block.filter[1] = 0x00000000; |
| 1279 | lp->init_block.rx_ring = (u32)le32_to_cpu(lp->dma_addr + |
| 1280 | offsetof(struct pcnet32_private, rx_ring)); |
| 1281 | lp->init_block.tx_ring = (u32)le32_to_cpu(lp->dma_addr + |
| 1282 | offsetof(struct pcnet32_private, tx_ring)); |
| 1283 | |
| 1284 | /* switch pcnet32 to 32bit mode */ |
| 1285 | a->write_bcr(ioaddr, 20, 2); |
| 1286 | |
| 1287 | a->write_csr(ioaddr, 1, (lp->dma_addr + offsetof(struct pcnet32_private, |
| 1288 | init_block)) & 0xffff); |
| 1289 | a->write_csr(ioaddr, 2, (lp->dma_addr + offsetof(struct pcnet32_private, |
| 1290 | init_block)) >> 16); |
| 1291 | |
| 1292 | if (pdev) { /* use the IRQ provided by PCI */ |
| 1293 | dev->irq = pdev->irq; |
| 1294 | if (pcnet32_debug & NETIF_MSG_PROBE) |
| 1295 | printk(" assigned IRQ %d.\n", dev->irq); |
| 1296 | } else { |
| 1297 | unsigned long irq_mask = probe_irq_on(); |
| 1298 | |
| 1299 | /* |
| 1300 | * To auto-IRQ we enable the initialization-done and DMA error |
| 1301 | * interrupts. For ISA boards we get a DMA error, but VLB and PCI |
| 1302 | * boards will work. |
| 1303 | */ |
| 1304 | /* Trigger an initialization just for the interrupt. */ |
| 1305 | a->write_csr (ioaddr, 0, 0x41); |
| 1306 | mdelay (1); |
| 1307 | |
| 1308 | dev->irq = probe_irq_off (irq_mask); |
| 1309 | if (!dev->irq) { |
| 1310 | if (pcnet32_debug & NETIF_MSG_PROBE) |
| 1311 | printk(", failed to detect IRQ line.\n"); |
| 1312 | ret = -ENODEV; |
| 1313 | goto err_free_consistent; |
| 1314 | } |
| 1315 | if (pcnet32_debug & NETIF_MSG_PROBE) |
| 1316 | printk(", probed IRQ %d.\n", dev->irq); |
| 1317 | } |
| 1318 | |
| 1319 | /* Set the mii phy_id so that we can query the link state */ |
| 1320 | if (lp->mii) |
| 1321 | lp->mii_if.phy_id = ((lp->a.read_bcr (ioaddr, 33)) >> 5) & 0x1f; |
| 1322 | |
| 1323 | init_timer (&lp->watchdog_timer); |
| 1324 | lp->watchdog_timer.data = (unsigned long) dev; |
| 1325 | lp->watchdog_timer.function = (void *) &pcnet32_watchdog; |
| 1326 | |
| 1327 | /* The PCNET32-specific entries in the device structure. */ |
| 1328 | dev->open = &pcnet32_open; |
| 1329 | dev->hard_start_xmit = &pcnet32_start_xmit; |
| 1330 | dev->stop = &pcnet32_close; |
| 1331 | dev->get_stats = &pcnet32_get_stats; |
| 1332 | dev->set_multicast_list = &pcnet32_set_multicast_list; |
| 1333 | dev->do_ioctl = &pcnet32_ioctl; |
| 1334 | dev->ethtool_ops = &pcnet32_ethtool_ops; |
| 1335 | dev->tx_timeout = pcnet32_tx_timeout; |
| 1336 | dev->watchdog_timeo = (5*HZ); |
| 1337 | |
| 1338 | #ifdef CONFIG_NET_POLL_CONTROLLER |
| 1339 | dev->poll_controller = pcnet32_poll_controller; |
| 1340 | #endif |
| 1341 | |
| 1342 | /* Fill in the generic fields of the device structure. */ |
| 1343 | if (register_netdev(dev)) |
| 1344 | goto err_free_consistent; |
| 1345 | |
| 1346 | if (pdev) { |
| 1347 | pci_set_drvdata(pdev, dev); |
| 1348 | } else { |
| 1349 | lp->next = pcnet32_dev; |
| 1350 | pcnet32_dev = dev; |
| 1351 | } |
| 1352 | |
| 1353 | if (pcnet32_debug & NETIF_MSG_PROBE) |
| 1354 | printk(KERN_INFO "%s: registered as %s\n", dev->name, lp->name); |
| 1355 | cards_found++; |
| 1356 | |
| 1357 | /* enable LED writes */ |
| 1358 | a->write_bcr(ioaddr, 2, a->read_bcr(ioaddr, 2) | 0x1000); |
| 1359 | |
| 1360 | return 0; |
| 1361 | |
| 1362 | err_free_consistent: |
| 1363 | pci_free_consistent(lp->pci_dev, sizeof(*lp), lp, lp->dma_addr); |
| 1364 | err_free_netdev: |
| 1365 | free_netdev(dev); |
| 1366 | err_release_region: |
| 1367 | release_region(ioaddr, PCNET32_TOTAL_SIZE); |
| 1368 | return ret; |
| 1369 | } |
| 1370 | |
| 1371 | |
| 1372 | static int |
| 1373 | pcnet32_open(struct net_device *dev) |
| 1374 | { |
| 1375 | struct pcnet32_private *lp = dev->priv; |
| 1376 | unsigned long ioaddr = dev->base_addr; |
| 1377 | u16 val; |
| 1378 | int i; |
| 1379 | int rc; |
| 1380 | unsigned long flags; |
| 1381 | |
| 1382 | if (request_irq(dev->irq, &pcnet32_interrupt, |
| 1383 | lp->shared_irq ? SA_SHIRQ : 0, dev->name, (void *)dev)) { |
| 1384 | return -EAGAIN; |
| 1385 | } |
| 1386 | |
| 1387 | spin_lock_irqsave(&lp->lock, flags); |
| 1388 | /* Check for a valid station address */ |
| 1389 | if (!is_valid_ether_addr(dev->dev_addr)) { |
| 1390 | rc = -EINVAL; |
| 1391 | goto err_free_irq; |
| 1392 | } |
| 1393 | |
| 1394 | /* Reset the PCNET32 */ |
| 1395 | lp->a.reset (ioaddr); |
| 1396 | |
| 1397 | /* switch pcnet32 to 32bit mode */ |
| 1398 | lp->a.write_bcr (ioaddr, 20, 2); |
| 1399 | |
| 1400 | if (netif_msg_ifup(lp)) |
| 1401 | printk(KERN_DEBUG "%s: pcnet32_open() irq %d tx/rx rings %#x/%#x init %#x.\n", |
| 1402 | dev->name, dev->irq, |
| 1403 | (u32) (lp->dma_addr + offsetof(struct pcnet32_private, tx_ring)), |
| 1404 | (u32) (lp->dma_addr + offsetof(struct pcnet32_private, rx_ring)), |
| 1405 | (u32) (lp->dma_addr + offsetof(struct pcnet32_private, init_block))); |
| 1406 | |
| 1407 | /* set/reset autoselect bit */ |
| 1408 | val = lp->a.read_bcr (ioaddr, 2) & ~2; |
| 1409 | if (lp->options & PCNET32_PORT_ASEL) |
| 1410 | val |= 2; |
| 1411 | lp->a.write_bcr (ioaddr, 2, val); |
| 1412 | |
| 1413 | /* handle full duplex setting */ |
| 1414 | if (lp->mii_if.full_duplex) { |
| 1415 | val = lp->a.read_bcr (ioaddr, 9) & ~3; |
| 1416 | if (lp->options & PCNET32_PORT_FD) { |
| 1417 | val |= 1; |
| 1418 | if (lp->options == (PCNET32_PORT_FD | PCNET32_PORT_AUI)) |
| 1419 | val |= 2; |
| 1420 | } else if (lp->options & PCNET32_PORT_ASEL) { |
| 1421 | /* workaround of xSeries250, turn on for 79C975 only */ |
| 1422 | i = ((lp->a.read_csr(ioaddr, 88) | |
| 1423 | (lp->a.read_csr(ioaddr,89) << 16)) >> 12) & 0xffff; |
| 1424 | if (i == 0x2627) |
| 1425 | val |= 3; |
| 1426 | } |
| 1427 | lp->a.write_bcr (ioaddr, 9, val); |
| 1428 | } |
| 1429 | |
| 1430 | /* set/reset GPSI bit in test register */ |
| 1431 | val = lp->a.read_csr (ioaddr, 124) & ~0x10; |
| 1432 | if ((lp->options & PCNET32_PORT_PORTSEL) == PCNET32_PORT_GPSI) |
| 1433 | val |= 0x10; |
| 1434 | lp->a.write_csr (ioaddr, 124, val); |
| 1435 | |
| 1436 | /* Allied Telesyn AT 2700/2701 FX looses the link, so skip that */ |
| 1437 | if (lp->pci_dev->subsystem_vendor == PCI_VENDOR_ID_AT && |
| 1438 | (lp->pci_dev->subsystem_device == PCI_SUBDEVICE_ID_AT_2700FX || |
| 1439 | lp->pci_dev->subsystem_device == PCI_SUBDEVICE_ID_AT_2701FX)) { |
| 1440 | printk(KERN_DEBUG "%s: Skipping PHY selection.\n", dev->name); |
| 1441 | } else { |
| 1442 | /* |
| 1443 | * 24 Jun 2004 according AMD, in order to change the PHY, |
| 1444 | * DANAS (or DISPM for 79C976) must be set; then select the speed, |
| 1445 | * duplex, and/or enable auto negotiation, and clear DANAS |
| 1446 | */ |
| 1447 | if (lp->mii && !(lp->options & PCNET32_PORT_ASEL)) { |
| 1448 | lp->a.write_bcr(ioaddr, 32, |
| 1449 | lp->a.read_bcr(ioaddr, 32) | 0x0080); |
| 1450 | /* disable Auto Negotiation, set 10Mpbs, HD */ |
| 1451 | val = lp->a.read_bcr(ioaddr, 32) & ~0xb8; |
| 1452 | if (lp->options & PCNET32_PORT_FD) |
| 1453 | val |= 0x10; |
| 1454 | if (lp->options & PCNET32_PORT_100) |
| 1455 | val |= 0x08; |
| 1456 | lp->a.write_bcr (ioaddr, 32, val); |
| 1457 | } else { |
| 1458 | if (lp->options & PCNET32_PORT_ASEL) { |
| 1459 | lp->a.write_bcr(ioaddr, 32, |
| 1460 | lp->a.read_bcr(ioaddr, 32) | 0x0080); |
| 1461 | /* enable auto negotiate, setup, disable fd */ |
| 1462 | val = lp->a.read_bcr(ioaddr, 32) & ~0x98; |
| 1463 | val |= 0x20; |
| 1464 | lp->a.write_bcr(ioaddr, 32, val); |
| 1465 | } |
| 1466 | } |
| 1467 | } |
| 1468 | |
| 1469 | #ifdef DO_DXSUFLO |
| 1470 | if (lp->dxsuflo) { /* Disable transmit stop on underflow */ |
| 1471 | val = lp->a.read_csr (ioaddr, 3); |
| 1472 | val |= 0x40; |
| 1473 | lp->a.write_csr (ioaddr, 3, val); |
| 1474 | } |
| 1475 | #endif |
| 1476 | |
| 1477 | lp->init_block.mode = le16_to_cpu((lp->options & PCNET32_PORT_PORTSEL) << 7); |
| 1478 | pcnet32_load_multicast(dev); |
| 1479 | |
| 1480 | if (pcnet32_init_ring(dev)) { |
| 1481 | rc = -ENOMEM; |
| 1482 | goto err_free_ring; |
| 1483 | } |
| 1484 | |
| 1485 | /* Re-initialize the PCNET32, and start it when done. */ |
| 1486 | lp->a.write_csr (ioaddr, 1, (lp->dma_addr + |
| 1487 | offsetof(struct pcnet32_private, init_block)) & 0xffff); |
| 1488 | lp->a.write_csr (ioaddr, 2, (lp->dma_addr + |
| 1489 | offsetof(struct pcnet32_private, init_block)) >> 16); |
| 1490 | |
| 1491 | lp->a.write_csr (ioaddr, 4, 0x0915); |
| 1492 | lp->a.write_csr (ioaddr, 0, 0x0001); |
| 1493 | |
| 1494 | netif_start_queue(dev); |
| 1495 | |
| 1496 | /* If we have mii, print the link status and start the watchdog */ |
| 1497 | if (lp->mii) { |
| 1498 | mii_check_media (&lp->mii_if, netif_msg_link(lp), 1); |
| 1499 | mod_timer (&(lp->watchdog_timer), PCNET32_WATCHDOG_TIMEOUT); |
| 1500 | } |
| 1501 | |
| 1502 | i = 0; |
| 1503 | while (i++ < 100) |
| 1504 | if (lp->a.read_csr (ioaddr, 0) & 0x0100) |
| 1505 | break; |
| 1506 | /* |
| 1507 | * We used to clear the InitDone bit, 0x0100, here but Mark Stockton |
| 1508 | * reports that doing so triggers a bug in the '974. |
| 1509 | */ |
| 1510 | lp->a.write_csr (ioaddr, 0, 0x0042); |
| 1511 | |
| 1512 | if (netif_msg_ifup(lp)) |
| 1513 | printk(KERN_DEBUG "%s: pcnet32 open after %d ticks, init block %#x csr0 %4.4x.\n", |
| 1514 | dev->name, i, (u32) (lp->dma_addr + |
| 1515 | offsetof(struct pcnet32_private, init_block)), |
| 1516 | lp->a.read_csr(ioaddr, 0)); |
| 1517 | |
| 1518 | spin_unlock_irqrestore(&lp->lock, flags); |
| 1519 | |
| 1520 | return 0; /* Always succeed */ |
| 1521 | |
| 1522 | err_free_ring: |
| 1523 | /* free any allocated skbuffs */ |
| 1524 | for (i = 0; i < RX_RING_SIZE; i++) { |
| 1525 | lp->rx_ring[i].status = 0; |
| 1526 | if (lp->rx_skbuff[i]) { |
| 1527 | pci_unmap_single(lp->pci_dev, lp->rx_dma_addr[i], PKT_BUF_SZ-2, |
| 1528 | PCI_DMA_FROMDEVICE); |
| 1529 | dev_kfree_skb(lp->rx_skbuff[i]); |
| 1530 | } |
| 1531 | lp->rx_skbuff[i] = NULL; |
| 1532 | lp->rx_dma_addr[i] = 0; |
| 1533 | } |
| 1534 | /* |
| 1535 | * Switch back to 16bit mode to avoid problems with dumb |
| 1536 | * DOS packet driver after a warm reboot |
| 1537 | */ |
| 1538 | lp->a.write_bcr (ioaddr, 20, 4); |
| 1539 | |
| 1540 | err_free_irq: |
| 1541 | spin_unlock_irqrestore(&lp->lock, flags); |
| 1542 | free_irq(dev->irq, dev); |
| 1543 | return rc; |
| 1544 | } |
| 1545 | |
| 1546 | /* |
| 1547 | * The LANCE has been halted for one reason or another (busmaster memory |
| 1548 | * arbitration error, Tx FIFO underflow, driver stopped it to reconfigure, |
| 1549 | * etc.). Modern LANCE variants always reload their ring-buffer |
| 1550 | * configuration when restarted, so we must reinitialize our ring |
| 1551 | * context before restarting. As part of this reinitialization, |
| 1552 | * find all packets still on the Tx ring and pretend that they had been |
| 1553 | * sent (in effect, drop the packets on the floor) - the higher-level |
| 1554 | * protocols will time out and retransmit. It'd be better to shuffle |
| 1555 | * these skbs to a temp list and then actually re-Tx them after |
| 1556 | * restarting the chip, but I'm too lazy to do so right now. dplatt@3do.com |
| 1557 | */ |
| 1558 | |
| 1559 | static void |
| 1560 | pcnet32_purge_tx_ring(struct net_device *dev) |
| 1561 | { |
| 1562 | struct pcnet32_private *lp = dev->priv; |
| 1563 | int i; |
| 1564 | |
| 1565 | for (i = 0; i < TX_RING_SIZE; i++) { |
| 1566 | lp->tx_ring[i].status = 0; /* CPU owns buffer */ |
| 1567 | wmb(); /* Make sure adapter sees owner change */ |
| 1568 | if (lp->tx_skbuff[i]) { |
| 1569 | pci_unmap_single(lp->pci_dev, lp->tx_dma_addr[i], |
| 1570 | lp->tx_skbuff[i]->len, PCI_DMA_TODEVICE); |
| 1571 | dev_kfree_skb_any(lp->tx_skbuff[i]); |
| 1572 | } |
| 1573 | lp->tx_skbuff[i] = NULL; |
| 1574 | lp->tx_dma_addr[i] = 0; |
| 1575 | } |
| 1576 | } |
| 1577 | |
| 1578 | |
| 1579 | /* Initialize the PCNET32 Rx and Tx rings. */ |
| 1580 | static int |
| 1581 | pcnet32_init_ring(struct net_device *dev) |
| 1582 | { |
| 1583 | struct pcnet32_private *lp = dev->priv; |
| 1584 | int i; |
| 1585 | |
| 1586 | lp->tx_full = 0; |
| 1587 | lp->cur_rx = lp->cur_tx = 0; |
| 1588 | lp->dirty_rx = lp->dirty_tx = 0; |
| 1589 | |
| 1590 | for (i = 0; i < RX_RING_SIZE; i++) { |
| 1591 | struct sk_buff *rx_skbuff = lp->rx_skbuff[i]; |
| 1592 | if (rx_skbuff == NULL) { |
| 1593 | if (!(rx_skbuff = lp->rx_skbuff[i] = dev_alloc_skb (PKT_BUF_SZ))) { |
| 1594 | /* there is not much, we can do at this point */ |
| 1595 | if (pcnet32_debug & NETIF_MSG_DRV) |
| 1596 | printk(KERN_ERR "%s: pcnet32_init_ring dev_alloc_skb failed.\n", |
| 1597 | dev->name); |
| 1598 | return -1; |
| 1599 | } |
| 1600 | skb_reserve (rx_skbuff, 2); |
| 1601 | } |
| 1602 | |
| 1603 | rmb(); |
| 1604 | if (lp->rx_dma_addr[i] == 0) |
| 1605 | lp->rx_dma_addr[i] = pci_map_single(lp->pci_dev, rx_skbuff->tail, |
| 1606 | PKT_BUF_SZ-2, PCI_DMA_FROMDEVICE); |
| 1607 | lp->rx_ring[i].base = (u32)le32_to_cpu(lp->rx_dma_addr[i]); |
| 1608 | lp->rx_ring[i].buf_length = le16_to_cpu(2-PKT_BUF_SZ); |
| 1609 | wmb(); /* Make sure owner changes after all others are visible */ |
| 1610 | lp->rx_ring[i].status = le16_to_cpu(0x8000); |
| 1611 | } |
| 1612 | /* The Tx buffer address is filled in as needed, but we do need to clear |
| 1613 | * the upper ownership bit. */ |
| 1614 | for (i = 0; i < TX_RING_SIZE; i++) { |
| 1615 | lp->tx_ring[i].status = 0; /* CPU owns buffer */ |
| 1616 | wmb(); /* Make sure adapter sees owner change */ |
| 1617 | lp->tx_ring[i].base = 0; |
| 1618 | lp->tx_dma_addr[i] = 0; |
| 1619 | } |
| 1620 | |
| 1621 | lp->init_block.tlen_rlen = le16_to_cpu(TX_RING_LEN_BITS | RX_RING_LEN_BITS); |
| 1622 | for (i = 0; i < 6; i++) |
| 1623 | lp->init_block.phys_addr[i] = dev->dev_addr[i]; |
| 1624 | lp->init_block.rx_ring = (u32)le32_to_cpu(lp->dma_addr + |
| 1625 | offsetof(struct pcnet32_private, rx_ring)); |
| 1626 | lp->init_block.tx_ring = (u32)le32_to_cpu(lp->dma_addr + |
| 1627 | offsetof(struct pcnet32_private, tx_ring)); |
| 1628 | wmb(); /* Make sure all changes are visible */ |
| 1629 | return 0; |
| 1630 | } |
| 1631 | |
| 1632 | /* the pcnet32 has been issued a stop or reset. Wait for the stop bit |
| 1633 | * then flush the pending transmit operations, re-initialize the ring, |
| 1634 | * and tell the chip to initialize. |
| 1635 | */ |
| 1636 | static void |
| 1637 | pcnet32_restart(struct net_device *dev, unsigned int csr0_bits) |
| 1638 | { |
| 1639 | struct pcnet32_private *lp = dev->priv; |
| 1640 | unsigned long ioaddr = dev->base_addr; |
| 1641 | int i; |
| 1642 | |
| 1643 | /* wait for stop */ |
| 1644 | for (i=0; i<100; i++) |
| 1645 | if (lp->a.read_csr(ioaddr, 0) & 0x0004) |
| 1646 | break; |
| 1647 | |
| 1648 | if (i >= 100 && netif_msg_drv(lp)) |
| 1649 | printk(KERN_ERR "%s: pcnet32_restart timed out waiting for stop.\n", |
| 1650 | dev->name); |
| 1651 | |
| 1652 | pcnet32_purge_tx_ring(dev); |
| 1653 | if (pcnet32_init_ring(dev)) |
| 1654 | return; |
| 1655 | |
| 1656 | /* ReInit Ring */ |
| 1657 | lp->a.write_csr (ioaddr, 0, 1); |
| 1658 | i = 0; |
| 1659 | while (i++ < 1000) |
| 1660 | if (lp->a.read_csr (ioaddr, 0) & 0x0100) |
| 1661 | break; |
| 1662 | |
| 1663 | lp->a.write_csr (ioaddr, 0, csr0_bits); |
| 1664 | } |
| 1665 | |
| 1666 | |
| 1667 | static void |
| 1668 | pcnet32_tx_timeout (struct net_device *dev) |
| 1669 | { |
| 1670 | struct pcnet32_private *lp = dev->priv; |
| 1671 | unsigned long ioaddr = dev->base_addr, flags; |
| 1672 | |
| 1673 | spin_lock_irqsave(&lp->lock, flags); |
| 1674 | /* Transmitter timeout, serious problems. */ |
| 1675 | if (pcnet32_debug & NETIF_MSG_DRV) |
| 1676 | printk(KERN_ERR "%s: transmit timed out, status %4.4x, resetting.\n", |
| 1677 | dev->name, lp->a.read_csr(ioaddr, 0)); |
| 1678 | lp->a.write_csr (ioaddr, 0, 0x0004); |
| 1679 | lp->stats.tx_errors++; |
| 1680 | if (netif_msg_tx_err(lp)) { |
| 1681 | int i; |
| 1682 | printk(KERN_DEBUG " Ring data dump: dirty_tx %d cur_tx %d%s cur_rx %d.", |
| 1683 | lp->dirty_tx, lp->cur_tx, lp->tx_full ? " (full)" : "", |
| 1684 | lp->cur_rx); |
| 1685 | for (i = 0 ; i < RX_RING_SIZE; i++) |
| 1686 | printk("%s %08x %04x %08x %04x", i & 1 ? "" : "\n ", |
| 1687 | le32_to_cpu(lp->rx_ring[i].base), |
| 1688 | (-le16_to_cpu(lp->rx_ring[i].buf_length)) & 0xffff, |
| 1689 | le32_to_cpu(lp->rx_ring[i].msg_length), |
| 1690 | le16_to_cpu(lp->rx_ring[i].status)); |
| 1691 | for (i = 0 ; i < TX_RING_SIZE; i++) |
| 1692 | printk("%s %08x %04x %08x %04x", i & 1 ? "" : "\n ", |
| 1693 | le32_to_cpu(lp->tx_ring[i].base), |
| 1694 | (-le16_to_cpu(lp->tx_ring[i].length)) & 0xffff, |
| 1695 | le32_to_cpu(lp->tx_ring[i].misc), |
| 1696 | le16_to_cpu(lp->tx_ring[i].status)); |
| 1697 | printk("\n"); |
| 1698 | } |
| 1699 | pcnet32_restart(dev, 0x0042); |
| 1700 | |
| 1701 | dev->trans_start = jiffies; |
| 1702 | netif_wake_queue(dev); |
| 1703 | |
| 1704 | spin_unlock_irqrestore(&lp->lock, flags); |
| 1705 | } |
| 1706 | |
| 1707 | |
| 1708 | static int |
| 1709 | pcnet32_start_xmit(struct sk_buff *skb, struct net_device *dev) |
| 1710 | { |
| 1711 | struct pcnet32_private *lp = dev->priv; |
| 1712 | unsigned long ioaddr = dev->base_addr; |
| 1713 | u16 status; |
| 1714 | int entry; |
| 1715 | unsigned long flags; |
| 1716 | |
| 1717 | spin_lock_irqsave(&lp->lock, flags); |
| 1718 | |
| 1719 | if (netif_msg_tx_queued(lp)) { |
| 1720 | printk(KERN_DEBUG "%s: pcnet32_start_xmit() called, csr0 %4.4x.\n", |
| 1721 | dev->name, lp->a.read_csr(ioaddr, 0)); |
| 1722 | } |
| 1723 | |
| 1724 | /* Default status -- will not enable Successful-TxDone |
| 1725 | * interrupt when that option is available to us. |
| 1726 | */ |
| 1727 | status = 0x8300; |
| 1728 | |
| 1729 | /* Fill in a Tx ring entry */ |
| 1730 | |
| 1731 | /* Mask to ring buffer boundary. */ |
| 1732 | entry = lp->cur_tx & TX_RING_MOD_MASK; |
| 1733 | |
| 1734 | /* Caution: the write order is important here, set the status |
| 1735 | * with the "ownership" bits last. */ |
| 1736 | |
| 1737 | lp->tx_ring[entry].length = le16_to_cpu(-skb->len); |
| 1738 | |
| 1739 | lp->tx_ring[entry].misc = 0x00000000; |
| 1740 | |
| 1741 | lp->tx_skbuff[entry] = skb; |
| 1742 | lp->tx_dma_addr[entry] = pci_map_single(lp->pci_dev, skb->data, skb->len, |
| 1743 | PCI_DMA_TODEVICE); |
| 1744 | lp->tx_ring[entry].base = (u32)le32_to_cpu(lp->tx_dma_addr[entry]); |
| 1745 | wmb(); /* Make sure owner changes after all others are visible */ |
| 1746 | lp->tx_ring[entry].status = le16_to_cpu(status); |
| 1747 | |
| 1748 | lp->cur_tx++; |
| 1749 | lp->stats.tx_bytes += skb->len; |
| 1750 | |
| 1751 | /* Trigger an immediate send poll. */ |
| 1752 | lp->a.write_csr (ioaddr, 0, 0x0048); |
| 1753 | |
| 1754 | dev->trans_start = jiffies; |
| 1755 | |
| 1756 | if (lp->tx_ring[(entry+1) & TX_RING_MOD_MASK].base != 0) { |
| 1757 | lp->tx_full = 1; |
| 1758 | netif_stop_queue(dev); |
| 1759 | } |
| 1760 | spin_unlock_irqrestore(&lp->lock, flags); |
| 1761 | return 0; |
| 1762 | } |
| 1763 | |
| 1764 | /* The PCNET32 interrupt handler. */ |
| 1765 | static irqreturn_t |
| 1766 | pcnet32_interrupt(int irq, void *dev_id, struct pt_regs * regs) |
| 1767 | { |
| 1768 | struct net_device *dev = dev_id; |
| 1769 | struct pcnet32_private *lp; |
| 1770 | unsigned long ioaddr; |
| 1771 | u16 csr0,rap; |
| 1772 | int boguscnt = max_interrupt_work; |
| 1773 | int must_restart; |
| 1774 | |
| 1775 | if (!dev) { |
| 1776 | if (pcnet32_debug & NETIF_MSG_INTR) |
| 1777 | printk (KERN_DEBUG "%s(): irq %d for unknown device\n", |
| 1778 | __FUNCTION__, irq); |
| 1779 | return IRQ_NONE; |
| 1780 | } |
| 1781 | |
| 1782 | ioaddr = dev->base_addr; |
| 1783 | lp = dev->priv; |
| 1784 | |
| 1785 | spin_lock(&lp->lock); |
| 1786 | |
| 1787 | rap = lp->a.read_rap(ioaddr); |
| 1788 | while ((csr0 = lp->a.read_csr (ioaddr, 0)) & 0x8f00 && --boguscnt >= 0) { |
| 1789 | if (csr0 == 0xffff) { |
| 1790 | break; /* PCMCIA remove happened */ |
| 1791 | } |
| 1792 | /* Acknowledge all of the current interrupt sources ASAP. */ |
| 1793 | lp->a.write_csr (ioaddr, 0, csr0 & ~0x004f); |
| 1794 | |
| 1795 | must_restart = 0; |
| 1796 | |
| 1797 | if (netif_msg_intr(lp)) |
| 1798 | printk(KERN_DEBUG "%s: interrupt csr0=%#2.2x new csr=%#2.2x.\n", |
| 1799 | dev->name, csr0, lp->a.read_csr (ioaddr, 0)); |
| 1800 | |
| 1801 | if (csr0 & 0x0400) /* Rx interrupt */ |
| 1802 | pcnet32_rx(dev); |
| 1803 | |
| 1804 | if (csr0 & 0x0200) { /* Tx-done interrupt */ |
| 1805 | unsigned int dirty_tx = lp->dirty_tx; |
| 1806 | int delta; |
| 1807 | |
| 1808 | while (dirty_tx != lp->cur_tx) { |
| 1809 | int entry = dirty_tx & TX_RING_MOD_MASK; |
| 1810 | int status = (short)le16_to_cpu(lp->tx_ring[entry].status); |
| 1811 | |
| 1812 | if (status < 0) |
| 1813 | break; /* It still hasn't been Txed */ |
| 1814 | |
| 1815 | lp->tx_ring[entry].base = 0; |
| 1816 | |
| 1817 | if (status & 0x4000) { |
| 1818 | /* There was an major error, log it. */ |
| 1819 | int err_status = le32_to_cpu(lp->tx_ring[entry].misc); |
| 1820 | lp->stats.tx_errors++; |
| 1821 | if (netif_msg_tx_err(lp)) |
| 1822 | printk(KERN_ERR "%s: Tx error status=%04x err_status=%08x\n", |
| 1823 | dev->name, status, err_status); |
| 1824 | if (err_status & 0x04000000) lp->stats.tx_aborted_errors++; |
| 1825 | if (err_status & 0x08000000) lp->stats.tx_carrier_errors++; |
| 1826 | if (err_status & 0x10000000) lp->stats.tx_window_errors++; |
| 1827 | #ifndef DO_DXSUFLO |
| 1828 | if (err_status & 0x40000000) { |
| 1829 | lp->stats.tx_fifo_errors++; |
| 1830 | /* Ackk! On FIFO errors the Tx unit is turned off! */ |
| 1831 | /* Remove this verbosity later! */ |
| 1832 | if (netif_msg_tx_err(lp)) |
| 1833 | printk(KERN_ERR "%s: Tx FIFO error! CSR0=%4.4x\n", |
| 1834 | dev->name, csr0); |
| 1835 | must_restart = 1; |
| 1836 | } |
| 1837 | #else |
| 1838 | if (err_status & 0x40000000) { |
| 1839 | lp->stats.tx_fifo_errors++; |
| 1840 | if (! lp->dxsuflo) { /* If controller doesn't recover ... */ |
| 1841 | /* Ackk! On FIFO errors the Tx unit is turned off! */ |
| 1842 | /* Remove this verbosity later! */ |
| 1843 | if (netif_msg_tx_err(lp)) |
| 1844 | printk(KERN_ERR "%s: Tx FIFO error! CSR0=%4.4x\n", |
| 1845 | dev->name, csr0); |
| 1846 | must_restart = 1; |
| 1847 | } |
| 1848 | } |
| 1849 | #endif |
| 1850 | } else { |
| 1851 | if (status & 0x1800) |
| 1852 | lp->stats.collisions++; |
| 1853 | lp->stats.tx_packets++; |
| 1854 | } |
| 1855 | |
| 1856 | /* We must free the original skb */ |
| 1857 | if (lp->tx_skbuff[entry]) { |
| 1858 | pci_unmap_single(lp->pci_dev, lp->tx_dma_addr[entry], |
| 1859 | lp->tx_skbuff[entry]->len, PCI_DMA_TODEVICE); |
| 1860 | dev_kfree_skb_irq(lp->tx_skbuff[entry]); |
| 1861 | lp->tx_skbuff[entry] = NULL; |
| 1862 | lp->tx_dma_addr[entry] = 0; |
| 1863 | } |
| 1864 | dirty_tx++; |
| 1865 | } |
| 1866 | |
| 1867 | delta = (lp->cur_tx - dirty_tx) & (TX_RING_MOD_MASK + TX_RING_SIZE); |
| 1868 | if (delta > TX_RING_SIZE) { |
| 1869 | if (netif_msg_drv(lp)) |
| 1870 | printk(KERN_ERR "%s: out-of-sync dirty pointer, %d vs. %d, full=%d.\n", |
| 1871 | dev->name, dirty_tx, lp->cur_tx, lp->tx_full); |
| 1872 | dirty_tx += TX_RING_SIZE; |
| 1873 | delta -= TX_RING_SIZE; |
| 1874 | } |
| 1875 | |
| 1876 | if (lp->tx_full && |
| 1877 | netif_queue_stopped(dev) && |
| 1878 | delta < TX_RING_SIZE - 2) { |
| 1879 | /* The ring is no longer full, clear tbusy. */ |
| 1880 | lp->tx_full = 0; |
| 1881 | netif_wake_queue (dev); |
| 1882 | } |
| 1883 | lp->dirty_tx = dirty_tx; |
| 1884 | } |
| 1885 | |
| 1886 | /* Log misc errors. */ |
| 1887 | if (csr0 & 0x4000) lp->stats.tx_errors++; /* Tx babble. */ |
| 1888 | if (csr0 & 0x1000) { |
| 1889 | /* |
| 1890 | * this happens when our receive ring is full. This shouldn't |
| 1891 | * be a problem as we will see normal rx interrupts for the frames |
| 1892 | * in the receive ring. But there are some PCI chipsets (I can |
| 1893 | * reproduce this on SP3G with Intel saturn chipset) which have |
| 1894 | * sometimes problems and will fill up the receive ring with |
| 1895 | * error descriptors. In this situation we don't get a rx |
| 1896 | * interrupt, but a missed frame interrupt sooner or later. |
| 1897 | * So we try to clean up our receive ring here. |
| 1898 | */ |
| 1899 | pcnet32_rx(dev); |
| 1900 | lp->stats.rx_errors++; /* Missed a Rx frame. */ |
| 1901 | } |
| 1902 | if (csr0 & 0x0800) { |
| 1903 | if (netif_msg_drv(lp)) |
| 1904 | printk(KERN_ERR "%s: Bus master arbitration failure, status %4.4x.\n", |
| 1905 | dev->name, csr0); |
| 1906 | /* unlike for the lance, there is no restart needed */ |
| 1907 | } |
| 1908 | |
| 1909 | if (must_restart) { |
| 1910 | /* reset the chip to clear the error condition, then restart */ |
| 1911 | lp->a.reset(ioaddr); |
| 1912 | lp->a.write_csr(ioaddr, 4, 0x0915); |
| 1913 | pcnet32_restart(dev, 0x0002); |
| 1914 | netif_wake_queue(dev); |
| 1915 | } |
| 1916 | } |
| 1917 | |
| 1918 | /* Set interrupt enable. */ |
| 1919 | lp->a.write_csr (ioaddr, 0, 0x0040); |
| 1920 | lp->a.write_rap (ioaddr,rap); |
| 1921 | |
| 1922 | if (netif_msg_intr(lp)) |
| 1923 | printk(KERN_DEBUG "%s: exiting interrupt, csr0=%#4.4x.\n", |
| 1924 | dev->name, lp->a.read_csr (ioaddr, 0)); |
| 1925 | |
| 1926 | spin_unlock(&lp->lock); |
| 1927 | |
| 1928 | return IRQ_HANDLED; |
| 1929 | } |
| 1930 | |
| 1931 | static int |
| 1932 | pcnet32_rx(struct net_device *dev) |
| 1933 | { |
| 1934 | struct pcnet32_private *lp = dev->priv; |
| 1935 | int entry = lp->cur_rx & RX_RING_MOD_MASK; |
| 1936 | int boguscnt = RX_RING_SIZE / 2; |
| 1937 | |
| 1938 | /* If we own the next entry, it's a new packet. Send it up. */ |
| 1939 | while ((short)le16_to_cpu(lp->rx_ring[entry].status) >= 0) { |
| 1940 | int status = (short)le16_to_cpu(lp->rx_ring[entry].status) >> 8; |
| 1941 | |
| 1942 | if (status != 0x03) { /* There was an error. */ |
| 1943 | /* |
| 1944 | * There is a tricky error noted by John Murphy, |
| 1945 | * <murf@perftech.com> to Russ Nelson: Even with full-sized |
| 1946 | * buffers it's possible for a jabber packet to use two |
| 1947 | * buffers, with only the last correctly noting the error. |
| 1948 | */ |
| 1949 | if (status & 0x01) /* Only count a general error at the */ |
| 1950 | lp->stats.rx_errors++; /* end of a packet.*/ |
| 1951 | if (status & 0x20) lp->stats.rx_frame_errors++; |
| 1952 | if (status & 0x10) lp->stats.rx_over_errors++; |
| 1953 | if (status & 0x08) lp->stats.rx_crc_errors++; |
| 1954 | if (status & 0x04) lp->stats.rx_fifo_errors++; |
| 1955 | lp->rx_ring[entry].status &= le16_to_cpu(0x03ff); |
| 1956 | } else { |
| 1957 | /* Malloc up new buffer, compatible with net-2e. */ |
| 1958 | short pkt_len = (le32_to_cpu(lp->rx_ring[entry].msg_length) & 0xfff)-4; |
| 1959 | struct sk_buff *skb; |
| 1960 | |
| 1961 | /* Discard oversize frames. */ |
| 1962 | if (unlikely(pkt_len > PKT_BUF_SZ - 2)) { |
| 1963 | if (netif_msg_drv(lp)) |
| 1964 | printk(KERN_ERR "%s: Impossible packet size %d!\n", |
| 1965 | dev->name, pkt_len); |
| 1966 | lp->stats.rx_errors++; |
| 1967 | } else if (pkt_len < 60) { |
| 1968 | if (netif_msg_rx_err(lp)) |
| 1969 | printk(KERN_ERR "%s: Runt packet!\n", dev->name); |
| 1970 | lp->stats.rx_errors++; |
| 1971 | } else { |
| 1972 | int rx_in_place = 0; |
| 1973 | |
| 1974 | if (pkt_len > rx_copybreak) { |
| 1975 | struct sk_buff *newskb; |
| 1976 | |
| 1977 | if ((newskb = dev_alloc_skb(PKT_BUF_SZ))) { |
| 1978 | skb_reserve (newskb, 2); |
| 1979 | skb = lp->rx_skbuff[entry]; |
| 1980 | pci_unmap_single(lp->pci_dev, lp->rx_dma_addr[entry], |
| 1981 | PKT_BUF_SZ-2, PCI_DMA_FROMDEVICE); |
| 1982 | skb_put (skb, pkt_len); |
| 1983 | lp->rx_skbuff[entry] = newskb; |
| 1984 | newskb->dev = dev; |
| 1985 | lp->rx_dma_addr[entry] = |
| 1986 | pci_map_single(lp->pci_dev, newskb->tail, |
| 1987 | PKT_BUF_SZ-2, PCI_DMA_FROMDEVICE); |
| 1988 | lp->rx_ring[entry].base = le32_to_cpu(lp->rx_dma_addr[entry]); |
| 1989 | rx_in_place = 1; |
| 1990 | } else |
| 1991 | skb = NULL; |
| 1992 | } else { |
| 1993 | skb = dev_alloc_skb(pkt_len+2); |
| 1994 | } |
| 1995 | |
| 1996 | if (skb == NULL) { |
| 1997 | int i; |
| 1998 | if (netif_msg_drv(lp)) |
| 1999 | printk(KERN_ERR "%s: Memory squeeze, deferring packet.\n", |
| 2000 | dev->name); |
| 2001 | for (i = 0; i < RX_RING_SIZE; i++) |
| 2002 | if ((short)le16_to_cpu(lp->rx_ring[(entry+i) |
| 2003 | & RX_RING_MOD_MASK].status) < 0) |
| 2004 | break; |
| 2005 | |
| 2006 | if (i > RX_RING_SIZE -2) { |
| 2007 | lp->stats.rx_dropped++; |
| 2008 | lp->rx_ring[entry].status |= le16_to_cpu(0x8000); |
| 2009 | wmb(); /* Make sure adapter sees owner change */ |
| 2010 | lp->cur_rx++; |
| 2011 | } |
| 2012 | break; |
| 2013 | } |
| 2014 | skb->dev = dev; |
| 2015 | if (!rx_in_place) { |
| 2016 | skb_reserve(skb,2); /* 16 byte align */ |
| 2017 | skb_put(skb,pkt_len); /* Make room */ |
| 2018 | pci_dma_sync_single_for_cpu(lp->pci_dev, |
| 2019 | lp->rx_dma_addr[entry], |
| 2020 | PKT_BUF_SZ-2, |
| 2021 | PCI_DMA_FROMDEVICE); |
| 2022 | eth_copy_and_sum(skb, |
| 2023 | (unsigned char *)(lp->rx_skbuff[entry]->tail), |
| 2024 | pkt_len,0); |
| 2025 | pci_dma_sync_single_for_device(lp->pci_dev, |
| 2026 | lp->rx_dma_addr[entry], |
| 2027 | PKT_BUF_SZ-2, |
| 2028 | PCI_DMA_FROMDEVICE); |
| 2029 | } |
| 2030 | lp->stats.rx_bytes += skb->len; |
| 2031 | skb->protocol=eth_type_trans(skb,dev); |
| 2032 | netif_rx(skb); |
| 2033 | dev->last_rx = jiffies; |
| 2034 | lp->stats.rx_packets++; |
| 2035 | } |
| 2036 | } |
| 2037 | /* |
| 2038 | * The docs say that the buffer length isn't touched, but Andrew Boyd |
| 2039 | * of QNX reports that some revs of the 79C965 clear it. |
| 2040 | */ |
| 2041 | lp->rx_ring[entry].buf_length = le16_to_cpu(2-PKT_BUF_SZ); |
| 2042 | wmb(); /* Make sure owner changes after all others are visible */ |
| 2043 | lp->rx_ring[entry].status |= le16_to_cpu(0x8000); |
| 2044 | entry = (++lp->cur_rx) & RX_RING_MOD_MASK; |
| 2045 | if (--boguscnt <= 0) break; /* don't stay in loop forever */ |
| 2046 | } |
| 2047 | |
| 2048 | return 0; |
| 2049 | } |
| 2050 | |
| 2051 | static int |
| 2052 | pcnet32_close(struct net_device *dev) |
| 2053 | { |
| 2054 | unsigned long ioaddr = dev->base_addr; |
| 2055 | struct pcnet32_private *lp = dev->priv; |
| 2056 | int i; |
| 2057 | unsigned long flags; |
| 2058 | |
| 2059 | del_timer_sync(&lp->watchdog_timer); |
| 2060 | |
| 2061 | netif_stop_queue(dev); |
| 2062 | |
| 2063 | spin_lock_irqsave(&lp->lock, flags); |
| 2064 | |
| 2065 | lp->stats.rx_missed_errors = lp->a.read_csr (ioaddr, 112); |
| 2066 | |
| 2067 | if (netif_msg_ifdown(lp)) |
| 2068 | printk(KERN_DEBUG "%s: Shutting down ethercard, status was %2.2x.\n", |
| 2069 | dev->name, lp->a.read_csr (ioaddr, 0)); |
| 2070 | |
| 2071 | /* We stop the PCNET32 here -- it occasionally polls memory if we don't. */ |
| 2072 | lp->a.write_csr (ioaddr, 0, 0x0004); |
| 2073 | |
| 2074 | /* |
| 2075 | * Switch back to 16bit mode to avoid problems with dumb |
| 2076 | * DOS packet driver after a warm reboot |
| 2077 | */ |
| 2078 | lp->a.write_bcr (ioaddr, 20, 4); |
| 2079 | |
| 2080 | spin_unlock_irqrestore(&lp->lock, flags); |
| 2081 | |
| 2082 | free_irq(dev->irq, dev); |
| 2083 | |
| 2084 | spin_lock_irqsave(&lp->lock, flags); |
| 2085 | |
| 2086 | /* free all allocated skbuffs */ |
| 2087 | for (i = 0; i < RX_RING_SIZE; i++) { |
| 2088 | lp->rx_ring[i].status = 0; |
| 2089 | wmb(); /* Make sure adapter sees owner change */ |
| 2090 | if (lp->rx_skbuff[i]) { |
| 2091 | pci_unmap_single(lp->pci_dev, lp->rx_dma_addr[i], PKT_BUF_SZ-2, |
| 2092 | PCI_DMA_FROMDEVICE); |
| 2093 | dev_kfree_skb(lp->rx_skbuff[i]); |
| 2094 | } |
| 2095 | lp->rx_skbuff[i] = NULL; |
| 2096 | lp->rx_dma_addr[i] = 0; |
| 2097 | } |
| 2098 | |
| 2099 | for (i = 0; i < TX_RING_SIZE; i++) { |
| 2100 | lp->tx_ring[i].status = 0; /* CPU owns buffer */ |
| 2101 | wmb(); /* Make sure adapter sees owner change */ |
| 2102 | if (lp->tx_skbuff[i]) { |
| 2103 | pci_unmap_single(lp->pci_dev, lp->tx_dma_addr[i], |
| 2104 | lp->tx_skbuff[i]->len, PCI_DMA_TODEVICE); |
| 2105 | dev_kfree_skb(lp->tx_skbuff[i]); |
| 2106 | } |
| 2107 | lp->tx_skbuff[i] = NULL; |
| 2108 | lp->tx_dma_addr[i] = 0; |
| 2109 | } |
| 2110 | |
| 2111 | spin_unlock_irqrestore(&lp->lock, flags); |
| 2112 | |
| 2113 | return 0; |
| 2114 | } |
| 2115 | |
| 2116 | static struct net_device_stats * |
| 2117 | pcnet32_get_stats(struct net_device *dev) |
| 2118 | { |
| 2119 | struct pcnet32_private *lp = dev->priv; |
| 2120 | unsigned long ioaddr = dev->base_addr; |
| 2121 | u16 saved_addr; |
| 2122 | unsigned long flags; |
| 2123 | |
| 2124 | spin_lock_irqsave(&lp->lock, flags); |
| 2125 | saved_addr = lp->a.read_rap(ioaddr); |
| 2126 | lp->stats.rx_missed_errors = lp->a.read_csr (ioaddr, 112); |
| 2127 | lp->a.write_rap(ioaddr, saved_addr); |
| 2128 | spin_unlock_irqrestore(&lp->lock, flags); |
| 2129 | |
| 2130 | return &lp->stats; |
| 2131 | } |
| 2132 | |
| 2133 | /* taken from the sunlance driver, which it took from the depca driver */ |
| 2134 | static void pcnet32_load_multicast (struct net_device *dev) |
| 2135 | { |
| 2136 | struct pcnet32_private *lp = dev->priv; |
| 2137 | volatile struct pcnet32_init_block *ib = &lp->init_block; |
| 2138 | volatile u16 *mcast_table = (u16 *)&ib->filter; |
| 2139 | struct dev_mc_list *dmi=dev->mc_list; |
| 2140 | char *addrs; |
| 2141 | int i; |
| 2142 | u32 crc; |
| 2143 | |
| 2144 | /* set all multicast bits */ |
| 2145 | if (dev->flags & IFF_ALLMULTI) { |
| 2146 | ib->filter[0] = 0xffffffff; |
| 2147 | ib->filter[1] = 0xffffffff; |
| 2148 | return; |
| 2149 | } |
| 2150 | /* clear the multicast filter */ |
| 2151 | ib->filter[0] = 0; |
| 2152 | ib->filter[1] = 0; |
| 2153 | |
| 2154 | /* Add addresses */ |
| 2155 | for (i = 0; i < dev->mc_count; i++) { |
| 2156 | addrs = dmi->dmi_addr; |
| 2157 | dmi = dmi->next; |
| 2158 | |
| 2159 | /* multicast address? */ |
| 2160 | if (!(*addrs & 1)) |
| 2161 | continue; |
| 2162 | |
| 2163 | crc = ether_crc_le(6, addrs); |
| 2164 | crc = crc >> 26; |
| 2165 | mcast_table [crc >> 4] = le16_to_cpu( |
| 2166 | le16_to_cpu(mcast_table [crc >> 4]) | (1 << (crc & 0xf))); |
| 2167 | } |
| 2168 | return; |
| 2169 | } |
| 2170 | |
| 2171 | |
| 2172 | /* |
| 2173 | * Set or clear the multicast filter for this adaptor. |
| 2174 | */ |
| 2175 | static void pcnet32_set_multicast_list(struct net_device *dev) |
| 2176 | { |
| 2177 | unsigned long ioaddr = dev->base_addr, flags; |
| 2178 | struct pcnet32_private *lp = dev->priv; |
| 2179 | |
| 2180 | spin_lock_irqsave(&lp->lock, flags); |
| 2181 | if (dev->flags&IFF_PROMISC) { |
| 2182 | /* Log any net taps. */ |
| 2183 | if (netif_msg_hw(lp)) |
| 2184 | printk(KERN_INFO "%s: Promiscuous mode enabled.\n", dev->name); |
| 2185 | lp->init_block.mode = le16_to_cpu(0x8000 | (lp->options & PCNET32_PORT_PORTSEL) << 7); |
| 2186 | } else { |
| 2187 | lp->init_block.mode = le16_to_cpu((lp->options & PCNET32_PORT_PORTSEL) << 7); |
| 2188 | pcnet32_load_multicast (dev); |
| 2189 | } |
| 2190 | |
| 2191 | lp->a.write_csr (ioaddr, 0, 0x0004); /* Temporarily stop the lance. */ |
| 2192 | pcnet32_restart(dev, 0x0042); /* Resume normal operation */ |
| 2193 | netif_wake_queue(dev); |
| 2194 | |
| 2195 | spin_unlock_irqrestore(&lp->lock, flags); |
| 2196 | } |
| 2197 | |
| 2198 | /* This routine assumes that the lp->lock is held */ |
| 2199 | static int mdio_read(struct net_device *dev, int phy_id, int reg_num) |
| 2200 | { |
| 2201 | struct pcnet32_private *lp = dev->priv; |
| 2202 | unsigned long ioaddr = dev->base_addr; |
| 2203 | u16 val_out; |
| 2204 | |
| 2205 | if (!lp->mii) |
| 2206 | return 0; |
| 2207 | |
| 2208 | lp->a.write_bcr(ioaddr, 33, ((phy_id & 0x1f) << 5) | (reg_num & 0x1f)); |
| 2209 | val_out = lp->a.read_bcr(ioaddr, 34); |
| 2210 | |
| 2211 | return val_out; |
| 2212 | } |
| 2213 | |
| 2214 | /* This routine assumes that the lp->lock is held */ |
| 2215 | static void mdio_write(struct net_device *dev, int phy_id, int reg_num, int val) |
| 2216 | { |
| 2217 | struct pcnet32_private *lp = dev->priv; |
| 2218 | unsigned long ioaddr = dev->base_addr; |
| 2219 | |
| 2220 | if (!lp->mii) |
| 2221 | return; |
| 2222 | |
| 2223 | lp->a.write_bcr(ioaddr, 33, ((phy_id & 0x1f) << 5) | (reg_num & 0x1f)); |
| 2224 | lp->a.write_bcr(ioaddr, 34, val); |
| 2225 | } |
| 2226 | |
| 2227 | static int pcnet32_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) |
| 2228 | { |
| 2229 | struct pcnet32_private *lp = dev->priv; |
| 2230 | int rc; |
| 2231 | unsigned long flags; |
| 2232 | |
| 2233 | /* SIOC[GS]MIIxxx ioctls */ |
| 2234 | if (lp->mii) { |
| 2235 | spin_lock_irqsave(&lp->lock, flags); |
| 2236 | rc = generic_mii_ioctl(&lp->mii_if, if_mii(rq), cmd, NULL); |
| 2237 | spin_unlock_irqrestore(&lp->lock, flags); |
| 2238 | } else { |
| 2239 | rc = -EOPNOTSUPP; |
| 2240 | } |
| 2241 | |
| 2242 | return rc; |
| 2243 | } |
| 2244 | |
| 2245 | static void pcnet32_watchdog(struct net_device *dev) |
| 2246 | { |
| 2247 | struct pcnet32_private *lp = dev->priv; |
| 2248 | unsigned long flags; |
| 2249 | |
| 2250 | /* Print the link status if it has changed */ |
| 2251 | if (lp->mii) { |
| 2252 | spin_lock_irqsave(&lp->lock, flags); |
| 2253 | mii_check_media (&lp->mii_if, netif_msg_link(lp), 0); |
| 2254 | spin_unlock_irqrestore(&lp->lock, flags); |
| 2255 | } |
| 2256 | |
| 2257 | mod_timer (&(lp->watchdog_timer), PCNET32_WATCHDOG_TIMEOUT); |
| 2258 | } |
| 2259 | |
| 2260 | static void __devexit pcnet32_remove_one(struct pci_dev *pdev) |
| 2261 | { |
| 2262 | struct net_device *dev = pci_get_drvdata(pdev); |
| 2263 | |
| 2264 | if (dev) { |
| 2265 | struct pcnet32_private *lp = dev->priv; |
| 2266 | |
| 2267 | unregister_netdev(dev); |
| 2268 | release_region(dev->base_addr, PCNET32_TOTAL_SIZE); |
| 2269 | pci_free_consistent(lp->pci_dev, sizeof(*lp), lp, lp->dma_addr); |
| 2270 | free_netdev(dev); |
| 2271 | pci_disable_device(pdev); |
| 2272 | pci_set_drvdata(pdev, NULL); |
| 2273 | } |
| 2274 | } |
| 2275 | |
| 2276 | static struct pci_driver pcnet32_driver = { |
| 2277 | .name = DRV_NAME, |
| 2278 | .probe = pcnet32_probe_pci, |
| 2279 | .remove = __devexit_p(pcnet32_remove_one), |
| 2280 | .id_table = pcnet32_pci_tbl, |
| 2281 | }; |
| 2282 | |
| 2283 | /* An additional parameter that may be passed in... */ |
| 2284 | static int debug = -1; |
| 2285 | static int tx_start_pt = -1; |
| 2286 | static int pcnet32_have_pci; |
| 2287 | |
| 2288 | module_param(debug, int, 0); |
| 2289 | MODULE_PARM_DESC(debug, DRV_NAME " debug level"); |
| 2290 | module_param(max_interrupt_work, int, 0); |
| 2291 | MODULE_PARM_DESC(max_interrupt_work, DRV_NAME " maximum events handled per interrupt"); |
| 2292 | module_param(rx_copybreak, int, 0); |
| 2293 | MODULE_PARM_DESC(rx_copybreak, DRV_NAME " copy breakpoint for copy-only-tiny-frames"); |
| 2294 | module_param(tx_start_pt, int, 0); |
| 2295 | MODULE_PARM_DESC(tx_start_pt, DRV_NAME " transmit start point (0-3)"); |
| 2296 | module_param(pcnet32vlb, int, 0); |
| 2297 | MODULE_PARM_DESC(pcnet32vlb, DRV_NAME " Vesa local bus (VLB) support (0/1)"); |
| 2298 | module_param_array(options, int, NULL, 0); |
| 2299 | MODULE_PARM_DESC(options, DRV_NAME " initial option setting(s) (0-15)"); |
| 2300 | module_param_array(full_duplex, int, NULL, 0); |
| 2301 | MODULE_PARM_DESC(full_duplex, DRV_NAME " full duplex setting(s) (1)"); |
| 2302 | /* Module Parameter for HomePNA cards added by Patrick Simmons, 2004 */ |
| 2303 | module_param_array(homepna, int, NULL, 0); |
| 2304 | MODULE_PARM_DESC(homepna, DRV_NAME " mode for 79C978 cards (1 for HomePNA, 0 for Ethernet, default Ethernet"); |
| 2305 | |
| 2306 | MODULE_AUTHOR("Thomas Bogendoerfer"); |
| 2307 | MODULE_DESCRIPTION("Driver for PCnet32 and PCnetPCI based ethercards"); |
| 2308 | MODULE_LICENSE("GPL"); |
| 2309 | |
| 2310 | #define PCNET32_MSG_DEFAULT (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK) |
| 2311 | |
| 2312 | static int __init pcnet32_init_module(void) |
| 2313 | { |
| 2314 | printk(KERN_INFO "%s", version); |
| 2315 | |
| 2316 | pcnet32_debug = netif_msg_init(debug, PCNET32_MSG_DEFAULT); |
| 2317 | |
| 2318 | if ((tx_start_pt >= 0) && (tx_start_pt <= 3)) |
| 2319 | tx_start = tx_start_pt; |
| 2320 | |
| 2321 | /* find the PCI devices */ |
| 2322 | if (!pci_module_init(&pcnet32_driver)) |
| 2323 | pcnet32_have_pci = 1; |
| 2324 | |
| 2325 | /* should we find any remaining VLbus devices ? */ |
| 2326 | if (pcnet32vlb) |
| 2327 | pcnet32_probe_vlbus(); |
| 2328 | |
| 2329 | if (cards_found && (pcnet32_debug & NETIF_MSG_PROBE)) |
| 2330 | printk(KERN_INFO PFX "%d cards_found.\n", cards_found); |
| 2331 | |
| 2332 | return (pcnet32_have_pci + cards_found) ? 0 : -ENODEV; |
| 2333 | } |
| 2334 | |
| 2335 | static void __exit pcnet32_cleanup_module(void) |
| 2336 | { |
| 2337 | struct net_device *next_dev; |
| 2338 | |
| 2339 | while (pcnet32_dev) { |
| 2340 | struct pcnet32_private *lp = pcnet32_dev->priv; |
| 2341 | next_dev = lp->next; |
| 2342 | unregister_netdev(pcnet32_dev); |
| 2343 | release_region(pcnet32_dev->base_addr, PCNET32_TOTAL_SIZE); |
| 2344 | pci_free_consistent(lp->pci_dev, sizeof(*lp), lp, lp->dma_addr); |
| 2345 | free_netdev(pcnet32_dev); |
| 2346 | pcnet32_dev = next_dev; |
| 2347 | } |
| 2348 | |
| 2349 | if (pcnet32_have_pci) |
| 2350 | pci_unregister_driver(&pcnet32_driver); |
| 2351 | } |
| 2352 | |
| 2353 | module_init(pcnet32_init_module); |
| 2354 | module_exit(pcnet32_cleanup_module); |
| 2355 | |
| 2356 | /* |
| 2357 | * Local variables: |
| 2358 | * c-indent-level: 4 |
| 2359 | * tab-width: 8 |
| 2360 | * End: |
| 2361 | */ |