Grant Likely | c103de2 | 2011-06-04 18:38:28 -0600 | [diff] [blame] | 1 | /* |
| 2 | * Moorestown platform Langwell chip GPIO driver |
| 3 | * |
Andy Shevchenko | 611a485 | 2013-05-22 13:20:14 +0300 | [diff] [blame] | 4 | * Copyright (c) 2008, 2009, 2013, Intel Corporation. |
Alek Du | 8bf0261 | 2009-09-22 16:46:36 -0700 | [diff] [blame] | 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License version 2 as |
| 8 | * published by the Free Software Foundation. |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | * |
| 15 | * You should have received a copy of the GNU General Public License |
| 16 | * along with this program; if not, write to the Free Software |
| 17 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. |
| 18 | */ |
| 19 | |
| 20 | /* Supports: |
| 21 | * Moorestown platform Langwell chip. |
Alek Du | 8081c84 | 2010-05-26 14:42:25 -0700 | [diff] [blame] | 22 | * Medfield platform Penwell chip. |
Alek Du | 8bf0261 | 2009-09-22 16:46:36 -0700 | [diff] [blame] | 23 | */ |
| 24 | |
| 25 | #include <linux/module.h> |
| 26 | #include <linux/pci.h> |
Alan Cox | 72b4379 | 2010-10-27 15:33:23 -0700 | [diff] [blame] | 27 | #include <linux/platform_device.h> |
Alek Du | 8bf0261 | 2009-09-22 16:46:36 -0700 | [diff] [blame] | 28 | #include <linux/kernel.h> |
| 29 | #include <linux/delay.h> |
| 30 | #include <linux/stddef.h> |
| 31 | #include <linux/interrupt.h> |
| 32 | #include <linux/init.h> |
| 33 | #include <linux/irq.h> |
| 34 | #include <linux/io.h> |
| 35 | #include <linux/gpio.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 36 | #include <linux/slab.h> |
Kristen Carlson Accardi | 7812803 | 2011-05-10 14:23:45 +0100 | [diff] [blame] | 37 | #include <linux/pm_runtime.h> |
Mika Westerberg | 465f2bd | 2012-05-02 11:15:50 +0300 | [diff] [blame] | 38 | #include <linux/irqdomain.h> |
Alek Du | 8bf0261 | 2009-09-22 16:46:36 -0700 | [diff] [blame] | 39 | |
David Cohen | d56d6b3 | 2013-10-04 13:01:40 -0700 | [diff] [blame] | 40 | #define LNW_IRQ_TYPE_EDGE (1 << 0) |
| 41 | #define LNW_IRQ_TYPE_LEVEL (1 << 1) |
| 42 | |
Alek Du | 8081c84 | 2010-05-26 14:42:25 -0700 | [diff] [blame] | 43 | /* |
| 44 | * Langwell chip has 64 pins and thus there are 2 32bit registers to control |
| 45 | * each feature, while Penwell chip has 96 pins for each block, and need 3 32bit |
| 46 | * registers to control them, so we only define the order here instead of a |
| 47 | * structure, to get a bit offset for a pin (use GPDR as an example): |
| 48 | * |
| 49 | * nreg = ngpio / 32; |
| 50 | * reg = offset / 32; |
| 51 | * bit = offset % 32; |
| 52 | * reg_addr = reg_base + GPDR * nreg * 4 + reg * 4; |
| 53 | * |
| 54 | * so the bit of reg_addr is to control pin offset's GPDR feature |
| 55 | */ |
| 56 | |
| 57 | enum GPIO_REG { |
| 58 | GPLR = 0, /* pin level read-only */ |
| 59 | GPDR, /* pin direction */ |
| 60 | GPSR, /* pin set */ |
| 61 | GPCR, /* pin clear */ |
| 62 | GRER, /* rising edge detect */ |
| 63 | GFER, /* falling edge detect */ |
| 64 | GEDR, /* edge detect result */ |
Adrian Hunter | 8c0f7b1 | 2011-10-03 14:36:07 +0300 | [diff] [blame] | 65 | GAFR, /* alt function */ |
Alek Du | 8bf0261 | 2009-09-22 16:46:36 -0700 | [diff] [blame] | 66 | }; |
| 67 | |
David Cohen | d56d6b3 | 2013-10-04 13:01:40 -0700 | [diff] [blame] | 68 | /* langwell gpio driver data */ |
| 69 | struct lnw_gpio_ddata { |
| 70 | u16 ngpio; /* number of gpio pins */ |
| 71 | u32 gplr_offset; /* offset of first GPLR register from base */ |
| 72 | u32 flis_base; /* base address of FLIS registers */ |
| 73 | u32 flis_len; /* length of FLIS registers */ |
| 74 | u32 (*get_flis_offset)(int gpio); |
| 75 | u32 chip_irq_type; /* chip interrupt type */ |
| 76 | }; |
| 77 | |
Alek Du | 8bf0261 | 2009-09-22 16:46:36 -0700 | [diff] [blame] | 78 | struct lnw_gpio { |
| 79 | struct gpio_chip chip; |
Andy Shevchenko | 64c8cbc | 2013-05-22 13:20:11 +0300 | [diff] [blame] | 80 | void __iomem *reg_base; |
Alek Du | 8bf0261 | 2009-09-22 16:46:36 -0700 | [diff] [blame] | 81 | spinlock_t lock; |
Kristen Carlson Accardi | 7812803 | 2011-05-10 14:23:45 +0100 | [diff] [blame] | 82 | struct pci_dev *pdev; |
Mika Westerberg | 465f2bd | 2012-05-02 11:15:50 +0300 | [diff] [blame] | 83 | struct irq_domain *domain; |
Alek Du | 8bf0261 | 2009-09-22 16:46:36 -0700 | [diff] [blame] | 84 | }; |
| 85 | |
David Cohen | 46ebfbc | 2012-12-20 14:45:51 -0800 | [diff] [blame] | 86 | #define to_lnw_priv(chip) container_of(chip, struct lnw_gpio, chip) |
| 87 | |
Alek Du | 8081c84 | 2010-05-26 14:42:25 -0700 | [diff] [blame] | 88 | static void __iomem *gpio_reg(struct gpio_chip *chip, unsigned offset, |
Andy Shevchenko | 611a485 | 2013-05-22 13:20:14 +0300 | [diff] [blame] | 89 | enum GPIO_REG reg_type) |
Alek Du | 8bf0261 | 2009-09-22 16:46:36 -0700 | [diff] [blame] | 90 | { |
David Cohen | 46ebfbc | 2012-12-20 14:45:51 -0800 | [diff] [blame] | 91 | struct lnw_gpio *lnw = to_lnw_priv(chip); |
Alek Du | 8081c84 | 2010-05-26 14:42:25 -0700 | [diff] [blame] | 92 | unsigned nreg = chip->ngpio / 32; |
Alek Du | 8bf0261 | 2009-09-22 16:46:36 -0700 | [diff] [blame] | 93 | u8 reg = offset / 32; |
Alek Du | 8bf0261 | 2009-09-22 16:46:36 -0700 | [diff] [blame] | 94 | |
Andy Shevchenko | 611a485 | 2013-05-22 13:20:14 +0300 | [diff] [blame] | 95 | return lnw->reg_base + reg_type * nreg * 4 + reg * 4; |
Alek Du | 8081c84 | 2010-05-26 14:42:25 -0700 | [diff] [blame] | 96 | } |
| 97 | |
Adrian Hunter | 8c0f7b1 | 2011-10-03 14:36:07 +0300 | [diff] [blame] | 98 | static void __iomem *gpio_reg_2bit(struct gpio_chip *chip, unsigned offset, |
| 99 | enum GPIO_REG reg_type) |
| 100 | { |
David Cohen | 46ebfbc | 2012-12-20 14:45:51 -0800 | [diff] [blame] | 101 | struct lnw_gpio *lnw = to_lnw_priv(chip); |
Adrian Hunter | 8c0f7b1 | 2011-10-03 14:36:07 +0300 | [diff] [blame] | 102 | unsigned nreg = chip->ngpio / 32; |
| 103 | u8 reg = offset / 16; |
Adrian Hunter | 8c0f7b1 | 2011-10-03 14:36:07 +0300 | [diff] [blame] | 104 | |
Andy Shevchenko | 611a485 | 2013-05-22 13:20:14 +0300 | [diff] [blame] | 105 | return lnw->reg_base + reg_type * nreg * 4 + reg * 4; |
Adrian Hunter | 8c0f7b1 | 2011-10-03 14:36:07 +0300 | [diff] [blame] | 106 | } |
| 107 | |
| 108 | static int lnw_gpio_request(struct gpio_chip *chip, unsigned offset) |
| 109 | { |
| 110 | void __iomem *gafr = gpio_reg_2bit(chip, offset, GAFR); |
| 111 | u32 value = readl(gafr); |
| 112 | int shift = (offset % 16) << 1, af = (value >> shift) & 3; |
| 113 | |
| 114 | if (af) { |
| 115 | value &= ~(3 << shift); |
| 116 | writel(value, gafr); |
| 117 | } |
| 118 | return 0; |
| 119 | } |
| 120 | |
Alek Du | 8081c84 | 2010-05-26 14:42:25 -0700 | [diff] [blame] | 121 | static int lnw_gpio_get(struct gpio_chip *chip, unsigned offset) |
| 122 | { |
| 123 | void __iomem *gplr = gpio_reg(chip, offset, GPLR); |
| 124 | |
Alek Du | 8bf0261 | 2009-09-22 16:46:36 -0700 | [diff] [blame] | 125 | return readl(gplr) & BIT(offset % 32); |
| 126 | } |
| 127 | |
| 128 | static void lnw_gpio_set(struct gpio_chip *chip, unsigned offset, int value) |
| 129 | { |
Alek Du | 8bf0261 | 2009-09-22 16:46:36 -0700 | [diff] [blame] | 130 | void __iomem *gpsr, *gpcr; |
| 131 | |
| 132 | if (value) { |
Alek Du | 8081c84 | 2010-05-26 14:42:25 -0700 | [diff] [blame] | 133 | gpsr = gpio_reg(chip, offset, GPSR); |
Alek Du | 8bf0261 | 2009-09-22 16:46:36 -0700 | [diff] [blame] | 134 | writel(BIT(offset % 32), gpsr); |
| 135 | } else { |
Alek Du | 8081c84 | 2010-05-26 14:42:25 -0700 | [diff] [blame] | 136 | gpcr = gpio_reg(chip, offset, GPCR); |
Alek Du | 8bf0261 | 2009-09-22 16:46:36 -0700 | [diff] [blame] | 137 | writel(BIT(offset % 32), gpcr); |
| 138 | } |
| 139 | } |
| 140 | |
| 141 | static int lnw_gpio_direction_input(struct gpio_chip *chip, unsigned offset) |
| 142 | { |
David Cohen | 46ebfbc | 2012-12-20 14:45:51 -0800 | [diff] [blame] | 143 | struct lnw_gpio *lnw = to_lnw_priv(chip); |
Alek Du | 8081c84 | 2010-05-26 14:42:25 -0700 | [diff] [blame] | 144 | void __iomem *gpdr = gpio_reg(chip, offset, GPDR); |
Alek Du | 8bf0261 | 2009-09-22 16:46:36 -0700 | [diff] [blame] | 145 | u32 value; |
| 146 | unsigned long flags; |
Alek Du | 8bf0261 | 2009-09-22 16:46:36 -0700 | [diff] [blame] | 147 | |
Kristen Carlson Accardi | 7812803 | 2011-05-10 14:23:45 +0100 | [diff] [blame] | 148 | if (lnw->pdev) |
| 149 | pm_runtime_get(&lnw->pdev->dev); |
| 150 | |
Alek Du | 8bf0261 | 2009-09-22 16:46:36 -0700 | [diff] [blame] | 151 | spin_lock_irqsave(&lnw->lock, flags); |
| 152 | value = readl(gpdr); |
| 153 | value &= ~BIT(offset % 32); |
| 154 | writel(value, gpdr); |
| 155 | spin_unlock_irqrestore(&lnw->lock, flags); |
Kristen Carlson Accardi | 7812803 | 2011-05-10 14:23:45 +0100 | [diff] [blame] | 156 | |
| 157 | if (lnw->pdev) |
| 158 | pm_runtime_put(&lnw->pdev->dev); |
| 159 | |
Alek Du | 8bf0261 | 2009-09-22 16:46:36 -0700 | [diff] [blame] | 160 | return 0; |
| 161 | } |
| 162 | |
| 163 | static int lnw_gpio_direction_output(struct gpio_chip *chip, |
| 164 | unsigned offset, int value) |
| 165 | { |
David Cohen | 46ebfbc | 2012-12-20 14:45:51 -0800 | [diff] [blame] | 166 | struct lnw_gpio *lnw = to_lnw_priv(chip); |
Alek Du | 8081c84 | 2010-05-26 14:42:25 -0700 | [diff] [blame] | 167 | void __iomem *gpdr = gpio_reg(chip, offset, GPDR); |
Alek Du | 8bf0261 | 2009-09-22 16:46:36 -0700 | [diff] [blame] | 168 | unsigned long flags; |
Alek Du | 8bf0261 | 2009-09-22 16:46:36 -0700 | [diff] [blame] | 169 | |
| 170 | lnw_gpio_set(chip, offset, value); |
Kristen Carlson Accardi | 7812803 | 2011-05-10 14:23:45 +0100 | [diff] [blame] | 171 | |
| 172 | if (lnw->pdev) |
| 173 | pm_runtime_get(&lnw->pdev->dev); |
| 174 | |
Alek Du | 8bf0261 | 2009-09-22 16:46:36 -0700 | [diff] [blame] | 175 | spin_lock_irqsave(&lnw->lock, flags); |
| 176 | value = readl(gpdr); |
Justin P. Mattock | 6eab04a | 2011-04-08 19:49:08 -0700 | [diff] [blame] | 177 | value |= BIT(offset % 32); |
Alek Du | 8bf0261 | 2009-09-22 16:46:36 -0700 | [diff] [blame] | 178 | writel(value, gpdr); |
| 179 | spin_unlock_irqrestore(&lnw->lock, flags); |
Kristen Carlson Accardi | 7812803 | 2011-05-10 14:23:45 +0100 | [diff] [blame] | 180 | |
| 181 | if (lnw->pdev) |
| 182 | pm_runtime_put(&lnw->pdev->dev); |
| 183 | |
Alek Du | 8bf0261 | 2009-09-22 16:46:36 -0700 | [diff] [blame] | 184 | return 0; |
| 185 | } |
| 186 | |
| 187 | static int lnw_gpio_to_irq(struct gpio_chip *chip, unsigned offset) |
| 188 | { |
David Cohen | 46ebfbc | 2012-12-20 14:45:51 -0800 | [diff] [blame] | 189 | struct lnw_gpio *lnw = to_lnw_priv(chip); |
Mika Westerberg | 465f2bd | 2012-05-02 11:15:50 +0300 | [diff] [blame] | 190 | return irq_create_mapping(lnw->domain, offset); |
Alek Du | 8bf0261 | 2009-09-22 16:46:36 -0700 | [diff] [blame] | 191 | } |
| 192 | |
Lennert Buytenhek | 5ffd72c | 2011-01-12 17:00:13 -0800 | [diff] [blame] | 193 | static int lnw_irq_type(struct irq_data *d, unsigned type) |
Alek Du | 8bf0261 | 2009-09-22 16:46:36 -0700 | [diff] [blame] | 194 | { |
Lennert Buytenhek | 5ffd72c | 2011-01-12 17:00:13 -0800 | [diff] [blame] | 195 | struct lnw_gpio *lnw = irq_data_get_irq_chip_data(d); |
Mika Westerberg | 465f2bd | 2012-05-02 11:15:50 +0300 | [diff] [blame] | 196 | u32 gpio = irqd_to_hwirq(d); |
Alek Du | 8bf0261 | 2009-09-22 16:46:36 -0700 | [diff] [blame] | 197 | unsigned long flags; |
| 198 | u32 value; |
Alek Du | 8081c84 | 2010-05-26 14:42:25 -0700 | [diff] [blame] | 199 | void __iomem *grer = gpio_reg(&lnw->chip, gpio, GRER); |
| 200 | void __iomem *gfer = gpio_reg(&lnw->chip, gpio, GFER); |
Alek Du | 8bf0261 | 2009-09-22 16:46:36 -0700 | [diff] [blame] | 201 | |
Roel Kluin | 4efec62 | 2009-12-15 16:46:18 -0800 | [diff] [blame] | 202 | if (gpio >= lnw->chip.ngpio) |
Alek Du | 8bf0261 | 2009-09-22 16:46:36 -0700 | [diff] [blame] | 203 | return -EINVAL; |
Kristen Carlson Accardi | 7812803 | 2011-05-10 14:23:45 +0100 | [diff] [blame] | 204 | |
| 205 | if (lnw->pdev) |
| 206 | pm_runtime_get(&lnw->pdev->dev); |
| 207 | |
Alek Du | 8bf0261 | 2009-09-22 16:46:36 -0700 | [diff] [blame] | 208 | spin_lock_irqsave(&lnw->lock, flags); |
| 209 | if (type & IRQ_TYPE_EDGE_RISING) |
| 210 | value = readl(grer) | BIT(gpio % 32); |
| 211 | else |
| 212 | value = readl(grer) & (~BIT(gpio % 32)); |
| 213 | writel(value, grer); |
| 214 | |
| 215 | if (type & IRQ_TYPE_EDGE_FALLING) |
| 216 | value = readl(gfer) | BIT(gpio % 32); |
| 217 | else |
| 218 | value = readl(gfer) & (~BIT(gpio % 32)); |
| 219 | writel(value, gfer); |
| 220 | spin_unlock_irqrestore(&lnw->lock, flags); |
| 221 | |
Kristen Carlson Accardi | 7812803 | 2011-05-10 14:23:45 +0100 | [diff] [blame] | 222 | if (lnw->pdev) |
| 223 | pm_runtime_put(&lnw->pdev->dev); |
| 224 | |
Alek Du | 8bf0261 | 2009-09-22 16:46:36 -0700 | [diff] [blame] | 225 | return 0; |
Andrew Morton | fd0574c | 2010-10-27 15:33:22 -0700 | [diff] [blame] | 226 | } |
Alek Du | 8bf0261 | 2009-09-22 16:46:36 -0700 | [diff] [blame] | 227 | |
Lennert Buytenhek | 5ffd72c | 2011-01-12 17:00:13 -0800 | [diff] [blame] | 228 | static void lnw_irq_unmask(struct irq_data *d) |
Alek Du | 8bf0261 | 2009-09-22 16:46:36 -0700 | [diff] [blame] | 229 | { |
Andrew Morton | fd0574c | 2010-10-27 15:33:22 -0700 | [diff] [blame] | 230 | } |
Alek Du | 8bf0261 | 2009-09-22 16:46:36 -0700 | [diff] [blame] | 231 | |
Lennert Buytenhek | 5ffd72c | 2011-01-12 17:00:13 -0800 | [diff] [blame] | 232 | static void lnw_irq_mask(struct irq_data *d) |
Alek Du | 8bf0261 | 2009-09-22 16:46:36 -0700 | [diff] [blame] | 233 | { |
Andrew Morton | fd0574c | 2010-10-27 15:33:22 -0700 | [diff] [blame] | 234 | } |
Alek Du | 8bf0261 | 2009-09-22 16:46:36 -0700 | [diff] [blame] | 235 | |
| 236 | static struct irq_chip lnw_irqchip = { |
| 237 | .name = "LNW-GPIO", |
Lennert Buytenhek | 5ffd72c | 2011-01-12 17:00:13 -0800 | [diff] [blame] | 238 | .irq_mask = lnw_irq_mask, |
| 239 | .irq_unmask = lnw_irq_unmask, |
| 240 | .irq_set_type = lnw_irq_type, |
Alek Du | 8bf0261 | 2009-09-22 16:46:36 -0700 | [diff] [blame] | 241 | }; |
| 242 | |
David Cohen | d56d6b3 | 2013-10-04 13:01:40 -0700 | [diff] [blame] | 243 | static const struct lnw_gpio_ddata gpio_lincroft = { |
| 244 | .ngpio = 64, |
| 245 | }; |
| 246 | |
| 247 | static const struct lnw_gpio_ddata gpio_penwell_aon = { |
| 248 | .ngpio = 96, |
| 249 | .chip_irq_type = LNW_IRQ_TYPE_EDGE, |
| 250 | }; |
| 251 | |
| 252 | static const struct lnw_gpio_ddata gpio_penwell_core = { |
| 253 | .ngpio = 96, |
| 254 | .chip_irq_type = LNW_IRQ_TYPE_EDGE, |
| 255 | }; |
| 256 | |
| 257 | static const struct lnw_gpio_ddata gpio_cloverview_aon = { |
| 258 | .ngpio = 96, |
| 259 | .chip_irq_type = LNW_IRQ_TYPE_EDGE | LNW_IRQ_TYPE_LEVEL, |
| 260 | }; |
| 261 | |
| 262 | static const struct lnw_gpio_ddata gpio_cloverview_core = { |
| 263 | .ngpio = 96, |
| 264 | .chip_irq_type = LNW_IRQ_TYPE_EDGE, |
| 265 | }; |
| 266 | |
| 267 | static const struct lnw_gpio_ddata gpio_tangier = { |
| 268 | .ngpio = 192, |
| 269 | .gplr_offset = 4, |
| 270 | .flis_base = 0xff0c0000, |
| 271 | .flis_len = 0x8000, |
| 272 | .get_flis_offset = NULL, |
| 273 | .chip_irq_type = LNW_IRQ_TYPE_EDGE, |
| 274 | }; |
| 275 | |
| 276 | static DEFINE_PCI_DEVICE_TABLE(lnw_gpio_ids) = { |
| 277 | { |
| 278 | /* Lincroft */ |
| 279 | PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x080f), |
| 280 | .driver_data = (kernel_ulong_t)&gpio_lincroft, |
| 281 | }, |
| 282 | { |
| 283 | /* Penwell AON */ |
| 284 | PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x081f), |
| 285 | .driver_data = (kernel_ulong_t)&gpio_penwell_aon, |
| 286 | }, |
| 287 | { |
| 288 | /* Penwell Core */ |
| 289 | PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x081a), |
| 290 | .driver_data = (kernel_ulong_t)&gpio_penwell_core, |
| 291 | }, |
| 292 | { |
| 293 | /* Cloverview Aon */ |
| 294 | PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x08eb), |
| 295 | .driver_data = (kernel_ulong_t)&gpio_cloverview_aon, |
| 296 | }, |
| 297 | { |
| 298 | /* Cloverview Core */ |
| 299 | PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x08f7), |
| 300 | .driver_data = (kernel_ulong_t)&gpio_cloverview_core, |
| 301 | }, |
| 302 | { |
| 303 | /* Tangier */ |
| 304 | PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x1199), |
| 305 | .driver_data = (kernel_ulong_t)&gpio_tangier, |
| 306 | }, |
| 307 | { 0 } |
Alek Du | 8bf0261 | 2009-09-22 16:46:36 -0700 | [diff] [blame] | 308 | }; |
| 309 | MODULE_DEVICE_TABLE(pci, lnw_gpio_ids); |
| 310 | |
| 311 | static void lnw_irq_handler(unsigned irq, struct irq_desc *desc) |
| 312 | { |
Thomas Gleixner | 20e2aa9 | 2011-03-17 19:32:49 +0000 | [diff] [blame] | 313 | struct irq_data *data = irq_desc_get_irq_data(desc); |
| 314 | struct lnw_gpio *lnw = irq_data_get_irq_handler_data(data); |
| 315 | struct irq_chip *chip = irq_data_get_irq_chip(data); |
Thomas Gleixner | 84bead6 | 2011-03-17 19:32:58 +0000 | [diff] [blame] | 316 | u32 base, gpio, mask; |
Thomas Gleixner | 732063b | 2011-03-17 19:32:55 +0000 | [diff] [blame] | 317 | unsigned long pending; |
Alek Du | 8bf0261 | 2009-09-22 16:46:36 -0700 | [diff] [blame] | 318 | void __iomem *gedr; |
Alek Du | 8bf0261 | 2009-09-22 16:46:36 -0700 | [diff] [blame] | 319 | |
| 320 | /* check GPIO controller to check which pin triggered the interrupt */ |
Alek Du | 8081c84 | 2010-05-26 14:42:25 -0700 | [diff] [blame] | 321 | for (base = 0; base < lnw->chip.ngpio; base += 32) { |
| 322 | gedr = gpio_reg(&lnw->chip, base, GEDR); |
Mika Westerberg | c8f925b | 2012-05-10 13:01:22 +0300 | [diff] [blame] | 323 | while ((pending = readl(gedr))) { |
Mathias Nyman | 2345b20 | 2011-07-08 10:02:18 +0100 | [diff] [blame] | 324 | gpio = __ffs(pending); |
Thomas Gleixner | 84bead6 | 2011-03-17 19:32:58 +0000 | [diff] [blame] | 325 | mask = BIT(gpio); |
Thomas Gleixner | 84bead6 | 2011-03-17 19:32:58 +0000 | [diff] [blame] | 326 | /* Clear before handling so we can't lose an edge */ |
| 327 | writel(mask, gedr); |
Mika Westerberg | 465f2bd | 2012-05-02 11:15:50 +0300 | [diff] [blame] | 328 | generic_handle_irq(irq_find_mapping(lnw->domain, |
| 329 | base + gpio)); |
Thomas Gleixner | 732063b | 2011-03-17 19:32:55 +0000 | [diff] [blame] | 330 | } |
Alek Du | 8bf0261 | 2009-09-22 16:46:36 -0700 | [diff] [blame] | 331 | } |
Feng Tang | 0766d20 | 2011-01-25 15:07:15 -0800 | [diff] [blame] | 332 | |
Thomas Gleixner | 20e2aa9 | 2011-03-17 19:32:49 +0000 | [diff] [blame] | 333 | chip->irq_eoi(data); |
Alek Du | 8bf0261 | 2009-09-22 16:46:36 -0700 | [diff] [blame] | 334 | } |
| 335 | |
Mika Westerberg | f5f9311 | 2012-04-05 12:15:17 +0300 | [diff] [blame] | 336 | static void lnw_irq_init_hw(struct lnw_gpio *lnw) |
| 337 | { |
| 338 | void __iomem *reg; |
| 339 | unsigned base; |
| 340 | |
| 341 | for (base = 0; base < lnw->chip.ngpio; base += 32) { |
| 342 | /* Clear the rising-edge detect register */ |
| 343 | reg = gpio_reg(&lnw->chip, base, GRER); |
| 344 | writel(0, reg); |
| 345 | /* Clear the falling-edge detect register */ |
| 346 | reg = gpio_reg(&lnw->chip, base, GFER); |
| 347 | writel(0, reg); |
| 348 | /* Clear the edge detect status register */ |
| 349 | reg = gpio_reg(&lnw->chip, base, GEDR); |
| 350 | writel(~0, reg); |
| 351 | } |
| 352 | } |
| 353 | |
Mika Westerberg | 465f2bd | 2012-05-02 11:15:50 +0300 | [diff] [blame] | 354 | static int lnw_gpio_irq_map(struct irq_domain *d, unsigned int virq, |
| 355 | irq_hw_number_t hw) |
| 356 | { |
| 357 | struct lnw_gpio *lnw = d->host_data; |
| 358 | |
| 359 | irq_set_chip_and_handler_name(virq, &lnw_irqchip, handle_simple_irq, |
| 360 | "demux"); |
| 361 | irq_set_chip_data(virq, lnw); |
| 362 | irq_set_irq_type(virq, IRQ_TYPE_NONE); |
| 363 | |
| 364 | return 0; |
| 365 | } |
| 366 | |
| 367 | static const struct irq_domain_ops lnw_gpio_irq_ops = { |
| 368 | .map = lnw_gpio_irq_map, |
| 369 | .xlate = irq_domain_xlate_twocell, |
| 370 | }; |
| 371 | |
Kristen Carlson Accardi | 7812803 | 2011-05-10 14:23:45 +0100 | [diff] [blame] | 372 | static int lnw_gpio_runtime_idle(struct device *dev) |
| 373 | { |
Rafael J. Wysocki | 45f0a85 | 2013-06-03 21:49:52 +0200 | [diff] [blame] | 374 | pm_schedule_suspend(dev, 500); |
Kristen Carlson Accardi | 7812803 | 2011-05-10 14:23:45 +0100 | [diff] [blame] | 375 | return -EBUSY; |
| 376 | } |
| 377 | |
Kristen Carlson Accardi | 7812803 | 2011-05-10 14:23:45 +0100 | [diff] [blame] | 378 | static const struct dev_pm_ops lnw_gpio_pm_ops = { |
David Cohen | 46ebfbc | 2012-12-20 14:45:51 -0800 | [diff] [blame] | 379 | SET_RUNTIME_PM_OPS(NULL, NULL, lnw_gpio_runtime_idle) |
Kristen Carlson Accardi | 7812803 | 2011-05-10 14:23:45 +0100 | [diff] [blame] | 380 | }; |
| 381 | |
Bill Pemberton | 3836309 | 2012-11-19 13:22:34 -0500 | [diff] [blame] | 382 | static int lnw_gpio_probe(struct pci_dev *pdev, |
Andy Shevchenko | 64c8cbc | 2013-05-22 13:20:11 +0300 | [diff] [blame] | 383 | const struct pci_device_id *id) |
Alek Du | 8bf0261 | 2009-09-22 16:46:36 -0700 | [diff] [blame] | 384 | { |
Andy Shevchenko | 64c8cbc | 2013-05-22 13:20:11 +0300 | [diff] [blame] | 385 | void __iomem *base; |
Alek Du | 8bf0261 | 2009-09-22 16:46:36 -0700 | [diff] [blame] | 386 | struct lnw_gpio *lnw; |
Alek Du | 8bf0261 | 2009-09-22 16:46:36 -0700 | [diff] [blame] | 387 | u32 gpio_base; |
David Cohen | 2519f9a | 2013-05-06 16:11:03 -0700 | [diff] [blame] | 388 | u32 irq_base; |
Julia Lawall | d6a2b7b | 2012-08-05 11:52:34 +0200 | [diff] [blame] | 389 | int retval; |
David Cohen | d56d6b3 | 2013-10-04 13:01:40 -0700 | [diff] [blame] | 390 | struct lnw_gpio_ddata *ddata = (struct lnw_gpio_ddata *)id->driver_data; |
Alek Du | 8bf0261 | 2009-09-22 16:46:36 -0700 | [diff] [blame] | 391 | |
Andy Shevchenko | 786e07e | 2013-05-22 13:20:12 +0300 | [diff] [blame] | 392 | retval = pcim_enable_device(pdev); |
Alek Du | 8bf0261 | 2009-09-22 16:46:36 -0700 | [diff] [blame] | 393 | if (retval) |
Mika Westerberg | 8302c74 | 2012-04-05 12:15:15 +0300 | [diff] [blame] | 394 | return retval; |
Alek Du | 8bf0261 | 2009-09-22 16:46:36 -0700 | [diff] [blame] | 395 | |
Andy Shevchenko | 786e07e | 2013-05-22 13:20:12 +0300 | [diff] [blame] | 396 | retval = pcim_iomap_regions(pdev, 1 << 0 | 1 << 1, pci_name(pdev)); |
Alek Du | 8bf0261 | 2009-09-22 16:46:36 -0700 | [diff] [blame] | 397 | if (retval) { |
Andy Shevchenko | 786e07e | 2013-05-22 13:20:12 +0300 | [diff] [blame] | 398 | dev_err(&pdev->dev, "I/O memory mapping error\n"); |
| 399 | return retval; |
Alek Du | 8bf0261 | 2009-09-22 16:46:36 -0700 | [diff] [blame] | 400 | } |
Andy Shevchenko | 786e07e | 2013-05-22 13:20:12 +0300 | [diff] [blame] | 401 | |
| 402 | base = pcim_iomap_table(pdev)[1]; |
Andy Shevchenko | 64c8cbc | 2013-05-22 13:20:11 +0300 | [diff] [blame] | 403 | |
| 404 | irq_base = readl(base); |
| 405 | gpio_base = readl(sizeof(u32) + base); |
| 406 | |
Alek Du | 8bf0261 | 2009-09-22 16:46:36 -0700 | [diff] [blame] | 407 | /* release the IO mapping, since we already get the info from bar1 */ |
Andy Shevchenko | 786e07e | 2013-05-22 13:20:12 +0300 | [diff] [blame] | 408 | pcim_iounmap_regions(pdev, 1 << 1); |
Alek Du | 8bf0261 | 2009-09-22 16:46:36 -0700 | [diff] [blame] | 409 | |
David Cohen | 46ebfbc | 2012-12-20 14:45:51 -0800 | [diff] [blame] | 410 | lnw = devm_kzalloc(&pdev->dev, sizeof(*lnw), GFP_KERNEL); |
Alek Du | 8bf0261 | 2009-09-22 16:46:36 -0700 | [diff] [blame] | 411 | if (!lnw) { |
Andy Shevchenko | 8aca119 | 2013-05-22 13:20:13 +0300 | [diff] [blame] | 412 | dev_err(&pdev->dev, "can't allocate chip data\n"); |
Andy Shevchenko | 786e07e | 2013-05-22 13:20:12 +0300 | [diff] [blame] | 413 | return -ENOMEM; |
Alek Du | 8bf0261 | 2009-09-22 16:46:36 -0700 | [diff] [blame] | 414 | } |
Mika Westerberg | b3e35af | 2012-04-05 12:15:16 +0300 | [diff] [blame] | 415 | |
Andy Shevchenko | 786e07e | 2013-05-22 13:20:12 +0300 | [diff] [blame] | 416 | lnw->reg_base = pcim_iomap_table(pdev)[0]; |
Alek Du | 8bf0261 | 2009-09-22 16:46:36 -0700 | [diff] [blame] | 417 | lnw->chip.label = dev_name(&pdev->dev); |
Adrian Hunter | 8c0f7b1 | 2011-10-03 14:36:07 +0300 | [diff] [blame] | 418 | lnw->chip.request = lnw_gpio_request; |
Alek Du | 8bf0261 | 2009-09-22 16:46:36 -0700 | [diff] [blame] | 419 | lnw->chip.direction_input = lnw_gpio_direction_input; |
| 420 | lnw->chip.direction_output = lnw_gpio_direction_output; |
| 421 | lnw->chip.get = lnw_gpio_get; |
| 422 | lnw->chip.set = lnw_gpio_set; |
| 423 | lnw->chip.to_irq = lnw_gpio_to_irq; |
| 424 | lnw->chip.base = gpio_base; |
David Cohen | d56d6b3 | 2013-10-04 13:01:40 -0700 | [diff] [blame] | 425 | lnw->chip.ngpio = ddata->ngpio; |
Alek Du | 8bf0261 | 2009-09-22 16:46:36 -0700 | [diff] [blame] | 426 | lnw->chip.can_sleep = 0; |
Kristen Carlson Accardi | 7812803 | 2011-05-10 14:23:45 +0100 | [diff] [blame] | 427 | lnw->pdev = pdev; |
David Cohen | 2519f9a | 2013-05-06 16:11:03 -0700 | [diff] [blame] | 428 | |
Andy Shevchenko | aeb168f | 2013-05-22 13:20:10 +0300 | [diff] [blame] | 429 | spin_lock_init(&lnw->lock); |
| 430 | |
David Cohen | d56d6b3 | 2013-10-04 13:01:40 -0700 | [diff] [blame] | 431 | lnw->domain = irq_domain_add_simple(pdev->dev.of_node, ddata->ngpio, |
| 432 | irq_base, &lnw_gpio_irq_ops, lnw); |
Andy Shevchenko | 786e07e | 2013-05-22 13:20:12 +0300 | [diff] [blame] | 433 | if (!lnw->domain) |
| 434 | return -ENOMEM; |
David Cohen | 2519f9a | 2013-05-06 16:11:03 -0700 | [diff] [blame] | 435 | |
Alek Du | 8bf0261 | 2009-09-22 16:46:36 -0700 | [diff] [blame] | 436 | pci_set_drvdata(pdev, lnw); |
| 437 | retval = gpiochip_add(&lnw->chip); |
| 438 | if (retval) { |
Andy Shevchenko | 8aca119 | 2013-05-22 13:20:13 +0300 | [diff] [blame] | 439 | dev_err(&pdev->dev, "gpiochip_add error %d\n", retval); |
Andy Shevchenko | 786e07e | 2013-05-22 13:20:12 +0300 | [diff] [blame] | 440 | return retval; |
Alek Du | 8bf0261 | 2009-09-22 16:46:36 -0700 | [diff] [blame] | 441 | } |
Mika Westerberg | f5f9311 | 2012-04-05 12:15:17 +0300 | [diff] [blame] | 442 | |
| 443 | lnw_irq_init_hw(lnw); |
| 444 | |
Thomas Gleixner | 674db90 | 2011-03-17 19:32:52 +0000 | [diff] [blame] | 445 | irq_set_handler_data(pdev->irq, lnw); |
| 446 | irq_set_chained_handler(pdev->irq, lnw_irq_handler); |
Alek Du | 8bf0261 | 2009-09-22 16:46:36 -0700 | [diff] [blame] | 447 | |
Kristen Carlson Accardi | 7812803 | 2011-05-10 14:23:45 +0100 | [diff] [blame] | 448 | pm_runtime_put_noidle(&pdev->dev); |
| 449 | pm_runtime_allow(&pdev->dev); |
| 450 | |
Mika Westerberg | 8302c74 | 2012-04-05 12:15:15 +0300 | [diff] [blame] | 451 | return 0; |
Alek Du | 8bf0261 | 2009-09-22 16:46:36 -0700 | [diff] [blame] | 452 | } |
| 453 | |
| 454 | static struct pci_driver lnw_gpio_driver = { |
| 455 | .name = "langwell_gpio", |
| 456 | .id_table = lnw_gpio_ids, |
| 457 | .probe = lnw_gpio_probe, |
Kristen Carlson Accardi | 7812803 | 2011-05-10 14:23:45 +0100 | [diff] [blame] | 458 | .driver = { |
| 459 | .pm = &lnw_gpio_pm_ops, |
| 460 | }, |
Alek Du | 8bf0261 | 2009-09-22 16:46:36 -0700 | [diff] [blame] | 461 | }; |
| 462 | |
| 463 | static int __init lnw_gpio_init(void) |
| 464 | { |
Andy Shevchenko | 10b20a9 | 2013-06-17 16:57:06 +0300 | [diff] [blame] | 465 | return pci_register_driver(&lnw_gpio_driver); |
Alek Du | 8bf0261 | 2009-09-22 16:46:36 -0700 | [diff] [blame] | 466 | } |
| 467 | |
| 468 | device_initcall(lnw_gpio_init); |