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Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001/*
2 * Copyright (C) 2008
3 * Guennadi Liakhovetski, DENX Software Engineering, <lg@denx.de>
4 *
5 * Copyright 2004-2007 Freescale Semiconductor, Inc. All Rights Reserved.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#include <linux/module.h>
13#include <linux/kernel.h>
14#include <linux/platform_device.h>
15#include <linux/sched.h>
16#include <linux/errno.h>
17#include <linux/string.h>
18#include <linux/interrupt.h>
19#include <linux/slab.h>
20#include <linux/fb.h>
21#include <linux/delay.h>
22#include <linux/init.h>
23#include <linux/ioport.h>
24#include <linux/dma-mapping.h>
25#include <linux/dmaengine.h>
26#include <linux/console.h>
27#include <linux/clk.h>
28#include <linux/mutex.h>
29
Sascha Hauer1b346af2010-08-16 08:03:04 +020030#include <mach/dma.h>
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -070031#include <mach/hardware.h>
32#include <mach/ipu.h>
33#include <mach/mx3fb.h>
34
35#include <asm/io.h>
36#include <asm/uaccess.h>
37
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +010038#define MX3FB_NAME "mx3_sdc_fb"
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -070039
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +010040#define MX3FB_REG_OFFSET 0xB4
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -070041
42/* SDC Registers */
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +010043#define SDC_COM_CONF (0xB4 - MX3FB_REG_OFFSET)
44#define SDC_GW_CTRL (0xB8 - MX3FB_REG_OFFSET)
45#define SDC_FG_POS (0xBC - MX3FB_REG_OFFSET)
46#define SDC_BG_POS (0xC0 - MX3FB_REG_OFFSET)
47#define SDC_CUR_POS (0xC4 - MX3FB_REG_OFFSET)
48#define SDC_PWM_CTRL (0xC8 - MX3FB_REG_OFFSET)
49#define SDC_CUR_MAP (0xCC - MX3FB_REG_OFFSET)
50#define SDC_HOR_CONF (0xD0 - MX3FB_REG_OFFSET)
51#define SDC_VER_CONF (0xD4 - MX3FB_REG_OFFSET)
52#define SDC_SHARP_CONF_1 (0xD8 - MX3FB_REG_OFFSET)
53#define SDC_SHARP_CONF_2 (0xDC - MX3FB_REG_OFFSET)
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -070054
55/* Register bits */
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +010056#define SDC_COM_TFT_COLOR 0x00000001UL
57#define SDC_COM_FG_EN 0x00000010UL
58#define SDC_COM_GWSEL 0x00000020UL
59#define SDC_COM_GLB_A 0x00000040UL
60#define SDC_COM_KEY_COLOR_G 0x00000080UL
61#define SDC_COM_BG_EN 0x00000200UL
62#define SDC_COM_SHARP 0x00001000UL
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -070063
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +010064#define SDC_V_SYNC_WIDTH_L 0x00000001UL
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -070065
66/* Display Interface registers */
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +010067#define DI_DISP_IF_CONF (0x0124 - MX3FB_REG_OFFSET)
68#define DI_DISP_SIG_POL (0x0128 - MX3FB_REG_OFFSET)
69#define DI_SER_DISP1_CONF (0x012C - MX3FB_REG_OFFSET)
70#define DI_SER_DISP2_CONF (0x0130 - MX3FB_REG_OFFSET)
71#define DI_HSP_CLK_PER (0x0134 - MX3FB_REG_OFFSET)
72#define DI_DISP0_TIME_CONF_1 (0x0138 - MX3FB_REG_OFFSET)
73#define DI_DISP0_TIME_CONF_2 (0x013C - MX3FB_REG_OFFSET)
74#define DI_DISP0_TIME_CONF_3 (0x0140 - MX3FB_REG_OFFSET)
75#define DI_DISP1_TIME_CONF_1 (0x0144 - MX3FB_REG_OFFSET)
76#define DI_DISP1_TIME_CONF_2 (0x0148 - MX3FB_REG_OFFSET)
77#define DI_DISP1_TIME_CONF_3 (0x014C - MX3FB_REG_OFFSET)
78#define DI_DISP2_TIME_CONF_1 (0x0150 - MX3FB_REG_OFFSET)
79#define DI_DISP2_TIME_CONF_2 (0x0154 - MX3FB_REG_OFFSET)
80#define DI_DISP2_TIME_CONF_3 (0x0158 - MX3FB_REG_OFFSET)
81#define DI_DISP3_TIME_CONF (0x015C - MX3FB_REG_OFFSET)
82#define DI_DISP0_DB0_MAP (0x0160 - MX3FB_REG_OFFSET)
83#define DI_DISP0_DB1_MAP (0x0164 - MX3FB_REG_OFFSET)
84#define DI_DISP0_DB2_MAP (0x0168 - MX3FB_REG_OFFSET)
85#define DI_DISP0_CB0_MAP (0x016C - MX3FB_REG_OFFSET)
86#define DI_DISP0_CB1_MAP (0x0170 - MX3FB_REG_OFFSET)
87#define DI_DISP0_CB2_MAP (0x0174 - MX3FB_REG_OFFSET)
88#define DI_DISP1_DB0_MAP (0x0178 - MX3FB_REG_OFFSET)
89#define DI_DISP1_DB1_MAP (0x017C - MX3FB_REG_OFFSET)
90#define DI_DISP1_DB2_MAP (0x0180 - MX3FB_REG_OFFSET)
91#define DI_DISP1_CB0_MAP (0x0184 - MX3FB_REG_OFFSET)
92#define DI_DISP1_CB1_MAP (0x0188 - MX3FB_REG_OFFSET)
93#define DI_DISP1_CB2_MAP (0x018C - MX3FB_REG_OFFSET)
94#define DI_DISP2_DB0_MAP (0x0190 - MX3FB_REG_OFFSET)
95#define DI_DISP2_DB1_MAP (0x0194 - MX3FB_REG_OFFSET)
96#define DI_DISP2_DB2_MAP (0x0198 - MX3FB_REG_OFFSET)
97#define DI_DISP2_CB0_MAP (0x019C - MX3FB_REG_OFFSET)
98#define DI_DISP2_CB1_MAP (0x01A0 - MX3FB_REG_OFFSET)
99#define DI_DISP2_CB2_MAP (0x01A4 - MX3FB_REG_OFFSET)
100#define DI_DISP3_B0_MAP (0x01A8 - MX3FB_REG_OFFSET)
101#define DI_DISP3_B1_MAP (0x01AC - MX3FB_REG_OFFSET)
102#define DI_DISP3_B2_MAP (0x01B0 - MX3FB_REG_OFFSET)
103#define DI_DISP_ACC_CC (0x01B4 - MX3FB_REG_OFFSET)
104#define DI_DISP_LLA_CONF (0x01B8 - MX3FB_REG_OFFSET)
105#define DI_DISP_LLA_DATA (0x01BC - MX3FB_REG_OFFSET)
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700106
107/* DI_DISP_SIG_POL bits */
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100108#define DI_D3_VSYNC_POL_SHIFT 28
109#define DI_D3_HSYNC_POL_SHIFT 27
110#define DI_D3_DRDY_SHARP_POL_SHIFT 26
111#define DI_D3_CLK_POL_SHIFT 25
112#define DI_D3_DATA_POL_SHIFT 24
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700113
114/* DI_DISP_IF_CONF bits */
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100115#define DI_D3_CLK_IDLE_SHIFT 26
116#define DI_D3_CLK_SEL_SHIFT 25
117#define DI_D3_DATAMSK_SHIFT 24
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700118
119enum ipu_panel {
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100120 IPU_PANEL_SHARP_TFT,
121 IPU_PANEL_TFT,
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700122};
123
124struct ipu_di_signal_cfg {
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100125 unsigned datamask_en:1;
126 unsigned clksel_en:1;
127 unsigned clkidle_en:1;
128 unsigned data_pol:1; /* true = inverted */
129 unsigned clk_pol:1; /* true = rising edge */
130 unsigned enable_pol:1;
131 unsigned Hsync_pol:1; /* true = active high */
132 unsigned Vsync_pol:1;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700133};
134
135static const struct fb_videomode mx3fb_modedb[] = {
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100136 {
137 /* 240x320 @ 60 Hz */
138 .name = "Sharp-QVGA",
139 .refresh = 60,
140 .xres = 240,
141 .yres = 320,
142 .pixclock = 185925,
143 .left_margin = 9,
144 .right_margin = 16,
145 .upper_margin = 7,
146 .lower_margin = 9,
147 .hsync_len = 1,
148 .vsync_len = 1,
149 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_SHARP_MODE |
150 FB_SYNC_CLK_INVERT | FB_SYNC_DATA_INVERT |
151 FB_SYNC_CLK_IDLE_EN,
152 .vmode = FB_VMODE_NONINTERLACED,
153 .flag = 0,
154 }, {
155 /* 240x33 @ 60 Hz */
156 .name = "Sharp-CLI",
157 .refresh = 60,
158 .xres = 240,
159 .yres = 33,
160 .pixclock = 185925,
161 .left_margin = 9,
162 .right_margin = 16,
163 .upper_margin = 7,
164 .lower_margin = 9 + 287,
165 .hsync_len = 1,
166 .vsync_len = 1,
167 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_SHARP_MODE |
168 FB_SYNC_CLK_INVERT | FB_SYNC_DATA_INVERT |
169 FB_SYNC_CLK_IDLE_EN,
170 .vmode = FB_VMODE_NONINTERLACED,
171 .flag = 0,
172 }, {
173 /* 640x480 @ 60 Hz */
174 .name = "NEC-VGA",
175 .refresh = 60,
176 .xres = 640,
177 .yres = 480,
178 .pixclock = 38255,
179 .left_margin = 144,
180 .right_margin = 0,
181 .upper_margin = 34,
182 .lower_margin = 40,
183 .hsync_len = 1,
184 .vsync_len = 1,
185 .sync = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_OE_ACT_HIGH,
186 .vmode = FB_VMODE_NONINTERLACED,
187 .flag = 0,
188 }, {
189 /* NTSC TV output */
190 .name = "TV-NTSC",
191 .refresh = 60,
192 .xres = 640,
193 .yres = 480,
194 .pixclock = 37538,
195 .left_margin = 38,
196 .right_margin = 858 - 640 - 38 - 3,
197 .upper_margin = 36,
198 .lower_margin = 518 - 480 - 36 - 1,
199 .hsync_len = 3,
200 .vsync_len = 1,
201 .sync = 0,
202 .vmode = FB_VMODE_NONINTERLACED,
203 .flag = 0,
204 }, {
205 /* PAL TV output */
206 .name = "TV-PAL",
207 .refresh = 50,
208 .xres = 640,
209 .yres = 480,
210 .pixclock = 37538,
211 .left_margin = 38,
212 .right_margin = 960 - 640 - 38 - 32,
213 .upper_margin = 32,
214 .lower_margin = 555 - 480 - 32 - 3,
215 .hsync_len = 32,
216 .vsync_len = 3,
217 .sync = 0,
218 .vmode = FB_VMODE_NONINTERLACED,
219 .flag = 0,
220 }, {
221 /* TV output VGA mode, 640x480 @ 65 Hz */
222 .name = "TV-VGA",
223 .refresh = 60,
224 .xres = 640,
225 .yres = 480,
226 .pixclock = 40574,
227 .left_margin = 35,
228 .right_margin = 45,
229 .upper_margin = 9,
230 .lower_margin = 1,
231 .hsync_len = 46,
232 .vsync_len = 5,
233 .sync = 0,
234 .vmode = FB_VMODE_NONINTERLACED,
235 .flag = 0,
236 },
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700237};
238
239struct mx3fb_data {
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100240 struct fb_info *fbi;
241 int backlight_level;
242 void __iomem *reg_base;
243 spinlock_t lock;
244 struct device *dev;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700245
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100246 uint32_t h_start_width;
247 uint32_t v_start_width;
Sascha Hauerf910fb82011-12-01 14:58:52 +0100248 enum disp_data_mapping disp_data_fmt;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700249};
250
251struct dma_chan_request {
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100252 struct mx3fb_data *mx3fb;
253 enum ipu_channel id;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700254};
255
256/* MX3 specific framebuffer information. */
257struct mx3fb_info {
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100258 int blank;
259 enum ipu_channel ipu_ch;
260 uint32_t cur_ipu_buf;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700261
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100262 u32 pseudo_palette[16];
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700263
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100264 struct completion flip_cmpl;
265 struct mutex mutex; /* Protects fb-ops */
266 struct mx3fb_data *mx3fb;
267 struct idmac_channel *idmac_channel;
268 struct dma_async_tx_descriptor *txd;
269 dma_cookie_t cookie;
270 struct scatterlist sg[2];
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700271
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100272 u32 sync; /* preserve var->sync flags */
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700273};
274
275static void mx3fb_dma_done(void *);
276
277/* Used fb-mode and bpp. Can be set on kernel command line, therefore file-static. */
278static const char *fb_mode;
279static unsigned long default_bpp = 16;
280
281static u32 mx3fb_read_reg(struct mx3fb_data *mx3fb, unsigned long reg)
282{
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100283 return __raw_readl(mx3fb->reg_base + reg);
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700284}
285
286static void mx3fb_write_reg(struct mx3fb_data *mx3fb, u32 value, unsigned long reg)
287{
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100288 __raw_writel(value, mx3fb->reg_base + reg);
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700289}
290
Sascha Hauerf910fb82011-12-01 14:58:52 +0100291struct di_mapping {
292 uint32_t b0, b1, b2;
293};
294
295static const struct di_mapping di_mappings[] = {
296 [IPU_DISP_DATA_MAPPING_RGB666] = { 0x0005000f, 0x000b000f, 0x0011000f },
297 [IPU_DISP_DATA_MAPPING_RGB565] = { 0x0004003f, 0x000a000f, 0x000f003f },
298 [IPU_DISP_DATA_MAPPING_RGB888] = { 0x00070000, 0x000f0000, 0x00170000 },
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700299};
300
301static void sdc_fb_init(struct mx3fb_info *fbi)
302{
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100303 struct mx3fb_data *mx3fb = fbi->mx3fb;
304 uint32_t reg;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700305
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100306 reg = mx3fb_read_reg(mx3fb, SDC_COM_CONF);
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700307
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100308 mx3fb_write_reg(mx3fb, reg | SDC_COM_BG_EN, SDC_COM_CONF);
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700309}
310
311/* Returns enabled flag before uninit */
312static uint32_t sdc_fb_uninit(struct mx3fb_info *fbi)
313{
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100314 struct mx3fb_data *mx3fb = fbi->mx3fb;
315 uint32_t reg;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700316
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100317 reg = mx3fb_read_reg(mx3fb, SDC_COM_CONF);
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700318
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100319 mx3fb_write_reg(mx3fb, reg & ~SDC_COM_BG_EN, SDC_COM_CONF);
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700320
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100321 return reg & SDC_COM_BG_EN;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700322}
323
324static void sdc_enable_channel(struct mx3fb_info *mx3_fbi)
325{
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100326 struct mx3fb_data *mx3fb = mx3_fbi->mx3fb;
327 struct idmac_channel *ichan = mx3_fbi->idmac_channel;
328 struct dma_chan *dma_chan = &ichan->dma_chan;
329 unsigned long flags;
330 dma_cookie_t cookie;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700331
Alberto Panizzob3cb5372010-02-02 13:43:59 -0800332 if (mx3_fbi->txd)
333 dev_dbg(mx3fb->dev, "mx3fbi %p, desc %p, sg %p\n", mx3_fbi,
334 to_tx_desc(mx3_fbi->txd), to_tx_desc(mx3_fbi->txd)->sg);
335 else
336 dev_dbg(mx3fb->dev, "mx3fbi %p, txd = NULL\n", mx3_fbi);
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700337
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100338 /* This enables the channel */
339 if (mx3_fbi->cookie < 0) {
340 mx3_fbi->txd = dma_chan->device->device_prep_slave_sg(dma_chan,
Vinod Koul1003cab2011-10-14 10:39:23 +0530341 &mx3_fbi->sg[0], 1, DMA_MEM_TO_DEV, DMA_PREP_INTERRUPT);
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100342 if (!mx3_fbi->txd) {
343 dev_err(mx3fb->dev, "Cannot allocate descriptor on %d\n",
344 dma_chan->chan_id);
345 return;
346 }
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700347
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100348 mx3_fbi->txd->callback_param = mx3_fbi->txd;
349 mx3_fbi->txd->callback = mx3fb_dma_done;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700350
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100351 cookie = mx3_fbi->txd->tx_submit(mx3_fbi->txd);
352 dev_dbg(mx3fb->dev, "%d: Submit %p #%d [%c]\n", __LINE__,
353 mx3_fbi->txd, cookie, list_empty(&ichan->queue) ? '-' : '+');
354 } else {
355 if (!mx3_fbi->txd || !mx3_fbi->txd->tx_submit) {
356 dev_err(mx3fb->dev, "Cannot enable channel %d\n",
357 dma_chan->chan_id);
358 return;
359 }
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700360
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100361 /* Just re-activate the same buffer */
362 dma_async_issue_pending(dma_chan);
363 cookie = mx3_fbi->cookie;
364 dev_dbg(mx3fb->dev, "%d: Re-submit %p #%d [%c]\n", __LINE__,
365 mx3_fbi->txd, cookie, list_empty(&ichan->queue) ? '-' : '+');
366 }
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700367
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100368 if (cookie >= 0) {
369 spin_lock_irqsave(&mx3fb->lock, flags);
370 sdc_fb_init(mx3_fbi);
371 mx3_fbi->cookie = cookie;
372 spin_unlock_irqrestore(&mx3fb->lock, flags);
373 }
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700374
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100375 /*
376 * Attention! Without this msleep the channel keeps generating
377 * interrupts. Next sdc_set_brightness() is going to be called
378 * from mx3fb_blank().
379 */
380 msleep(2);
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700381}
382
383static void sdc_disable_channel(struct mx3fb_info *mx3_fbi)
384{
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100385 struct mx3fb_data *mx3fb = mx3_fbi->mx3fb;
386 uint32_t enabled;
387 unsigned long flags;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700388
Wolfram Stering8b53b7f2011-09-23 14:09:35 +0200389 if (mx3_fbi->txd == NULL)
390 return;
391
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100392 spin_lock_irqsave(&mx3fb->lock, flags);
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700393
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100394 enabled = sdc_fb_uninit(mx3_fbi);
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700395
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100396 spin_unlock_irqrestore(&mx3fb->lock, flags);
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700397
Linus Walleijc3635c72010-03-26 16:44:01 -0700398 mx3_fbi->txd->chan->device->device_control(mx3_fbi->txd->chan,
Linus Walleij05827632010-05-17 16:30:42 -0700399 DMA_TERMINATE_ALL, 0);
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100400 mx3_fbi->txd = NULL;
401 mx3_fbi->cookie = -EINVAL;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700402}
403
404/**
405 * sdc_set_window_pos() - set window position of the respective plane.
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100406 * @mx3fb: mx3fb context.
407 * @channel: IPU DMAC channel ID.
408 * @x_pos: X coordinate relative to the top left corner to place window at.
409 * @y_pos: Y coordinate relative to the top left corner to place window at.
410 * @return: 0 on success or negative error code on failure.
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700411 */
412static int sdc_set_window_pos(struct mx3fb_data *mx3fb, enum ipu_channel channel,
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100413 int16_t x_pos, int16_t y_pos)
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700414{
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100415 if (channel != IDMAC_SDC_0)
416 return -EINVAL;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700417
Guennadi Liakhovetskid88ca8152009-04-06 19:01:05 -0700418 x_pos += mx3fb->h_start_width;
419 y_pos += mx3fb->v_start_width;
420
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100421 mx3fb_write_reg(mx3fb, (x_pos << 16) | y_pos, SDC_BG_POS);
422 return 0;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700423}
424
425/**
426 * sdc_init_panel() - initialize a synchronous LCD panel.
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100427 * @mx3fb: mx3fb context.
428 * @panel: panel type.
429 * @pixel_clk: desired pixel clock frequency in Hz.
430 * @width: width of panel in pixels.
431 * @height: height of panel in pixels.
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100432 * @h_start_width: number of pixel clocks between the HSYNC signal pulse
433 * and the start of valid data.
434 * @h_sync_width: width of the HSYNC signal in units of pixel clocks.
435 * @h_end_width: number of pixel clocks between the end of valid data
436 * and the HSYNC signal for next line.
437 * @v_start_width: number of lines between the VSYNC signal pulse and the
438 * start of valid data.
439 * @v_sync_width: width of the VSYNC signal in units of lines
440 * @v_end_width: number of lines between the end of valid data and the
441 * VSYNC signal for next frame.
442 * @sig: bitfield of signal polarities for LCD interface.
443 * @return: 0 on success or negative error code on failure.
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700444 */
445static int sdc_init_panel(struct mx3fb_data *mx3fb, enum ipu_panel panel,
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100446 uint32_t pixel_clk,
447 uint16_t width, uint16_t height,
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100448 uint16_t h_start_width, uint16_t h_sync_width,
449 uint16_t h_end_width, uint16_t v_start_width,
450 uint16_t v_sync_width, uint16_t v_end_width,
451 struct ipu_di_signal_cfg sig)
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700452{
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100453 unsigned long lock_flags;
454 uint32_t reg;
455 uint32_t old_conf;
456 uint32_t div;
457 struct clk *ipu_clk;
Sascha Hauerf910fb82011-12-01 14:58:52 +0100458 const struct di_mapping *map;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700459
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100460 dev_dbg(mx3fb->dev, "panel size = %d x %d", width, height);
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700461
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100462 if (v_sync_width == 0 || h_sync_width == 0)
463 return -EINVAL;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700464
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100465 /* Init panel size and blanking periods */
466 reg = ((uint32_t) (h_sync_width - 1) << 26) |
467 ((uint32_t) (width + h_start_width + h_end_width - 1) << 16);
468 mx3fb_write_reg(mx3fb, reg, SDC_HOR_CONF);
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700469
470#ifdef DEBUG
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100471 printk(KERN_CONT " hor_conf %x,", reg);
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700472#endif
473
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100474 reg = ((uint32_t) (v_sync_width - 1) << 26) | SDC_V_SYNC_WIDTH_L |
475 ((uint32_t) (height + v_start_width + v_end_width - 1) << 16);
476 mx3fb_write_reg(mx3fb, reg, SDC_VER_CONF);
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700477
478#ifdef DEBUG
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100479 printk(KERN_CONT " ver_conf %x\n", reg);
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700480#endif
481
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100482 mx3fb->h_start_width = h_start_width;
483 mx3fb->v_start_width = v_start_width;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700484
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100485 switch (panel) {
486 case IPU_PANEL_SHARP_TFT:
487 mx3fb_write_reg(mx3fb, 0x00FD0102L, SDC_SHARP_CONF_1);
488 mx3fb_write_reg(mx3fb, 0x00F500F4L, SDC_SHARP_CONF_2);
489 mx3fb_write_reg(mx3fb, SDC_COM_SHARP | SDC_COM_TFT_COLOR, SDC_COM_CONF);
490 break;
491 case IPU_PANEL_TFT:
492 mx3fb_write_reg(mx3fb, SDC_COM_TFT_COLOR, SDC_COM_CONF);
493 break;
494 default:
495 return -EINVAL;
496 }
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700497
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100498 /* Init clocking */
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700499
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100500 /*
501 * Calculate divider: fractional part is 4 bits so simply multiple by
502 * 2^4 to get fractional part, as long as we stay under ~250MHz and on
503 * i.MX31 it (HSP_CLK) is <= 178MHz. Currently 128.267MHz
504 */
Russell King3879f5d2009-03-16 22:28:04 +0000505 ipu_clk = clk_get(mx3fb->dev, NULL);
Guennadi Liakhovetskid88ca8152009-04-06 19:01:05 -0700506 if (!IS_ERR(ipu_clk)) {
507 div = clk_get_rate(ipu_clk) * 16 / pixel_clk;
508 clk_put(ipu_clk);
509 } else {
510 div = 0;
511 }
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700512
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100513 if (div < 0x40) { /* Divider less than 4 */
514 dev_dbg(mx3fb->dev,
515 "InitPanel() - Pixel clock divider less than 4\n");
516 div = 0x40;
517 }
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700518
Guennadi Liakhovetskid88ca8152009-04-06 19:01:05 -0700519 dev_dbg(mx3fb->dev, "pixel clk = %u, divider %u.%u\n",
520 pixel_clk, div >> 4, (div & 7) * 125);
521
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100522 spin_lock_irqsave(&mx3fb->lock, lock_flags);
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700523
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100524 /*
525 * DISP3_IF_CLK_DOWN_WR is half the divider value and 2 fraction bits
526 * fewer. Subtract 1 extra from DISP3_IF_CLK_DOWN_WR based on timing
527 * debug. DISP3_IF_CLK_UP_WR is 0
528 */
529 mx3fb_write_reg(mx3fb, (((div / 8) - 1) << 22) | div, DI_DISP3_TIME_CONF);
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700530
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100531 /* DI settings */
532 old_conf = mx3fb_read_reg(mx3fb, DI_DISP_IF_CONF) & 0x78FFFFFF;
533 old_conf |= sig.datamask_en << DI_D3_DATAMSK_SHIFT |
Guennadi Liakhovetskid88ca8152009-04-06 19:01:05 -0700534 sig.clksel_en << DI_D3_CLK_SEL_SHIFT |
535 sig.clkidle_en << DI_D3_CLK_IDLE_SHIFT;
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100536 mx3fb_write_reg(mx3fb, old_conf, DI_DISP_IF_CONF);
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700537
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100538 old_conf = mx3fb_read_reg(mx3fb, DI_DISP_SIG_POL) & 0xE0FFFFFF;
539 old_conf |= sig.data_pol << DI_D3_DATA_POL_SHIFT |
Guennadi Liakhovetskid88ca8152009-04-06 19:01:05 -0700540 sig.clk_pol << DI_D3_CLK_POL_SHIFT |
541 sig.enable_pol << DI_D3_DRDY_SHARP_POL_SHIFT |
542 sig.Hsync_pol << DI_D3_HSYNC_POL_SHIFT |
543 sig.Vsync_pol << DI_D3_VSYNC_POL_SHIFT;
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100544 mx3fb_write_reg(mx3fb, old_conf, DI_DISP_SIG_POL);
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700545
Sascha Hauerf910fb82011-12-01 14:58:52 +0100546 map = &di_mappings[mx3fb->disp_data_fmt];
547 mx3fb_write_reg(mx3fb, map->b0, DI_DISP3_B0_MAP);
548 mx3fb_write_reg(mx3fb, map->b1, DI_DISP3_B1_MAP);
549 mx3fb_write_reg(mx3fb, map->b2, DI_DISP3_B2_MAP);
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700550
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100551 spin_unlock_irqrestore(&mx3fb->lock, lock_flags);
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700552
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100553 dev_dbg(mx3fb->dev, "DI_DISP_IF_CONF = 0x%08X\n",
554 mx3fb_read_reg(mx3fb, DI_DISP_IF_CONF));
555 dev_dbg(mx3fb->dev, "DI_DISP_SIG_POL = 0x%08X\n",
556 mx3fb_read_reg(mx3fb, DI_DISP_SIG_POL));
557 dev_dbg(mx3fb->dev, "DI_DISP3_TIME_CONF = 0x%08X\n",
558 mx3fb_read_reg(mx3fb, DI_DISP3_TIME_CONF));
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700559
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100560 return 0;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700561}
562
563/**
564 * sdc_set_color_key() - set the transparent color key for SDC graphic plane.
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100565 * @mx3fb: mx3fb context.
566 * @channel: IPU DMAC channel ID.
567 * @enable: boolean to enable or disable color keyl.
568 * @color_key: 24-bit RGB color to use as transparent color key.
569 * @return: 0 on success or negative error code on failure.
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700570 */
571static int sdc_set_color_key(struct mx3fb_data *mx3fb, enum ipu_channel channel,
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100572 bool enable, uint32_t color_key)
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700573{
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100574 uint32_t reg, sdc_conf;
575 unsigned long lock_flags;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700576
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100577 spin_lock_irqsave(&mx3fb->lock, lock_flags);
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700578
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100579 sdc_conf = mx3fb_read_reg(mx3fb, SDC_COM_CONF);
580 if (channel == IDMAC_SDC_0)
581 sdc_conf &= ~SDC_COM_GWSEL;
582 else
583 sdc_conf |= SDC_COM_GWSEL;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700584
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100585 if (enable) {
586 reg = mx3fb_read_reg(mx3fb, SDC_GW_CTRL) & 0xFF000000L;
587 mx3fb_write_reg(mx3fb, reg | (color_key & 0x00FFFFFFL),
588 SDC_GW_CTRL);
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700589
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100590 sdc_conf |= SDC_COM_KEY_COLOR_G;
591 } else {
592 sdc_conf &= ~SDC_COM_KEY_COLOR_G;
593 }
594 mx3fb_write_reg(mx3fb, sdc_conf, SDC_COM_CONF);
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700595
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100596 spin_unlock_irqrestore(&mx3fb->lock, lock_flags);
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700597
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100598 return 0;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700599}
600
601/**
602 * sdc_set_global_alpha() - set global alpha blending modes.
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100603 * @mx3fb: mx3fb context.
604 * @enable: boolean to enable or disable global alpha blending. If disabled,
605 * per pixel blending is used.
606 * @alpha: global alpha value.
607 * @return: 0 on success or negative error code on failure.
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700608 */
609static int sdc_set_global_alpha(struct mx3fb_data *mx3fb, bool enable, uint8_t alpha)
610{
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100611 uint32_t reg;
612 unsigned long lock_flags;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700613
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100614 spin_lock_irqsave(&mx3fb->lock, lock_flags);
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700615
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100616 if (enable) {
617 reg = mx3fb_read_reg(mx3fb, SDC_GW_CTRL) & 0x00FFFFFFL;
618 mx3fb_write_reg(mx3fb, reg | ((uint32_t) alpha << 24), SDC_GW_CTRL);
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700619
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100620 reg = mx3fb_read_reg(mx3fb, SDC_COM_CONF);
621 mx3fb_write_reg(mx3fb, reg | SDC_COM_GLB_A, SDC_COM_CONF);
622 } else {
623 reg = mx3fb_read_reg(mx3fb, SDC_COM_CONF);
624 mx3fb_write_reg(mx3fb, reg & ~SDC_COM_GLB_A, SDC_COM_CONF);
625 }
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700626
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100627 spin_unlock_irqrestore(&mx3fb->lock, lock_flags);
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700628
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100629 return 0;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700630}
631
632static void sdc_set_brightness(struct mx3fb_data *mx3fb, uint8_t value)
633{
Alberto Panizzob3cb5372010-02-02 13:43:59 -0800634 dev_dbg(mx3fb->dev, "%s: value = %d\n", __func__, value);
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100635 /* This might be board-specific */
636 mx3fb_write_reg(mx3fb, 0x03000000UL | value << 16, SDC_PWM_CTRL);
637 return;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700638}
639
640static uint32_t bpp_to_pixfmt(int bpp)
641{
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100642 uint32_t pixfmt = 0;
643 switch (bpp) {
644 case 24:
645 pixfmt = IPU_PIX_FMT_BGR24;
646 break;
647 case 32:
648 pixfmt = IPU_PIX_FMT_BGR32;
649 break;
650 case 16:
651 pixfmt = IPU_PIX_FMT_RGB565;
652 break;
653 }
654 return pixfmt;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700655}
656
657static int mx3fb_blank(int blank, struct fb_info *fbi);
Guennadi Liakhovetski20de03d2009-08-06 15:07:40 -0700658static int mx3fb_map_video_memory(struct fb_info *fbi, unsigned int mem_len,
659 bool lock);
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700660static int mx3fb_unmap_video_memory(struct fb_info *fbi);
661
662/**
663 * mx3fb_set_fix() - set fixed framebuffer parameters from variable settings.
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100664 * @info: framebuffer information pointer
665 * @return: 0 on success or negative error code on failure.
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700666 */
667static int mx3fb_set_fix(struct fb_info *fbi)
668{
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100669 struct fb_fix_screeninfo *fix = &fbi->fix;
670 struct fb_var_screeninfo *var = &fbi->var;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700671
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100672 strncpy(fix->id, "DISP3 BG", 8);
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700673
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100674 fix->line_length = var->xres_virtual * var->bits_per_pixel / 8;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700675
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100676 fix->type = FB_TYPE_PACKED_PIXELS;
677 fix->accel = FB_ACCEL_NONE;
678 fix->visual = FB_VISUAL_TRUECOLOR;
679 fix->xpanstep = 1;
680 fix->ypanstep = 1;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700681
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100682 return 0;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700683}
684
685static void mx3fb_dma_done(void *arg)
686{
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100687 struct idmac_tx_desc *tx_desc = to_tx_desc(arg);
688 struct dma_chan *chan = tx_desc->txd.chan;
689 struct idmac_channel *ichannel = to_idmac_chan(chan);
690 struct mx3fb_data *mx3fb = ichannel->client;
691 struct mx3fb_info *mx3_fbi = mx3fb->fbi->par;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700692
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100693 dev_dbg(mx3fb->dev, "irq %d callback\n", ichannel->eof_irq);
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700694
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100695 /* We only need one interrupt, it will be re-enabled as needed */
Guennadi Liakhovetskic8a4fb42009-05-12 21:41:03 +0200696 disable_irq_nosync(ichannel->eof_irq);
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700697
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100698 complete(&mx3_fbi->flip_cmpl);
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700699}
700
Guennadi Liakhovetski20de03d2009-08-06 15:07:40 -0700701static int __set_par(struct fb_info *fbi, bool lock)
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700702{
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100703 u32 mem_len;
704 struct ipu_di_signal_cfg sig_cfg;
705 enum ipu_panel mode = IPU_PANEL_TFT;
706 struct mx3fb_info *mx3_fbi = fbi->par;
707 struct mx3fb_data *mx3fb = mx3_fbi->mx3fb;
708 struct idmac_channel *ichan = mx3_fbi->idmac_channel;
709 struct idmac_video_param *video = &ichan->params.video;
710 struct scatterlist *sg = mx3_fbi->sg;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700711
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100712 /* Total cleanup */
713 if (mx3_fbi->txd)
714 sdc_disable_channel(mx3_fbi);
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700715
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100716 mx3fb_set_fix(fbi);
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700717
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100718 mem_len = fbi->var.yres_virtual * fbi->fix.line_length;
719 if (mem_len > fbi->fix.smem_len) {
720 if (fbi->fix.smem_start)
721 mx3fb_unmap_video_memory(fbi);
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700722
Guennadi Liakhovetski20de03d2009-08-06 15:07:40 -0700723 if (mx3fb_map_video_memory(fbi, mem_len, lock) < 0)
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100724 return -ENOMEM;
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100725 }
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700726
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100727 sg_init_table(&sg[0], 1);
728 sg_init_table(&sg[1], 1);
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700729
Guennadi Liakhovetskid88ca8152009-04-06 19:01:05 -0700730 sg_dma_address(&sg[0]) = fbi->fix.smem_start;
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100731 sg_set_page(&sg[0], virt_to_page(fbi->screen_base),
732 fbi->fix.smem_len,
733 offset_in_page(fbi->screen_base));
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700734
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100735 if (mx3_fbi->ipu_ch == IDMAC_SDC_0) {
736 memset(&sig_cfg, 0, sizeof(sig_cfg));
737 if (fbi->var.sync & FB_SYNC_HOR_HIGH_ACT)
738 sig_cfg.Hsync_pol = true;
739 if (fbi->var.sync & FB_SYNC_VERT_HIGH_ACT)
740 sig_cfg.Vsync_pol = true;
741 if (fbi->var.sync & FB_SYNC_CLK_INVERT)
742 sig_cfg.clk_pol = true;
743 if (fbi->var.sync & FB_SYNC_DATA_INVERT)
744 sig_cfg.data_pol = true;
745 if (fbi->var.sync & FB_SYNC_OE_ACT_HIGH)
746 sig_cfg.enable_pol = true;
747 if (fbi->var.sync & FB_SYNC_CLK_IDLE_EN)
748 sig_cfg.clkidle_en = true;
749 if (fbi->var.sync & FB_SYNC_CLK_SEL_EN)
750 sig_cfg.clksel_en = true;
751 if (fbi->var.sync & FB_SYNC_SHARP_MODE)
752 mode = IPU_PANEL_SHARP_TFT;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700753
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100754 dev_dbg(fbi->device, "pixclock = %ul Hz\n",
755 (u32) (PICOS2KHZ(fbi->var.pixclock) * 1000UL));
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700756
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100757 if (sdc_init_panel(mx3fb, mode,
758 (PICOS2KHZ(fbi->var.pixclock)) * 1000UL,
759 fbi->var.xres, fbi->var.yres,
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100760 fbi->var.left_margin,
761 fbi->var.hsync_len,
762 fbi->var.right_margin +
763 fbi->var.hsync_len,
764 fbi->var.upper_margin,
765 fbi->var.vsync_len,
766 fbi->var.lower_margin +
767 fbi->var.vsync_len, sig_cfg) != 0) {
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100768 dev_err(fbi->device,
769 "mx3fb: Error initializing panel.\n");
770 return -EINVAL;
771 }
772 }
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700773
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100774 sdc_set_window_pos(mx3fb, mx3_fbi->ipu_ch, 0, 0);
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700775
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100776 mx3_fbi->cur_ipu_buf = 0;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700777
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100778 video->out_pixel_fmt = bpp_to_pixfmt(fbi->var.bits_per_pixel);
779 video->out_width = fbi->var.xres;
780 video->out_height = fbi->var.yres;
781 video->out_stride = fbi->var.xres_virtual;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700782
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100783 if (mx3_fbi->blank == FB_BLANK_UNBLANK)
784 sdc_enable_channel(mx3_fbi);
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700785
Guennadi Liakhovetski20de03d2009-08-06 15:07:40 -0700786 return 0;
787}
788
789/**
790 * mx3fb_set_par() - set framebuffer parameters and change the operating mode.
791 * @fbi: framebuffer information pointer.
792 * @return: 0 on success or negative error code on failure.
793 */
794static int mx3fb_set_par(struct fb_info *fbi)
795{
796 struct mx3fb_info *mx3_fbi = fbi->par;
797 struct mx3fb_data *mx3fb = mx3_fbi->mx3fb;
798 struct idmac_channel *ichan = mx3_fbi->idmac_channel;
799 int ret;
800
801 dev_dbg(mx3fb->dev, "%s [%c]\n", __func__, list_empty(&ichan->queue) ? '-' : '+');
802
803 mutex_lock(&mx3_fbi->mutex);
804
805 ret = __set_par(fbi, true);
806
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100807 mutex_unlock(&mx3_fbi->mutex);
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700808
Guennadi Liakhovetski20de03d2009-08-06 15:07:40 -0700809 return ret;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700810}
811
812/**
813 * mx3fb_check_var() - check and adjust framebuffer variable parameters.
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100814 * @var: framebuffer variable parameters
815 * @fbi: framebuffer information pointer
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700816 */
817static int mx3fb_check_var(struct fb_var_screeninfo *var, struct fb_info *fbi)
818{
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100819 struct mx3fb_info *mx3_fbi = fbi->par;
820 u32 vtotal;
821 u32 htotal;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700822
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100823 dev_dbg(fbi->device, "%s\n", __func__);
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700824
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100825 if (var->xres_virtual < var->xres)
826 var->xres_virtual = var->xres;
827 if (var->yres_virtual < var->yres)
828 var->yres_virtual = var->yres;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700829
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100830 if ((var->bits_per_pixel != 32) && (var->bits_per_pixel != 24) &&
831 (var->bits_per_pixel != 16))
832 var->bits_per_pixel = default_bpp;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700833
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100834 switch (var->bits_per_pixel) {
835 case 16:
836 var->red.length = 5;
837 var->red.offset = 11;
838 var->red.msb_right = 0;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700839
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100840 var->green.length = 6;
841 var->green.offset = 5;
842 var->green.msb_right = 0;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700843
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100844 var->blue.length = 5;
845 var->blue.offset = 0;
846 var->blue.msb_right = 0;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700847
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100848 var->transp.length = 0;
849 var->transp.offset = 0;
850 var->transp.msb_right = 0;
851 break;
852 case 24:
853 var->red.length = 8;
854 var->red.offset = 16;
855 var->red.msb_right = 0;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700856
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100857 var->green.length = 8;
858 var->green.offset = 8;
859 var->green.msb_right = 0;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700860
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100861 var->blue.length = 8;
862 var->blue.offset = 0;
863 var->blue.msb_right = 0;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700864
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100865 var->transp.length = 0;
866 var->transp.offset = 0;
867 var->transp.msb_right = 0;
868 break;
869 case 32:
870 var->red.length = 8;
871 var->red.offset = 16;
872 var->red.msb_right = 0;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700873
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100874 var->green.length = 8;
875 var->green.offset = 8;
876 var->green.msb_right = 0;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700877
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100878 var->blue.length = 8;
879 var->blue.offset = 0;
880 var->blue.msb_right = 0;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700881
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100882 var->transp.length = 8;
883 var->transp.offset = 24;
884 var->transp.msb_right = 0;
885 break;
886 }
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700887
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100888 if (var->pixclock < 1000) {
889 htotal = var->xres + var->right_margin + var->hsync_len +
890 var->left_margin;
891 vtotal = var->yres + var->lower_margin + var->vsync_len +
892 var->upper_margin;
893 var->pixclock = (vtotal * htotal * 6UL) / 100UL;
894 var->pixclock = KHZ2PICOS(var->pixclock);
895 dev_dbg(fbi->device, "pixclock set for 60Hz refresh = %u ps\n",
896 var->pixclock);
897 }
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700898
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100899 var->height = -1;
900 var->width = -1;
901 var->grayscale = 0;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700902
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100903 /* Preserve sync flags */
904 var->sync |= mx3_fbi->sync;
905 mx3_fbi->sync |= var->sync;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700906
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100907 return 0;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700908}
909
910static u32 chan_to_field(unsigned int chan, struct fb_bitfield *bf)
911{
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100912 chan &= 0xffff;
913 chan >>= 16 - bf->length;
914 return chan << bf->offset;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700915}
916
917static int mx3fb_setcolreg(unsigned int regno, unsigned int red,
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100918 unsigned int green, unsigned int blue,
919 unsigned int trans, struct fb_info *fbi)
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700920{
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100921 struct mx3fb_info *mx3_fbi = fbi->par;
922 u32 val;
923 int ret = 1;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700924
Guennadi Liakhovetskid88ca8152009-04-06 19:01:05 -0700925 dev_dbg(fbi->device, "%s, regno = %u\n", __func__, regno);
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700926
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100927 mutex_lock(&mx3_fbi->mutex);
928 /*
929 * If greyscale is true, then we convert the RGB value
930 * to greyscale no matter what visual we are using.
931 */
932 if (fbi->var.grayscale)
933 red = green = blue = (19595 * red + 38470 * green +
934 7471 * blue) >> 16;
935 switch (fbi->fix.visual) {
936 case FB_VISUAL_TRUECOLOR:
937 /*
938 * 16-bit True Colour. We encode the RGB value
939 * according to the RGB bitfield information.
940 */
941 if (regno < 16) {
942 u32 *pal = fbi->pseudo_palette;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700943
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100944 val = chan_to_field(red, &fbi->var.red);
945 val |= chan_to_field(green, &fbi->var.green);
946 val |= chan_to_field(blue, &fbi->var.blue);
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700947
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100948 pal[regno] = val;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700949
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100950 ret = 0;
951 }
952 break;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700953
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100954 case FB_VISUAL_STATIC_PSEUDOCOLOR:
955 case FB_VISUAL_PSEUDOCOLOR:
956 break;
957 }
958 mutex_unlock(&mx3_fbi->mutex);
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700959
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100960 return ret;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700961}
962
Guennadi Liakhovetski20de03d2009-08-06 15:07:40 -0700963static void __blank(int blank, struct fb_info *fbi)
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700964{
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100965 struct mx3fb_info *mx3_fbi = fbi->par;
966 struct mx3fb_data *mx3fb = mx3_fbi->mx3fb;
Wolfram Stering8b53b7f2011-09-23 14:09:35 +0200967 int was_blank = mx3_fbi->blank;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700968
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100969 mx3_fbi->blank = blank;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -0700970
Wolfram Stering8b53b7f2011-09-23 14:09:35 +0200971 /* Attention!
972 * Do not call sdc_disable_channel() for a channel that is disabled
973 * already! This will result in a kernel NULL pointer dereference
974 * (mx3_fbi->txd is NULL). Hide the fact, that all blank modes are
975 * handled equally by this driver.
976 */
977 if (blank > FB_BLANK_UNBLANK && was_blank > FB_BLANK_UNBLANK)
978 return;
979
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100980 switch (blank) {
981 case FB_BLANK_POWERDOWN:
982 case FB_BLANK_VSYNC_SUSPEND:
983 case FB_BLANK_HSYNC_SUSPEND:
984 case FB_BLANK_NORMAL:
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100985 sdc_set_brightness(mx3fb, 0);
Guennadi Liakhovetskid88ca8152009-04-06 19:01:05 -0700986 memset((char *)fbi->screen_base, 0, fbi->fix.smem_len);
987 /* Give LCD time to update - enough for 50 and 60 Hz */
988 msleep(25);
989 sdc_disable_channel(mx3_fbi);
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +0100990 break;
991 case FB_BLANK_UNBLANK:
992 sdc_enable_channel(mx3_fbi);
993 sdc_set_brightness(mx3fb, mx3fb->backlight_level);
994 break;
995 }
Guennadi Liakhovetski20de03d2009-08-06 15:07:40 -0700996}
997
998/**
999 * mx3fb_blank() - blank the display.
1000 */
1001static int mx3fb_blank(int blank, struct fb_info *fbi)
1002{
1003 struct mx3fb_info *mx3_fbi = fbi->par;
1004
1005 dev_dbg(fbi->device, "%s, blank = %d, base %p, len %u\n", __func__,
1006 blank, fbi->screen_base, fbi->fix.smem_len);
1007
1008 if (mx3_fbi->blank == blank)
1009 return 0;
1010
1011 mutex_lock(&mx3_fbi->mutex);
1012 __blank(blank, fbi);
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001013 mutex_unlock(&mx3_fbi->mutex);
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001014
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001015 return 0;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001016}
1017
1018/**
1019 * mx3fb_pan_display() - pan or wrap the display
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001020 * @var: variable screen buffer information.
1021 * @info: framebuffer information pointer.
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001022 *
1023 * We look only at xoffset, yoffset and the FB_VMODE_YWRAP flag
1024 */
1025static int mx3fb_pan_display(struct fb_var_screeninfo *var,
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001026 struct fb_info *fbi)
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001027{
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001028 struct mx3fb_info *mx3_fbi = fbi->par;
1029 u32 y_bottom;
1030 unsigned long base;
1031 off_t offset;
1032 dma_cookie_t cookie;
1033 struct scatterlist *sg = mx3_fbi->sg;
1034 struct dma_chan *dma_chan = &mx3_fbi->idmac_channel->dma_chan;
1035 struct dma_async_tx_descriptor *txd;
1036 int ret;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001037
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001038 dev_dbg(fbi->device, "%s [%c]\n", __func__,
1039 list_empty(&mx3_fbi->idmac_channel->queue) ? '-' : '+');
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001040
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001041 if (var->xoffset > 0) {
1042 dev_dbg(fbi->device, "x panning not supported\n");
1043 return -EINVAL;
1044 }
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001045
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001046 if (fbi->var.xoffset == var->xoffset &&
1047 fbi->var.yoffset == var->yoffset)
1048 return 0; /* No change, do nothing */
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001049
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001050 y_bottom = var->yoffset;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001051
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001052 if (!(var->vmode & FB_VMODE_YWRAP))
Laurent Pinchart9f1b3eb2011-05-25 11:34:52 +02001053 y_bottom += fbi->var.yres;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001054
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001055 if (y_bottom > fbi->var.yres_virtual)
1056 return -EINVAL;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001057
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001058 mutex_lock(&mx3_fbi->mutex);
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001059
Laurent Pinchart9f1b3eb2011-05-25 11:34:52 +02001060 offset = var->yoffset * fbi->fix.line_length
1061 + var->xoffset * (fbi->var.bits_per_pixel / 8);
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001062 base = fbi->fix.smem_start + offset;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001063
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001064 dev_dbg(fbi->device, "Updating SDC BG buf %d address=0x%08lX\n",
1065 mx3_fbi->cur_ipu_buf, base);
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001066
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001067 /*
1068 * We enable the End of Frame interrupt, which will free a tx-descriptor,
1069 * which we will need for the next device_prep_slave_sg(). The
1070 * IRQ-handler will disable the IRQ again.
1071 */
1072 init_completion(&mx3_fbi->flip_cmpl);
1073 enable_irq(mx3_fbi->idmac_channel->eof_irq);
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001074
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001075 ret = wait_for_completion_timeout(&mx3_fbi->flip_cmpl, HZ / 10);
1076 if (ret <= 0) {
1077 mutex_unlock(&mx3_fbi->mutex);
1078 dev_info(fbi->device, "Panning failed due to %s\n", ret < 0 ?
1079 "user interrupt" : "timeout");
Guennadi Liakhovetskid88ca8152009-04-06 19:01:05 -07001080 disable_irq(mx3_fbi->idmac_channel->eof_irq);
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001081 return ret ? : -ETIMEDOUT;
1082 }
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001083
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001084 mx3_fbi->cur_ipu_buf = !mx3_fbi->cur_ipu_buf;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001085
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001086 sg_dma_address(&sg[mx3_fbi->cur_ipu_buf]) = base;
1087 sg_set_page(&sg[mx3_fbi->cur_ipu_buf],
1088 virt_to_page(fbi->screen_base + offset), fbi->fix.smem_len,
1089 offset_in_page(fbi->screen_base + offset));
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001090
Guennadi Liakhovetskid88ca8152009-04-06 19:01:05 -07001091 if (mx3_fbi->txd)
1092 async_tx_ack(mx3_fbi->txd);
1093
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001094 txd = dma_chan->device->device_prep_slave_sg(dma_chan, sg +
Vinod Koul1003cab2011-10-14 10:39:23 +05301095 mx3_fbi->cur_ipu_buf, 1, DMA_MEM_TO_DEV, DMA_PREP_INTERRUPT);
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001096 if (!txd) {
1097 dev_err(fbi->device,
1098 "Error preparing a DMA transaction descriptor.\n");
1099 mutex_unlock(&mx3_fbi->mutex);
1100 return -EIO;
1101 }
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001102
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001103 txd->callback_param = txd;
1104 txd->callback = mx3fb_dma_done;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001105
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001106 /*
1107 * Emulate original mx3fb behaviour: each new call to idmac_tx_submit()
1108 * should switch to another buffer
1109 */
1110 cookie = txd->tx_submit(txd);
1111 dev_dbg(fbi->device, "%d: Submit %p #%d\n", __LINE__, txd, cookie);
1112 if (cookie < 0) {
1113 dev_err(fbi->device,
1114 "Error updating SDC buf %d to address=0x%08lX\n",
1115 mx3_fbi->cur_ipu_buf, base);
1116 mutex_unlock(&mx3_fbi->mutex);
1117 return -EIO;
1118 }
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001119
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001120 mx3_fbi->txd = txd;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001121
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001122 fbi->var.xoffset = var->xoffset;
1123 fbi->var.yoffset = var->yoffset;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001124
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001125 if (var->vmode & FB_VMODE_YWRAP)
1126 fbi->var.vmode |= FB_VMODE_YWRAP;
1127 else
1128 fbi->var.vmode &= ~FB_VMODE_YWRAP;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001129
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001130 mutex_unlock(&mx3_fbi->mutex);
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001131
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001132 dev_dbg(fbi->device, "Update complete\n");
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001133
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001134 return 0;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001135}
1136
1137/*
1138 * This structure contains the pointers to the control functions that are
1139 * invoked by the core framebuffer driver to perform operations like
1140 * blitting, rectangle filling, copy regions and cursor definition.
1141 */
1142static struct fb_ops mx3fb_ops = {
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001143 .owner = THIS_MODULE,
1144 .fb_set_par = mx3fb_set_par,
1145 .fb_check_var = mx3fb_check_var,
1146 .fb_setcolreg = mx3fb_setcolreg,
1147 .fb_pan_display = mx3fb_pan_display,
1148 .fb_fillrect = cfb_fillrect,
1149 .fb_copyarea = cfb_copyarea,
1150 .fb_imageblit = cfb_imageblit,
1151 .fb_blank = mx3fb_blank,
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001152};
1153
1154#ifdef CONFIG_PM
1155/*
1156 * Power management hooks. Note that we won't be called from IRQ context,
1157 * unlike the blank functions above, so we may sleep.
1158 */
1159
1160/*
1161 * Suspends the framebuffer and blanks the screen. Power management support
1162 */
1163static int mx3fb_suspend(struct platform_device *pdev, pm_message_t state)
1164{
Sascha Hauerb09de422009-04-08 11:45:47 +02001165 struct mx3fb_data *mx3fb = platform_get_drvdata(pdev);
1166 struct mx3fb_info *mx3_fbi = mx3fb->fbi->par;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001167
Torben Hohnac751ef2011-01-25 15:07:35 -08001168 console_lock();
Sascha Hauerb09de422009-04-08 11:45:47 +02001169 fb_set_suspend(mx3fb->fbi, 1);
Torben Hohnac751ef2011-01-25 15:07:35 -08001170 console_unlock();
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001171
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001172 if (mx3_fbi->blank == FB_BLANK_UNBLANK) {
1173 sdc_disable_channel(mx3_fbi);
1174 sdc_set_brightness(mx3fb, 0);
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001175
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001176 }
1177 return 0;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001178}
1179
1180/*
1181 * Resumes the framebuffer and unblanks the screen. Power management support
1182 */
1183static int mx3fb_resume(struct platform_device *pdev)
1184{
Sascha Hauerb09de422009-04-08 11:45:47 +02001185 struct mx3fb_data *mx3fb = platform_get_drvdata(pdev);
1186 struct mx3fb_info *mx3_fbi = mx3fb->fbi->par;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001187
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001188 if (mx3_fbi->blank == FB_BLANK_UNBLANK) {
1189 sdc_enable_channel(mx3_fbi);
Sascha Hauerb09de422009-04-08 11:45:47 +02001190 sdc_set_brightness(mx3fb, mx3fb->backlight_level);
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001191 }
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001192
Torben Hohnac751ef2011-01-25 15:07:35 -08001193 console_lock();
Sascha Hauerb09de422009-04-08 11:45:47 +02001194 fb_set_suspend(mx3fb->fbi, 0);
Torben Hohnac751ef2011-01-25 15:07:35 -08001195 console_unlock();
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001196
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001197 return 0;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001198}
1199#else
1200#define mx3fb_suspend NULL
1201#define mx3fb_resume NULL
1202#endif
1203
1204/*
1205 * Main framebuffer functions
1206 */
1207
1208/**
1209 * mx3fb_map_video_memory() - allocates the DRAM memory for the frame buffer.
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001210 * @fbi: framebuffer information pointer
Krzysztof Helt537a1bf2009-06-30 11:41:29 -07001211 * @mem_len: length of mapped memory
Guennadi Liakhovetski20de03d2009-08-06 15:07:40 -07001212 * @lock: do not lock during initialisation
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001213 * @return: Error code indicating success or failure
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001214 *
1215 * This buffer is remapped into a non-cached, non-buffered, memory region to
1216 * allow palette and pixel writes to occur without flushing the cache. Once this
1217 * area is remapped, all virtual memory access to the video memory should occur
1218 * at the new region.
1219 */
Guennadi Liakhovetski20de03d2009-08-06 15:07:40 -07001220static int mx3fb_map_video_memory(struct fb_info *fbi, unsigned int mem_len,
1221 bool lock)
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001222{
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001223 int retval = 0;
1224 dma_addr_t addr;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001225
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001226 fbi->screen_base = dma_alloc_writecombine(fbi->device,
Krzysztof Helt537a1bf2009-06-30 11:41:29 -07001227 mem_len,
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001228 &addr, GFP_DMA);
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001229
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001230 if (!fbi->screen_base) {
1231 dev_err(fbi->device, "Cannot allocate %u bytes framebuffer memory\n",
Krzysztof Helt537a1bf2009-06-30 11:41:29 -07001232 mem_len);
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001233 retval = -EBUSY;
1234 goto err0;
1235 }
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001236
Guennadi Liakhovetski20de03d2009-08-06 15:07:40 -07001237 if (lock)
1238 mutex_lock(&fbi->mm_lock);
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001239 fbi->fix.smem_start = addr;
Krzysztof Helt537a1bf2009-06-30 11:41:29 -07001240 fbi->fix.smem_len = mem_len;
Guennadi Liakhovetski20de03d2009-08-06 15:07:40 -07001241 if (lock)
1242 mutex_unlock(&fbi->mm_lock);
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001243
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001244 dev_dbg(fbi->device, "allocated fb @ p=0x%08x, v=0x%p, size=%d.\n",
1245 (uint32_t) fbi->fix.smem_start, fbi->screen_base, fbi->fix.smem_len);
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001246
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001247 fbi->screen_size = fbi->fix.smem_len;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001248
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001249 /* Clear the screen */
1250 memset((char *)fbi->screen_base, 0, fbi->fix.smem_len);
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001251
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001252 return 0;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001253
1254err0:
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001255 fbi->fix.smem_len = 0;
1256 fbi->fix.smem_start = 0;
1257 fbi->screen_base = NULL;
1258 return retval;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001259}
1260
1261/**
1262 * mx3fb_unmap_video_memory() - de-allocate frame buffer memory.
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001263 * @fbi: framebuffer information pointer
1264 * @return: error code indicating success or failure
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001265 */
1266static int mx3fb_unmap_video_memory(struct fb_info *fbi)
1267{
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001268 dma_free_writecombine(fbi->device, fbi->fix.smem_len,
1269 fbi->screen_base, fbi->fix.smem_start);
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001270
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001271 fbi->screen_base = 0;
Krzysztof Helt537a1bf2009-06-30 11:41:29 -07001272 mutex_lock(&fbi->mm_lock);
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001273 fbi->fix.smem_start = 0;
1274 fbi->fix.smem_len = 0;
Krzysztof Helt537a1bf2009-06-30 11:41:29 -07001275 mutex_unlock(&fbi->mm_lock);
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001276 return 0;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001277}
1278
1279/**
1280 * mx3fb_init_fbinfo() - initialize framebuffer information object.
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001281 * @return: initialized framebuffer structure.
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001282 */
1283static struct fb_info *mx3fb_init_fbinfo(struct device *dev, struct fb_ops *ops)
1284{
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001285 struct fb_info *fbi;
1286 struct mx3fb_info *mx3fbi;
1287 int ret;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001288
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001289 /* Allocate sufficient memory for the fb structure */
1290 fbi = framebuffer_alloc(sizeof(struct mx3fb_info), dev);
1291 if (!fbi)
1292 return NULL;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001293
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001294 mx3fbi = fbi->par;
1295 mx3fbi->cookie = -EINVAL;
1296 mx3fbi->cur_ipu_buf = 0;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001297
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001298 fbi->var.activate = FB_ACTIVATE_NOW;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001299
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001300 fbi->fbops = ops;
1301 fbi->flags = FBINFO_FLAG_DEFAULT;
1302 fbi->pseudo_palette = mx3fbi->pseudo_palette;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001303
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001304 mutex_init(&mx3fbi->mutex);
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001305
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001306 /* Allocate colormap */
1307 ret = fb_alloc_cmap(&fbi->cmap, 16, 0);
1308 if (ret < 0) {
1309 framebuffer_release(fbi);
1310 return NULL;
1311 }
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001312
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001313 return fbi;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001314}
1315
1316static int init_fb_chan(struct mx3fb_data *mx3fb, struct idmac_channel *ichan)
1317{
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001318 struct device *dev = mx3fb->dev;
1319 struct mx3fb_platform_data *mx3fb_pdata = dev->platform_data;
1320 const char *name = mx3fb_pdata->name;
1321 unsigned int irq;
1322 struct fb_info *fbi;
1323 struct mx3fb_info *mx3fbi;
1324 const struct fb_videomode *mode;
1325 int ret, num_modes;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001326
Sascha Hauerf910fb82011-12-01 14:58:52 +01001327 if (mx3fb_pdata->disp_data_fmt >= ARRAY_SIZE(di_mappings)) {
1328 dev_err(dev, "Illegal display data format %d\n",
1329 mx3fb_pdata->disp_data_fmt);
1330 return -EINVAL;
1331 }
1332
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001333 ichan->client = mx3fb;
1334 irq = ichan->eof_irq;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001335
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001336 if (ichan->dma_chan.chan_id != IDMAC_SDC_0)
1337 return -EINVAL;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001338
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001339 fbi = mx3fb_init_fbinfo(dev, &mx3fb_ops);
1340 if (!fbi)
1341 return -ENOMEM;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001342
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001343 if (!fb_mode)
1344 fb_mode = name;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001345
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001346 if (!fb_mode) {
1347 ret = -EINVAL;
1348 goto emode;
1349 }
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001350
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001351 if (mx3fb_pdata->mode && mx3fb_pdata->num_modes) {
1352 mode = mx3fb_pdata->mode;
1353 num_modes = mx3fb_pdata->num_modes;
1354 } else {
1355 mode = mx3fb_modedb;
1356 num_modes = ARRAY_SIZE(mx3fb_modedb);
1357 }
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001358
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001359 if (!fb_find_mode(&fbi->var, fbi, fb_mode, mode,
1360 num_modes, NULL, default_bpp)) {
1361 ret = -EBUSY;
1362 goto emode;
1363 }
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001364
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001365 fb_videomode_to_modelist(mode, num_modes, &fbi->modelist);
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001366
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001367 /* Default Y virtual size is 2x panel size */
1368 fbi->var.yres_virtual = fbi->var.yres * 2;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001369
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001370 mx3fb->fbi = fbi;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001371
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001372 /* set Display Interface clock period */
1373 mx3fb_write_reg(mx3fb, 0x00100010L, DI_HSP_CLK_PER);
1374 /* Might need to trigger HSP clock change - see 44.3.3.8.5 */
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001375
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001376 sdc_set_brightness(mx3fb, 255);
1377 sdc_set_global_alpha(mx3fb, true, 0xFF);
1378 sdc_set_color_key(mx3fb, IDMAC_SDC_0, false, 0);
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001379
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001380 mx3fbi = fbi->par;
1381 mx3fbi->idmac_channel = ichan;
1382 mx3fbi->ipu_ch = ichan->dma_chan.chan_id;
1383 mx3fbi->mx3fb = mx3fb;
1384 mx3fbi->blank = FB_BLANK_NORMAL;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001385
Sascha Hauerf910fb82011-12-01 14:58:52 +01001386 mx3fb->disp_data_fmt = mx3fb_pdata->disp_data_fmt;
1387
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001388 init_completion(&mx3fbi->flip_cmpl);
1389 disable_irq(ichan->eof_irq);
1390 dev_dbg(mx3fb->dev, "disabling irq %d\n", ichan->eof_irq);
Guennadi Liakhovetski20de03d2009-08-06 15:07:40 -07001391 ret = __set_par(fbi, false);
1392 if (ret < 0)
1393 goto esetpar;
1394
1395 __blank(FB_BLANK_UNBLANK, fbi);
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001396
Sascha Hauer2eec8c32009-03-20 20:27:37 +01001397 dev_info(dev, "registered, using mode %s\n", fb_mode);
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001398
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001399 ret = register_framebuffer(fbi);
1400 if (ret < 0)
1401 goto erfb;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001402
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001403 return 0;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001404
1405erfb:
1406esetpar:
1407emode:
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001408 fb_dealloc_cmap(&fbi->cmap);
1409 framebuffer_release(fbi);
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001410
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001411 return ret;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001412}
1413
1414static bool chan_filter(struct dma_chan *chan, void *arg)
1415{
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001416 struct dma_chan_request *rq = arg;
1417 struct device *dev;
1418 struct mx3fb_platform_data *mx3fb_pdata;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001419
Sascha Hauer1b346af2010-08-16 08:03:04 +02001420 if (!imx_dma_is_ipu(chan))
1421 return false;
1422
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001423 if (!rq)
1424 return false;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001425
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001426 dev = rq->mx3fb->dev;
1427 mx3fb_pdata = dev->platform_data;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001428
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001429 return rq->id == chan->chan_id &&
1430 mx3fb_pdata->dma_dev == chan->device->dev;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001431}
1432
1433static void release_fbi(struct fb_info *fbi)
1434{
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001435 mx3fb_unmap_video_memory(fbi);
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001436
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001437 fb_dealloc_cmap(&fbi->cmap);
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001438
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001439 unregister_framebuffer(fbi);
1440 framebuffer_release(fbi);
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001441}
1442
1443static int mx3fb_probe(struct platform_device *pdev)
1444{
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001445 struct device *dev = &pdev->dev;
1446 int ret;
1447 struct resource *sdc_reg;
1448 struct mx3fb_data *mx3fb;
1449 dma_cap_mask_t mask;
1450 struct dma_chan *chan;
1451 struct dma_chan_request rq;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001452
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001453 /*
1454 * Display Interface (DI) and Synchronous Display Controller (SDC)
1455 * registers
1456 */
1457 sdc_reg = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1458 if (!sdc_reg)
1459 return -EINVAL;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001460
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001461 mx3fb = kzalloc(sizeof(*mx3fb), GFP_KERNEL);
1462 if (!mx3fb)
1463 return -ENOMEM;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001464
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001465 spin_lock_init(&mx3fb->lock);
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001466
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001467 mx3fb->reg_base = ioremap(sdc_reg->start, resource_size(sdc_reg));
1468 if (!mx3fb->reg_base) {
1469 ret = -ENOMEM;
1470 goto eremap;
1471 }
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001472
Joe Perches3b80ffd2010-12-13 13:42:21 -08001473 pr_debug("Remapped %pR at %p\n", sdc_reg, mx3fb->reg_base);
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001474
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001475 /* IDMAC interface */
1476 dmaengine_get();
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001477
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001478 mx3fb->dev = dev;
1479 platform_set_drvdata(pdev, mx3fb);
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001480
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001481 rq.mx3fb = mx3fb;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001482
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001483 dma_cap_zero(mask);
1484 dma_cap_set(DMA_SLAVE, mask);
1485 dma_cap_set(DMA_PRIVATE, mask);
1486 rq.id = IDMAC_SDC_0;
1487 chan = dma_request_channel(mask, chan_filter, &rq);
1488 if (!chan) {
1489 ret = -EBUSY;
1490 goto ersdc0;
1491 }
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001492
Alberto Panizzob3cb5372010-02-02 13:43:59 -08001493 mx3fb->backlight_level = 255;
1494
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001495 ret = init_fb_chan(mx3fb, to_idmac_chan(chan));
1496 if (ret < 0)
1497 goto eisdc0;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001498
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001499 return 0;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001500
1501eisdc0:
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001502 dma_release_channel(chan);
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001503ersdc0:
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001504 dmaengine_put();
1505 iounmap(mx3fb->reg_base);
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001506eremap:
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001507 kfree(mx3fb);
1508 dev_err(dev, "mx3fb: failed to register fb\n");
1509 return ret;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001510}
1511
1512static int mx3fb_remove(struct platform_device *dev)
1513{
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001514 struct mx3fb_data *mx3fb = platform_get_drvdata(dev);
1515 struct fb_info *fbi = mx3fb->fbi;
1516 struct mx3fb_info *mx3_fbi = fbi->par;
1517 struct dma_chan *chan;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001518
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001519 chan = &mx3_fbi->idmac_channel->dma_chan;
1520 release_fbi(fbi);
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001521
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001522 dma_release_channel(chan);
1523 dmaengine_put();
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001524
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001525 iounmap(mx3fb->reg_base);
1526 kfree(mx3fb);
1527 return 0;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001528}
1529
1530static struct platform_driver mx3fb_driver = {
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001531 .driver = {
1532 .name = MX3FB_NAME,
1533 },
1534 .probe = mx3fb_probe,
1535 .remove = mx3fb_remove,
1536 .suspend = mx3fb_suspend,
1537 .resume = mx3fb_resume,
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001538};
1539
1540/*
1541 * Parse user specified options (`video=mx3fb:')
1542 * example:
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001543 * video=mx3fb:bpp=16
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001544 */
Guennadi Liakhovetskid88ca8152009-04-06 19:01:05 -07001545static int __init mx3fb_setup(void)
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001546{
1547#ifndef MODULE
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001548 char *opt, *options = NULL;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001549
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001550 if (fb_get_options("mx3fb", &options))
1551 return -ENODEV;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001552
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001553 if (!options || !*options)
1554 return 0;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001555
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001556 while ((opt = strsep(&options, ",")) != NULL) {
1557 if (!*opt)
1558 continue;
1559 if (!strncmp(opt, "bpp=", 4))
1560 default_bpp = simple_strtoul(opt + 4, NULL, 0);
1561 else
1562 fb_mode = opt;
1563 }
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001564#endif
1565
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001566 return 0;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001567}
1568
1569static int __init mx3fb_init(void)
1570{
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001571 int ret = mx3fb_setup();
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001572
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001573 if (ret < 0)
1574 return ret;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001575
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001576 ret = platform_driver_register(&mx3fb_driver);
1577 return ret;
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001578}
1579
1580static void __exit mx3fb_exit(void)
1581{
Guennadi Liakhovetski6e1588cb2009-02-26 21:34:28 +01001582 platform_driver_unregister(&mx3fb_driver);
Guennadi Liakhovetski86528da2009-01-21 10:32:34 -07001583}
1584
1585module_init(mx3fb_init);
1586module_exit(mx3fb_exit);
1587
1588MODULE_AUTHOR("Freescale Semiconductor, Inc.");
1589MODULE_DESCRIPTION("MX3 framebuffer driver");
1590MODULE_ALIAS("platform:" MX3FB_NAME);
1591MODULE_LICENSE("GPL v2");