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Mark.Zhana240a462006-05-06 17:04:20 +08001/*
2 * time.c: MIPS CPU Count/Compare timer hookup
3 *
4 * Author: Mark.Zhan, <rongkai.zhan@windriver.com>
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 *
10 * Copyright (C) 1996, 1997, 2004 by Ralf Baechle (ralf@linux-mips.org)
11 * Copyright (C) 2006, Wind River System Inc.
12 */
Mark.Zhana240a462006-05-06 17:04:20 +080013#include <linux/init.h>
Mark.Zhana240a462006-05-06 17:04:20 +080014#include <linux/interrupt.h>
Yoichi Yuasa4b92fe22007-10-10 00:28:26 +090015#include <linux/irq.h>
Mark.Zhana240a462006-05-06 17:04:20 +080016
Mark.Zhana240a462006-05-06 17:04:20 +080017#include <asm/gt64120.h>
Yoichi Yuasa4b92fe22007-10-10 00:28:26 +090018#include <asm/time.h>
Mark.Zhana240a462006-05-06 17:04:20 +080019
20#define WRPPMC_CPU_CLK_FREQ 40000000 /* 40MHZ */
21
Mark.Zhana240a462006-05-06 17:04:20 +080022/*
23 * Estimate CPU frequency. Sets mips_hpt_frequency as a side-effect
24 *
25 * NOTE: We disable all GT64120 timers, and use MIPS processor internal
26 * timer as the source of kernel clock tick.
27 */
Ralf Baechle4b550482007-10-11 23:46:08 +010028void __init plat_time_init(void)
Mark.Zhana240a462006-05-06 17:04:20 +080029{
30 /* Disable GT64120 timers */
31 GT_WRITE(GT_TC_CONTROL_OFS, 0x00);
32 GT_WRITE(GT_TC0_OFS, 0x00);
33 GT_WRITE(GT_TC1_OFS, 0x00);
34 GT_WRITE(GT_TC2_OFS, 0x00);
35 GT_WRITE(GT_TC3_OFS, 0x00);
36
37 /* Use MIPS compare/count internal timer */
38 mips_hpt_frequency = WRPPMC_CPU_CLK_FREQ;
39}