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Sascha Hauer9eb67f12015-04-23 10:35:43 +02001Mediatek pericfg controller
2===========================
3
4The Mediatek pericfg controller provides various clocks and reset
5outputs to the system.
6
7Required Properties:
8
9- compatible: Should be:
10 - "mediatek,mt8135-pericfg", "syscon"
11 - "mediatek,mt8173-pericfg", "syscon"
12- #clock-cells: Must be 1
13- #reset-cells: Must be 1
14
15The pericfg controller uses the common clk binding from
16Documentation/devicetree/bindings/clock/clock-bindings.txt
17The available clocks are defined in dt-bindings/clock/mt*-clk.h.
18Also it uses the common reset controller binding from
19Documentation/devicetree/bindings/reset/reset.txt.
20The available reset outputs are defined in
Philipp Zabel967313e2015-11-20 12:42:44 +010021dt-bindings/reset/mt*-resets.h
Sascha Hauer9eb67f12015-04-23 10:35:43 +020022
23Example:
24
Sascha Hauerc4b6c262015-05-07 10:14:58 +020025pericfg: power-controller@10003000 {
Sascha Hauer9eb67f12015-04-23 10:35:43 +020026 compatible = "mediatek,mt8173-pericfg", "syscon";
27 reg = <0 0x10003000 0 0x1000>;
28 #clock-cells = <1>;
29 #reset-cells = <1>;
30};