Yuval Mintz | fe56b9e | 2015-10-26 11:02:25 +0200 | [diff] [blame] | 1 | /* QLogic qed NIC Driver |
| 2 | * Copyright (c) 2015 QLogic Corporation |
| 3 | * |
| 4 | * This software is available under the terms of the GNU General Public License |
| 5 | * (GPL) Version 2, available from the file COPYING in the main directory of |
| 6 | * this source tree. |
| 7 | */ |
| 8 | |
| 9 | #include <linux/types.h> |
| 10 | #include <asm/byteorder.h> |
| 11 | #include <linux/bitops.h> |
| 12 | #include <linux/errno.h> |
| 13 | #include <linux/kernel.h> |
| 14 | #include <linux/string.h> |
| 15 | #include "qed.h" |
| 16 | #include <linux/qed/qed_chain.h> |
| 17 | #include "qed_cxt.h" |
| 18 | #include "qed_hsi.h" |
| 19 | #include "qed_hw.h" |
| 20 | #include "qed_int.h" |
| 21 | #include "qed_reg_addr.h" |
| 22 | #include "qed_sp.h" |
| 23 | |
| 24 | int qed_sp_init_request(struct qed_hwfn *p_hwfn, |
| 25 | struct qed_spq_entry **pp_ent, |
| 26 | u32 cid, |
| 27 | u16 opaque_fid, |
| 28 | u8 cmd, |
| 29 | u8 protocol, |
| 30 | struct qed_sp_init_request_params *p_params) |
| 31 | { |
| 32 | int rc = -EINVAL; |
| 33 | struct qed_spq_entry *p_ent = NULL; |
| 34 | u32 opaque_cid = opaque_fid << 16 | cid; |
| 35 | |
| 36 | if (!pp_ent) |
| 37 | return -ENOMEM; |
| 38 | |
| 39 | rc = qed_spq_get_entry(p_hwfn, pp_ent); |
| 40 | |
| 41 | if (rc != 0) |
| 42 | return rc; |
| 43 | |
| 44 | p_ent = *pp_ent; |
| 45 | |
| 46 | p_ent->elem.hdr.cid = cpu_to_le32(opaque_cid); |
| 47 | p_ent->elem.hdr.cmd_id = cmd; |
| 48 | p_ent->elem.hdr.protocol_id = protocol; |
| 49 | |
| 50 | p_ent->priority = QED_SPQ_PRIORITY_NORMAL; |
| 51 | p_ent->comp_mode = p_params->comp_mode; |
| 52 | p_ent->comp_done.done = 0; |
| 53 | |
| 54 | switch (p_ent->comp_mode) { |
| 55 | case QED_SPQ_MODE_EBLOCK: |
| 56 | p_ent->comp_cb.cookie = &p_ent->comp_done; |
| 57 | break; |
| 58 | |
| 59 | case QED_SPQ_MODE_BLOCK: |
| 60 | if (!p_params->p_comp_data) |
| 61 | return -EINVAL; |
| 62 | |
| 63 | p_ent->comp_cb.cookie = p_params->p_comp_data->cookie; |
| 64 | break; |
| 65 | |
| 66 | case QED_SPQ_MODE_CB: |
| 67 | if (!p_params->p_comp_data) |
| 68 | p_ent->comp_cb.function = NULL; |
| 69 | else |
| 70 | p_ent->comp_cb = *p_params->p_comp_data; |
| 71 | break; |
| 72 | |
| 73 | default: |
| 74 | DP_NOTICE(p_hwfn, "Unknown SPQE completion mode %d\n", |
| 75 | p_ent->comp_mode); |
| 76 | return -EINVAL; |
| 77 | } |
| 78 | |
| 79 | DP_VERBOSE(p_hwfn, QED_MSG_SPQ, |
| 80 | "Initialized: CID %08x cmd %02x protocol %02x data_addr %lu comp_mode [%s]\n", |
| 81 | opaque_cid, cmd, protocol, |
| 82 | (unsigned long)&p_ent->ramrod, |
| 83 | D_TRINE(p_ent->comp_mode, QED_SPQ_MODE_EBLOCK, |
| 84 | QED_SPQ_MODE_BLOCK, "MODE_EBLOCK", "MODE_BLOCK", |
| 85 | "MODE_CB")); |
| 86 | if (p_params->ramrod_data_size) |
| 87 | memset(&p_ent->ramrod, 0, p_params->ramrod_data_size); |
| 88 | |
| 89 | return 0; |
| 90 | } |
| 91 | |
| 92 | int qed_sp_pf_start(struct qed_hwfn *p_hwfn, |
Yuval Mintz | fc48b7a | 2016-02-15 13:22:35 -0500 | [diff] [blame^] | 93 | enum qed_mf_mode mode) |
Yuval Mintz | fe56b9e | 2015-10-26 11:02:25 +0200 | [diff] [blame] | 94 | { |
| 95 | struct qed_sp_init_request_params params; |
| 96 | struct pf_start_ramrod_data *p_ramrod = NULL; |
| 97 | u16 sb = qed_int_get_sp_sb_id(p_hwfn); |
| 98 | u8 sb_index = p_hwfn->p_eq->eq_sb_index; |
| 99 | struct qed_spq_entry *p_ent = NULL; |
| 100 | int rc = -EINVAL; |
| 101 | |
| 102 | /* update initial eq producer */ |
| 103 | qed_eq_prod_update(p_hwfn, |
| 104 | qed_chain_get_prod_idx(&p_hwfn->p_eq->chain)); |
| 105 | |
| 106 | memset(¶ms, 0, sizeof(params)); |
| 107 | params.ramrod_data_size = sizeof(*p_ramrod); |
| 108 | params.comp_mode = QED_SPQ_MODE_EBLOCK; |
| 109 | |
| 110 | rc = qed_sp_init_request(p_hwfn, |
| 111 | &p_ent, |
| 112 | qed_spq_get_cid(p_hwfn), |
| 113 | p_hwfn->hw_info.opaque_fid, |
| 114 | COMMON_RAMROD_PF_START, |
| 115 | PROTOCOLID_COMMON, |
| 116 | ¶ms); |
| 117 | if (rc) |
| 118 | return rc; |
| 119 | |
| 120 | p_ramrod = &p_ent->ramrod.pf_start; |
| 121 | |
| 122 | p_ramrod->event_ring_sb_id = cpu_to_le16(sb); |
| 123 | p_ramrod->event_ring_sb_index = sb_index; |
| 124 | p_ramrod->path_id = QED_PATH_ID(p_hwfn); |
| 125 | p_ramrod->dont_log_ramrods = 0; |
| 126 | p_ramrod->log_type_mask = cpu_to_le16(0xf); |
| 127 | p_ramrod->mf_mode = mode; |
Yuval Mintz | fc48b7a | 2016-02-15 13:22:35 -0500 | [diff] [blame^] | 128 | switch (mode) { |
| 129 | case QED_MF_DEFAULT: |
| 130 | case QED_MF_NPAR: |
| 131 | p_ramrod->mf_mode = MF_NPAR; |
| 132 | break; |
| 133 | case QED_MF_OVLAN: |
| 134 | p_ramrod->mf_mode = MF_OVLAN; |
| 135 | break; |
| 136 | default: |
| 137 | DP_NOTICE(p_hwfn, "Unsupported MF mode, init as DEFAULT\n"); |
| 138 | p_ramrod->mf_mode = MF_NPAR; |
| 139 | } |
Yuval Mintz | fe56b9e | 2015-10-26 11:02:25 +0200 | [diff] [blame] | 140 | p_ramrod->outer_tag = p_hwfn->hw_info.ovlan; |
| 141 | |
| 142 | /* Place EQ address in RAMROD */ |
| 143 | p_ramrod->event_ring_pbl_addr.hi = |
| 144 | DMA_HI_LE(p_hwfn->p_eq->chain.pbl.p_phys_table); |
| 145 | p_ramrod->event_ring_pbl_addr.lo = |
| 146 | DMA_LO_LE(p_hwfn->p_eq->chain.pbl.p_phys_table); |
| 147 | p_ramrod->event_ring_num_pages = (u8)p_hwfn->p_eq->chain.page_cnt; |
| 148 | |
| 149 | p_ramrod->consolid_q_pbl_addr.hi = |
| 150 | DMA_HI_LE(p_hwfn->p_consq->chain.pbl.p_phys_table); |
| 151 | p_ramrod->consolid_q_pbl_addr.lo = |
| 152 | DMA_LO_LE(p_hwfn->p_consq->chain.pbl.p_phys_table); |
| 153 | |
| 154 | p_hwfn->hw_info.personality = PERSONALITY_ETH; |
| 155 | |
| 156 | DP_VERBOSE(p_hwfn, QED_MSG_SPQ, |
Yuval Mintz | fc48b7a | 2016-02-15 13:22:35 -0500 | [diff] [blame^] | 157 | "Setting event_ring_sb [id %04x index %02x], outer_tag [%d]\n", |
Yuval Mintz | fe56b9e | 2015-10-26 11:02:25 +0200 | [diff] [blame] | 158 | sb, sb_index, |
Yuval Mintz | fe56b9e | 2015-10-26 11:02:25 +0200 | [diff] [blame] | 159 | p_ramrod->outer_tag); |
| 160 | |
| 161 | return qed_spq_post(p_hwfn, p_ent, NULL); |
| 162 | } |
| 163 | |
| 164 | int qed_sp_pf_stop(struct qed_hwfn *p_hwfn) |
| 165 | { |
| 166 | struct qed_sp_init_request_params params; |
| 167 | struct qed_spq_entry *p_ent = NULL; |
| 168 | int rc = -EINVAL; |
| 169 | |
| 170 | memset(¶ms, 0, sizeof(params)); |
| 171 | params.comp_mode = QED_SPQ_MODE_EBLOCK; |
| 172 | |
| 173 | rc = qed_sp_init_request(p_hwfn, &p_ent, qed_spq_get_cid(p_hwfn), |
| 174 | p_hwfn->hw_info.opaque_fid, |
| 175 | COMMON_RAMROD_PF_STOP, PROTOCOLID_COMMON, |
| 176 | ¶ms); |
| 177 | if (rc) |
| 178 | return rc; |
| 179 | |
| 180 | return qed_spq_post(p_hwfn, p_ent, NULL); |
| 181 | } |