| Ulrich Hecht | 0dce545 | 2014-09-05 12:23:48 +0200 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2014 Renesas Electronics Corporation |
| 3 | * Copyright 2013 Ideas On Board SPRL |
| 4 | * |
| 5 | * This program is free software; you can redistribute it and/or modify |
| 6 | * it under the terms of the GNU General Public License as published by |
| 7 | * the Free Software Foundation; either version 2 of the License, or |
| 8 | * (at your option) any later version. |
| 9 | */ |
| 10 | |
| 11 | #ifndef __DT_BINDINGS_CLOCK_R8A7794_H__ |
| 12 | #define __DT_BINDINGS_CLOCK_R8A7794_H__ |
| 13 | |
| 14 | /* CPG */ |
| 15 | #define R8A7794_CLK_MAIN 0 |
| 16 | #define R8A7794_CLK_PLL0 1 |
| 17 | #define R8A7794_CLK_PLL1 2 |
| 18 | #define R8A7794_CLK_PLL3 3 |
| 19 | #define R8A7794_CLK_LB 4 |
| 20 | #define R8A7794_CLK_QSPI 5 |
| 21 | #define R8A7794_CLK_SDH 6 |
| 22 | #define R8A7794_CLK_SD0 7 |
| 23 | #define R8A7794_CLK_Z 8 |
| 24 | |
| 25 | /* MSTP0 */ |
| 26 | #define R8A7794_CLK_MSIOF0 0 |
| 27 | |
| 28 | /* MSTP1 */ |
| 29 | #define R8A7794_CLK_TMU1 11 |
| 30 | #define R8A7794_CLK_TMU3 21 |
| 31 | #define R8A7794_CLK_TMU2 22 |
| 32 | #define R8A7794_CLK_CMT0 24 |
| 33 | #define R8A7794_CLK_TMU0 25 |
| 34 | |
| 35 | /* MSTP2 */ |
| 36 | #define R8A7794_CLK_SCIFA2 2 |
| 37 | #define R8A7794_CLK_SCIFA1 3 |
| 38 | #define R8A7794_CLK_SCIFA0 4 |
| 39 | #define R8A7794_CLK_MSIOF2 5 |
| 40 | #define R8A7794_CLK_SCIFB0 6 |
| 41 | #define R8A7794_CLK_SCIFB1 7 |
| 42 | #define R8A7794_CLK_MSIOF1 8 |
| 43 | #define R8A7794_CLK_SCIFB2 16 |
| 44 | |
| 45 | /* MSTP3 */ |
| 46 | #define R8A7794_CLK_CMT1 29 |
| 47 | |
| 48 | /* MSTP5 */ |
| 49 | #define R8A7794_CLK_THERMAL 22 |
| 50 | #define R8A7794_CLK_PWM 23 |
| 51 | |
| 52 | /* MSTP7 */ |
| 53 | #define R8A7794_CLK_HSCIF2 13 |
| 54 | #define R8A7794_CLK_SCIF5 14 |
| 55 | #define R8A7794_CLK_SCIF4 15 |
| 56 | #define R8A7794_CLK_HSCIF1 16 |
| 57 | #define R8A7794_CLK_HSCIF0 17 |
| 58 | #define R8A7794_CLK_SCIF3 18 |
| 59 | #define R8A7794_CLK_SCIF2 19 |
| 60 | #define R8A7794_CLK_SCIF1 20 |
| 61 | #define R8A7794_CLK_SCIF0 21 |
| 62 | |
| 63 | /* MSTP8 */ |
| 64 | #define R8A7794_CLK_ETHER 13 |
| 65 | |
| 66 | /* MSTP9 */ |
| 67 | #define R8A7794_CLK_GPIO6 5 |
| 68 | #define R8A7794_CLK_GPIO5 7 |
| 69 | #define R8A7794_CLK_GPIO4 8 |
| 70 | #define R8A7794_CLK_GPIO3 9 |
| 71 | #define R8A7794_CLK_GPIO2 10 |
| 72 | #define R8A7794_CLK_GPIO1 11 |
| 73 | #define R8A7794_CLK_GPIO0 12 |
| 74 | |
| 75 | /* MSTP11 */ |
| 76 | #define R8A7794_CLK_SCIFA3 6 |
| 77 | #define R8A7794_CLK_SCIFA4 7 |
| 78 | #define R8A7794_CLK_SCIFA5 8 |
| 79 | |
| 80 | #endif /* __DT_BINDINGS_CLOCK_R8A7794_H__ */ |