blob: 14ae15b6faab8c5040df4b7ecce11bf806bb666d [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * linux/include/asm-arm/cacheflush.h
3 *
4 * Copyright (C) 2000-2002 Russell King
5 * Copyright (C) 2003 Ian Molton
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 * ARM26 cache 'functions'
12 *
13 */
14
15#ifndef _ASMARM_CACHEFLUSH_H
16#define _ASMARM_CACHEFLUSH_H
17
18#if 1 //FIXME - BAD INCLUDES!!!
19#include <linux/sched.h>
20#include <linux/mm.h>
21#endif
22
23#define flush_cache_all() do { } while (0)
24#define flush_cache_mm(mm) do { } while (0)
Ralf Baechleec8c0442006-12-12 17:14:57 +000025#define flush_cache_dup_mm(mm) do { } while (0)
Linus Torvalds1da177e2005-04-16 15:20:36 -070026#define flush_cache_range(vma,start,end) do { } while (0)
27#define flush_cache_page(vma,vmaddr,pfn) do { } while (0)
28#define flush_cache_vmap(start, end) do { } while (0)
29#define flush_cache_vunmap(start, end) do { } while (0)
30
31#define invalidate_dcache_range(start,end) do { } while (0)
32#define clean_dcache_range(start,end) do { } while (0)
33#define flush_dcache_range(start,end) do { } while (0)
34#define flush_dcache_page(page) do { } while (0)
35#define flush_dcache_mmap_lock(mapping) do { } while (0)
36#define flush_dcache_mmap_unlock(mapping) do { } while (0)
37#define clean_dcache_entry(_s) do { } while (0)
38#define clean_cache_entry(_start) do { } while (0)
39
40#define flush_icache_user_range(start,end, bob, fred) do { } while (0)
41#define flush_icache_range(start,end) do { } while (0)
42#define flush_icache_page(vma,page) do { } while (0)
43
44#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
45 memcpy(dst, src, len)
46#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
47 memcpy(dst, src, len)
48
49/* DAG: ARM3 will flush cache on MEMC updates anyway? so don't bother */
50/* IM : Yes, it will, but only if setup to do so (we do this). */
51#define clean_cache_area(_start,_size) do { } while (0)
52
53#endif