Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
| 2 | * ALSA driver for ICEnsemble ICE1724 (Envy24) |
| 3 | * |
| 4 | * Lowlevel functions for Terratec PHASE 22 |
| 5 | * |
| 6 | * Copyright (c) 2005 Misha Zhilin <misha@epiphan.com> |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License as published by |
| 10 | * the Free Software Foundation; either version 2 of the License, or |
| 11 | * (at your option) any later version. |
| 12 | * |
| 13 | * This program is distributed in the hope that it will be useful, |
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | * GNU General Public License for more details. |
| 17 | * |
| 18 | * You should have received a copy of the GNU General Public License |
| 19 | * along with this program; if not, write to the Free Software |
| 20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 21 | * |
| 22 | */ |
| 23 | |
| 24 | /* PHASE 22 overview: |
| 25 | * Audio controller: VIA Envy24HT-S (slightly trimmed down version of Envy24HT) |
| 26 | * Analog chip: AK4524 (partially via Philip's 74HCT125) |
| 27 | * Digital receiver: CS8414-CS (not supported in this release) |
| 28 | * |
| 29 | * Envy connects to AK4524 |
| 30 | * - CS directly from GPIO 10 |
| 31 | * - CCLK via 74HCT125's gate #4 from GPIO 4 |
| 32 | * - CDTI via 74HCT125's gate #2 from GPIO 5 |
| 33 | * CDTI may be completely blocked by 74HCT125's gate #1 controlled by GPIO 3 |
| 34 | */ |
| 35 | |
| 36 | #include <sound/driver.h> |
| 37 | #include <asm/io.h> |
| 38 | #include <linux/delay.h> |
| 39 | #include <linux/interrupt.h> |
| 40 | #include <linux/init.h> |
| 41 | #include <linux/slab.h> |
Ingo Molnar | 62932df | 2006-01-16 16:34:20 +0100 | [diff] [blame] | 42 | #include <linux/mutex.h> |
| 43 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 44 | #include <sound/core.h> |
| 45 | |
| 46 | #include "ice1712.h" |
| 47 | #include "envy24ht.h" |
| 48 | #include "phase.h" |
| 49 | |
Simone Zinanni | aed058e | 2005-04-11 14:08:40 +0200 | [diff] [blame] | 50 | /* WM8770 registers */ |
| 51 | #define WM_DAC_ATTEN 0x00 /* DAC1-8 analog attenuation */ |
| 52 | #define WM_DAC_MASTER_ATTEN 0x08 /* DAC master analog attenuation */ |
| 53 | #define WM_DAC_DIG_ATTEN 0x09 /* DAC1-8 digital attenuation */ |
| 54 | #define WM_DAC_DIG_MASTER_ATTEN 0x11 /* DAC master digital attenuation */ |
| 55 | #define WM_PHASE_SWAP 0x12 /* DAC phase */ |
| 56 | #define WM_DAC_CTRL1 0x13 /* DAC control bits */ |
| 57 | #define WM_MUTE 0x14 /* mute controls */ |
| 58 | #define WM_DAC_CTRL2 0x15 /* de-emphasis and zefo-flag */ |
| 59 | #define WM_INT_CTRL 0x16 /* interface control */ |
| 60 | #define WM_MASTER 0x17 /* master clock and mode */ |
| 61 | #define WM_POWERDOWN 0x18 /* power-down controls */ |
| 62 | #define WM_ADC_GAIN 0x19 /* ADC gain L(19)/R(1a) */ |
| 63 | #define WM_ADC_MUX 0x1b /* input MUX */ |
| 64 | #define WM_OUT_MUX1 0x1c /* output MUX */ |
| 65 | #define WM_OUT_MUX2 0x1e /* output MUX */ |
| 66 | #define WM_RESET 0x1f /* software reset */ |
| 67 | |
| 68 | |
| 69 | /* |
| 70 | * Logarithmic volume values for WM8770 |
| 71 | * Computed as 20 * Log10(255 / x) |
| 72 | */ |
| 73 | static unsigned char wm_vol[256] = { |
| 74 | 127, 48, 42, 39, 36, 34, 33, 31, 30, 29, 28, 27, 27, 26, 25, 25, 24, 24, 23, |
| 75 | 23, 22, 22, 21, 21, 21, 20, 20, 20, 19, 19, 19, 18, 18, 18, 18, 17, 17, 17, |
| 76 | 17, 16, 16, 16, 16, 15, 15, 15, 15, 15, 15, 14, 14, 14, 14, 14, 13, 13, 13, |
| 77 | 13, 13, 13, 13, 12, 12, 12, 12, 12, 12, 12, 11, 11, 11, 11, 11, 11, 11, 11, |
| 78 | 11, 10, 10, 10, 10, 10, 10, 10, 10, 10, 9, 9, 9, 9, 9, 9, 9, 9, 9, 9, 8, 8, |
| 79 | 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 6, 6, 6, |
| 80 | 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 6, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, 5, |
| 81 | 5, 5, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, |
| 82 | 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, |
| 83 | 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, |
| 84 | 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, |
| 85 | 0, 0 |
| 86 | }; |
| 87 | |
| 88 | #define WM_VOL_MAX (sizeof(wm_vol) - 1) |
| 89 | #define WM_VOL_MUTE 0x8000 |
| 90 | |
Takashi Iwai | ab0c7d7 | 2005-11-17 15:00:18 +0100 | [diff] [blame] | 91 | static struct snd_akm4xxx akm_phase22 __devinitdata = { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 92 | .type = SND_AK4524, |
| 93 | .num_dacs = 2, |
| 94 | .num_adcs = 2, |
| 95 | }; |
| 96 | |
| 97 | static struct snd_ak4xxx_private akm_phase22_priv __devinitdata = { |
| 98 | .caddr = 2, |
| 99 | .cif = 1, |
| 100 | .data_mask = 1 << 4, |
| 101 | .clk_mask = 1 << 5, |
| 102 | .cs_mask = 1 << 10, |
| 103 | .cs_addr = 1 << 10, |
| 104 | .cs_none = 0, |
| 105 | .add_flags = 1 << 3, |
| 106 | .mask_flags = 0, |
| 107 | }; |
| 108 | |
Takashi Iwai | ab0c7d7 | 2005-11-17 15:00:18 +0100 | [diff] [blame] | 109 | static int __devinit phase22_init(struct snd_ice1712 *ice) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 110 | { |
Takashi Iwai | ab0c7d7 | 2005-11-17 15:00:18 +0100 | [diff] [blame] | 111 | struct snd_akm4xxx *ak; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 112 | int err; |
| 113 | |
| 114 | // Configure DAC/ADC description for generic part of ice1724 |
| 115 | switch (ice->eeprom.subvendor) { |
| 116 | case VT1724_SUBDEVICE_PHASE22: |
| 117 | ice->num_total_dacs = 2; |
| 118 | ice->num_total_adcs = 2; |
| 119 | ice->vt1720 = 1; // Envy24HT-S have 16 bit wide GPIO |
| 120 | break; |
| 121 | default: |
| 122 | snd_BUG(); |
| 123 | return -EINVAL; |
| 124 | } |
| 125 | |
| 126 | // Initialize analog chips |
Takashi Iwai | ab0c7d7 | 2005-11-17 15:00:18 +0100 | [diff] [blame] | 127 | ak = ice->akm = kzalloc(sizeof(struct snd_akm4xxx), GFP_KERNEL); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 128 | if (! ak) |
| 129 | return -ENOMEM; |
| 130 | ice->akm_codecs = 1; |
| 131 | switch (ice->eeprom.subvendor) { |
| 132 | case VT1724_SUBDEVICE_PHASE22: |
| 133 | if ((err = snd_ice1712_akm4xxx_init(ak, &akm_phase22, &akm_phase22_priv, ice)) < 0) |
| 134 | return err; |
| 135 | break; |
| 136 | } |
| 137 | |
| 138 | return 0; |
| 139 | } |
| 140 | |
Takashi Iwai | ab0c7d7 | 2005-11-17 15:00:18 +0100 | [diff] [blame] | 141 | static int __devinit phase22_add_controls(struct snd_ice1712 *ice) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 142 | { |
| 143 | int err = 0; |
| 144 | |
| 145 | switch (ice->eeprom.subvendor) { |
| 146 | case VT1724_SUBDEVICE_PHASE22: |
| 147 | err = snd_ice1712_akm4xxx_build_controls(ice); |
| 148 | if (err < 0) |
| 149 | return err; |
| 150 | } |
| 151 | return 0; |
| 152 | } |
| 153 | |
| 154 | static unsigned char phase22_eeprom[] __devinitdata = { |
| 155 | 0x00, /* SYSCONF: 1xADC, 1xDACs */ |
| 156 | 0x80, /* ACLINK: I2S */ |
| 157 | 0xf8, /* I2S: vol, 96k, 24bit*/ |
| 158 | 0xc3, /* SPDIF: out-en, out-int, spdif-in */ |
| 159 | 0xFF, /* GPIO_DIR */ |
| 160 | 0xFF, /* GPIO_DIR1 */ |
| 161 | 0xFF, /* GPIO_DIR2 */ |
| 162 | 0x00, /* GPIO_MASK */ |
| 163 | 0x00, /* GPIO_MASK1 */ |
| 164 | 0x00, /* GPIO_MASK2 */ |
| 165 | 0x00, /* GPIO_STATE: */ |
| 166 | 0x00, /* GPIO_STATE1: */ |
| 167 | 0x00, /* GPIO_STATE2 */ |
| 168 | }; |
| 169 | |
Simone Zinanni | aed058e | 2005-04-11 14:08:40 +0200 | [diff] [blame] | 170 | static unsigned char phase28_eeprom[] __devinitdata = { |
| 171 | 0x0b, /* SYSCONF: clock 512, spdif-in/ADC, 4DACs */ |
| 172 | 0x80, /* ACLINK: I2S */ |
| 173 | 0xfc, /* I2S: vol, 96k, 24bit, 192k */ |
| 174 | 0xc3, /* SPDIF: out-en, out-int, spdif-in */ |
| 175 | 0xff, /* GPIO_DIR */ |
| 176 | 0xff, /* GPIO_DIR1 */ |
| 177 | 0x5f, /* GPIO_DIR2 */ |
| 178 | 0x00, /* GPIO_MASK */ |
| 179 | 0x00, /* GPIO_MASK1 */ |
| 180 | 0x00, /* GPIO_MASK2 */ |
| 181 | 0x00, /* GPIO_STATE */ |
| 182 | 0x00, /* GPIO_STATE1 */ |
| 183 | 0x00, /* GPIO_STATE2 */ |
| 184 | }; |
| 185 | |
| 186 | /* |
| 187 | * write data in the SPI mode |
| 188 | */ |
Takashi Iwai | ab0c7d7 | 2005-11-17 15:00:18 +0100 | [diff] [blame] | 189 | static void phase28_spi_write(struct snd_ice1712 *ice, unsigned int cs, unsigned int data, int bits) |
Simone Zinanni | aed058e | 2005-04-11 14:08:40 +0200 | [diff] [blame] | 190 | { |
| 191 | unsigned int tmp; |
| 192 | int i; |
| 193 | |
| 194 | tmp = snd_ice1712_gpio_read(ice); |
| 195 | |
| 196 | snd_ice1712_gpio_set_mask(ice, ~(PHASE28_WM_RW|PHASE28_SPI_MOSI|PHASE28_SPI_CLK| |
| 197 | PHASE28_WM_CS)); |
| 198 | tmp |= PHASE28_WM_RW; |
| 199 | tmp &= ~cs; |
| 200 | snd_ice1712_gpio_write(ice, tmp); |
| 201 | udelay(1); |
| 202 | |
| 203 | for (i = bits - 1; i >= 0; i--) { |
| 204 | tmp &= ~PHASE28_SPI_CLK; |
| 205 | snd_ice1712_gpio_write(ice, tmp); |
| 206 | udelay(1); |
| 207 | if (data & (1 << i)) |
| 208 | tmp |= PHASE28_SPI_MOSI; |
| 209 | else |
| 210 | tmp &= ~PHASE28_SPI_MOSI; |
| 211 | snd_ice1712_gpio_write(ice, tmp); |
| 212 | udelay(1); |
| 213 | tmp |= PHASE28_SPI_CLK; |
| 214 | snd_ice1712_gpio_write(ice, tmp); |
| 215 | udelay(1); |
| 216 | } |
| 217 | |
| 218 | tmp &= ~PHASE28_SPI_CLK; |
| 219 | tmp |= cs; |
| 220 | snd_ice1712_gpio_write(ice, tmp); |
| 221 | udelay(1); |
| 222 | tmp |= PHASE28_SPI_CLK; |
| 223 | snd_ice1712_gpio_write(ice, tmp); |
| 224 | udelay(1); |
| 225 | } |
| 226 | |
| 227 | /* |
| 228 | * get the current register value of WM codec |
| 229 | */ |
Takashi Iwai | ab0c7d7 | 2005-11-17 15:00:18 +0100 | [diff] [blame] | 230 | static unsigned short wm_get(struct snd_ice1712 *ice, int reg) |
Simone Zinanni | aed058e | 2005-04-11 14:08:40 +0200 | [diff] [blame] | 231 | { |
| 232 | reg <<= 1; |
| 233 | return ((unsigned short)ice->akm[0].images[reg] << 8) | |
| 234 | ice->akm[0].images[reg + 1]; |
| 235 | } |
| 236 | |
| 237 | /* |
| 238 | * set the register value of WM codec |
| 239 | */ |
Takashi Iwai | ab0c7d7 | 2005-11-17 15:00:18 +0100 | [diff] [blame] | 240 | static void wm_put_nocache(struct snd_ice1712 *ice, int reg, unsigned short val) |
Simone Zinanni | aed058e | 2005-04-11 14:08:40 +0200 | [diff] [blame] | 241 | { |
| 242 | phase28_spi_write(ice, PHASE28_WM_CS, (reg << 9) | (val & 0x1ff), 16); |
| 243 | } |
| 244 | |
| 245 | /* |
| 246 | * set the register value of WM codec and remember it |
| 247 | */ |
Takashi Iwai | ab0c7d7 | 2005-11-17 15:00:18 +0100 | [diff] [blame] | 248 | static void wm_put(struct snd_ice1712 *ice, int reg, unsigned short val) |
Simone Zinanni | aed058e | 2005-04-11 14:08:40 +0200 | [diff] [blame] | 249 | { |
| 250 | wm_put_nocache(ice, reg, val); |
| 251 | reg <<= 1; |
| 252 | ice->akm[0].images[reg] = val >> 8; |
| 253 | ice->akm[0].images[reg + 1] = val; |
| 254 | } |
| 255 | |
Takashi Iwai | ab0c7d7 | 2005-11-17 15:00:18 +0100 | [diff] [blame] | 256 | static void wm_set_vol(struct snd_ice1712 *ice, unsigned int index, unsigned short vol, unsigned short master) |
Simone Zinanni | aed058e | 2005-04-11 14:08:40 +0200 | [diff] [blame] | 257 | { |
| 258 | unsigned char nvol; |
| 259 | |
| 260 | if ((master & WM_VOL_MUTE) || (vol & WM_VOL_MUTE)) |
| 261 | nvol = 0; |
| 262 | else |
| 263 | nvol = 127 - wm_vol[(((vol & ~WM_VOL_MUTE) * (master & ~WM_VOL_MUTE)) / 127) & WM_VOL_MAX]; |
| 264 | |
| 265 | wm_put(ice, index, nvol); |
| 266 | wm_put_nocache(ice, index, 0x180 | nvol); |
| 267 | } |
| 268 | |
| 269 | /* |
| 270 | * DAC mute control |
| 271 | */ |
| 272 | #define wm_pcm_mute_info phase28_mono_bool_info |
| 273 | |
Takashi Iwai | ab0c7d7 | 2005-11-17 15:00:18 +0100 | [diff] [blame] | 274 | static int wm_pcm_mute_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) |
Simone Zinanni | aed058e | 2005-04-11 14:08:40 +0200 | [diff] [blame] | 275 | { |
Takashi Iwai | ab0c7d7 | 2005-11-17 15:00:18 +0100 | [diff] [blame] | 276 | struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); |
Simone Zinanni | aed058e | 2005-04-11 14:08:40 +0200 | [diff] [blame] | 277 | |
Ingo Molnar | 62932df | 2006-01-16 16:34:20 +0100 | [diff] [blame] | 278 | mutex_lock(&ice->gpio_mutex); |
Simone Zinanni | aed058e | 2005-04-11 14:08:40 +0200 | [diff] [blame] | 279 | ucontrol->value.integer.value[0] = (wm_get(ice, WM_MUTE) & 0x10) ? 0 : 1; |
Ingo Molnar | 62932df | 2006-01-16 16:34:20 +0100 | [diff] [blame] | 280 | mutex_unlock(&ice->gpio_mutex); |
Simone Zinanni | aed058e | 2005-04-11 14:08:40 +0200 | [diff] [blame] | 281 | return 0; |
| 282 | } |
| 283 | |
Takashi Iwai | ab0c7d7 | 2005-11-17 15:00:18 +0100 | [diff] [blame] | 284 | static int wm_pcm_mute_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) |
Simone Zinanni | aed058e | 2005-04-11 14:08:40 +0200 | [diff] [blame] | 285 | { |
Takashi Iwai | ab0c7d7 | 2005-11-17 15:00:18 +0100 | [diff] [blame] | 286 | struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); |
Simone Zinanni | aed058e | 2005-04-11 14:08:40 +0200 | [diff] [blame] | 287 | unsigned short nval, oval; |
| 288 | int change; |
| 289 | |
| 290 | snd_ice1712_save_gpio_status(ice); |
| 291 | oval = wm_get(ice, WM_MUTE); |
| 292 | nval = (oval & ~0x10) | (ucontrol->value.integer.value[0] ? 0 : 0x10); |
| 293 | if ((change = (nval != oval))) |
| 294 | wm_put(ice, WM_MUTE, nval); |
| 295 | snd_ice1712_restore_gpio_status(ice); |
| 296 | |
| 297 | return change; |
| 298 | } |
| 299 | |
| 300 | /* |
| 301 | * Master volume attenuation mixer control |
| 302 | */ |
Takashi Iwai | ab0c7d7 | 2005-11-17 15:00:18 +0100 | [diff] [blame] | 303 | static int wm_master_vol_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) |
Simone Zinanni | aed058e | 2005-04-11 14:08:40 +0200 | [diff] [blame] | 304 | { |
| 305 | uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; |
| 306 | uinfo->count = 2; |
| 307 | uinfo->value.integer.min = 0; |
| 308 | uinfo->value.integer.max = WM_VOL_MAX; |
| 309 | return 0; |
| 310 | } |
| 311 | |
Takashi Iwai | ab0c7d7 | 2005-11-17 15:00:18 +0100 | [diff] [blame] | 312 | static int wm_master_vol_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) |
Simone Zinanni | aed058e | 2005-04-11 14:08:40 +0200 | [diff] [blame] | 313 | { |
Takashi Iwai | ab0c7d7 | 2005-11-17 15:00:18 +0100 | [diff] [blame] | 314 | struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); |
Simone Zinanni | aed058e | 2005-04-11 14:08:40 +0200 | [diff] [blame] | 315 | int i; |
| 316 | for (i=0; i<2; i++) |
| 317 | ucontrol->value.integer.value[i] = ice->spec.phase28.master[i] & ~WM_VOL_MUTE; |
| 318 | return 0; |
| 319 | } |
| 320 | |
Takashi Iwai | ab0c7d7 | 2005-11-17 15:00:18 +0100 | [diff] [blame] | 321 | static int wm_master_vol_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) |
Simone Zinanni | aed058e | 2005-04-11 14:08:40 +0200 | [diff] [blame] | 322 | { |
Takashi Iwai | ab0c7d7 | 2005-11-17 15:00:18 +0100 | [diff] [blame] | 323 | struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); |
Simone Zinanni | aed058e | 2005-04-11 14:08:40 +0200 | [diff] [blame] | 324 | int ch, change = 0; |
| 325 | |
| 326 | snd_ice1712_save_gpio_status(ice); |
| 327 | for (ch = 0; ch < 2; ch++) { |
| 328 | if (ucontrol->value.integer.value[ch] != ice->spec.phase28.master[ch]) { |
| 329 | int dac; |
| 330 | ice->spec.phase28.master[ch] &= WM_VOL_MUTE; |
| 331 | ice->spec.phase28.master[ch] |= ucontrol->value.integer.value[ch]; |
| 332 | for (dac = 0; dac < ice->num_total_dacs; dac += 2) |
| 333 | wm_set_vol(ice, WM_DAC_ATTEN + dac + ch, |
| 334 | ice->spec.phase28.vol[dac + ch], |
| 335 | ice->spec.phase28.master[ch]); |
| 336 | change = 1; |
| 337 | } |
| 338 | } |
| 339 | snd_ice1712_restore_gpio_status(ice); |
| 340 | return change; |
| 341 | } |
| 342 | |
Takashi Iwai | ab0c7d7 | 2005-11-17 15:00:18 +0100 | [diff] [blame] | 343 | static int __devinit phase28_init(struct snd_ice1712 *ice) |
Simone Zinanni | aed058e | 2005-04-11 14:08:40 +0200 | [diff] [blame] | 344 | { |
| 345 | static unsigned short wm_inits_phase28[] = { |
| 346 | /* These come first to reduce init pop noise */ |
| 347 | 0x1b, 0x044, /* ADC Mux (AC'97 source) */ |
| 348 | 0x1c, 0x00B, /* Out Mux1 (VOUT1 = DAC+AUX, VOUT2 = DAC) */ |
| 349 | 0x1d, 0x009, /* Out Mux2 (VOUT2 = DAC, VOUT3 = DAC) */ |
| 350 | |
| 351 | 0x18, 0x000, /* All power-up */ |
| 352 | |
| 353 | 0x16, 0x122, /* I2S, normal polarity, 24bit */ |
| 354 | 0x17, 0x022, /* 256fs, slave mode */ |
| 355 | 0x00, 0, /* DAC1 analog mute */ |
| 356 | 0x01, 0, /* DAC2 analog mute */ |
| 357 | 0x02, 0, /* DAC3 analog mute */ |
| 358 | 0x03, 0, /* DAC4 analog mute */ |
| 359 | 0x04, 0, /* DAC5 analog mute */ |
| 360 | 0x05, 0, /* DAC6 analog mute */ |
| 361 | 0x06, 0, /* DAC7 analog mute */ |
| 362 | 0x07, 0, /* DAC8 analog mute */ |
| 363 | 0x08, 0x100, /* master analog mute */ |
| 364 | 0x09, 0xff, /* DAC1 digital full */ |
| 365 | 0x0a, 0xff, /* DAC2 digital full */ |
| 366 | 0x0b, 0xff, /* DAC3 digital full */ |
| 367 | 0x0c, 0xff, /* DAC4 digital full */ |
| 368 | 0x0d, 0xff, /* DAC5 digital full */ |
| 369 | 0x0e, 0xff, /* DAC6 digital full */ |
| 370 | 0x0f, 0xff, /* DAC7 digital full */ |
| 371 | 0x10, 0xff, /* DAC8 digital full */ |
| 372 | 0x11, 0x1ff, /* master digital full */ |
| 373 | 0x12, 0x000, /* phase normal */ |
| 374 | 0x13, 0x090, /* unmute DAC L/R */ |
| 375 | 0x14, 0x000, /* all unmute */ |
| 376 | 0x15, 0x000, /* no deemphasis, no ZFLG */ |
| 377 | 0x19, 0x000, /* -12dB ADC/L */ |
| 378 | 0x1a, 0x000, /* -12dB ADC/R */ |
| 379 | (unsigned short)-1 |
| 380 | }; |
| 381 | |
| 382 | unsigned int tmp; |
Takashi Iwai | ab0c7d7 | 2005-11-17 15:00:18 +0100 | [diff] [blame] | 383 | struct snd_akm4xxx *ak; |
Simone Zinanni | aed058e | 2005-04-11 14:08:40 +0200 | [diff] [blame] | 384 | unsigned short *p; |
| 385 | int i; |
| 386 | |
| 387 | ice->num_total_dacs = 8; |
| 388 | ice->num_total_adcs = 2; |
| 389 | |
| 390 | // Initialize analog chips |
Takashi Iwai | ab0c7d7 | 2005-11-17 15:00:18 +0100 | [diff] [blame] | 391 | ak = ice->akm = kzalloc(sizeof(struct snd_akm4xxx), GFP_KERNEL); |
Simone Zinanni | aed058e | 2005-04-11 14:08:40 +0200 | [diff] [blame] | 392 | if (!ak) |
| 393 | return -ENOMEM; |
| 394 | ice->akm_codecs = 1; |
| 395 | |
| 396 | snd_ice1712_gpio_set_dir(ice, 0x5fffff); /* fix this for the time being */ |
| 397 | |
| 398 | /* reset the wm codec as the SPI mode */ |
| 399 | snd_ice1712_save_gpio_status(ice); |
| 400 | snd_ice1712_gpio_set_mask(ice, ~(PHASE28_WM_RESET|PHASE28_WM_CS|PHASE28_HP_SEL)); |
| 401 | |
| 402 | tmp = snd_ice1712_gpio_read(ice); |
| 403 | tmp &= ~PHASE28_WM_RESET; |
| 404 | snd_ice1712_gpio_write(ice, tmp); |
| 405 | udelay(1); |
| 406 | tmp |= PHASE28_WM_CS; |
| 407 | snd_ice1712_gpio_write(ice, tmp); |
| 408 | udelay(1); |
| 409 | tmp |= PHASE28_WM_RESET; |
| 410 | snd_ice1712_gpio_write(ice, tmp); |
| 411 | udelay(1); |
| 412 | |
| 413 | p = wm_inits_phase28; |
| 414 | for (; *p != (unsigned short)-1; p += 2) |
| 415 | wm_put(ice, p[0], p[1]); |
| 416 | |
| 417 | snd_ice1712_restore_gpio_status(ice); |
| 418 | |
| 419 | ice->spec.phase28.master[0] = WM_VOL_MUTE; |
| 420 | ice->spec.phase28.master[1] = WM_VOL_MUTE; |
| 421 | for (i = 0; i < ice->num_total_dacs; i++) { |
| 422 | ice->spec.phase28.vol[i] = WM_VOL_MUTE; |
| 423 | wm_set_vol(ice, i, ice->spec.phase28.vol[i], ice->spec.phase28.master[i % 2]); |
| 424 | } |
| 425 | |
| 426 | return 0; |
| 427 | } |
| 428 | |
| 429 | /* |
| 430 | * DAC volume attenuation mixer control |
| 431 | */ |
Takashi Iwai | ab0c7d7 | 2005-11-17 15:00:18 +0100 | [diff] [blame] | 432 | static int wm_vol_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) |
Simone Zinanni | aed058e | 2005-04-11 14:08:40 +0200 | [diff] [blame] | 433 | { |
| 434 | int voices = kcontrol->private_value >> 8; |
| 435 | uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; |
| 436 | uinfo->count = voices; |
| 437 | uinfo->value.integer.min = 0; /* mute (-101dB) */ |
| 438 | uinfo->value.integer.max = 0x7F; /* 0dB */ |
| 439 | return 0; |
| 440 | } |
| 441 | |
Takashi Iwai | ab0c7d7 | 2005-11-17 15:00:18 +0100 | [diff] [blame] | 442 | static int wm_vol_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) |
Simone Zinanni | aed058e | 2005-04-11 14:08:40 +0200 | [diff] [blame] | 443 | { |
Takashi Iwai | ab0c7d7 | 2005-11-17 15:00:18 +0100 | [diff] [blame] | 444 | struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); |
Simone Zinanni | aed058e | 2005-04-11 14:08:40 +0200 | [diff] [blame] | 445 | int i, ofs, voices; |
| 446 | |
| 447 | voices = kcontrol->private_value >> 8; |
| 448 | ofs = kcontrol->private_value & 0xff; |
| 449 | for (i = 0; i < voices; i++) |
| 450 | ucontrol->value.integer.value[i] = ice->spec.phase28.vol[ofs+i] & ~WM_VOL_MUTE; |
| 451 | return 0; |
| 452 | } |
| 453 | |
Takashi Iwai | ab0c7d7 | 2005-11-17 15:00:18 +0100 | [diff] [blame] | 454 | static int wm_vol_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) |
Simone Zinanni | aed058e | 2005-04-11 14:08:40 +0200 | [diff] [blame] | 455 | { |
Takashi Iwai | ab0c7d7 | 2005-11-17 15:00:18 +0100 | [diff] [blame] | 456 | struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); |
Simone Zinanni | aed058e | 2005-04-11 14:08:40 +0200 | [diff] [blame] | 457 | int i, idx, ofs, voices; |
| 458 | int change = 0; |
| 459 | |
| 460 | voices = kcontrol->private_value >> 8; |
| 461 | ofs = kcontrol->private_value & 0xff; |
| 462 | snd_ice1712_save_gpio_status(ice); |
| 463 | for (i = 0; i < voices; i++) { |
| 464 | idx = WM_DAC_ATTEN + ofs + i; |
| 465 | if (ucontrol->value.integer.value[i] != ice->spec.phase28.vol[ofs+i]) { |
| 466 | ice->spec.phase28.vol[ofs+i] &= WM_VOL_MUTE; |
| 467 | ice->spec.phase28.vol[ofs+i] |= ucontrol->value.integer.value[i]; |
| 468 | wm_set_vol(ice, idx, ice->spec.phase28.vol[ofs+i], |
| 469 | ice->spec.phase28.master[i]); |
| 470 | change = 1; |
| 471 | } |
| 472 | } |
| 473 | snd_ice1712_restore_gpio_status(ice); |
| 474 | return change; |
| 475 | } |
| 476 | |
| 477 | /* |
| 478 | * WM8770 mute control |
| 479 | */ |
Takashi Iwai | ab0c7d7 | 2005-11-17 15:00:18 +0100 | [diff] [blame] | 480 | static int wm_mute_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) { |
Simone Zinanni | aed058e | 2005-04-11 14:08:40 +0200 | [diff] [blame] | 481 | uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; |
| 482 | uinfo->count = kcontrol->private_value >> 8; |
| 483 | uinfo->value.integer.min = 0; |
| 484 | uinfo->value.integer.max = 1; |
| 485 | return 0; |
| 486 | } |
| 487 | |
Takashi Iwai | ab0c7d7 | 2005-11-17 15:00:18 +0100 | [diff] [blame] | 488 | static int wm_mute_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) |
Simone Zinanni | aed058e | 2005-04-11 14:08:40 +0200 | [diff] [blame] | 489 | { |
Takashi Iwai | ab0c7d7 | 2005-11-17 15:00:18 +0100 | [diff] [blame] | 490 | struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); |
Simone Zinanni | aed058e | 2005-04-11 14:08:40 +0200 | [diff] [blame] | 491 | int voices, ofs, i; |
| 492 | |
| 493 | voices = kcontrol->private_value >> 8; |
| 494 | ofs = kcontrol->private_value & 0xFF; |
| 495 | |
| 496 | for (i = 0; i < voices; i++) |
| 497 | ucontrol->value.integer.value[i] = (ice->spec.phase28.vol[ofs+i] & WM_VOL_MUTE) ? 0 : 1; |
| 498 | return 0; |
| 499 | } |
| 500 | |
Takashi Iwai | ab0c7d7 | 2005-11-17 15:00:18 +0100 | [diff] [blame] | 501 | static int wm_mute_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) |
Simone Zinanni | aed058e | 2005-04-11 14:08:40 +0200 | [diff] [blame] | 502 | { |
Takashi Iwai | ab0c7d7 | 2005-11-17 15:00:18 +0100 | [diff] [blame] | 503 | struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); |
Simone Zinanni | aed058e | 2005-04-11 14:08:40 +0200 | [diff] [blame] | 504 | int change = 0, voices, ofs, i; |
| 505 | |
| 506 | voices = kcontrol->private_value >> 8; |
| 507 | ofs = kcontrol->private_value & 0xFF; |
| 508 | |
| 509 | snd_ice1712_save_gpio_status(ice); |
| 510 | for (i = 0; i < voices; i++) { |
| 511 | int val = (ice->spec.phase28.vol[ofs + i] & WM_VOL_MUTE) ? 0 : 1; |
| 512 | if (ucontrol->value.integer.value[i] != val) { |
| 513 | ice->spec.phase28.vol[ofs + i] &= ~WM_VOL_MUTE; |
| 514 | ice->spec.phase28.vol[ofs + i] |= |
| 515 | ucontrol->value.integer.value[i] ? 0 : WM_VOL_MUTE; |
| 516 | wm_set_vol(ice, ofs + i, ice->spec.phase28.vol[ofs + i], |
| 517 | ice->spec.phase28.master[i]); |
| 518 | change = 1; |
| 519 | } |
| 520 | } |
| 521 | snd_ice1712_restore_gpio_status(ice); |
| 522 | |
| 523 | return change; |
| 524 | } |
| 525 | |
| 526 | /* |
| 527 | * WM8770 master mute control |
| 528 | */ |
Takashi Iwai | ab0c7d7 | 2005-11-17 15:00:18 +0100 | [diff] [blame] | 529 | static int wm_master_mute_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) { |
Simone Zinanni | aed058e | 2005-04-11 14:08:40 +0200 | [diff] [blame] | 530 | uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; |
| 531 | uinfo->count = 2; |
| 532 | uinfo->value.integer.min = 0; |
| 533 | uinfo->value.integer.max = 1; |
| 534 | return 0; |
| 535 | } |
| 536 | |
Takashi Iwai | ab0c7d7 | 2005-11-17 15:00:18 +0100 | [diff] [blame] | 537 | static int wm_master_mute_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) |
Simone Zinanni | aed058e | 2005-04-11 14:08:40 +0200 | [diff] [blame] | 538 | { |
Takashi Iwai | ab0c7d7 | 2005-11-17 15:00:18 +0100 | [diff] [blame] | 539 | struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); |
Simone Zinanni | aed058e | 2005-04-11 14:08:40 +0200 | [diff] [blame] | 540 | |
| 541 | ucontrol->value.integer.value[0] = (ice->spec.phase28.master[0] & WM_VOL_MUTE) ? 0 : 1; |
| 542 | ucontrol->value.integer.value[1] = (ice->spec.phase28.master[1] & WM_VOL_MUTE) ? 0 : 1; |
| 543 | return 0; |
| 544 | } |
| 545 | |
Takashi Iwai | ab0c7d7 | 2005-11-17 15:00:18 +0100 | [diff] [blame] | 546 | static int wm_master_mute_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) |
Simone Zinanni | aed058e | 2005-04-11 14:08:40 +0200 | [diff] [blame] | 547 | { |
Takashi Iwai | ab0c7d7 | 2005-11-17 15:00:18 +0100 | [diff] [blame] | 548 | struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); |
Simone Zinanni | aed058e | 2005-04-11 14:08:40 +0200 | [diff] [blame] | 549 | int change = 0, i; |
| 550 | |
| 551 | snd_ice1712_save_gpio_status(ice); |
| 552 | for (i = 0; i < 2; i++) { |
| 553 | int val = (ice->spec.phase28.master[i] & WM_VOL_MUTE) ? 0 : 1; |
| 554 | if (ucontrol->value.integer.value[i] != val) { |
| 555 | int dac; |
| 556 | ice->spec.phase28.master[i] &= ~WM_VOL_MUTE; |
| 557 | ice->spec.phase28.master[i] |= |
| 558 | ucontrol->value.integer.value[i] ? 0 : WM_VOL_MUTE; |
| 559 | for (dac = 0; dac < ice->num_total_dacs; dac += 2) |
| 560 | wm_set_vol(ice, WM_DAC_ATTEN + dac + i, |
| 561 | ice->spec.phase28.vol[dac + i], |
| 562 | ice->spec.phase28.master[i]); |
| 563 | change = 1; |
| 564 | } |
| 565 | } |
| 566 | snd_ice1712_restore_gpio_status(ice); |
| 567 | |
| 568 | return change; |
| 569 | } |
| 570 | |
| 571 | /* digital master volume */ |
| 572 | #define PCM_0dB 0xff |
| 573 | #define PCM_RES 128 /* -64dB */ |
| 574 | #define PCM_MIN (PCM_0dB - PCM_RES) |
Takashi Iwai | ab0c7d7 | 2005-11-17 15:00:18 +0100 | [diff] [blame] | 575 | static int wm_pcm_vol_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo) |
Simone Zinanni | aed058e | 2005-04-11 14:08:40 +0200 | [diff] [blame] | 576 | { |
| 577 | uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; |
| 578 | uinfo->count = 1; |
| 579 | uinfo->value.integer.min = 0; /* mute (-64dB) */ |
| 580 | uinfo->value.integer.max = PCM_RES; /* 0dB */ |
| 581 | return 0; |
| 582 | } |
| 583 | |
Takashi Iwai | ab0c7d7 | 2005-11-17 15:00:18 +0100 | [diff] [blame] | 584 | static int wm_pcm_vol_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) |
Simone Zinanni | aed058e | 2005-04-11 14:08:40 +0200 | [diff] [blame] | 585 | { |
Takashi Iwai | ab0c7d7 | 2005-11-17 15:00:18 +0100 | [diff] [blame] | 586 | struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); |
Simone Zinanni | aed058e | 2005-04-11 14:08:40 +0200 | [diff] [blame] | 587 | unsigned short val; |
| 588 | |
Ingo Molnar | 62932df | 2006-01-16 16:34:20 +0100 | [diff] [blame] | 589 | mutex_lock(&ice->gpio_mutex); |
Simone Zinanni | aed058e | 2005-04-11 14:08:40 +0200 | [diff] [blame] | 590 | val = wm_get(ice, WM_DAC_DIG_MASTER_ATTEN) & 0xff; |
| 591 | val = val > PCM_MIN ? (val - PCM_MIN) : 0; |
| 592 | ucontrol->value.integer.value[0] = val; |
Ingo Molnar | 62932df | 2006-01-16 16:34:20 +0100 | [diff] [blame] | 593 | mutex_unlock(&ice->gpio_mutex); |
Simone Zinanni | aed058e | 2005-04-11 14:08:40 +0200 | [diff] [blame] | 594 | return 0; |
| 595 | } |
| 596 | |
Takashi Iwai | ab0c7d7 | 2005-11-17 15:00:18 +0100 | [diff] [blame] | 597 | static int wm_pcm_vol_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) |
Simone Zinanni | aed058e | 2005-04-11 14:08:40 +0200 | [diff] [blame] | 598 | { |
Takashi Iwai | ab0c7d7 | 2005-11-17 15:00:18 +0100 | [diff] [blame] | 599 | struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); |
Simone Zinanni | aed058e | 2005-04-11 14:08:40 +0200 | [diff] [blame] | 600 | unsigned short ovol, nvol; |
| 601 | int change = 0; |
| 602 | |
| 603 | snd_ice1712_save_gpio_status(ice); |
| 604 | nvol = ucontrol->value.integer.value[0]; |
| 605 | nvol = (nvol ? (nvol + PCM_MIN) : 0) & 0xff; |
| 606 | ovol = wm_get(ice, WM_DAC_DIG_MASTER_ATTEN) & 0xff; |
| 607 | if (ovol != nvol) { |
| 608 | wm_put(ice, WM_DAC_DIG_MASTER_ATTEN, nvol); /* prelatch */ |
| 609 | wm_put_nocache(ice, WM_DAC_DIG_MASTER_ATTEN, nvol | 0x100); /* update */ |
| 610 | change = 1; |
| 611 | } |
| 612 | snd_ice1712_restore_gpio_status(ice); |
| 613 | return change; |
| 614 | } |
| 615 | |
| 616 | /* |
| 617 | */ |
Takashi Iwai | ab0c7d7 | 2005-11-17 15:00:18 +0100 | [diff] [blame] | 618 | static int phase28_mono_bool_info(struct snd_kcontrol *k, struct snd_ctl_elem_info *uinfo) |
Simone Zinanni | aed058e | 2005-04-11 14:08:40 +0200 | [diff] [blame] | 619 | { |
| 620 | uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; |
| 621 | uinfo->count = 1; |
| 622 | uinfo->value.integer.min = 0; |
| 623 | uinfo->value.integer.max = 1; |
| 624 | return 0; |
| 625 | } |
| 626 | |
| 627 | /* |
| 628 | * Deemphasis |
| 629 | */ |
| 630 | #define phase28_deemp_info phase28_mono_bool_info |
| 631 | |
Takashi Iwai | ab0c7d7 | 2005-11-17 15:00:18 +0100 | [diff] [blame] | 632 | static int phase28_deemp_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) |
Simone Zinanni | aed058e | 2005-04-11 14:08:40 +0200 | [diff] [blame] | 633 | { |
Takashi Iwai | ab0c7d7 | 2005-11-17 15:00:18 +0100 | [diff] [blame] | 634 | struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); |
Simone Zinanni | aed058e | 2005-04-11 14:08:40 +0200 | [diff] [blame] | 635 | ucontrol->value.integer.value[0] = (wm_get(ice, WM_DAC_CTRL2) & 0xf) == 0xf; |
| 636 | return 0; |
| 637 | } |
| 638 | |
Takashi Iwai | ab0c7d7 | 2005-11-17 15:00:18 +0100 | [diff] [blame] | 639 | static int phase28_deemp_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) |
Simone Zinanni | aed058e | 2005-04-11 14:08:40 +0200 | [diff] [blame] | 640 | { |
Takashi Iwai | ab0c7d7 | 2005-11-17 15:00:18 +0100 | [diff] [blame] | 641 | struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); |
Simone Zinanni | aed058e | 2005-04-11 14:08:40 +0200 | [diff] [blame] | 642 | int temp, temp2; |
| 643 | temp2 = temp = wm_get(ice, WM_DAC_CTRL2); |
| 644 | if (ucontrol->value.integer.value[0]) |
| 645 | temp |= 0xf; |
| 646 | else |
| 647 | temp &= ~0xf; |
| 648 | if (temp != temp2) { |
| 649 | wm_put(ice, WM_DAC_CTRL2, temp); |
| 650 | return 1; |
| 651 | } |
| 652 | return 0; |
| 653 | } |
| 654 | |
| 655 | /* |
| 656 | * ADC Oversampling |
| 657 | */ |
Takashi Iwai | ab0c7d7 | 2005-11-17 15:00:18 +0100 | [diff] [blame] | 658 | static int phase28_oversampling_info(struct snd_kcontrol *k, struct snd_ctl_elem_info *uinfo) |
Simone Zinanni | aed058e | 2005-04-11 14:08:40 +0200 | [diff] [blame] | 659 | { |
| 660 | static char *texts[2] = { "128x", "64x" }; |
| 661 | |
| 662 | uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; |
| 663 | uinfo->count = 1; |
| 664 | uinfo->value.enumerated.items = 2; |
| 665 | |
| 666 | if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items) |
| 667 | uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1; |
| 668 | strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]); |
| 669 | |
| 670 | return 0; |
| 671 | } |
| 672 | |
Takashi Iwai | ab0c7d7 | 2005-11-17 15:00:18 +0100 | [diff] [blame] | 673 | static int phase28_oversampling_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) |
Simone Zinanni | aed058e | 2005-04-11 14:08:40 +0200 | [diff] [blame] | 674 | { |
Takashi Iwai | ab0c7d7 | 2005-11-17 15:00:18 +0100 | [diff] [blame] | 675 | struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); |
Simone Zinanni | aed058e | 2005-04-11 14:08:40 +0200 | [diff] [blame] | 676 | ucontrol->value.enumerated.item[0] = (wm_get(ice, WM_MASTER) & 0x8) == 0x8; |
| 677 | return 0; |
| 678 | } |
| 679 | |
Takashi Iwai | ab0c7d7 | 2005-11-17 15:00:18 +0100 | [diff] [blame] | 680 | static int phase28_oversampling_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol) |
Simone Zinanni | aed058e | 2005-04-11 14:08:40 +0200 | [diff] [blame] | 681 | { |
| 682 | int temp, temp2; |
Takashi Iwai | ab0c7d7 | 2005-11-17 15:00:18 +0100 | [diff] [blame] | 683 | struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol); |
Simone Zinanni | aed058e | 2005-04-11 14:08:40 +0200 | [diff] [blame] | 684 | |
| 685 | temp2 = temp = wm_get(ice, WM_MASTER); |
| 686 | |
| 687 | if (ucontrol->value.enumerated.item[0]) |
| 688 | temp |= 0x8; |
| 689 | else |
| 690 | temp &= ~0x8; |
| 691 | |
| 692 | if (temp != temp2) { |
| 693 | wm_put(ice, WM_MASTER, temp); |
| 694 | return 1; |
| 695 | } |
| 696 | return 0; |
| 697 | } |
| 698 | |
Takashi Iwai | ab0c7d7 | 2005-11-17 15:00:18 +0100 | [diff] [blame] | 699 | static struct snd_kcontrol_new phase28_dac_controls[] __devinitdata = { |
Simone Zinanni | aed058e | 2005-04-11 14:08:40 +0200 | [diff] [blame] | 700 | { |
| 701 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, |
| 702 | .name = "Master Playback Switch", |
| 703 | .info = wm_master_mute_info, |
| 704 | .get = wm_master_mute_get, |
| 705 | .put = wm_master_mute_put |
| 706 | }, |
| 707 | { |
| 708 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, |
| 709 | .name = "Master Playback Volume", |
| 710 | .info = wm_master_vol_info, |
| 711 | .get = wm_master_vol_get, |
| 712 | .put = wm_master_vol_put |
| 713 | }, |
| 714 | { |
| 715 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, |
| 716 | .name = "Front Playback Switch", |
| 717 | .info = wm_mute_info, |
| 718 | .get = wm_mute_get, |
| 719 | .put = wm_mute_put, |
| 720 | .private_value = (2 << 8) | 0 |
| 721 | }, |
| 722 | { |
| 723 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, |
| 724 | .name = "Front Playback Volume", |
| 725 | .info = wm_vol_info, |
| 726 | .get = wm_vol_get, |
| 727 | .put = wm_vol_put, |
| 728 | .private_value = (2 << 8) | 0 |
| 729 | }, |
| 730 | { |
| 731 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, |
| 732 | .name = "Rear Playback Switch", |
| 733 | .info = wm_mute_info, |
| 734 | .get = wm_mute_get, |
| 735 | .put = wm_mute_put, |
| 736 | .private_value = (2 << 8) | 2 |
| 737 | }, |
| 738 | { |
| 739 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, |
| 740 | .name = "Rear Playback Volume", |
| 741 | .info = wm_vol_info, |
| 742 | .get = wm_vol_get, |
| 743 | .put = wm_vol_put, |
| 744 | .private_value = (2 << 8) | 2 |
| 745 | }, |
| 746 | { |
| 747 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, |
| 748 | .name = "Center Playback Switch", |
| 749 | .info = wm_mute_info, |
| 750 | .get = wm_mute_get, |
| 751 | .put = wm_mute_put, |
| 752 | .private_value = (1 << 8) | 4 |
| 753 | }, |
| 754 | { |
| 755 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, |
| 756 | .name = "Center Playback Volume", |
| 757 | .info = wm_vol_info, |
| 758 | .get = wm_vol_get, |
| 759 | .put = wm_vol_put, |
| 760 | .private_value = (1 << 8) | 4 |
| 761 | }, |
| 762 | { |
| 763 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, |
| 764 | .name = "LFE Playback Switch", |
| 765 | .info = wm_mute_info, |
| 766 | .get = wm_mute_get, |
| 767 | .put = wm_mute_put, |
| 768 | .private_value = (1 << 8) | 5 |
| 769 | }, |
| 770 | { |
| 771 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, |
| 772 | .name = "LFE Playback Volume", |
| 773 | .info = wm_vol_info, |
| 774 | .get = wm_vol_get, |
| 775 | .put = wm_vol_put, |
| 776 | .private_value = (1 << 8) | 5 |
| 777 | }, |
| 778 | { |
| 779 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, |
| 780 | .name = "Side Playback Switch", |
| 781 | .info = wm_mute_info, |
| 782 | .get = wm_mute_get, |
| 783 | .put = wm_mute_put, |
| 784 | .private_value = (2 << 8) | 6 |
| 785 | }, |
| 786 | { |
| 787 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, |
| 788 | .name = "Side Playback Volume", |
| 789 | .info = wm_vol_info, |
| 790 | .get = wm_vol_get, |
| 791 | .put = wm_vol_put, |
| 792 | .private_value = (2 << 8) | 6 |
| 793 | } |
| 794 | }; |
| 795 | |
Takashi Iwai | ab0c7d7 | 2005-11-17 15:00:18 +0100 | [diff] [blame] | 796 | static struct snd_kcontrol_new wm_controls[] __devinitdata = { |
Simone Zinanni | aed058e | 2005-04-11 14:08:40 +0200 | [diff] [blame] | 797 | { |
| 798 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, |
| 799 | .name = "PCM Playback Switch", |
| 800 | .info = wm_pcm_mute_info, |
| 801 | .get = wm_pcm_mute_get, |
| 802 | .put = wm_pcm_mute_put |
| 803 | }, |
| 804 | { |
| 805 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, |
| 806 | .name = "PCM Playback Volume", |
| 807 | .info = wm_pcm_vol_info, |
| 808 | .get = wm_pcm_vol_get, |
| 809 | .put = wm_pcm_vol_put |
| 810 | }, |
| 811 | { |
| 812 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, |
| 813 | .name = "DAC Deemphasis Switch", |
| 814 | .info = phase28_deemp_info, |
| 815 | .get = phase28_deemp_get, |
| 816 | .put = phase28_deemp_put |
| 817 | }, |
| 818 | { |
| 819 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, |
| 820 | .name = "ADC Oversampling", |
| 821 | .info = phase28_oversampling_info, |
| 822 | .get = phase28_oversampling_get, |
| 823 | .put = phase28_oversampling_put |
| 824 | } |
| 825 | }; |
| 826 | |
Takashi Iwai | ab0c7d7 | 2005-11-17 15:00:18 +0100 | [diff] [blame] | 827 | static int __devinit phase28_add_controls(struct snd_ice1712 *ice) |
Simone Zinanni | aed058e | 2005-04-11 14:08:40 +0200 | [diff] [blame] | 828 | { |
| 829 | unsigned int i, counts; |
| 830 | int err; |
| 831 | |
| 832 | counts = ARRAY_SIZE(phase28_dac_controls); |
| 833 | for (i = 0; i < counts; i++) { |
| 834 | err = snd_ctl_add(ice->card, snd_ctl_new1(&phase28_dac_controls[i], ice)); |
| 835 | if (err < 0) |
| 836 | return err; |
| 837 | } |
| 838 | |
| 839 | for (i = 0; i < ARRAY_SIZE(wm_controls); i++) { |
| 840 | err = snd_ctl_add(ice->card, snd_ctl_new1(&wm_controls[i], ice)); |
| 841 | if (err < 0) |
| 842 | return err; |
| 843 | } |
| 844 | |
| 845 | return 0; |
| 846 | } |
| 847 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 848 | struct snd_ice1712_card_info snd_vt1724_phase_cards[] __devinitdata = { |
| 849 | { |
| 850 | .subvendor = VT1724_SUBDEVICE_PHASE22, |
| 851 | .name = "Terratec PHASE 22", |
| 852 | .model = "phase22", |
| 853 | .chip_init = phase22_init, |
| 854 | .build_controls = phase22_add_controls, |
| 855 | .eeprom_size = sizeof(phase22_eeprom), |
| 856 | .eeprom_data = phase22_eeprom, |
| 857 | }, |
Simone Zinanni | aed058e | 2005-04-11 14:08:40 +0200 | [diff] [blame] | 858 | { |
| 859 | .subvendor = VT1724_SUBDEVICE_PHASE28, |
| 860 | .name = "Terratec PHASE 28", |
| 861 | .model = "phase28", |
| 862 | .chip_init = phase28_init, |
| 863 | .build_controls = phase28_add_controls, |
| 864 | .eeprom_size = sizeof(phase28_eeprom), |
| 865 | .eeprom_data = phase28_eeprom, |
| 866 | }, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 867 | { } /* terminator */ |
| 868 | }; |