Magnus Damm | 119f5e4 | 2013-03-13 20:32:13 +0900 | [diff] [blame] | 1 | /* |
| 2 | * Renesas R-Car GPIO Support |
| 3 | * |
| 4 | * Copyright (C) 2013 Magnus Damm |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License as published by |
| 8 | * the Free Software Foundation; either version 2 of the License |
| 9 | * |
| 10 | * This program is distributed in the hope that it will be useful, |
| 11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 13 | * GNU General Public License for more details. |
| 14 | */ |
| 15 | |
| 16 | #include <linux/err.h> |
| 17 | #include <linux/gpio.h> |
| 18 | #include <linux/init.h> |
| 19 | #include <linux/interrupt.h> |
| 20 | #include <linux/io.h> |
| 21 | #include <linux/ioport.h> |
| 22 | #include <linux/irq.h> |
| 23 | #include <linux/irqdomain.h> |
| 24 | #include <linux/module.h> |
Sachin Kamat | bd0bf46 | 2013-10-16 15:35:02 +0530 | [diff] [blame] | 25 | #include <linux/of.h> |
Laurent Pinchart | dc3465a | 2013-03-10 03:27:00 +0100 | [diff] [blame] | 26 | #include <linux/pinctrl/consumer.h> |
Magnus Damm | 119f5e4 | 2013-03-13 20:32:13 +0900 | [diff] [blame] | 27 | #include <linux/platform_data/gpio-rcar.h> |
| 28 | #include <linux/platform_device.h> |
Geert Uytterhoeven | df0c6c8 | 2014-04-14 20:33:13 +0200 | [diff] [blame] | 29 | #include <linux/pm_runtime.h> |
Magnus Damm | 119f5e4 | 2013-03-13 20:32:13 +0900 | [diff] [blame] | 30 | #include <linux/spinlock.h> |
| 31 | #include <linux/slab.h> |
| 32 | |
| 33 | struct gpio_rcar_priv { |
| 34 | void __iomem *base; |
| 35 | spinlock_t lock; |
| 36 | struct gpio_rcar_config config; |
| 37 | struct platform_device *pdev; |
| 38 | struct gpio_chip gpio_chip; |
| 39 | struct irq_chip irq_chip; |
| 40 | struct irq_domain *irq_domain; |
| 41 | }; |
| 42 | |
| 43 | #define IOINTSEL 0x00 |
| 44 | #define INOUTSEL 0x04 |
| 45 | #define OUTDT 0x08 |
| 46 | #define INDT 0x0c |
| 47 | #define INTDT 0x10 |
| 48 | #define INTCLR 0x14 |
| 49 | #define INTMSK 0x18 |
| 50 | #define MSKCLR 0x1c |
| 51 | #define POSNEG 0x20 |
| 52 | #define EDGLEVEL 0x24 |
| 53 | #define FILONOFF 0x28 |
Simon Horman | 7e1092b | 2013-05-24 18:47:24 +0900 | [diff] [blame] | 54 | #define BOTHEDGE 0x4c |
Magnus Damm | 119f5e4 | 2013-03-13 20:32:13 +0900 | [diff] [blame] | 55 | |
Laurent Pinchart | 159f8a0 | 2013-05-21 13:40:06 +0200 | [diff] [blame] | 56 | #define RCAR_MAX_GPIO_PER_BANK 32 |
| 57 | |
Magnus Damm | 119f5e4 | 2013-03-13 20:32:13 +0900 | [diff] [blame] | 58 | static inline u32 gpio_rcar_read(struct gpio_rcar_priv *p, int offs) |
| 59 | { |
| 60 | return ioread32(p->base + offs); |
| 61 | } |
| 62 | |
| 63 | static inline void gpio_rcar_write(struct gpio_rcar_priv *p, int offs, |
| 64 | u32 value) |
| 65 | { |
| 66 | iowrite32(value, p->base + offs); |
| 67 | } |
| 68 | |
| 69 | static void gpio_rcar_modify_bit(struct gpio_rcar_priv *p, int offs, |
| 70 | int bit, bool value) |
| 71 | { |
| 72 | u32 tmp = gpio_rcar_read(p, offs); |
| 73 | |
| 74 | if (value) |
| 75 | tmp |= BIT(bit); |
| 76 | else |
| 77 | tmp &= ~BIT(bit); |
| 78 | |
| 79 | gpio_rcar_write(p, offs, tmp); |
| 80 | } |
| 81 | |
| 82 | static void gpio_rcar_irq_disable(struct irq_data *d) |
| 83 | { |
| 84 | struct gpio_rcar_priv *p = irq_data_get_irq_chip_data(d); |
| 85 | |
| 86 | gpio_rcar_write(p, INTMSK, ~BIT(irqd_to_hwirq(d))); |
| 87 | } |
| 88 | |
| 89 | static void gpio_rcar_irq_enable(struct irq_data *d) |
| 90 | { |
| 91 | struct gpio_rcar_priv *p = irq_data_get_irq_chip_data(d); |
| 92 | |
| 93 | gpio_rcar_write(p, MSKCLR, BIT(irqd_to_hwirq(d))); |
| 94 | } |
| 95 | |
| 96 | static void gpio_rcar_config_interrupt_input_mode(struct gpio_rcar_priv *p, |
| 97 | unsigned int hwirq, |
| 98 | bool active_high_rising_edge, |
Simon Horman | 7e1092b | 2013-05-24 18:47:24 +0900 | [diff] [blame] | 99 | bool level_trigger, |
| 100 | bool both) |
Magnus Damm | 119f5e4 | 2013-03-13 20:32:13 +0900 | [diff] [blame] | 101 | { |
| 102 | unsigned long flags; |
| 103 | |
| 104 | /* follow steps in the GPIO documentation for |
| 105 | * "Setting Edge-Sensitive Interrupt Input Mode" and |
| 106 | * "Setting Level-Sensitive Interrupt Input Mode" |
| 107 | */ |
| 108 | |
| 109 | spin_lock_irqsave(&p->lock, flags); |
| 110 | |
| 111 | /* Configure postive or negative logic in POSNEG */ |
| 112 | gpio_rcar_modify_bit(p, POSNEG, hwirq, !active_high_rising_edge); |
| 113 | |
| 114 | /* Configure edge or level trigger in EDGLEVEL */ |
| 115 | gpio_rcar_modify_bit(p, EDGLEVEL, hwirq, !level_trigger); |
| 116 | |
Simon Horman | 7e1092b | 2013-05-24 18:47:24 +0900 | [diff] [blame] | 117 | /* Select one edge or both edges in BOTHEDGE */ |
| 118 | if (p->config.has_both_edge_trigger) |
| 119 | gpio_rcar_modify_bit(p, BOTHEDGE, hwirq, both); |
| 120 | |
Magnus Damm | 119f5e4 | 2013-03-13 20:32:13 +0900 | [diff] [blame] | 121 | /* Select "Interrupt Input Mode" in IOINTSEL */ |
| 122 | gpio_rcar_modify_bit(p, IOINTSEL, hwirq, true); |
| 123 | |
| 124 | /* Write INTCLR in case of edge trigger */ |
| 125 | if (!level_trigger) |
| 126 | gpio_rcar_write(p, INTCLR, BIT(hwirq)); |
| 127 | |
| 128 | spin_unlock_irqrestore(&p->lock, flags); |
| 129 | } |
| 130 | |
| 131 | static int gpio_rcar_irq_set_type(struct irq_data *d, unsigned int type) |
| 132 | { |
| 133 | struct gpio_rcar_priv *p = irq_data_get_irq_chip_data(d); |
| 134 | unsigned int hwirq = irqd_to_hwirq(d); |
| 135 | |
| 136 | dev_dbg(&p->pdev->dev, "sense irq = %d, type = %d\n", hwirq, type); |
| 137 | |
| 138 | switch (type & IRQ_TYPE_SENSE_MASK) { |
| 139 | case IRQ_TYPE_LEVEL_HIGH: |
Simon Horman | 7e1092b | 2013-05-24 18:47:24 +0900 | [diff] [blame] | 140 | gpio_rcar_config_interrupt_input_mode(p, hwirq, true, true, |
| 141 | false); |
Magnus Damm | 119f5e4 | 2013-03-13 20:32:13 +0900 | [diff] [blame] | 142 | break; |
| 143 | case IRQ_TYPE_LEVEL_LOW: |
Simon Horman | 7e1092b | 2013-05-24 18:47:24 +0900 | [diff] [blame] | 144 | gpio_rcar_config_interrupt_input_mode(p, hwirq, false, true, |
| 145 | false); |
Magnus Damm | 119f5e4 | 2013-03-13 20:32:13 +0900 | [diff] [blame] | 146 | break; |
| 147 | case IRQ_TYPE_EDGE_RISING: |
Simon Horman | 7e1092b | 2013-05-24 18:47:24 +0900 | [diff] [blame] | 148 | gpio_rcar_config_interrupt_input_mode(p, hwirq, true, false, |
| 149 | false); |
Magnus Damm | 119f5e4 | 2013-03-13 20:32:13 +0900 | [diff] [blame] | 150 | break; |
| 151 | case IRQ_TYPE_EDGE_FALLING: |
Simon Horman | 7e1092b | 2013-05-24 18:47:24 +0900 | [diff] [blame] | 152 | gpio_rcar_config_interrupt_input_mode(p, hwirq, false, false, |
| 153 | false); |
| 154 | break; |
| 155 | case IRQ_TYPE_EDGE_BOTH: |
| 156 | if (!p->config.has_both_edge_trigger) |
| 157 | return -EINVAL; |
| 158 | gpio_rcar_config_interrupt_input_mode(p, hwirq, true, false, |
| 159 | true); |
Magnus Damm | 119f5e4 | 2013-03-13 20:32:13 +0900 | [diff] [blame] | 160 | break; |
| 161 | default: |
| 162 | return -EINVAL; |
| 163 | } |
| 164 | return 0; |
| 165 | } |
| 166 | |
| 167 | static irqreturn_t gpio_rcar_irq_handler(int irq, void *dev_id) |
| 168 | { |
| 169 | struct gpio_rcar_priv *p = dev_id; |
| 170 | u32 pending; |
| 171 | unsigned int offset, irqs_handled = 0; |
| 172 | |
Valentine Barshak | 8808b64 | 2013-11-29 22:04:09 +0400 | [diff] [blame] | 173 | while ((pending = gpio_rcar_read(p, INTDT) & |
| 174 | gpio_rcar_read(p, INTMSK))) { |
Magnus Damm | 119f5e4 | 2013-03-13 20:32:13 +0900 | [diff] [blame] | 175 | offset = __ffs(pending); |
| 176 | gpio_rcar_write(p, INTCLR, BIT(offset)); |
| 177 | generic_handle_irq(irq_find_mapping(p->irq_domain, offset)); |
| 178 | irqs_handled++; |
| 179 | } |
| 180 | |
| 181 | return irqs_handled ? IRQ_HANDLED : IRQ_NONE; |
| 182 | } |
| 183 | |
| 184 | static inline struct gpio_rcar_priv *gpio_to_priv(struct gpio_chip *chip) |
| 185 | { |
| 186 | return container_of(chip, struct gpio_rcar_priv, gpio_chip); |
| 187 | } |
| 188 | |
| 189 | static void gpio_rcar_config_general_input_output_mode(struct gpio_chip *chip, |
| 190 | unsigned int gpio, |
| 191 | bool output) |
| 192 | { |
| 193 | struct gpio_rcar_priv *p = gpio_to_priv(chip); |
| 194 | unsigned long flags; |
| 195 | |
| 196 | /* follow steps in the GPIO documentation for |
| 197 | * "Setting General Output Mode" and |
| 198 | * "Setting General Input Mode" |
| 199 | */ |
| 200 | |
| 201 | spin_lock_irqsave(&p->lock, flags); |
| 202 | |
| 203 | /* Configure postive logic in POSNEG */ |
| 204 | gpio_rcar_modify_bit(p, POSNEG, gpio, false); |
| 205 | |
| 206 | /* Select "General Input/Output Mode" in IOINTSEL */ |
| 207 | gpio_rcar_modify_bit(p, IOINTSEL, gpio, false); |
| 208 | |
| 209 | /* Select Input Mode or Output Mode in INOUTSEL */ |
| 210 | gpio_rcar_modify_bit(p, INOUTSEL, gpio, output); |
| 211 | |
| 212 | spin_unlock_irqrestore(&p->lock, flags); |
| 213 | } |
| 214 | |
Laurent Pinchart | dc3465a | 2013-03-10 03:27:00 +0100 | [diff] [blame] | 215 | static int gpio_rcar_request(struct gpio_chip *chip, unsigned offset) |
| 216 | { |
| 217 | return pinctrl_request_gpio(chip->base + offset); |
| 218 | } |
| 219 | |
| 220 | static void gpio_rcar_free(struct gpio_chip *chip, unsigned offset) |
| 221 | { |
| 222 | pinctrl_free_gpio(chip->base + offset); |
| 223 | |
| 224 | /* Set the GPIO as an input to ensure that the next GPIO request won't |
| 225 | * drive the GPIO pin as an output. |
| 226 | */ |
| 227 | gpio_rcar_config_general_input_output_mode(chip, offset, false); |
| 228 | } |
| 229 | |
Magnus Damm | 119f5e4 | 2013-03-13 20:32:13 +0900 | [diff] [blame] | 230 | static int gpio_rcar_direction_input(struct gpio_chip *chip, unsigned offset) |
| 231 | { |
| 232 | gpio_rcar_config_general_input_output_mode(chip, offset, false); |
| 233 | return 0; |
| 234 | } |
| 235 | |
| 236 | static int gpio_rcar_get(struct gpio_chip *chip, unsigned offset) |
| 237 | { |
Magnus Damm | ae9550f | 2013-06-17 08:41:52 +0900 | [diff] [blame] | 238 | u32 bit = BIT(offset); |
| 239 | |
| 240 | /* testing on r8a7790 shows that INDT does not show correct pin state |
| 241 | * when configured as output, so use OUTDT in case of output pins */ |
| 242 | if (gpio_rcar_read(gpio_to_priv(chip), INOUTSEL) & bit) |
| 243 | return (int)(gpio_rcar_read(gpio_to_priv(chip), OUTDT) & bit); |
| 244 | else |
| 245 | return (int)(gpio_rcar_read(gpio_to_priv(chip), INDT) & bit); |
Magnus Damm | 119f5e4 | 2013-03-13 20:32:13 +0900 | [diff] [blame] | 246 | } |
| 247 | |
| 248 | static void gpio_rcar_set(struct gpio_chip *chip, unsigned offset, int value) |
| 249 | { |
| 250 | struct gpio_rcar_priv *p = gpio_to_priv(chip); |
| 251 | unsigned long flags; |
| 252 | |
| 253 | spin_lock_irqsave(&p->lock, flags); |
| 254 | gpio_rcar_modify_bit(p, OUTDT, offset, value); |
| 255 | spin_unlock_irqrestore(&p->lock, flags); |
| 256 | } |
| 257 | |
| 258 | static int gpio_rcar_direction_output(struct gpio_chip *chip, unsigned offset, |
| 259 | int value) |
| 260 | { |
| 261 | /* write GPIO value to output before selecting output mode of pin */ |
| 262 | gpio_rcar_set(chip, offset, value); |
| 263 | gpio_rcar_config_general_input_output_mode(chip, offset, true); |
| 264 | return 0; |
| 265 | } |
| 266 | |
| 267 | static int gpio_rcar_to_irq(struct gpio_chip *chip, unsigned offset) |
| 268 | { |
| 269 | return irq_create_mapping(gpio_to_priv(chip)->irq_domain, offset); |
| 270 | } |
| 271 | |
Linus Walleij | c0d6c1a | 2013-10-11 19:43:39 +0200 | [diff] [blame] | 272 | static int gpio_rcar_irq_domain_map(struct irq_domain *h, unsigned int irq, |
| 273 | irq_hw_number_t hwirq) |
Magnus Damm | 119f5e4 | 2013-03-13 20:32:13 +0900 | [diff] [blame] | 274 | { |
| 275 | struct gpio_rcar_priv *p = h->host_data; |
| 276 | |
Linus Walleij | c0d6c1a | 2013-10-11 19:43:39 +0200 | [diff] [blame] | 277 | dev_dbg(&p->pdev->dev, "map hw irq = %d, irq = %d\n", (int)hwirq, irq); |
Magnus Damm | 119f5e4 | 2013-03-13 20:32:13 +0900 | [diff] [blame] | 278 | |
Linus Walleij | c0d6c1a | 2013-10-11 19:43:39 +0200 | [diff] [blame] | 279 | irq_set_chip_data(irq, h->host_data); |
| 280 | irq_set_chip_and_handler(irq, &p->irq_chip, handle_level_irq); |
| 281 | set_irq_flags(irq, IRQF_VALID); /* kill me now */ |
Magnus Damm | 119f5e4 | 2013-03-13 20:32:13 +0900 | [diff] [blame] | 282 | return 0; |
| 283 | } |
| 284 | |
| 285 | static struct irq_domain_ops gpio_rcar_irq_domain_ops = { |
| 286 | .map = gpio_rcar_irq_domain_map, |
Laurent Pinchart | fe13264 | 2014-07-08 12:46:46 +0200 | [diff] [blame^] | 287 | .xlate = irq_domain_xlate_twocell, |
Magnus Damm | 119f5e4 | 2013-03-13 20:32:13 +0900 | [diff] [blame] | 288 | }; |
| 289 | |
Laurent Pinchart | 850dfe1 | 2013-11-29 14:48:00 +0100 | [diff] [blame] | 290 | struct gpio_rcar_info { |
| 291 | bool has_both_edge_trigger; |
| 292 | }; |
| 293 | |
| 294 | static const struct of_device_id gpio_rcar_of_table[] = { |
| 295 | { |
| 296 | .compatible = "renesas,gpio-r8a7790", |
| 297 | .data = (void *)&(const struct gpio_rcar_info) { |
| 298 | .has_both_edge_trigger = true, |
| 299 | }, |
| 300 | }, { |
| 301 | .compatible = "renesas,gpio-r8a7791", |
| 302 | .data = (void *)&(const struct gpio_rcar_info) { |
| 303 | .has_both_edge_trigger = true, |
| 304 | }, |
| 305 | }, { |
| 306 | .compatible = "renesas,gpio-rcar", |
| 307 | .data = (void *)&(const struct gpio_rcar_info) { |
| 308 | .has_both_edge_trigger = false, |
| 309 | }, |
| 310 | }, { |
| 311 | /* Terminator */ |
| 312 | }, |
| 313 | }; |
| 314 | |
| 315 | MODULE_DEVICE_TABLE(of, gpio_rcar_of_table); |
| 316 | |
| 317 | static int gpio_rcar_parse_pdata(struct gpio_rcar_priv *p) |
Laurent Pinchart | 159f8a0 | 2013-05-21 13:40:06 +0200 | [diff] [blame] | 318 | { |
Jingoo Han | e56aee1 | 2013-07-30 17:08:05 +0900 | [diff] [blame] | 319 | struct gpio_rcar_config *pdata = dev_get_platdata(&p->pdev->dev); |
Laurent Pinchart | 159f8a0 | 2013-05-21 13:40:06 +0200 | [diff] [blame] | 320 | struct device_node *np = p->pdev->dev.of_node; |
| 321 | struct of_phandle_args args; |
| 322 | int ret; |
Laurent Pinchart | 159f8a0 | 2013-05-21 13:40:06 +0200 | [diff] [blame] | 323 | |
Laurent Pinchart | e305062 | 2013-06-18 12:29:49 +0200 | [diff] [blame] | 324 | if (pdata) { |
Laurent Pinchart | 159f8a0 | 2013-05-21 13:40:06 +0200 | [diff] [blame] | 325 | p->config = *pdata; |
Laurent Pinchart | e305062 | 2013-06-18 12:29:49 +0200 | [diff] [blame] | 326 | } else if (IS_ENABLED(CONFIG_OF) && np) { |
Laurent Pinchart | 850dfe1 | 2013-11-29 14:48:00 +0100 | [diff] [blame] | 327 | const struct of_device_id *match; |
| 328 | const struct gpio_rcar_info *info; |
| 329 | |
| 330 | match = of_match_node(gpio_rcar_of_table, np); |
| 331 | if (!match) |
| 332 | return -EINVAL; |
| 333 | |
| 334 | info = match->data; |
| 335 | |
Laurent Pinchart | 01eb2d1 | 2013-09-11 15:51:01 +0200 | [diff] [blame] | 336 | ret = of_parse_phandle_with_fixed_args(np, "gpio-ranges", 3, 0, |
| 337 | &args); |
| 338 | p->config.number_of_pins = ret == 0 ? args.args[2] |
Laurent Pinchart | 159f8a0 | 2013-05-21 13:40:06 +0200 | [diff] [blame] | 339 | : RCAR_MAX_GPIO_PER_BANK; |
| 340 | p->config.gpio_base = -1; |
Laurent Pinchart | 850dfe1 | 2013-11-29 14:48:00 +0100 | [diff] [blame] | 341 | p->config.has_both_edge_trigger = info->has_both_edge_trigger; |
Laurent Pinchart | 159f8a0 | 2013-05-21 13:40:06 +0200 | [diff] [blame] | 342 | } |
Laurent Pinchart | 159f8a0 | 2013-05-21 13:40:06 +0200 | [diff] [blame] | 343 | |
| 344 | if (p->config.number_of_pins == 0 || |
| 345 | p->config.number_of_pins > RCAR_MAX_GPIO_PER_BANK) { |
| 346 | dev_warn(&p->pdev->dev, |
| 347 | "Invalid number of gpio lines %u, using %u\n", |
| 348 | p->config.number_of_pins, RCAR_MAX_GPIO_PER_BANK); |
| 349 | p->config.number_of_pins = RCAR_MAX_GPIO_PER_BANK; |
| 350 | } |
Laurent Pinchart | 850dfe1 | 2013-11-29 14:48:00 +0100 | [diff] [blame] | 351 | |
| 352 | return 0; |
Laurent Pinchart | 159f8a0 | 2013-05-21 13:40:06 +0200 | [diff] [blame] | 353 | } |
| 354 | |
Magnus Damm | 119f5e4 | 2013-03-13 20:32:13 +0900 | [diff] [blame] | 355 | static int gpio_rcar_probe(struct platform_device *pdev) |
| 356 | { |
Magnus Damm | 119f5e4 | 2013-03-13 20:32:13 +0900 | [diff] [blame] | 357 | struct gpio_rcar_priv *p; |
| 358 | struct resource *io, *irq; |
| 359 | struct gpio_chip *gpio_chip; |
| 360 | struct irq_chip *irq_chip; |
Geert Uytterhoeven | b22978f | 2014-03-27 21:47:36 +0100 | [diff] [blame] | 361 | struct device *dev = &pdev->dev; |
| 362 | const char *name = dev_name(dev); |
Magnus Damm | 119f5e4 | 2013-03-13 20:32:13 +0900 | [diff] [blame] | 363 | int ret; |
| 364 | |
Geert Uytterhoeven | b22978f | 2014-03-27 21:47:36 +0100 | [diff] [blame] | 365 | p = devm_kzalloc(dev, sizeof(*p), GFP_KERNEL); |
Magnus Damm | 119f5e4 | 2013-03-13 20:32:13 +0900 | [diff] [blame] | 366 | if (!p) { |
Magnus Damm | 119f5e4 | 2013-03-13 20:32:13 +0900 | [diff] [blame] | 367 | ret = -ENOMEM; |
| 368 | goto err0; |
| 369 | } |
| 370 | |
Magnus Damm | 119f5e4 | 2013-03-13 20:32:13 +0900 | [diff] [blame] | 371 | p->pdev = pdev; |
Magnus Damm | 119f5e4 | 2013-03-13 20:32:13 +0900 | [diff] [blame] | 372 | spin_lock_init(&p->lock); |
| 373 | |
Laurent Pinchart | 159f8a0 | 2013-05-21 13:40:06 +0200 | [diff] [blame] | 374 | /* Get device configuration from DT node or platform data. */ |
Laurent Pinchart | 850dfe1 | 2013-11-29 14:48:00 +0100 | [diff] [blame] | 375 | ret = gpio_rcar_parse_pdata(p); |
| 376 | if (ret < 0) |
| 377 | return ret; |
Laurent Pinchart | 159f8a0 | 2013-05-21 13:40:06 +0200 | [diff] [blame] | 378 | |
| 379 | platform_set_drvdata(pdev, p); |
| 380 | |
Geert Uytterhoeven | df0c6c8 | 2014-04-14 20:33:13 +0200 | [diff] [blame] | 381 | pm_runtime_enable(dev); |
| 382 | pm_runtime_get_sync(dev); |
| 383 | |
Magnus Damm | 119f5e4 | 2013-03-13 20:32:13 +0900 | [diff] [blame] | 384 | io = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 385 | irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0); |
| 386 | |
| 387 | if (!io || !irq) { |
Geert Uytterhoeven | b22978f | 2014-03-27 21:47:36 +0100 | [diff] [blame] | 388 | dev_err(dev, "missing IRQ or IOMEM\n"); |
Magnus Damm | 119f5e4 | 2013-03-13 20:32:13 +0900 | [diff] [blame] | 389 | ret = -EINVAL; |
| 390 | goto err0; |
| 391 | } |
| 392 | |
Geert Uytterhoeven | b22978f | 2014-03-27 21:47:36 +0100 | [diff] [blame] | 393 | p->base = devm_ioremap_nocache(dev, io->start, resource_size(io)); |
Magnus Damm | 119f5e4 | 2013-03-13 20:32:13 +0900 | [diff] [blame] | 394 | if (!p->base) { |
Geert Uytterhoeven | b22978f | 2014-03-27 21:47:36 +0100 | [diff] [blame] | 395 | dev_err(dev, "failed to remap I/O memory\n"); |
Magnus Damm | 119f5e4 | 2013-03-13 20:32:13 +0900 | [diff] [blame] | 396 | ret = -ENXIO; |
| 397 | goto err0; |
| 398 | } |
| 399 | |
| 400 | gpio_chip = &p->gpio_chip; |
Laurent Pinchart | dc3465a | 2013-03-10 03:27:00 +0100 | [diff] [blame] | 401 | gpio_chip->request = gpio_rcar_request; |
| 402 | gpio_chip->free = gpio_rcar_free; |
Magnus Damm | 119f5e4 | 2013-03-13 20:32:13 +0900 | [diff] [blame] | 403 | gpio_chip->direction_input = gpio_rcar_direction_input; |
| 404 | gpio_chip->get = gpio_rcar_get; |
| 405 | gpio_chip->direction_output = gpio_rcar_direction_output; |
| 406 | gpio_chip->set = gpio_rcar_set; |
| 407 | gpio_chip->to_irq = gpio_rcar_to_irq; |
| 408 | gpio_chip->label = name; |
Geert Uytterhoeven | b22978f | 2014-03-27 21:47:36 +0100 | [diff] [blame] | 409 | gpio_chip->dev = dev; |
Magnus Damm | 119f5e4 | 2013-03-13 20:32:13 +0900 | [diff] [blame] | 410 | gpio_chip->owner = THIS_MODULE; |
| 411 | gpio_chip->base = p->config.gpio_base; |
| 412 | gpio_chip->ngpio = p->config.number_of_pins; |
| 413 | |
| 414 | irq_chip = &p->irq_chip; |
| 415 | irq_chip->name = name; |
| 416 | irq_chip->irq_mask = gpio_rcar_irq_disable; |
| 417 | irq_chip->irq_unmask = gpio_rcar_irq_enable; |
Magnus Damm | 119f5e4 | 2013-03-13 20:32:13 +0900 | [diff] [blame] | 418 | irq_chip->irq_set_type = gpio_rcar_irq_set_type; |
Magnus Damm | 4039611 | 2013-11-20 09:23:17 +0900 | [diff] [blame] | 419 | irq_chip->flags = IRQCHIP_SKIP_SET_WAKE | IRQCHIP_SET_TYPE_MASKED |
| 420 | | IRQCHIP_MASK_ON_SUSPEND; |
Magnus Damm | 119f5e4 | 2013-03-13 20:32:13 +0900 | [diff] [blame] | 421 | |
| 422 | p->irq_domain = irq_domain_add_simple(pdev->dev.of_node, |
| 423 | p->config.number_of_pins, |
| 424 | p->config.irq_base, |
| 425 | &gpio_rcar_irq_domain_ops, p); |
| 426 | if (!p->irq_domain) { |
| 427 | ret = -ENXIO; |
Geert Uytterhoeven | b22978f | 2014-03-27 21:47:36 +0100 | [diff] [blame] | 428 | dev_err(dev, "cannot initialize irq domain\n"); |
Dan Carpenter | 0c8aab8 | 2013-11-07 10:56:51 +0300 | [diff] [blame] | 429 | goto err0; |
Magnus Damm | 119f5e4 | 2013-03-13 20:32:13 +0900 | [diff] [blame] | 430 | } |
| 431 | |
Geert Uytterhoeven | b22978f | 2014-03-27 21:47:36 +0100 | [diff] [blame] | 432 | if (devm_request_irq(dev, irq->start, gpio_rcar_irq_handler, |
| 433 | IRQF_SHARED, name, p)) { |
| 434 | dev_err(dev, "failed to request IRQ\n"); |
Magnus Damm | 119f5e4 | 2013-03-13 20:32:13 +0900 | [diff] [blame] | 435 | ret = -ENOENT; |
| 436 | goto err1; |
| 437 | } |
| 438 | |
| 439 | ret = gpiochip_add(gpio_chip); |
| 440 | if (ret) { |
Geert Uytterhoeven | b22978f | 2014-03-27 21:47:36 +0100 | [diff] [blame] | 441 | dev_err(dev, "failed to add GPIO controller\n"); |
Magnus Damm | 119f5e4 | 2013-03-13 20:32:13 +0900 | [diff] [blame] | 442 | goto err1; |
| 443 | } |
| 444 | |
Geert Uytterhoeven | b22978f | 2014-03-27 21:47:36 +0100 | [diff] [blame] | 445 | dev_info(dev, "driving %d GPIOs\n", p->config.number_of_pins); |
Magnus Damm | 119f5e4 | 2013-03-13 20:32:13 +0900 | [diff] [blame] | 446 | |
| 447 | /* warn in case of mismatch if irq base is specified */ |
| 448 | if (p->config.irq_base) { |
| 449 | ret = irq_find_mapping(p->irq_domain, 0); |
| 450 | if (p->config.irq_base != ret) |
Geert Uytterhoeven | b22978f | 2014-03-27 21:47:36 +0100 | [diff] [blame] | 451 | dev_warn(dev, "irq base mismatch (%u/%u)\n", |
Magnus Damm | 119f5e4 | 2013-03-13 20:32:13 +0900 | [diff] [blame] | 452 | p->config.irq_base, ret); |
| 453 | } |
| 454 | |
Laurent Pinchart | 159f8a0 | 2013-05-21 13:40:06 +0200 | [diff] [blame] | 455 | if (p->config.pctl_name) { |
| 456 | ret = gpiochip_add_pin_range(gpio_chip, p->config.pctl_name, 0, |
| 457 | gpio_chip->base, gpio_chip->ngpio); |
| 458 | if (ret < 0) |
Geert Uytterhoeven | b22978f | 2014-03-27 21:47:36 +0100 | [diff] [blame] | 459 | dev_warn(dev, "failed to add pin range\n"); |
Laurent Pinchart | 159f8a0 | 2013-05-21 13:40:06 +0200 | [diff] [blame] | 460 | } |
Laurent Pinchart | dc3465a | 2013-03-10 03:27:00 +0100 | [diff] [blame] | 461 | |
Magnus Damm | 119f5e4 | 2013-03-13 20:32:13 +0900 | [diff] [blame] | 462 | return 0; |
| 463 | |
| 464 | err1: |
| 465 | irq_domain_remove(p->irq_domain); |
| 466 | err0: |
Geert Uytterhoeven | df0c6c8 | 2014-04-14 20:33:13 +0200 | [diff] [blame] | 467 | pm_runtime_put(dev); |
| 468 | pm_runtime_disable(dev); |
Magnus Damm | 119f5e4 | 2013-03-13 20:32:13 +0900 | [diff] [blame] | 469 | return ret; |
| 470 | } |
| 471 | |
| 472 | static int gpio_rcar_remove(struct platform_device *pdev) |
| 473 | { |
| 474 | struct gpio_rcar_priv *p = platform_get_drvdata(pdev); |
| 475 | int ret; |
| 476 | |
| 477 | ret = gpiochip_remove(&p->gpio_chip); |
| 478 | if (ret) |
| 479 | return ret; |
| 480 | |
| 481 | irq_domain_remove(p->irq_domain); |
Geert Uytterhoeven | df0c6c8 | 2014-04-14 20:33:13 +0200 | [diff] [blame] | 482 | pm_runtime_put(&pdev->dev); |
| 483 | pm_runtime_disable(&pdev->dev); |
Magnus Damm | 119f5e4 | 2013-03-13 20:32:13 +0900 | [diff] [blame] | 484 | return 0; |
| 485 | } |
| 486 | |
| 487 | static struct platform_driver gpio_rcar_device_driver = { |
| 488 | .probe = gpio_rcar_probe, |
| 489 | .remove = gpio_rcar_remove, |
| 490 | .driver = { |
| 491 | .name = "gpio_rcar", |
Laurent Pinchart | 159f8a0 | 2013-05-21 13:40:06 +0200 | [diff] [blame] | 492 | .of_match_table = of_match_ptr(gpio_rcar_of_table), |
Magnus Damm | 119f5e4 | 2013-03-13 20:32:13 +0900 | [diff] [blame] | 493 | } |
| 494 | }; |
| 495 | |
| 496 | module_platform_driver(gpio_rcar_device_driver); |
| 497 | |
| 498 | MODULE_AUTHOR("Magnus Damm"); |
| 499 | MODULE_DESCRIPTION("Renesas R-Car GPIO Driver"); |
| 500 | MODULE_LICENSE("GPL v2"); |