blob: 1ba704eedefb9f39f3647227288d0b042bfd83ae [file] [log] [blame]
Jerome Glisse771fe6b2009-06-05 14:42:42 +02001/*
2 * Copyright © 2007 David Airlie
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
22 *
23 * Authors:
24 * David Airlie
25 */
26 /*
27 * Modularization
28 */
29
30#include <linux/module.h>
Jerome Glisse771fe6b2009-06-05 14:42:42 +020031#include <linux/fb.h>
Jerome Glisse771fe6b2009-06-05 14:42:42 +020032
33#include "drmP.h"
34#include "drm.h"
35#include "drm_crtc.h"
36#include "drm_crtc_helper.h"
37#include "radeon_drm.h"
38#include "radeon.h"
39
Dave Airlie785b93e2009-08-28 15:46:53 +100040#include "drm_fb_helper.h"
41
Jerome Glisse771fe6b2009-06-05 14:42:42 +020042struct radeon_fb_device {
Dave Airlie785b93e2009-08-28 15:46:53 +100043 struct drm_fb_helper helper;
Jerome Glisse771fe6b2009-06-05 14:42:42 +020044 struct radeon_framebuffer *rfb;
Dave Airlie785b93e2009-08-28 15:46:53 +100045 struct radeon_device *rdev;
Jerome Glisse771fe6b2009-06-05 14:42:42 +020046};
47
Jerome Glisse771fe6b2009-06-05 14:42:42 +020048static struct fb_ops radeonfb_ops = {
49 .owner = THIS_MODULE,
Michel Dänzerc88f9f02009-09-15 17:09:30 +020050 .fb_check_var = drm_fb_helper_check_var,
Dave Airlie785b93e2009-08-28 15:46:53 +100051 .fb_set_par = drm_fb_helper_set_par,
52 .fb_setcolreg = drm_fb_helper_setcolreg,
Jerome Glisse771fe6b2009-06-05 14:42:42 +020053 .fb_fillrect = cfb_fillrect,
54 .fb_copyarea = cfb_copyarea,
55 .fb_imageblit = cfb_imageblit,
Dave Airlie785b93e2009-08-28 15:46:53 +100056 .fb_pan_display = drm_fb_helper_pan_display,
57 .fb_blank = drm_fb_helper_blank,
Jerome Glisse771fe6b2009-06-05 14:42:42 +020058};
59
60/**
61 * Curretly it is assumed that the old framebuffer is reused.
62 *
63 * LOCKING
64 * caller should hold the mode config lock.
65 *
66 */
67int radeonfb_resize(struct drm_device *dev, struct drm_crtc *crtc)
68{
69 struct fb_info *info;
70 struct drm_framebuffer *fb;
71 struct drm_display_mode *mode = crtc->desired_mode;
72
73 fb = crtc->fb;
74 if (fb == NULL) {
75 return 1;
76 }
77 info = fb->fbdev;
78 if (info == NULL) {
79 return 1;
80 }
81 if (mode == NULL) {
82 return 1;
83 }
84 info->var.xres = mode->hdisplay;
85 info->var.right_margin = mode->hsync_start - mode->hdisplay;
86 info->var.hsync_len = mode->hsync_end - mode->hsync_start;
87 info->var.left_margin = mode->htotal - mode->hsync_end;
88 info->var.yres = mode->vdisplay;
89 info->var.lower_margin = mode->vsync_start - mode->vdisplay;
90 info->var.vsync_len = mode->vsync_end - mode->vsync_start;
91 info->var.upper_margin = mode->vtotal - mode->vsync_end;
92 info->var.pixclock = 10000000 / mode->htotal * 1000 / mode->vtotal * 100;
93 /* avoid overflow */
94 info->var.pixclock = info->var.pixclock * 1000 / mode->vrefresh;
95
96 return 0;
97}
98EXPORT_SYMBOL(radeonfb_resize);
99
Dave Airliee024e112009-06-24 09:48:08 +1000100static int radeon_align_pitch(struct radeon_device *rdev, int width, int bpp, bool tiled)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200101{
102 int aligned = width;
Dave Airliee024e112009-06-24 09:48:08 +1000103 int align_large = (ASIC_IS_AVIVO(rdev)) || tiled;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200104 int pitch_mask = 0;
105
106 switch (bpp / 8) {
107 case 1:
108 pitch_mask = align_large ? 255 : 127;
109 break;
110 case 2:
111 pitch_mask = align_large ? 127 : 31;
112 break;
113 case 3:
114 case 4:
115 pitch_mask = align_large ? 63 : 15;
116 break;
117 }
118
119 aligned += pitch_mask;
120 aligned &= ~pitch_mask;
121 return aligned;
122}
123
Dave Airlie785b93e2009-08-28 15:46:53 +1000124static struct drm_fb_helper_funcs radeon_fb_helper_funcs = {
125 .gamma_set = radeon_crtc_fb_gamma_set,
126};
127
128int radeonfb_create(struct drm_device *dev,
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200129 uint32_t fb_width, uint32_t fb_height,
130 uint32_t surface_width, uint32_t surface_height,
Dave Airlied50ba252009-09-23 14:44:08 +1000131 uint32_t surface_depth, uint32_t surface_bpp,
Dave Airlie785b93e2009-08-28 15:46:53 +1000132 struct drm_framebuffer **fb_p)
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200133{
Dave Airlie785b93e2009-08-28 15:46:53 +1000134 struct radeon_device *rdev = dev->dev_private;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200135 struct fb_info *info;
136 struct radeon_fb_device *rfbdev;
Jerome Glissef92e93e2009-06-22 18:15:58 +0200137 struct drm_framebuffer *fb = NULL;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200138 struct radeon_framebuffer *rfb;
139 struct drm_mode_fb_cmd mode_cmd;
140 struct drm_gem_object *gobj = NULL;
141 struct radeon_object *robj = NULL;
142 struct device *device = &rdev->pdev->dev;
143 int size, aligned_size, ret;
Jerome Glissef92e93e2009-06-22 18:15:58 +0200144 u64 fb_gpuaddr;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200145 void *fbptr = NULL;
Jerome Glissef92e93e2009-06-22 18:15:58 +0200146 unsigned long tmp;
Dave Airliee024e112009-06-24 09:48:08 +1000147 bool fb_tiled = false; /* useful for testing */
Michel Dänzerc88f9f02009-09-15 17:09:30 +0200148 u32 tiling_flags = 0;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200149
150 mode_cmd.width = surface_width;
151 mode_cmd.height = surface_height;
Dave Airlied50ba252009-09-23 14:44:08 +1000152 mode_cmd.bpp = surface_bpp;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200153 /* need to align pitch with crtc limits */
Dave Airliee024e112009-06-24 09:48:08 +1000154 mode_cmd.pitch = radeon_align_pitch(rdev, mode_cmd.width, mode_cmd.bpp, fb_tiled) * ((mode_cmd.bpp + 1) / 8);
Dave Airlied50ba252009-09-23 14:44:08 +1000155 mode_cmd.depth = surface_depth;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200156
157 size = mode_cmd.pitch * mode_cmd.height;
158 aligned_size = ALIGN(size, PAGE_SIZE);
159
160 ret = radeon_gem_object_create(rdev, aligned_size, 0,
Jerome Glissef92e93e2009-06-22 18:15:58 +0200161 RADEON_GEM_DOMAIN_VRAM,
162 false, ttm_bo_type_kernel,
163 false, &gobj);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200164 if (ret) {
Jerome Glissef92e93e2009-06-22 18:15:58 +0200165 printk(KERN_ERR "failed to allocate framebuffer (%d %d)\n",
166 surface_width, surface_height);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200167 ret = -ENOMEM;
168 goto out;
169 }
170 robj = gobj->driver_private;
171
Dave Airliee024e112009-06-24 09:48:08 +1000172 if (fb_tiled)
Michel Dänzerc88f9f02009-09-15 17:09:30 +0200173 tiling_flags = RADEON_TILING_MACRO;
174
175#ifdef __BIG_ENDIAN
176 switch (mode_cmd.bpp) {
177 case 32:
178 tiling_flags |= RADEON_TILING_SWAP_32BIT;
179 break;
180 case 16:
181 tiling_flags |= RADEON_TILING_SWAP_16BIT;
182 default:
183 break;
184 }
185#endif
186
187 if (tiling_flags)
188 radeon_object_set_tiling_flags(robj, tiling_flags | RADEON_TILING_SURFACE, mode_cmd.pitch);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200189 mutex_lock(&rdev->ddev->struct_mutex);
190 fb = radeon_framebuffer_create(rdev->ddev, &mode_cmd, gobj);
191 if (fb == NULL) {
192 DRM_ERROR("failed to allocate fb.\n");
193 ret = -ENOMEM;
194 goto out_unref;
195 }
Jerome Glissef92e93e2009-06-22 18:15:58 +0200196 ret = radeon_object_pin(robj, RADEON_GEM_DOMAIN_VRAM, &fb_gpuaddr);
197 if (ret) {
198 printk(KERN_ERR "failed to pin framebuffer\n");
199 ret = -ENOMEM;
200 goto out_unref;
201 }
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200202
203 list_add(&fb->filp_head, &rdev->ddev->mode_config.fb_kernel_list);
204
Dave Airlie785b93e2009-08-28 15:46:53 +1000205 *fb_p = fb;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200206 rfb = to_radeon_framebuffer(fb);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200207 rdev->fbdev_rfb = rfb;
Jerome Glissef92e93e2009-06-22 18:15:58 +0200208 rdev->fbdev_robj = robj;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200209
210 info = framebuffer_alloc(sizeof(struct radeon_fb_device), device);
211 if (info == NULL) {
212 ret = -ENOMEM;
213 goto out_unref;
214 }
Dave Airlie785b93e2009-08-28 15:46:53 +1000215
Dave Airlie2f9a60d2009-09-11 18:35:38 +1000216 rdev->fbdev_info = info;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200217 rfbdev = info->par;
Dave Airlie785b93e2009-08-28 15:46:53 +1000218 rfbdev->helper.funcs = &radeon_fb_helper_funcs;
219 rfbdev->helper.dev = dev;
220 ret = drm_fb_helper_init_crtc_count(&rfbdev->helper, 2,
221 RADEONFB_CONN_LIMIT);
222 if (ret)
223 goto out_unref;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200224
Dave Airliee024e112009-06-24 09:48:08 +1000225 if (fb_tiled)
226 radeon_object_check_tiling(robj, 0, 0);
227
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200228 ret = radeon_object_kmap(robj, &fbptr);
229 if (ret) {
230 goto out_unref;
231 }
232
Dave Airliebf8e8282009-08-17 10:20:47 +1000233 memset_io(fbptr, 0, aligned_size);
234
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200235 strcpy(info->fix.id, "radeondrmfb");
Dave Airlie785b93e2009-08-28 15:46:53 +1000236
237 drm_fb_helper_fill_fix(info, fb->pitch);
238
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200239 info->flags = FBINFO_DEFAULT;
240 info->fbops = &radeonfb_ops;
Dave Airlie785b93e2009-08-28 15:46:53 +1000241
Jerome Glissef92e93e2009-06-22 18:15:58 +0200242 tmp = fb_gpuaddr - rdev->mc.vram_location;
243 info->fix.smem_start = rdev->mc.aper_base + tmp;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200244 info->fix.smem_len = size;
245 info->screen_base = fbptr;
246 info->screen_size = size;
Dave Airlie785b93e2009-08-28 15:46:53 +1000247
248 drm_fb_helper_fill_var(info, fb, fb_width, fb_height);
Dave Airlieed8f0d92009-07-29 17:07:38 +1000249
250 /* setup aperture base/size for vesafb takeover */
251 info->aperture_base = rdev->ddev->mode_config.fb_base;
252 info->aperture_size = rdev->mc.real_vram_size;
253
Michel Dänzer696d4df2009-06-23 16:12:53 +0200254 info->fix.mmio_start = 0;
255 info->fix.mmio_len = 0;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200256 info->pixmap.size = 64*1024;
257 info->pixmap.buf_align = 8;
258 info->pixmap.access_align = 32;
259 info->pixmap.flags = FB_PIXMAP_SYSTEM;
260 info->pixmap.scan_align = 1;
261 if (info->screen_base == NULL) {
262 ret = -ENOSPC;
263 goto out_unref;
264 }
265 DRM_INFO("fb mappable at 0x%lX\n", info->fix.smem_start);
266 DRM_INFO("vram apper at 0x%lX\n", (unsigned long)rdev->mc.aper_base);
267 DRM_INFO("size %lu\n", (unsigned long)size);
268 DRM_INFO("fb depth is %d\n", fb->depth);
269 DRM_INFO(" pitch is %d\n", fb->pitch);
270
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200271 fb->fbdev = info;
272 rfbdev->rfb = rfb;
273 rfbdev->rdev = rdev;
274
275 mutex_unlock(&rdev->ddev->struct_mutex);
276 return 0;
277
278out_unref:
279 if (robj) {
280 radeon_object_kunmap(robj);
281 }
Jerome Glissef92e93e2009-06-22 18:15:58 +0200282 if (fb && ret) {
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200283 list_del(&fb->filp_head);
284 drm_gem_object_unreference(gobj);
285 drm_framebuffer_cleanup(fb);
286 kfree(fb);
287 }
288 drm_gem_object_unreference(gobj);
289 mutex_unlock(&rdev->ddev->struct_mutex);
290out:
291 return ret;
292}
293
Dave Airlied50ba252009-09-23 14:44:08 +1000294static char *mode_option;
295int radeon_parse_options(char *options)
296{
297 char *this_opt;
298
299 if (!options || !*options)
300 return 0;
301
302 while ((this_opt = strsep(&options, ",")) != NULL) {
303 if (!*this_opt)
304 continue;
305 mode_option = this_opt;
306 }
307 return 0;
308}
309
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200310int radeonfb_probe(struct drm_device *dev)
311{
Dave Airlied50ba252009-09-23 14:44:08 +1000312 return drm_fb_helper_single_fb_probe(dev, &radeonfb_create);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200313}
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200314
315int radeonfb_remove(struct drm_device *dev, struct drm_framebuffer *fb)
316{
317 struct fb_info *info;
318 struct radeon_framebuffer *rfb = to_radeon_framebuffer(fb);
319 struct radeon_object *robj;
320
321 if (!fb) {
322 return -EINVAL;
323 }
324 info = fb->fbdev;
325 if (info) {
Dave Airlie785b93e2009-08-28 15:46:53 +1000326 struct radeon_fb_device *rfbdev = info->par;
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200327 robj = rfb->obj->driver_private;
328 unregister_framebuffer(info);
329 radeon_object_kunmap(robj);
Jerome Glissef92e93e2009-06-22 18:15:58 +0200330 radeon_object_unpin(robj);
Dave Airlie785b93e2009-08-28 15:46:53 +1000331 drm_fb_helper_free(&rfbdev->helper);
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200332 framebuffer_release(info);
333 }
334
335 printk(KERN_INFO "unregistered panic notifier\n");
Dave Airlie785b93e2009-08-28 15:46:53 +1000336
Jerome Glisse771fe6b2009-06-05 14:42:42 +0200337 return 0;
338}
339EXPORT_SYMBOL(radeonfb_remove);
340MODULE_LICENSE("GPL");