blob: 0e6d548b70d9720d78c55c8a3341402486bc6dc9 [file] [log] [blame]
Andrew Victor8fc5ffa2006-06-29 16:06:33 +01001if ARCH_AT91
SAN People73a59c12006-01-09 17:05:41 +00002
Boris BREZILLONf090fb32013-10-11 12:22:06 +02003config HAVE_AT91_UTMI
4 bool
5
Boris BREZILLONc84a61d2013-10-17 18:55:41 +02006config HAVE_AT91_USB_CLK
7 bool
8
Jean-Christophe PLAGNIOL-VILLARD13079a72011-11-02 01:43:31 +08009config HAVE_AT91_DBGU0
10 bool
11
12config HAVE_AT91_DBGU1
13 bool
14
Nicolas Ferre2dc850b2014-09-15 18:15:54 +020015config HAVE_AT91_DBGU2
16 bool
17
Boris BREZILLONc8a8c632013-10-11 09:37:46 +020018config AT91_USE_OLD_CLK
19 bool
20
Ludovic Desroches8f0cdcc2013-03-22 13:24:11 +000021config AT91_PMC_UNIT
22 bool
23 default !ARCH_AT91X40
24
Boris BREZILLONc8a8c632013-10-11 09:37:46 +020025config COMMON_CLK_AT91
26 bool
27 default AT91_PMC_UNIT && USE_OF && !AT91_USE_OLD_CLK
28 select COMMON_CLK
29
30config OLD_CLK_AT91
31 bool
32 default AT91_PMC_UNIT && AT91_USE_OLD_CLK
33
Boris BREZILLON91a55d42014-07-10 19:14:19 +020034config OLD_IRQ_AT91
35 bool
36 select MULTI_IRQ_HANDLER
37 select SPARSE_IRQ
38
Boris BREZILLONa9c06882013-10-11 13:27:06 +020039config HAVE_AT91_SMD
40 bool
41
Alexandre Bellonibcc5fd42014-09-15 18:15:53 +020042config HAVE_AT91_H32MX
43 bool
44
Jean-Christophe PLAGNIOL-VILLARD1441bd32012-04-06 13:04:04 +080045config SOC_AT91SAM9
46 bool
Boris BREZILLON3b26f392014-07-10 19:14:21 +020047 select ATMEL_AIC_IRQ if !OLD_IRQ_AT91
Jean-Christophe PLAGNIOL-VILLARD1441bd32012-04-06 13:04:04 +080048 select CPU_ARM926T
Russell Kingb1b3f492012-10-06 17:12:25 +010049 select GENERIC_CLOCKEVENTS
Alexandre Belloni63e60362014-07-08 18:21:13 +020050 select MEMORY if USE_OF
51 select ATMEL_SDRAMC if USE_OF
Jean-Christophe PLAGNIOL-VILLARD1441bd32012-04-06 13:04:04 +080052
Ludovic Desroches8f4b4792013-03-22 13:24:12 +000053config SOC_SAMA5
54 bool
Boris BREZILLON3b26f392014-07-10 19:14:21 +020055 select ATMEL_AIC5_IRQ
Ludovic Desroches8f4b4792013-03-22 13:24:12 +000056 select CPU_V7
57 select GENERIC_CLOCKEVENTS
Arnd Bergmanna1628602014-03-13 15:23:40 +010058 select USE_OF
Alexandre Belloni63e60362014-07-08 18:21:13 +020059 select MEMORY
60 select ATMEL_SDRAMC
Ludovic Desroches8f4b4792013-03-22 13:24:12 +000061
Andrew Victor8fc5ffa2006-06-29 16:06:33 +010062menu "Atmel AT91 System-on-Chip"
63
Ludovic Desroches8f0cdcc2013-03-22 13:24:11 +000064choice
65
66 prompt "Core type"
67
Arnd Bergmannfe138c22014-03-13 15:18:31 +010068config ARCH_AT91X40
69 bool "ARM7 AT91X40"
70 depends on !MMU
71 select CPU_ARM7TDMI
72 select ARCH_USES_GETTIMEOFFSET
Boris BREZILLON91a55d42014-07-10 19:14:19 +020073 select OLD_IRQ_AT91
Arnd Bergmannfe138c22014-03-13 15:18:31 +010074
Ludovic Desroches8f0cdcc2013-03-22 13:24:11 +000075 help
Arnd Bergmannfe138c22014-03-13 15:18:31 +010076 Select this if you are using one of Atmel's AT91X40 SoC.
77
78config SOC_SAM_V4_V5
79 bool "ARM9 AT91SAM9/AT91RM9200"
80 help
81 Select this if you are using one of Atmel's AT91SAM9 or
82 AT91RM9200 SoC.
Ludovic Desroches8f0cdcc2013-03-22 13:24:11 +000083
Ludovic Desroches8f4b4792013-03-22 13:24:12 +000084config SOC_SAM_V7
85 bool "Cortex A5"
86 help
87 Select this if you are using one of Atmel's SAMA5D3 SoC.
88
Ludovic Desroches8f0cdcc2013-03-22 13:24:11 +000089endchoice
90
Jean-Christophe PLAGNIOL-VILLARD1e3ce2b2012-04-06 11:51:50 +080091comment "Atmel AT91 Processor"
Andrew Victor8fc5ffa2006-06-29 16:06:33 +010092
Ludovic Desroches8f4b4792013-03-22 13:24:12 +000093if SOC_SAM_V7
94config SOC_SAMA5D3
95 bool "SAMA5D3 family"
Ludovic Desroches8f4b4792013-03-22 13:24:12 +000096 select SOC_SAMA5
97 select HAVE_FB_ATMEL
98 select HAVE_AT91_DBGU1
Boris BREZILLONf090fb32013-10-11 12:22:06 +020099 select HAVE_AT91_UTMI
Boris BREZILLONa9c06882013-10-11 13:27:06 +0200100 select HAVE_AT91_SMD
Boris BREZILLONc84a61d2013-10-17 18:55:41 +0200101 select HAVE_AT91_USB_CLK
Ludovic Desroches8f4b4792013-03-22 13:24:12 +0000102 help
103 Select this if you are using one of Atmel's SAMA5D3 family SoC.
Josh Wu7f457162013-11-06 18:01:11 +0800104 This support covers SAMA5D31, SAMA5D33, SAMA5D34, SAMA5D35, SAMA5D36.
Nicolas Ferre2dc850b2014-09-15 18:15:54 +0200105
106config SOC_SAMA5D4
107 bool "SAMA5D4 family"
108 select SOC_SAMA5
109 select HAVE_AT91_DBGU2
110 select CLKSRC_MMIO
111 select CACHE_L2X0
112 select CACHE_PL310
113 select HAVE_FB_ATMEL
114 select HAVE_AT91_UTMI
115 select HAVE_AT91_SMD
116 select HAVE_AT91_USB_CLK
117 select HAVE_AT91_H32MX
118 help
119 Select this if you are using one of Atmel's SAMA5D4 family SoC.
Ludovic Desroches8f4b4792013-03-22 13:24:12 +0000120endif
121
Ludovic Desroches8f0cdcc2013-03-22 13:24:11 +0000122if SOC_SAM_V4_V5
Jean-Christophe PLAGNIOL-VILLARD1e3ce2b2012-04-06 11:51:50 +0800123config SOC_AT91RM9200
Andrew Victor8fc5ffa2006-06-29 16:06:33 +0100124 bool "AT91RM9200"
Boris BREZILLON3b26f392014-07-10 19:14:21 +0200125 select ATMEL_AIC_IRQ if !OLD_IRQ_AT91
Russell Kingc7508152008-10-26 10:55:14 +0000126 select CPU_ARM920T
David Brownell5e802df2007-07-31 01:41:26 +0100127 select GENERIC_CLOCKEVENTS
Jean-Christophe PLAGNIOL-VILLARD13079a72011-11-02 01:43:31 +0800128 select HAVE_AT91_DBGU0
Boris BREZILLONc84a61d2013-10-17 18:55:41 +0200129 select HAVE_AT91_USB_CLK
Andrew Victor8fc5ffa2006-06-29 16:06:33 +0100130
Jean-Christophe PLAGNIOL-VILLARD1e3ce2b2012-04-06 11:51:50 +0800131config SOC_AT91SAM9260
132 bool "AT91SAM9260, AT91SAM9XE or AT91SAM9G20"
Jean-Christophe PLAGNIOL-VILLARD13079a72011-11-02 01:43:31 +0800133 select HAVE_AT91_DBGU0
Russell Kingb1b3f492012-10-06 17:12:25 +0100134 select SOC_AT91SAM9
Boris BREZILLONc84a61d2013-10-17 18:55:41 +0200135 select HAVE_AT91_USB_CLK
Jean-Christophe PLAGNIOL-VILLARD1e3ce2b2012-04-06 11:51:50 +0800136 help
137 Select this if you are using one of Atmel's AT91SAM9260, AT91SAM9XE
138 or AT91SAM9G20 SoC.
Andrew Victor8fc5ffa2006-06-29 16:06:33 +0100139
Jean-Christophe PLAGNIOL-VILLARD1e3ce2b2012-04-06 11:51:50 +0800140config SOC_AT91SAM9261
141 bool "AT91SAM9261 or AT91SAM9G10"
Jean-Christophe PLAGNIOL-VILLARD13079a72011-11-02 01:43:31 +0800142 select HAVE_AT91_DBGU0
Nicolas Ferre0912e532009-06-23 16:30:56 +0200143 select HAVE_FB_ATMEL
Russell Kingb1b3f492012-10-06 17:12:25 +0100144 select SOC_AT91SAM9
Boris BREZILLONc84a61d2013-10-17 18:55:41 +0200145 select HAVE_AT91_USB_CLK
Jean-Christophe PLAGNIOL-VILLARD1e3ce2b2012-04-06 11:51:50 +0800146 help
147 Select this if you are using one of Atmel's AT91SAM9261 or AT91SAM9G10 SoC.
Nicolas Ferreb319ff82009-06-26 15:37:01 +0100148
Jean-Christophe PLAGNIOL-VILLARD1e3ce2b2012-04-06 11:51:50 +0800149config SOC_AT91SAM9263
Andrew Victorb2c65612007-02-08 09:42:40 +0100150 bool "AT91SAM9263"
Jean-Christophe PLAGNIOL-VILLARD1e3ce2b2012-04-06 11:51:50 +0800151 select HAVE_AT91_DBGU1
Nicolas Ferre0912e532009-06-23 16:30:56 +0200152 select HAVE_FB_ATMEL
Russell Kingb1b3f492012-10-06 17:12:25 +0100153 select SOC_AT91SAM9
Boris BREZILLONc84a61d2013-10-17 18:55:41 +0200154 select HAVE_AT91_USB_CLK
Andrew Victorb2c65612007-02-08 09:42:40 +0100155
Jean-Christophe PLAGNIOL-VILLARD1e3ce2b2012-04-06 11:51:50 +0800156config SOC_AT91SAM9RL
Andrew Victor877d7722007-05-11 20:49:56 +0100157 bool "AT91SAM9RL"
Jean-Christophe PLAGNIOL-VILLARD1e3ce2b2012-04-06 11:51:50 +0800158 select HAVE_AT91_DBGU0
Nicolas Ferre0912e532009-06-23 16:30:56 +0200159 select HAVE_FB_ATMEL
Russell Kingb1b3f492012-10-06 17:12:25 +0100160 select SOC_AT91SAM9
Boris BREZILLONf090fb32013-10-11 12:22:06 +0200161 select HAVE_AT91_UTMI
Andrew Victor877d7722007-05-11 20:49:56 +0100162
Jean-Christophe PLAGNIOL-VILLARD1e3ce2b2012-04-06 11:51:50 +0800163config SOC_AT91SAM9G45
Nicolas Ferreca1dcbf2012-03-15 12:26:43 +0100164 bool "AT91SAM9G45 or AT91SAM9M10 families"
Jean-Christophe PLAGNIOL-VILLARD1e3ce2b2012-04-06 11:51:50 +0800165 select HAVE_AT91_DBGU1
Nicolas Ferre0912e532009-06-23 16:30:56 +0200166 select HAVE_FB_ATMEL
Russell Kingb1b3f492012-10-06 17:12:25 +0100167 select SOC_AT91SAM9
Boris BREZILLONf090fb32013-10-11 12:22:06 +0200168 select HAVE_AT91_UTMI
Boris BREZILLONc84a61d2013-10-17 18:55:41 +0200169 select HAVE_AT91_USB_CLK
Nicolas Ferreca1dcbf2012-03-15 12:26:43 +0100170 help
171 Select this if you are using one of Atmel's AT91SAM9G45 family SoC.
172 This support covers AT91SAM9G45, AT91SAM9G46, AT91SAM9M10 and AT91SAM9M11.
Nicolas Ferre789b23b2009-06-26 15:36:58 +0100173
Jean-Christophe PLAGNIOL-VILLARD1e3ce2b2012-04-06 11:51:50 +0800174config SOC_AT91SAM9X5
Nicolas Ferre9a3ee402012-01-23 16:16:44 +0100175 bool "AT91SAM9x5 family"
Jean-Christophe PLAGNIOL-VILLARD1e3ce2b2012-04-06 11:51:50 +0800176 select HAVE_AT91_DBGU0
Nicolas Ferre9a3ee402012-01-23 16:16:44 +0100177 select HAVE_FB_ATMEL
Russell Kingb1b3f492012-10-06 17:12:25 +0100178 select SOC_AT91SAM9
Boris BREZILLONf090fb32013-10-11 12:22:06 +0200179 select HAVE_AT91_UTMI
Boris BREZILLONa9c06882013-10-11 13:27:06 +0200180 select HAVE_AT91_SMD
Boris BREZILLONc84a61d2013-10-17 18:55:41 +0200181 select HAVE_AT91_USB_CLK
Nicolas Ferrea26e1af2012-03-15 12:48:41 +0100182 help
183 Select this if you are using one of Atmel's AT91SAM9x5 family SoC.
184 This means that your SAM9 name finishes with a '5' (except if it is
185 AT91SAM9G45!).
186 This support covers AT91SAM9G15, AT91SAM9G25, AT91SAM9X25, AT91SAM9G35
187 and AT91SAM9X35.
Nicolas Ferre9a3ee402012-01-23 16:16:44 +0100188
Hong Xu74db4fb2012-04-17 14:26:31 +0800189config SOC_AT91SAM9N12
190 bool "AT91SAM9N12 family"
Hong Xu74db4fb2012-04-17 14:26:31 +0800191 select HAVE_AT91_DBGU0
192 select HAVE_FB_ATMEL
Russell Kingb1b3f492012-10-06 17:12:25 +0100193 select SOC_AT91SAM9
Boris BREZILLONc84a61d2013-10-17 18:55:41 +0200194 select HAVE_AT91_USB_CLK
Hong Xu74db4fb2012-04-17 14:26:31 +0800195 help
196 Select this if you are using Atmel's AT91SAM9N12 SoC.
197
Andrew Victor8fc5ffa2006-06-29 16:06:33 +0100198# ----------------------------------------------------------
Ludovic Desroches8f0cdcc2013-03-22 13:24:11 +0000199endif # SOC_SAM_V4_V5
Greg Ungerer9f1ccef2007-07-30 02:39:21 +0100200
Arnd Bergmannfe138c22014-03-13 15:18:31 +0100201
202if SOC_SAM_V4_V5 || ARCH_AT91X40
203source arch/arm/mach-at91/Kconfig.non_dt
204endif
205
Nicolas Ferre49fe2ba2011-10-10 18:29:24 +0200206comment "Generic Board Type"
207
Joachim Eastwood397f8c32012-10-28 18:31:09 +0000208config MACH_AT91RM9200_DT
209 bool "Atmel AT91RM9200 Evaluation Kits with device-tree support"
210 depends on SOC_AT91RM9200
211 select USE_OF
212 help
213 Select this if you want to experiment device-tree with
214 an Atmel RM9200 Evaluation Kit.
215
Jean-Christophe PLAGNIOL-VILLARD4afcd1d2013-02-19 18:30:29 +0800216config MACH_AT91SAM9_DT
Nicolas Ferre49fe2ba2011-10-10 18:29:24 +0200217 bool "Atmel AT91SAM Evaluation Kits with device-tree support"
Joachim Eastwood35ed3c72012-10-28 18:31:06 +0000218 depends on SOC_AT91SAM9
Nicolas Ferre49fe2ba2011-10-10 18:29:24 +0200219 select USE_OF
220 help
221 Select this if you want to experiment device-tree with
222 an Atmel Evaluation Kit.
223
Ludovic Desroches8f4b4792013-03-22 13:24:12 +0000224config MACH_SAMA5_DT
225 bool "Atmel SAMA5 Evaluation Kits with device-tree support"
226 depends on SOC_SAMA5
227 select USE_OF
Alexandre Belloni0580ed32013-06-05 09:50:43 +0000228 select PHYLIB if NETDEVICES
Ludovic Desroches8f4b4792013-03-22 13:24:12 +0000229 help
230 Select this if you want to experiment device-tree with
231 an Atmel Evaluation Kit.
232
Nicolas Ferre49fe2ba2011-10-10 18:29:24 +0200233# ----------------------------------------------------------
234
Andrew Victor8fc5ffa2006-06-29 16:06:33 +0100235comment "AT91 Feature Selections"
SAN People73a59c12006-01-09 17:05:41 +0000236
Andrew Victoreaad2db2008-09-21 21:35:18 +0100237config AT91_SLOW_CLOCK
238 bool "Suspend-to-RAM disables main oscillator"
239 depends on SUSPEND
240 help
241 Select this if you want Suspend-to-RAM to save the most power
242 possible (without powering off the CPU) by disabling the PLLs
243 and main oscillator so that only the 32 KiHz clock is available.
244
245 When only that slow-clock is available, some peripherals lose
246 functionality. Many can't issue wakeup events unless faster
247 clocks are available. Some lose their operating state and
248 need to be completely re-initialized.
249
David Brownell5248c652007-11-12 17:59:10 +0100250config AT91_TIMER_HZ
251 int "Kernel HZ (jiffies per second)"
252 range 32 1024
253 depends on ARCH_AT91
254 default "128" if ARCH_AT91RM9200
255 default "100"
256 help
257 On AT91rm9200 chips where you're using a system clock derived
258 from the 32768 Hz hardware clock, this tick rate should divide
259 it exactly: use a power-of-two value, such as 128 or 256, to
260 reduce timing errors caused by rounding.
261
262 On AT91sam926x chips, or otherwise when using a higher precision
263 system clock (of at least several MHz), rounding is less of a
264 problem so it can be safer to use a decimal values like 100.
265
SAN People73a59c12006-01-09 17:05:41 +0000266endmenu
267
268endif