Patrick Daly | 7faf13f | 2016-10-04 14:48:40 -0700 | [diff] [blame] | 1 | /* Copyright (c) 2016, The Linux Foundation. All rights reserved. |
| 2 | * |
| 3 | * This program is free software; you can redistribute it and/or modify |
| 4 | * it under the terms of the GNU General Public License version 2 and |
| 5 | * only version 2 as published by the Free Software Foundation. |
| 6 | * |
| 7 | * This program is distributed in the hope that it will be useful, |
| 8 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 9 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 10 | * GNU General Public License for more details. |
| 11 | */ |
| 12 | |
| 13 | #include <dt-bindings/interrupt-controller/arm-gic.h> |
| 14 | |
| 15 | &soc { |
| 16 | kgsl_smmu: arm,smmu-kgsl@5040000 { |
| 17 | status = "ok"; |
| 18 | compatible = "qcom,smmu-v2"; |
| 19 | reg = <0x5040000 0x10000>; |
| 20 | #iommu-cells = <1>; |
| 21 | qcom,dynamic; |
| 22 | #global-interrupts = <2>; |
| 23 | interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH>, |
| 24 | <GIC_SPI 231 IRQ_TYPE_LEVEL_HIGH>, |
| 25 | <GIC_SPI 364 IRQ_TYPE_EDGE_RISING>, |
| 26 | <GIC_SPI 365 IRQ_TYPE_EDGE_RISING>, |
| 27 | <GIC_SPI 366 IRQ_TYPE_EDGE_RISING>, |
| 28 | <GIC_SPI 367 IRQ_TYPE_EDGE_RISING>, |
| 29 | <GIC_SPI 368 IRQ_TYPE_EDGE_RISING>, |
| 30 | <GIC_SPI 369 IRQ_TYPE_EDGE_RISING>, |
| 31 | <GIC_SPI 370 IRQ_TYPE_EDGE_RISING>, |
| 32 | <GIC_SPI 371 IRQ_TYPE_EDGE_RISING>; |
| 33 | }; |
| 34 | |
Patrick Daly | 011d8c5 | 2016-08-19 17:13:45 -0700 | [diff] [blame] | 35 | apps_smmu: apps-smmu@0x15000000 { |
| 36 | compatible = "qcom,qsmmu-v500"; |
| 37 | reg = <0x15000000 0x80000>; |
| 38 | #iommu-cells = <1>; |
| 39 | qcom,skip-init; |
| 40 | #global-interrupts = <1>; |
| 41 | #size-cells = <1>; |
| 42 | #address-cells = <1>; |
| 43 | ranges; |
| 44 | interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>, |
| 45 | <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>, |
| 46 | <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>, |
| 47 | <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>, |
| 48 | <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>, |
| 49 | <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>, |
| 50 | <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>, |
| 51 | <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>, |
| 52 | <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>, |
| 53 | <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>, |
| 54 | <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>, |
| 55 | <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>, |
| 56 | <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>, |
| 57 | <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, |
| 58 | <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, |
| 59 | <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, |
| 60 | <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>, |
| 61 | <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>, |
| 62 | <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>, |
| 63 | <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>, |
| 64 | <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>, |
| 65 | <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, |
| 66 | <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, |
| 67 | <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>, |
| 68 | <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>, |
| 69 | <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>, |
| 70 | <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>, |
| 71 | <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>, |
| 72 | <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>, |
| 73 | <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>, |
| 74 | <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>, |
| 75 | <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>, |
| 76 | <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>, |
| 77 | <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>, |
| 78 | <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>, |
| 79 | <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>, |
| 80 | <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, |
| 81 | <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, |
| 82 | <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, |
| 83 | <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>, |
| 84 | <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>, |
| 85 | <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, |
| 86 | <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, |
| 87 | <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, |
| 88 | <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, |
| 89 | <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, |
| 90 | <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>, |
| 91 | <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, |
| 92 | <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, |
| 93 | <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>, |
| 94 | <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>, |
| 95 | <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, |
| 96 | <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, |
| 97 | <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>, |
| 98 | <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>, |
| 99 | <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>, |
| 100 | <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>, |
| 101 | <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>, |
| 102 | <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>, |
| 103 | <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>, |
| 104 | <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>, |
| 105 | <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>, |
| 106 | <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>, |
| 107 | <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>, |
| 108 | <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>; |
| 109 | |
| 110 | anoc_1_tbu: anoc_1_tbu@0x150c5000 { |
| 111 | status = "disabled"; |
| 112 | compatible = "qcom,qsmmuv500-tbu"; |
| 113 | reg = <0x150c5000 0x1000>, |
| 114 | <0x150c2200 0x8>; |
| 115 | reg-names = "base", "status-reg"; |
| 116 | qcom,regulator-names = "vdd"; |
| 117 | vdd-supply = <&hlos1_vote_aggre_noc_mmu_tbu1_gdsc>; |
| 118 | }; |
| 119 | |
| 120 | anoc_2_tbu: anoc_2_tbu@0x150c9000 { |
| 121 | status = "disabled"; |
| 122 | compatible = "qcom,qsmmuv500-tbu"; |
| 123 | reg = <0x150c9000 0x1000>, |
| 124 | <0x150c2208 0x8>; |
| 125 | reg-names = "base", "status-reg"; |
| 126 | qcom,regulator-names = "vdd"; |
| 127 | vdd-supply = <&hlos1_vote_aggre_noc_mmu_tbu2_gdsc>; |
| 128 | }; |
| 129 | |
| 130 | mnoc_hf_0_tbu: mnoc_hf_0_tbu@0x150cd000 { |
| 131 | status = "disabled"; |
| 132 | compatible = "qcom,qsmmuv500-tbu"; |
| 133 | reg = <0x150cd000 0x1000>, |
| 134 | <0x150c2210 0x8>; |
| 135 | reg-names = "base", "status-reg"; |
| 136 | qcom,regulator-names = "vdd"; |
| 137 | vdd-supply = <&hlos1_vote_mmnoc_mmu_tbu_hf0_gdsc>; |
| 138 | }; |
| 139 | |
| 140 | mnoc_hf_1_tbu: mnoc_hf_1_tbu@0x150d1000 { |
| 141 | status = "disabled"; |
| 142 | compatible = "qcom,qsmmuv500-tbu"; |
| 143 | reg = <0x150d1000 0x1000>, |
| 144 | <0x150c2218 0x8>; |
| 145 | reg-names = "base", "status-reg"; |
| 146 | qcom,regulator-names = "vdd"; |
| 147 | vdd-supply = <&hlos1_vote_mmnoc_mmu_tbu_hf1_gdsc>; |
| 148 | }; |
| 149 | |
| 150 | mnoc_sf_0_tbu: mnoc_sf_0_tbu@0x150d5000 { |
| 151 | status = "disabled"; |
| 152 | compatible = "qcom,qsmmuv500-tbu"; |
| 153 | reg = <0x150d5000 0x1000>, |
| 154 | <0x150c2220 0x8>; |
| 155 | reg-names = "base", "status-reg"; |
| 156 | qcom,regulator-names = "vdd"; |
| 157 | vdd-supply = <&hlos1_vote_mmnoc_mmu_tbu_sf_gdsc>; |
| 158 | }; |
| 159 | |
| 160 | compute_dsp_tbu: compute_dsp_tbu@0x150d9000 { |
| 161 | status = "disabled"; |
| 162 | compatible = "qcom,qsmmuv500-tbu"; |
| 163 | reg = <0x150d9000 0x1000>, |
| 164 | <0x150c2228 0x8>; |
| 165 | reg-names = "base", "status-reg"; |
| 166 | /* No GDSC */ |
| 167 | }; |
| 168 | |
| 169 | adsp_tbu: adsp_tbu@0x150dd000 { |
| 170 | status = "disabled"; |
| 171 | compatible = "qcom,qsmmuv500-tbu"; |
| 172 | reg = <0x150dd000 0x1000>, |
| 173 | <0x150c2230 0x8>; |
| 174 | reg-names = "base", "status-reg"; |
| 175 | qcom,regulator-names = "vdd"; |
| 176 | vdd-supply = <&hlos1_vote_aggre_noc_mmu_audio_tbu_gdsc>; |
| 177 | }; |
| 178 | |
| 179 | anoc_1_pcie_tbu: anoc_1_pcie_tbu@0x150e1000 { |
| 180 | status = "disabled"; |
| 181 | compatible = "qcom,qsmmuv500-tbu"; |
| 182 | reg = <0x150e1000 0x1000>, |
| 183 | <0x150c2238 0x8>; |
| 184 | reg-names = "base", "status-reg"; |
| 185 | qcom,regulator-names = "vdd"; |
| 186 | vdd-supply = <&hlos1_vote_aggre_noc_mmu_pcie_tbu_gdsc>; |
| 187 | }; |
| 188 | }; |
| 189 | |
Patrick Daly | 7faf13f | 2016-10-04 14:48:40 -0700 | [diff] [blame] | 190 | iommu_test_device { |
| 191 | compatible = "iommu-debug-test"; |
| 192 | /* |
| 193 | * 42 shouldn't be used by anyone on the mmss_smmu. We just |
| 194 | * need _something_ here to get this node recognized by the |
| 195 | * SMMU driver. Our test uses ATOS, which doesn't use SIDs |
| 196 | * anyways, so using a dummy value is ok. |
| 197 | */ |
| 198 | iommus = <&kgsl_smmu 42>; |
| 199 | }; |
Patrick Daly | 011d8c5 | 2016-08-19 17:13:45 -0700 | [diff] [blame] | 200 | |
| 201 | iommu_test_device2 { |
| 202 | compatible = "iommu-debug-test"; |
| 203 | /* |
| 204 | * This SID belongs to PCIE. We can't use a fake SID for |
| 205 | * the apps_smmu device. |
| 206 | */ |
| 207 | iommus = <&apps_smmu 0x1c03>; |
| 208 | }; |
Patrick Daly | 7faf13f | 2016-10-04 14:48:40 -0700 | [diff] [blame] | 209 | }; |