Jitendra Kalsaria | 577ae39 | 2013-02-04 12:33:07 +0000 | [diff] [blame] | 1 | /* |
| 2 | * QLogic qlcnic NIC Driver |
| 3 | * Copyright (c) 2009-2013 QLogic Corporation |
| 4 | * |
| 5 | * See LICENSE.qlcnic for copyright and licensing details. |
| 6 | */ |
| 7 | |
Sony Chacko | 7f96645 | 2013-01-01 03:20:19 +0000 | [diff] [blame] | 8 | #ifndef __QLCNIC_83XX_HW_H |
| 9 | #define __QLCNIC_83XX_HW_H |
| 10 | |
| 11 | #include <linux/types.h> |
| 12 | #include <linux/etherdevice.h> |
| 13 | #include "qlcnic_hw.h" |
| 14 | |
Himanshu Madhani | a520030 | 2013-03-12 09:02:16 +0000 | [diff] [blame] | 15 | #define QLCNIC_83XX_BAR0_LENGTH 0x4000 |
| 16 | |
Sony Chacko | 7f96645 | 2013-01-01 03:20:19 +0000 | [diff] [blame] | 17 | /* Directly mapped registers */ |
| 18 | #define QLC_83XX_CRB_WIN_BASE 0x3800 |
| 19 | #define QLC_83XX_CRB_WIN_FUNC(f) (QLC_83XX_CRB_WIN_BASE+((f)*4)) |
| 20 | #define QLC_83XX_SEM_LOCK_BASE 0x3840 |
| 21 | #define QLC_83XX_SEM_UNLOCK_BASE 0x3844 |
| 22 | #define QLC_83XX_SEM_LOCK_FUNC(f) (QLC_83XX_SEM_LOCK_BASE+((f)*8)) |
| 23 | #define QLC_83XX_SEM_UNLOCK_FUNC(f) (QLC_83XX_SEM_UNLOCK_BASE+((f)*8)) |
| 24 | #define QLC_83XX_LINK_STATE(f) (0x3698+((f) > 7 ? 4 : 0)) |
| 25 | #define QLC_83XX_LINK_SPEED(f) (0x36E0+(((f) >> 2) * 4)) |
| 26 | #define QLC_83XX_LINK_SPEED_FACTOR 10 |
| 27 | #define QLC_83xx_FUNC_VAL(v, f) ((v) & (1 << (f * 4))) |
| 28 | #define QLC_83XX_INTX_PTR 0x38C0 |
| 29 | #define QLC_83XX_INTX_TRGR 0x38C4 |
| 30 | #define QLC_83XX_INTX_MASK 0x38C8 |
| 31 | |
| 32 | #define QLC_83XX_DRV_LOCK_WAIT_COUNTER 100 |
| 33 | #define QLC_83XX_DRV_LOCK_WAIT_DELAY 20 |
| 34 | #define QLC_83XX_NEED_DRV_LOCK_RECOVERY 1 |
| 35 | #define QLC_83XX_DRV_LOCK_RECOVERY_IN_PROGRESS 2 |
| 36 | #define QLC_83XX_MAX_DRV_LOCK_RECOVERY_ATTEMPT 3 |
| 37 | #define QLC_83XX_DRV_LOCK_RECOVERY_DELAY 200 |
| 38 | #define QLC_83XX_DRV_LOCK_RECOVERY_STATUS_MASK 0x3 |
Jitendra Kalsaria | 2c4a787 | 2013-06-22 04:12:02 -0400 | [diff] [blame] | 39 | #define QLC_83XX_LB_WAIT_COUNT 250 |
| 40 | #define QLC_83XX_LB_MSLEEP_COUNT 20 |
Sony Chacko | 7f96645 | 2013-01-01 03:20:19 +0000 | [diff] [blame] | 41 | #define QLC_83XX_NO_NIC_RESOURCE 0x5 |
| 42 | #define QLC_83XX_MAC_PRESENT 0xC |
| 43 | #define QLC_83XX_MAC_ABSENT 0xD |
| 44 | |
| 45 | |
| 46 | #define QLC_83XX_FLASH_SECTOR_SIZE (64 * 1024) |
| 47 | |
| 48 | /* PEG status definitions */ |
| 49 | #define QLC_83XX_CMDPEG_COMPLETE 0xff01 |
| 50 | #define QLC_83XX_VALID_INTX_BIT30(val) ((val) & BIT_30) |
| 51 | #define QLC_83XX_VALID_INTX_BIT31(val) ((val) & BIT_31) |
| 52 | #define QLC_83XX_INTX_FUNC(val) ((val) & 0xFF) |
| 53 | #define QLC_83XX_LEGACY_INTX_MAX_RETRY 100 |
| 54 | #define QLC_83XX_LEGACY_INTX_DELAY 4 |
| 55 | #define QLC_83XX_REG_DESC 1 |
| 56 | #define QLC_83XX_LRO_DESC 2 |
| 57 | #define QLC_83XX_CTRL_DESC 3 |
| 58 | #define QLC_83XX_FW_CAPABILITY_TSO BIT_6 |
| 59 | #define QLC_83XX_FW_CAP_LRO_MSS BIT_17 |
| 60 | #define QLC_83XX_HOST_RDS_MODE_UNIQUE 0 |
| 61 | #define QLC_83XX_HOST_SDS_MBX_IDX 8 |
| 62 | |
| 63 | #define QLCNIC_HOST_RDS_MBX_IDX 88 |
| 64 | #define QLCNIC_MAX_RING_SETS 8 |
| 65 | |
Sony Chacko | 629263a | 2013-01-01 04:11:55 +0000 | [diff] [blame] | 66 | /* Pause control registers */ |
| 67 | #define QLC_83XX_SRE_SHIM_REG 0x0D200284 |
| 68 | #define QLC_83XX_PORT0_THRESHOLD 0x0B2003A4 |
| 69 | #define QLC_83XX_PORT1_THRESHOLD 0x0B2013A4 |
| 70 | #define QLC_83XX_PORT0_TC_MC_REG 0x0B200388 |
| 71 | #define QLC_83XX_PORT1_TC_MC_REG 0x0B201388 |
| 72 | #define QLC_83XX_PORT0_TC_STATS 0x0B20039C |
| 73 | #define QLC_83XX_PORT1_TC_STATS 0x0B20139C |
| 74 | #define QLC_83XX_PORT2_IFB_THRESHOLD 0x0B200704 |
| 75 | #define QLC_83XX_PORT3_IFB_THRESHOLD 0x0B201704 |
| 76 | |
| 77 | /* Peg PC status registers */ |
| 78 | #define QLC_83XX_CRB_PEG_NET_0 0x3400003c |
| 79 | #define QLC_83XX_CRB_PEG_NET_1 0x3410003c |
| 80 | #define QLC_83XX_CRB_PEG_NET_2 0x3420003c |
| 81 | #define QLC_83XX_CRB_PEG_NET_3 0x3430003c |
| 82 | #define QLC_83XX_CRB_PEG_NET_4 0x34b0003c |
| 83 | |
| 84 | /* Firmware image definitions */ |
| 85 | #define QLC_83XX_BOOTLOADER_FLASH_ADDR 0x10000 |
| 86 | #define QLC_83XX_FW_FILE_NAME "83xx_fw.bin" |
Pratik Pujar | fef349c | 2013-08-16 19:07:16 -0400 | [diff] [blame^] | 87 | #define QLC_84XX_FW_FILE_NAME "84xx_fw.bin" |
Sony Chacko | 629263a | 2013-01-01 04:11:55 +0000 | [diff] [blame] | 88 | #define QLC_83XX_BOOT_FROM_FLASH 0 |
| 89 | #define QLC_83XX_BOOT_FROM_FILE 0x12345678 |
| 90 | |
Pratik Pujar | fef349c | 2013-08-16 19:07:16 -0400 | [diff] [blame^] | 91 | #define QLC_FW_FILE_NAME_LEN 20 |
Sony Chacko | 81d0aeb | 2013-01-01 03:20:25 +0000 | [diff] [blame] | 92 | #define QLC_83XX_MAX_RESET_SEQ_ENTRIES 16 |
| 93 | |
Manish Chopra | e5c4e6c | 2013-08-02 00:57:40 -0400 | [diff] [blame] | 94 | #define QLC_83XX_MBX_POST_BC_OP 0x1 |
| 95 | #define QLC_83XX_MBX_COMPLETION 0x0 |
| 96 | #define QLC_83XX_MBX_REQUEST 0x1 |
| 97 | |
| 98 | #define QLC_83XX_MBX_TIMEOUT (5 * HZ) |
| 99 | #define QLC_83XX_MBX_CMD_LOOP 5000000 |
| 100 | |
Rajesh Borundia | 7cb03b2 | 2013-03-29 05:46:37 +0000 | [diff] [blame] | 101 | /* status descriptor mailbox data |
| 102 | * @phy_addr_{low|high}: physical address of buffer |
| 103 | * @sds_ring_size: buffer size |
| 104 | * @intrpt_id: interrupt id |
| 105 | * @intrpt_val: source of interrupt |
| 106 | */ |
| 107 | struct qlcnic_sds_mbx { |
| 108 | u32 phy_addr_low; |
| 109 | u32 phy_addr_high; |
| 110 | u32 rsvd1[4]; |
| 111 | #if defined(__LITTLE_ENDIAN) |
| 112 | u16 sds_ring_size; |
| 113 | u16 rsvd2; |
| 114 | u16 rsvd3[2]; |
| 115 | u16 intrpt_id; |
| 116 | u8 intrpt_val; |
| 117 | u8 rsvd4; |
| 118 | #elif defined(__BIG_ENDIAN) |
| 119 | u16 rsvd2; |
| 120 | u16 sds_ring_size; |
| 121 | u16 rsvd3[2]; |
| 122 | u8 rsvd4; |
| 123 | u8 intrpt_val; |
| 124 | u16 intrpt_id; |
| 125 | #endif |
| 126 | u32 rsvd5; |
| 127 | } __packed; |
| 128 | |
| 129 | /* receive descriptor buffer data |
| 130 | * phy_addr_reg_{low|high}: physical address of regular buffer |
| 131 | * phy_addr_jmb_{low|high}: physical address of jumbo buffer |
| 132 | * reg_ring_sz: size of regular buffer |
| 133 | * reg_ring_len: no. of entries in regular buffer |
| 134 | * jmb_ring_len: no. of entries in jumbo buffer |
| 135 | * jmb_ring_sz: size of jumbo buffer |
| 136 | */ |
| 137 | struct qlcnic_rds_mbx { |
| 138 | u32 phy_addr_reg_low; |
| 139 | u32 phy_addr_reg_high; |
| 140 | u32 phy_addr_jmb_low; |
| 141 | u32 phy_addr_jmb_high; |
| 142 | #if defined(__LITTLE_ENDIAN) |
| 143 | u16 reg_ring_sz; |
| 144 | u16 reg_ring_len; |
| 145 | u16 jmb_ring_sz; |
| 146 | u16 jmb_ring_len; |
| 147 | #elif defined(__BIG_ENDIAN) |
| 148 | u16 reg_ring_len; |
| 149 | u16 reg_ring_sz; |
| 150 | u16 jmb_ring_len; |
| 151 | u16 jmb_ring_sz; |
| 152 | #endif |
| 153 | } __packed; |
| 154 | |
| 155 | /* host producers for regular and jumbo rings */ |
| 156 | struct __host_producer_mbx { |
| 157 | u32 reg_buf; |
| 158 | u32 jmb_buf; |
| 159 | } __packed; |
| 160 | |
| 161 | /* Receive context mailbox data outbox registers |
| 162 | * @state: state of the context |
| 163 | * @vport_id: virtual port id |
| 164 | * @context_id: receive context id |
| 165 | * @num_pci_func: number of pci functions of the port |
| 166 | * @phy_port: physical port id |
| 167 | */ |
| 168 | struct qlcnic_rcv_mbx_out { |
| 169 | #if defined(__LITTLE_ENDIAN) |
| 170 | u8 rcv_num; |
| 171 | u8 sts_num; |
| 172 | u16 ctx_id; |
| 173 | u8 state; |
| 174 | u8 num_pci_func; |
| 175 | u8 phy_port; |
| 176 | u8 vport_id; |
| 177 | #elif defined(__BIG_ENDIAN) |
| 178 | u16 ctx_id; |
| 179 | u8 sts_num; |
| 180 | u8 rcv_num; |
| 181 | u8 vport_id; |
| 182 | u8 phy_port; |
| 183 | u8 num_pci_func; |
| 184 | u8 state; |
| 185 | #endif |
| 186 | u32 host_csmr[QLCNIC_MAX_RING_SETS]; |
| 187 | struct __host_producer_mbx host_prod[QLCNIC_MAX_RING_SETS]; |
| 188 | } __packed; |
| 189 | |
| 190 | struct qlcnic_add_rings_mbx_out { |
| 191 | #if defined(__LITTLE_ENDIAN) |
| 192 | u8 rcv_num; |
| 193 | u8 sts_num; |
| 194 | u16 ctx_id; |
| 195 | #elif defined(__BIG_ENDIAN) |
| 196 | u16 ctx_id; |
| 197 | u8 sts_num; |
| 198 | u8 rcv_num; |
| 199 | #endif |
| 200 | u32 host_csmr[QLCNIC_MAX_RING_SETS]; |
| 201 | struct __host_producer_mbx host_prod[QLCNIC_MAX_RING_SETS]; |
| 202 | } __packed; |
| 203 | |
| 204 | /* Transmit context mailbox inbox registers |
| 205 | * @phys_addr_{low|high}: DMA address of the transmit buffer |
| 206 | * @cnsmr_index_{low|high}: host consumer index |
| 207 | * @size: legth of transmit buffer ring |
| 208 | * @intr_id: interrput id |
| 209 | * @src: src of interrupt |
| 210 | */ |
| 211 | struct qlcnic_tx_mbx { |
| 212 | u32 phys_addr_low; |
| 213 | u32 phys_addr_high; |
| 214 | u32 cnsmr_index_low; |
| 215 | u32 cnsmr_index_high; |
| 216 | #if defined(__LITTLE_ENDIAN) |
| 217 | u16 size; |
| 218 | u16 intr_id; |
| 219 | u8 src; |
| 220 | u8 rsvd[3]; |
| 221 | #elif defined(__BIG_ENDIAN) |
| 222 | u16 intr_id; |
| 223 | u16 size; |
| 224 | u8 rsvd[3]; |
| 225 | u8 src; |
| 226 | #endif |
| 227 | } __packed; |
| 228 | |
| 229 | /* Transmit context mailbox outbox registers |
| 230 | * @host_prod: host producer index |
| 231 | * @ctx_id: transmit context id |
| 232 | * @state: state of the transmit context |
| 233 | */ |
| 234 | |
| 235 | struct qlcnic_tx_mbx_out { |
| 236 | u32 host_prod; |
| 237 | #if defined(__LITTLE_ENDIAN) |
| 238 | u16 ctx_id; |
| 239 | u8 state; |
| 240 | u8 rsvd; |
| 241 | #elif defined(__BIG_ENDIAN) |
| 242 | u8 rsvd; |
| 243 | u8 state; |
| 244 | u16 ctx_id; |
| 245 | #endif |
| 246 | } __packed; |
| 247 | |
Sony Chacko | 7f96645 | 2013-01-01 03:20:19 +0000 | [diff] [blame] | 248 | struct qlcnic_intrpt_config { |
| 249 | u8 type; |
| 250 | u8 enabled; |
| 251 | u16 id; |
| 252 | u32 src; |
| 253 | }; |
| 254 | |
| 255 | struct qlcnic_macvlan_mbx { |
Shahed Shaikh | a96227e | 2013-03-08 09:53:49 +0000 | [diff] [blame] | 256 | #if defined(__LITTLE_ENDIAN) |
| 257 | u8 mac_addr0; |
| 258 | u8 mac_addr1; |
| 259 | u8 mac_addr2; |
| 260 | u8 mac_addr3; |
| 261 | u8 mac_addr4; |
| 262 | u8 mac_addr5; |
Sony Chacko | 7f96645 | 2013-01-01 03:20:19 +0000 | [diff] [blame] | 263 | u16 vlan; |
Shahed Shaikh | a96227e | 2013-03-08 09:53:49 +0000 | [diff] [blame] | 264 | #elif defined(__BIG_ENDIAN) |
| 265 | u8 mac_addr3; |
| 266 | u8 mac_addr2; |
| 267 | u8 mac_addr1; |
| 268 | u8 mac_addr0; |
| 269 | u16 vlan; |
| 270 | u8 mac_addr5; |
| 271 | u8 mac_addr4; |
| 272 | #endif |
Sony Chacko | 7f96645 | 2013-01-01 03:20:19 +0000 | [diff] [blame] | 273 | }; |
| 274 | |
Sony Chacko | 629263a | 2013-01-01 04:11:55 +0000 | [diff] [blame] | 275 | struct qlc_83xx_fw_info { |
| 276 | const struct firmware *fw; |
| 277 | u16 major_fw_version; |
| 278 | u8 minor_fw_version; |
| 279 | u8 sub_fw_version; |
| 280 | u8 fw_build_num; |
| 281 | u8 load_from_file; |
| 282 | }; |
| 283 | |
Sony Chacko | 81d0aeb | 2013-01-01 03:20:25 +0000 | [diff] [blame] | 284 | struct qlc_83xx_reset { |
| 285 | struct qlc_83xx_reset_hdr *hdr; |
| 286 | int seq_index; |
| 287 | int seq_error; |
| 288 | int array_index; |
| 289 | u32 array[QLC_83XX_MAX_RESET_SEQ_ENTRIES]; |
| 290 | u8 *buff; |
| 291 | u8 *stop_offset; |
| 292 | u8 *start_offset; |
| 293 | u8 *init_offset; |
| 294 | u8 seq_end; |
| 295 | u8 template_end; |
| 296 | }; |
| 297 | |
Sony Chacko | 629263a | 2013-01-01 04:11:55 +0000 | [diff] [blame] | 298 | #define QLC_83XX_IDC_DISABLE_FW_RESET_RECOVERY 0x1 |
| 299 | #define QLC_83XX_IDC_GRACEFULL_RESET 0x2 |
| 300 | #define QLC_83XX_IDC_TIMESTAMP 0 |
| 301 | #define QLC_83XX_IDC_DURATION 1 |
| 302 | #define QLC_83XX_IDC_INIT_TIMEOUT_SECS 30 |
| 303 | #define QLC_83XX_IDC_RESET_ACK_TIMEOUT_SECS 10 |
| 304 | #define QLC_83XX_IDC_RESET_TIMEOUT_SECS 10 |
| 305 | #define QLC_83XX_IDC_QUIESCE_ACK_TIMEOUT_SECS 20 |
| 306 | #define QLC_83XX_IDC_FW_POLL_DELAY (1 * HZ) |
| 307 | #define QLC_83XX_IDC_FW_FAIL_THRESH 2 |
| 308 | #define QLC_83XX_IDC_MAX_FUNC_PER_PARTITION_INFO 8 |
| 309 | #define QLC_83XX_IDC_MAX_CNA_FUNCTIONS 16 |
| 310 | #define QLC_83XX_IDC_MAJOR_VERSION 1 |
| 311 | #define QLC_83XX_IDC_MINOR_VERSION 0 |
| 312 | #define QLC_83XX_IDC_FLASH_PARAM_ADDR 0x3e8020 |
| 313 | |
Sony Chacko | 629263a | 2013-01-01 04:11:55 +0000 | [diff] [blame] | 314 | struct qlcnic_adapter; |
| 315 | struct qlc_83xx_idc { |
| 316 | int (*state_entry) (struct qlcnic_adapter *); |
| 317 | u64 sec_counter; |
| 318 | u64 delay; |
| 319 | unsigned long status; |
| 320 | int err_code; |
| 321 | int collect_dump; |
| 322 | u8 curr_state; |
| 323 | u8 prev_state; |
| 324 | u8 vnic_state; |
| 325 | u8 vnic_wait_limit; |
| 326 | u8 quiesce_req; |
Sony Chacko | 099907f | 2013-05-23 21:04:32 +0000 | [diff] [blame] | 327 | u8 delay_reset; |
Sony Chacko | 629263a | 2013-01-01 04:11:55 +0000 | [diff] [blame] | 328 | char **name; |
| 329 | }; |
Sony Chacko | 7f96645 | 2013-01-01 03:20:19 +0000 | [diff] [blame] | 330 | |
Rajesh Borundia | f036e4f | 2013-04-19 07:01:10 +0000 | [diff] [blame] | 331 | /* Device States */ |
| 332 | enum qlcnic_83xx_states { |
| 333 | QLC_83XX_IDC_DEV_UNKNOWN, |
| 334 | QLC_83XX_IDC_DEV_COLD, |
| 335 | QLC_83XX_IDC_DEV_INIT, |
| 336 | QLC_83XX_IDC_DEV_READY, |
| 337 | QLC_83XX_IDC_DEV_NEED_RESET, |
| 338 | QLC_83XX_IDC_DEV_NEED_QUISCENT, |
| 339 | QLC_83XX_IDC_DEV_FAILED, |
| 340 | QLC_83XX_IDC_DEV_QUISCENT |
| 341 | }; |
| 342 | |
Jitendra Kalsaria | 483202d | 2013-02-09 09:29:50 +0000 | [diff] [blame] | 343 | #define QLCNIC_MBX_RSP(reg) LSW(reg) |
| 344 | #define QLCNIC_MBX_NUM_REGS(reg) (MSW(reg) & 0x1FF) |
| 345 | #define QLCNIC_MBX_STATUS(reg) (((reg) >> 25) & 0x7F) |
| 346 | #define QLCNIC_MBX_HOST(ahw, i) ((ahw)->pci_base0 + ((i) * 4)) |
| 347 | #define QLCNIC_MBX_FW(ahw, i) ((ahw)->pci_base0 + 0x800 + ((i) * 4)) |
| 348 | |
Sony Chacko | 7f96645 | 2013-01-01 03:20:19 +0000 | [diff] [blame] | 349 | /* Mailbox process AEN count */ |
| 350 | #define QLC_83XX_IDC_COMP_AEN 3 |
| 351 | #define QLC_83XX_MBX_AEN_CNT 5 |
| 352 | #define QLC_83XX_MODULE_LOADED 1 |
| 353 | #define QLC_83XX_MBX_READY 2 |
| 354 | #define QLC_83XX_MBX_AEN_ACK 3 |
| 355 | #define QLC_83XX_SFP_PRESENT(data) ((data) & 3) |
| 356 | #define QLC_83XX_SFP_ERR(data) (((data) >> 2) & 3) |
| 357 | #define QLC_83XX_SFP_MODULE_TYPE(data) (((data) >> 4) & 0x1F) |
| 358 | #define QLC_83XX_SFP_CU_LENGTH(data) (LSB((data) >> 16)) |
| 359 | #define QLC_83XX_SFP_TX_FAULT(data) ((data) & BIT_10) |
| 360 | #define QLC_83XX_SFP_10G_CAPABLE(data) ((data) & BIT_11) |
| 361 | #define QLC_83XX_LINK_STATS(data) ((data) & BIT_0) |
| 362 | #define QLC_83XX_CURRENT_LINK_SPEED(data) (((data) >> 3) & 7) |
| 363 | #define QLC_83XX_LINK_PAUSE(data) (((data) >> 6) & 3) |
| 364 | #define QLC_83XX_LINK_LB(data) (((data) >> 8) & 7) |
| 365 | #define QLC_83XX_LINK_FEC(data) ((data) & BIT_12) |
| 366 | #define QLC_83XX_LINK_EEE(data) ((data) & BIT_13) |
| 367 | #define QLC_83XX_DCBX(data) (((data) >> 28) & 7) |
| 368 | #define QLC_83XX_AUTONEG(data) ((data) & BIT_15) |
| 369 | #define QLC_83XX_CFG_STD_PAUSE (1 << 5) |
| 370 | #define QLC_83XX_CFG_STD_TX_PAUSE (1 << 20) |
| 371 | #define QLC_83XX_CFG_STD_RX_PAUSE (2 << 20) |
| 372 | #define QLC_83XX_CFG_STD_TX_RX_PAUSE (3 << 20) |
| 373 | #define QLC_83XX_ENABLE_AUTONEG (1 << 15) |
| 374 | #define QLC_83XX_CFG_LOOPBACK_HSS (2 << 1) |
| 375 | #define QLC_83XX_CFG_LOOPBACK_PHY (3 << 1) |
| 376 | #define QLC_83XX_CFG_LOOPBACK_EXT (4 << 1) |
| 377 | |
| 378 | /* LED configuration settings */ |
| 379 | #define QLC_83XX_ENABLE_BEACON 0xe |
| 380 | #define QLC_83XX_LED_RATE 0xff |
| 381 | #define QLC_83XX_LED_ACT (1 << 10) |
| 382 | #define QLC_83XX_LED_MOD (0 << 13) |
| 383 | #define QLC_83XX_LED_CONFIG (QLC_83XX_LED_RATE | QLC_83XX_LED_ACT | \ |
| 384 | QLC_83XX_LED_MOD) |
| 385 | |
| 386 | #define QLC_83XX_10M_LINK 1 |
| 387 | #define QLC_83XX_100M_LINK 2 |
| 388 | #define QLC_83XX_1G_LINK 3 |
| 389 | #define QLC_83XX_10G_LINK 4 |
| 390 | #define QLC_83XX_STAT_TX 3 |
| 391 | #define QLC_83XX_STAT_RX 2 |
| 392 | #define QLC_83XX_STAT_MAC 1 |
| 393 | #define QLC_83XX_TX_STAT_REGS 14 |
| 394 | #define QLC_83XX_RX_STAT_REGS 40 |
Shahed Shaikh | 5229074 | 2013-04-24 12:42:41 +0000 | [diff] [blame] | 395 | #define QLC_83XX_MAC_STAT_REGS 94 |
Sony Chacko | 7f96645 | 2013-01-01 03:20:19 +0000 | [diff] [blame] | 396 | |
| 397 | #define QLC_83XX_GET_FUNC_PRIVILEGE(VAL, FN) (0x3 & ((VAL) >> (FN * 2))) |
| 398 | #define QLC_83XX_SET_FUNC_OPMODE(VAL, FN) ((VAL) << (FN * 2)) |
| 399 | #define QLC_83XX_DEFAULT_OPMODE 0x55555555 |
| 400 | #define QLC_83XX_PRIVLEGED_FUNC 0x1 |
| 401 | #define QLC_83XX_VIRTUAL_FUNC 0x2 |
| 402 | |
| 403 | #define QLC_83XX_LB_MAX_FILTERS 2048 |
| 404 | #define QLC_83XX_LB_BUCKET_SIZE 256 |
| 405 | #define QLC_83XX_MINIMUM_VECTOR 3 |
Jitendra Kalsaria | 52e493d | 2013-06-22 04:12:01 -0400 | [diff] [blame] | 406 | #define QLC_83XX_MAX_MC_COUNT 38 |
| 407 | #define QLC_83XX_MAX_UC_COUNT 4096 |
Sony Chacko | 7f96645 | 2013-01-01 03:20:19 +0000 | [diff] [blame] | 408 | |
Manish Chopra | 58945e1 | 2013-08-16 19:07:14 -0400 | [diff] [blame] | 409 | #define QLC_83XX_PVID_STRIP_CAPABILITY BIT_22 |
Sony Chacko | 7f96645 | 2013-01-01 03:20:19 +0000 | [diff] [blame] | 410 | #define QLC_83XX_GET_FUNC_MODE_FROM_NPAR_INFO(val) (val & 0x80000000) |
| 411 | #define QLC_83XX_GET_LRO_CAPABILITY(val) (val & 0x20) |
| 412 | #define QLC_83XX_GET_LSO_CAPABILITY(val) (val & 0x40) |
| 413 | #define QLC_83XX_GET_LSO_CAPABILITY(val) (val & 0x40) |
| 414 | #define QLC_83XX_GET_HW_LRO_CAPABILITY(val) (val & 0x400) |
| 415 | #define QLC_83XX_GET_VLAN_ALIGN_CAPABILITY(val) (val & 0x4000) |
Shahed Shaikh | 99e8587 | 2013-02-18 12:06:16 +0000 | [diff] [blame] | 416 | #define QLC_83XX_GET_FW_LRO_MSS_CAPABILITY(val) (val & 0x20000) |
Sony Chacko | 7f96645 | 2013-01-01 03:20:19 +0000 | [diff] [blame] | 417 | #define QLC_83XX_VIRTUAL_NIC_MODE 0xFF |
| 418 | #define QLC_83XX_DEFAULT_MODE 0x0 |
Rajesh Borundia | 02feda1 | 2013-03-29 05:46:33 +0000 | [diff] [blame] | 419 | #define QLC_83XX_SRIOV_MODE 0x1 |
Sony Chacko | 7f96645 | 2013-01-01 03:20:19 +0000 | [diff] [blame] | 420 | #define QLCNIC_BRDTYPE_83XX_10G 0x0083 |
| 421 | |
Sony Chacko | d865ebb | 2013-01-01 03:20:23 +0000 | [diff] [blame] | 422 | #define QLC_83XX_FLASH_SPI_STATUS 0x2808E010 |
| 423 | #define QLC_83XX_FLASH_SPI_CONTROL 0x2808E014 |
| 424 | #define QLC_83XX_FLASH_STATUS 0x42100004 |
| 425 | #define QLC_83XX_FLASH_CONTROL 0x42110004 |
| 426 | #define QLC_83XX_FLASH_ADDR 0x42110008 |
| 427 | #define QLC_83XX_FLASH_WRDATA 0x4211000C |
| 428 | #define QLC_83XX_FLASH_RDDATA 0x42110018 |
| 429 | #define QLC_83XX_FLASH_DIRECT_WINDOW 0x42110030 |
| 430 | #define QLC_83XX_FLASH_DIRECT_DATA(DATA) (0x42150000 | (0x0000FFFF&DATA)) |
| 431 | #define QLC_83XX_FLASH_SECTOR_ERASE_CMD 0xdeadbeef |
| 432 | #define QLC_83XX_FLASH_WRITE_CMD 0xdacdacda |
| 433 | #define QLC_83XX_FLASH_BULK_WRITE_CMD 0xcadcadca |
| 434 | #define QLC_83XX_FLASH_READ_RETRY_COUNT 5000 |
| 435 | #define QLC_83XX_FLASH_STATUS_READY 0x6 |
Himanshu Madhani | a520030 | 2013-03-12 09:02:16 +0000 | [diff] [blame] | 436 | #define QLC_83XX_FLASH_WRITE_MIN 2 |
| 437 | #define QLC_83XX_FLASH_WRITE_MAX 64 |
Sony Chacko | d865ebb | 2013-01-01 03:20:23 +0000 | [diff] [blame] | 438 | #define QLC_83XX_FLASH_STATUS_REG_POLL_DELAY 1 |
| 439 | #define QLC_83XX_ERASE_MODE 1 |
| 440 | #define QLC_83XX_WRITE_MODE 2 |
| 441 | #define QLC_83XX_BULK_WRITE_MODE 3 |
| 442 | #define QLC_83XX_FLASH_FDT_WRITE_DEF_SIG 0xFD0100 |
| 443 | #define QLC_83XX_FLASH_FDT_ERASE_DEF_SIG 0xFD0300 |
| 444 | #define QLC_83XX_FLASH_FDT_READ_MFG_ID_VAL 0xFD009F |
| 445 | #define QLC_83XX_FLASH_OEM_ERASE_SIG 0xFD03D8 |
| 446 | #define QLC_83XX_FLASH_OEM_WRITE_SIG 0xFD0101 |
| 447 | #define QLC_83XX_FLASH_OEM_READ_SIG 0xFD0005 |
| 448 | #define QLC_83XX_FLASH_ADDR_TEMP_VAL 0x00800000 |
| 449 | #define QLC_83XX_FLASH_ADDR_SECOND_TEMP_VAL 0x00800001 |
| 450 | #define QLC_83XX_FLASH_WRDATA_DEF 0x0 |
| 451 | #define QLC_83XX_FLASH_READ_CTRL 0x3F |
| 452 | #define QLC_83XX_FLASH_SPI_CTRL 0x4 |
| 453 | #define QLC_83XX_FLASH_FIRST_ERASE_MS_VAL 0x2 |
| 454 | #define QLC_83XX_FLASH_SECOND_ERASE_MS_VAL 0x5 |
| 455 | #define QLC_83XX_FLASH_LAST_ERASE_MS_VAL 0x3D |
| 456 | #define QLC_83XX_FLASH_FIRST_MS_PATTERN 0x43 |
| 457 | #define QLC_83XX_FLASH_SECOND_MS_PATTERN 0x7F |
| 458 | #define QLC_83XX_FLASH_LAST_MS_PATTERN 0x7D |
| 459 | #define QLC_83xx_FLASH_MAX_WAIT_USEC 100 |
| 460 | #define QLC_83XX_FLASH_LOCK_TIMEOUT 10000 |
| 461 | |
Manish Chopra | e5c4e6c | 2013-08-02 00:57:40 -0400 | [diff] [blame] | 462 | enum qlc_83xx_mbx_cmd_type { |
| 463 | QLC_83XX_MBX_CMD_WAIT = 0, |
| 464 | QLC_83XX_MBX_CMD_NO_WAIT, |
| 465 | QLC_83XX_MBX_CMD_BUSY_WAIT, |
| 466 | }; |
| 467 | |
| 468 | enum qlc_83xx_mbx_response_states { |
| 469 | QLC_83XX_MBX_RESPONSE_WAIT = 0, |
| 470 | QLC_83XX_MBX_RESPONSE_ARRIVED, |
| 471 | }; |
| 472 | |
| 473 | #define QLC_83XX_MBX_RESPONSE_FAILED 0x2 |
| 474 | #define QLC_83XX_MBX_RESPONSE_UNKNOWN 0x3 |
| 475 | |
Sony Chacko | 7f96645 | 2013-01-01 03:20:19 +0000 | [diff] [blame] | 476 | /* Additional registers in 83xx */ |
| 477 | enum qlc_83xx_ext_regs { |
| 478 | QLCNIC_GLOBAL_RESET = 0, |
| 479 | QLCNIC_WILDCARD, |
| 480 | QLCNIC_INFORMANT, |
| 481 | QLCNIC_HOST_MBX_CTRL, |
| 482 | QLCNIC_FW_MBX_CTRL, |
| 483 | QLCNIC_BOOTLOADER_ADDR, |
| 484 | QLCNIC_BOOTLOADER_SIZE, |
| 485 | QLCNIC_FW_IMAGE_ADDR, |
| 486 | QLCNIC_MBX_INTR_ENBL, |
| 487 | QLCNIC_DEF_INT_MASK, |
| 488 | QLCNIC_DEF_INT_ID, |
| 489 | QLC_83XX_IDC_MAJ_VERSION, |
| 490 | QLC_83XX_IDC_DEV_STATE, |
| 491 | QLC_83XX_IDC_DRV_PRESENCE, |
| 492 | QLC_83XX_IDC_DRV_ACK, |
| 493 | QLC_83XX_IDC_CTRL, |
| 494 | QLC_83XX_IDC_DRV_AUDIT, |
| 495 | QLC_83XX_IDC_MIN_VERSION, |
| 496 | QLC_83XX_RECOVER_DRV_LOCK, |
| 497 | QLC_83XX_IDC_PF_0, |
| 498 | QLC_83XX_IDC_PF_1, |
| 499 | QLC_83XX_IDC_PF_2, |
| 500 | QLC_83XX_IDC_PF_3, |
| 501 | QLC_83XX_IDC_PF_4, |
| 502 | QLC_83XX_IDC_PF_5, |
| 503 | QLC_83XX_IDC_PF_6, |
| 504 | QLC_83XX_IDC_PF_7, |
| 505 | QLC_83XX_IDC_PF_8, |
| 506 | QLC_83XX_IDC_PF_9, |
| 507 | QLC_83XX_IDC_PF_10, |
| 508 | QLC_83XX_IDC_PF_11, |
| 509 | QLC_83XX_IDC_PF_12, |
| 510 | QLC_83XX_IDC_PF_13, |
| 511 | QLC_83XX_IDC_PF_14, |
| 512 | QLC_83XX_IDC_PF_15, |
| 513 | QLC_83XX_IDC_DEV_PARTITION_INFO_1, |
| 514 | QLC_83XX_IDC_DEV_PARTITION_INFO_2, |
| 515 | QLC_83XX_DRV_OP_MODE, |
| 516 | QLC_83XX_VNIC_STATE, |
| 517 | QLC_83XX_DRV_LOCK, |
| 518 | QLC_83XX_DRV_UNLOCK, |
| 519 | QLC_83XX_DRV_LOCK_ID, |
| 520 | QLC_83XX_ASIC_TEMP, |
| 521 | }; |
| 522 | |
| 523 | /* 83xx funcitons */ |
| 524 | int qlcnic_83xx_get_fw_version(struct qlcnic_adapter *); |
Manish Chopra | e5c4e6c | 2013-08-02 00:57:40 -0400 | [diff] [blame] | 525 | int qlcnic_83xx_issue_cmd(struct qlcnic_adapter *, struct qlcnic_cmd_args *); |
Sony Chacko | 7f96645 | 2013-01-01 03:20:19 +0000 | [diff] [blame] | 526 | int qlcnic_83xx_setup_intr(struct qlcnic_adapter *, u8); |
| 527 | void qlcnic_83xx_get_func_no(struct qlcnic_adapter *); |
| 528 | int qlcnic_83xx_cam_lock(struct qlcnic_adapter *); |
| 529 | void qlcnic_83xx_cam_unlock(struct qlcnic_adapter *); |
| 530 | int qlcnic_send_ctrl_op(struct qlcnic_adapter *, struct qlcnic_cmd_args *, u32); |
Sony Chacko | 319ecf1 | 2013-01-01 03:20:22 +0000 | [diff] [blame] | 531 | void qlcnic_83xx_add_sysfs(struct qlcnic_adapter *); |
| 532 | void qlcnic_83xx_remove_sysfs(struct qlcnic_adapter *); |
Sony Chacko | 7f96645 | 2013-01-01 03:20:19 +0000 | [diff] [blame] | 533 | void qlcnic_83xx_write_crb(struct qlcnic_adapter *, char *, loff_t, size_t); |
| 534 | void qlcnic_83xx_read_crb(struct qlcnic_adapter *, char *, loff_t, size_t); |
Himanshu Madhani | 4bd8e73 | 2013-08-02 23:16:01 -0400 | [diff] [blame] | 535 | int qlcnic_83xx_rd_reg_indirect(struct qlcnic_adapter *, ulong, int *); |
Sony Chacko | 7f96645 | 2013-01-01 03:20:19 +0000 | [diff] [blame] | 536 | int qlcnic_83xx_wrt_reg_indirect(struct qlcnic_adapter *, ulong, u32); |
Sony Chacko | 4be41e9 | 2013-01-01 03:20:20 +0000 | [diff] [blame] | 537 | void qlcnic_83xx_process_rcv_diag(struct qlcnic_adapter *, int, u64 []); |
Sony Chacko | 7f96645 | 2013-01-01 03:20:19 +0000 | [diff] [blame] | 538 | int qlcnic_83xx_nic_set_promisc(struct qlcnic_adapter *, u32); |
| 539 | int qlcnic_83xx_set_lb_mode(struct qlcnic_adapter *, u8); |
| 540 | int qlcnic_83xx_clear_lb_mode(struct qlcnic_adapter *, u8); |
| 541 | int qlcnic_83xx_config_hw_lro(struct qlcnic_adapter *, int); |
| 542 | int qlcnic_83xx_config_rss(struct qlcnic_adapter *, int); |
| 543 | int qlcnic_83xx_config_intr_coalesce(struct qlcnic_adapter *); |
Rajesh Borundia | f80bc8f | 2013-04-19 07:01:08 +0000 | [diff] [blame] | 544 | void qlcnic_83xx_change_l2_filter(struct qlcnic_adapter *, u64 *, u16); |
Sony Chacko | 7f96645 | 2013-01-01 03:20:19 +0000 | [diff] [blame] | 545 | int qlcnic_83xx_get_pci_info(struct qlcnic_adapter *, struct qlcnic_pci_info *); |
| 546 | int qlcnic_83xx_set_nic_info(struct qlcnic_adapter *, struct qlcnic_info *); |
| 547 | void qlcnic_83xx_register_nic_idc_func(struct qlcnic_adapter *, int); |
| 548 | |
Sony Chacko | 4be41e9 | 2013-01-01 03:20:20 +0000 | [diff] [blame] | 549 | int qlcnic_83xx_napi_add(struct qlcnic_adapter *, struct net_device *); |
| 550 | void qlcnic_83xx_napi_del(struct qlcnic_adapter *); |
| 551 | void qlcnic_83xx_napi_enable(struct qlcnic_adapter *); |
| 552 | void qlcnic_83xx_napi_disable(struct qlcnic_adapter *); |
Sony Chacko | 319ecf1 | 2013-01-01 03:20:22 +0000 | [diff] [blame] | 553 | int qlcnic_83xx_config_led(struct qlcnic_adapter *, u32, u32); |
Sony Chacko | 7f96645 | 2013-01-01 03:20:19 +0000 | [diff] [blame] | 554 | void qlcnic_ind_wr(struct qlcnic_adapter *, u32, u32); |
| 555 | int qlcnic_ind_rd(struct qlcnic_adapter *, u32); |
Sony Chacko | 7f96645 | 2013-01-01 03:20:19 +0000 | [diff] [blame] | 556 | int qlcnic_83xx_create_rx_ctx(struct qlcnic_adapter *); |
| 557 | int qlcnic_83xx_create_tx_ctx(struct qlcnic_adapter *, |
| 558 | struct qlcnic_host_tx_ring *, int); |
Rajesh Borundia | 7cb03b2 | 2013-03-29 05:46:37 +0000 | [diff] [blame] | 559 | void qlcnic_83xx_del_rx_ctx(struct qlcnic_adapter *); |
| 560 | void qlcnic_83xx_del_tx_ctx(struct qlcnic_adapter *, |
| 561 | struct qlcnic_host_tx_ring *); |
Sony Chacko | 7f96645 | 2013-01-01 03:20:19 +0000 | [diff] [blame] | 562 | int qlcnic_83xx_get_nic_info(struct qlcnic_adapter *, struct qlcnic_info *, u8); |
| 563 | int qlcnic_83xx_setup_link_event(struct qlcnic_adapter *, int); |
| 564 | void qlcnic_83xx_process_rcv_ring_diag(struct qlcnic_host_sds_ring *); |
| 565 | int qlcnic_83xx_config_intrpt(struct qlcnic_adapter *, bool); |
Rajesh Borundia | f80bc8f | 2013-04-19 07:01:08 +0000 | [diff] [blame] | 566 | int qlcnic_83xx_sre_macaddr_change(struct qlcnic_adapter *, u8 *, u16, u8); |
Sony Chacko | 7f96645 | 2013-01-01 03:20:19 +0000 | [diff] [blame] | 567 | int qlcnic_83xx_get_mac_address(struct qlcnic_adapter *, u8 *); |
| 568 | void qlcnic_83xx_configure_mac(struct qlcnic_adapter *, u8 *, u8, |
| 569 | struct qlcnic_cmd_args *); |
| 570 | int qlcnic_83xx_alloc_mbx_args(struct qlcnic_cmd_args *, |
| 571 | struct qlcnic_adapter *, u32); |
| 572 | void qlcnic_free_mbx_args(struct qlcnic_cmd_args *); |
| 573 | void qlcnic_set_npar_data(struct qlcnic_adapter *, const struct qlcnic_info *, |
| 574 | struct qlcnic_info *); |
| 575 | void qlcnic_83xx_config_intr_coal(struct qlcnic_adapter *); |
| 576 | irqreturn_t qlcnic_83xx_handle_aen(int, void *); |
| 577 | int qlcnic_83xx_get_port_info(struct qlcnic_adapter *); |
Manish Chopra | e5c4e6c | 2013-08-02 00:57:40 -0400 | [diff] [blame] | 578 | void qlcnic_83xx_enable_mbx_interrupt(struct qlcnic_adapter *); |
Rajesh Borundia | f036e4f | 2013-04-19 07:01:10 +0000 | [diff] [blame] | 579 | void qlcnic_83xx_disable_mbx_intr(struct qlcnic_adapter *); |
Sony Chacko | 7f96645 | 2013-01-01 03:20:19 +0000 | [diff] [blame] | 580 | irqreturn_t qlcnic_83xx_clear_legacy_intr(struct qlcnic_adapter *); |
Himanshu Madhani | ac16670 | 2013-02-18 12:06:15 +0000 | [diff] [blame] | 581 | irqreturn_t qlcnic_83xx_intr(int, void *); |
Sony Chacko | 7f96645 | 2013-01-01 03:20:19 +0000 | [diff] [blame] | 582 | irqreturn_t qlcnic_83xx_tmp_intr(int, void *); |
| 583 | void qlcnic_83xx_enable_intr(struct qlcnic_adapter *, |
| 584 | struct qlcnic_host_sds_ring *); |
Himanshu Madhani | ac16670 | 2013-02-18 12:06:15 +0000 | [diff] [blame] | 585 | void qlcnic_83xx_disable_intr(struct qlcnic_adapter *, |
| 586 | struct qlcnic_host_sds_ring *); |
Sony Chacko | 7f96645 | 2013-01-01 03:20:19 +0000 | [diff] [blame] | 587 | void qlcnic_83xx_check_vf(struct qlcnic_adapter *, |
| 588 | const struct pci_device_id *); |
Rajesh Borundia | d1a1105 | 2013-04-19 07:01:13 +0000 | [diff] [blame] | 589 | void __qlcnic_83xx_process_aen(struct qlcnic_adapter *); |
Sony Chacko | 7f96645 | 2013-01-01 03:20:19 +0000 | [diff] [blame] | 590 | int qlcnic_83xx_get_port_config(struct qlcnic_adapter *); |
| 591 | int qlcnic_83xx_set_port_config(struct qlcnic_adapter *); |
| 592 | int qlcnic_enable_eswitch(struct qlcnic_adapter *, u8, u8); |
| 593 | int qlcnic_83xx_get_nic_configuration(struct qlcnic_adapter *); |
| 594 | int qlcnic_83xx_config_default_opmode(struct qlcnic_adapter *); |
| 595 | int qlcnic_83xx_setup_mbx_intr(struct qlcnic_adapter *); |
| 596 | void qlcnic_83xx_free_mbx_intr(struct qlcnic_adapter *); |
| 597 | void qlcnic_83xx_register_map(struct qlcnic_hardware_context *); |
| 598 | void qlcnic_83xx_idc_aen_work(struct work_struct *); |
| 599 | void qlcnic_83xx_config_ipaddr(struct qlcnic_adapter *, __be32, int); |
Sony Chacko | d865ebb | 2013-01-01 03:20:23 +0000 | [diff] [blame] | 600 | |
| 601 | int qlcnic_83xx_erase_flash_sector(struct qlcnic_adapter *, u32); |
| 602 | int qlcnic_83xx_flash_bulk_write(struct qlcnic_adapter *, u32, u32 *, int); |
| 603 | int qlcnic_83xx_flash_write32(struct qlcnic_adapter *, u32, u32 *); |
| 604 | int qlcnic_83xx_lock_flash(struct qlcnic_adapter *); |
| 605 | void qlcnic_83xx_unlock_flash(struct qlcnic_adapter *); |
| 606 | int qlcnic_83xx_save_flash_status(struct qlcnic_adapter *); |
| 607 | int qlcnic_83xx_restore_flash_status(struct qlcnic_adapter *, int); |
| 608 | int qlcnic_83xx_read_flash_mfg_id(struct qlcnic_adapter *); |
| 609 | int qlcnic_83xx_read_flash_descriptor_table(struct qlcnic_adapter *); |
Sony Chacko | 629263a | 2013-01-01 04:11:55 +0000 | [diff] [blame] | 610 | int qlcnic_83xx_flash_read32(struct qlcnic_adapter *, u32, u8 *, int); |
| 611 | int qlcnic_83xx_lockless_flash_read32(struct qlcnic_adapter *, |
| 612 | u32, u8 *, int); |
Rajesh Borundia | f846833 | 2013-03-29 05:46:34 +0000 | [diff] [blame] | 613 | int qlcnic_83xx_init(struct qlcnic_adapter *, int); |
Sony Chacko | 629263a | 2013-01-01 04:11:55 +0000 | [diff] [blame] | 614 | int qlcnic_83xx_idc_ready_state_entry(struct qlcnic_adapter *); |
| 615 | int qlcnic_83xx_check_hw_status(struct qlcnic_adapter *p_dev); |
| 616 | void qlcnic_83xx_idc_poll_dev_state(struct work_struct *); |
Sony Chacko | 81d0aeb | 2013-01-01 03:20:25 +0000 | [diff] [blame] | 617 | int qlcnic_83xx_get_reset_instruction_template(struct qlcnic_adapter *); |
Sony Chacko | 629263a | 2013-01-01 04:11:55 +0000 | [diff] [blame] | 618 | void qlcnic_83xx_idc_exit(struct qlcnic_adapter *); |
| 619 | void qlcnic_83xx_idc_request_reset(struct qlcnic_adapter *, u32); |
| 620 | int qlcnic_83xx_lock_driver(struct qlcnic_adapter *); |
| 621 | void qlcnic_83xx_unlock_driver(struct qlcnic_adapter *); |
| 622 | int qlcnic_83xx_set_default_offload_settings(struct qlcnic_adapter *); |
| 623 | int qlcnic_83xx_ms_mem_write128(struct qlcnic_adapter *, u64, u32 *, u32); |
Sony Chacko | d71170f | 2013-01-01 03:20:26 +0000 | [diff] [blame] | 624 | int qlcnic_83xx_idc_vnic_pf_entry(struct qlcnic_adapter *); |
| 625 | int qlcnic_83xx_enable_vnic_mode(struct qlcnic_adapter *, int); |
| 626 | int qlcnic_83xx_disable_vnic_mode(struct qlcnic_adapter *, int); |
| 627 | int qlcnic_83xx_config_vnic_opmode(struct qlcnic_adapter *); |
| 628 | int qlcnic_83xx_get_vnic_vport_info(struct qlcnic_adapter *, |
| 629 | struct qlcnic_info *, u8); |
| 630 | int qlcnic_83xx_get_vnic_pf_info(struct qlcnic_adapter *, struct qlcnic_info *); |
Sony Chacko | 4e60ac4 | 2013-01-01 03:20:27 +0000 | [diff] [blame] | 631 | |
| 632 | void qlcnic_83xx_get_minidump_template(struct qlcnic_adapter *); |
Sony Chacko | 7e38d04 | 2013-01-01 03:20:28 +0000 | [diff] [blame] | 633 | void qlcnic_83xx_get_stats(struct qlcnic_adapter *adapter, u64 *data); |
Himanshu Madhani | b938662 | 2013-05-09 09:25:12 +0000 | [diff] [blame] | 634 | int qlcnic_83xx_get_settings(struct qlcnic_adapter *, struct ethtool_cmd *); |
Sony Chacko | 7e38d04 | 2013-01-01 03:20:28 +0000 | [diff] [blame] | 635 | int qlcnic_83xx_set_settings(struct qlcnic_adapter *, struct ethtool_cmd *); |
| 636 | void qlcnic_83xx_get_pauseparam(struct qlcnic_adapter *, |
| 637 | struct ethtool_pauseparam *); |
| 638 | int qlcnic_83xx_set_pauseparam(struct qlcnic_adapter *, |
| 639 | struct ethtool_pauseparam *); |
| 640 | int qlcnic_83xx_test_link(struct qlcnic_adapter *); |
| 641 | int qlcnic_83xx_reg_test(struct qlcnic_adapter *); |
| 642 | int qlcnic_83xx_get_regs_len(struct qlcnic_adapter *); |
| 643 | int qlcnic_83xx_get_registers(struct qlcnic_adapter *, u32 *); |
Jitendra Kalsaria | ba4468db | 2013-02-09 09:29:51 +0000 | [diff] [blame] | 644 | int qlcnic_83xx_loopback_test(struct net_device *, u8); |
Jitendra Kalsaria | 58ead41 | 2013-02-09 09:29:52 +0000 | [diff] [blame] | 645 | int qlcnic_83xx_interrupt_test(struct net_device *); |
Himanshu Madhani | d16951d | 2013-03-08 09:53:50 +0000 | [diff] [blame] | 646 | int qlcnic_83xx_set_led(struct net_device *, enum ethtool_phys_id_state); |
Sony Chacko | 7e38d04 | 2013-01-01 03:20:28 +0000 | [diff] [blame] | 647 | int qlcnic_83xx_flash_test(struct qlcnic_adapter *); |
Himanshu Madhani | a520030 | 2013-03-12 09:02:16 +0000 | [diff] [blame] | 648 | int qlcnic_83xx_enable_flash_write(struct qlcnic_adapter *); |
| 649 | int qlcnic_83xx_disable_flash_write(struct qlcnic_adapter *); |
Rajesh Borundia | 7ed3ce4 | 2013-04-19 07:01:14 +0000 | [diff] [blame] | 650 | void qlcnic_83xx_enable_mbx_poll(struct qlcnic_adapter *); |
| 651 | void qlcnic_83xx_disable_mbx_poll(struct qlcnic_adapter *); |
Jitendra Kalsaria | 52e493d | 2013-06-22 04:12:01 -0400 | [diff] [blame] | 652 | void qlcnic_83xx_set_mac_filter_count(struct qlcnic_adapter *); |
Rajesh Borundia | 486a5bc | 2013-06-22 04:12:06 -0400 | [diff] [blame] | 653 | int qlcnic_83xx_shutdown(struct pci_dev *); |
| 654 | int qlcnic_83xx_resume(struct qlcnic_adapter *); |
| 655 | int qlcnic_83xx_idc_init(struct qlcnic_adapter *); |
| 656 | int qlcnic_83xx_idc_reattach_driver(struct qlcnic_adapter *); |
| 657 | int qlcnic_83xx_set_vnic_opmode(struct qlcnic_adapter *); |
| 658 | int qlcnic_83xx_check_vnic_state(struct qlcnic_adapter *); |
Sony Chacko | 7f96645 | 2013-01-01 03:20:19 +0000 | [diff] [blame] | 659 | #endif |