blob: 1b7ec0870c2a8e0a8e772bcf93f15d701fa1a1e0 [file] [log] [blame]
Abhijeet Dharmapurikarcbdb53e2011-04-05 14:40:52 -07001/*
2 * Copyright (c) 2011, Code Aurora Forum. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 and
6 * only version 2 as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 */
13
14#define pr_fmt(fmt) "%s: " fmt, __func__
15
16#include <linux/kernel.h>
Stephen Boydbc866fc2014-02-26 10:59:19 -080017#include <linux/interrupt.h>
Stephen Boydcced3542014-02-26 10:59:20 -080018#include <linux/irqchip/chained_irq.h>
Stephen Boydbc866fc2014-02-26 10:59:19 -080019#include <linux/irq.h>
Stephen Boyddc1a95c2014-02-26 10:59:21 -080020#include <linux/irqdomain.h>
Jingoo Hanef310f42013-08-20 16:01:26 +090021#include <linux/module.h>
Abhijeet Dharmapurikarcbdb53e2011-04-05 14:40:52 -070022#include <linux/platform_device.h>
23#include <linux/slab.h>
Abhijeet Dharmapurikarc013f0a2011-04-05 14:40:53 -070024#include <linux/err.h>
David Brownce44bf52013-03-12 11:41:54 -070025#include <linux/ssbi.h>
Stephen Boyde7b81fca2014-02-26 10:59:23 -080026#include <linux/regmap.h>
Stephen Boyddc1a95c2014-02-26 10:59:21 -080027#include <linux/of_platform.h>
Abhijeet Dharmapurikarcbdb53e2011-04-05 14:40:52 -070028#include <linux/mfd/core.h>
Stephen Boydbc866fc2014-02-26 10:59:19 -080029
30#define SSBI_REG_ADDR_IRQ_BASE 0x1BB
31
32#define SSBI_REG_ADDR_IRQ_ROOT (SSBI_REG_ADDR_IRQ_BASE + 0)
33#define SSBI_REG_ADDR_IRQ_M_STATUS1 (SSBI_REG_ADDR_IRQ_BASE + 1)
34#define SSBI_REG_ADDR_IRQ_M_STATUS2 (SSBI_REG_ADDR_IRQ_BASE + 2)
35#define SSBI_REG_ADDR_IRQ_M_STATUS3 (SSBI_REG_ADDR_IRQ_BASE + 3)
36#define SSBI_REG_ADDR_IRQ_M_STATUS4 (SSBI_REG_ADDR_IRQ_BASE + 4)
37#define SSBI_REG_ADDR_IRQ_BLK_SEL (SSBI_REG_ADDR_IRQ_BASE + 5)
38#define SSBI_REG_ADDR_IRQ_IT_STATUS (SSBI_REG_ADDR_IRQ_BASE + 6)
39#define SSBI_REG_ADDR_IRQ_CONFIG (SSBI_REG_ADDR_IRQ_BASE + 7)
40#define SSBI_REG_ADDR_IRQ_RT_STATUS (SSBI_REG_ADDR_IRQ_BASE + 8)
41
42#define PM_IRQF_LVL_SEL 0x01 /* level select */
43#define PM_IRQF_MASK_FE 0x02 /* mask falling edge */
44#define PM_IRQF_MASK_RE 0x04 /* mask rising edge */
45#define PM_IRQF_CLR 0x08 /* clear interrupt */
46#define PM_IRQF_BITS_MASK 0x70
47#define PM_IRQF_BITS_SHIFT 4
48#define PM_IRQF_WRITE 0x80
49
50#define PM_IRQF_MASK_ALL (PM_IRQF_MASK_FE | \
51 PM_IRQF_MASK_RE)
Abhijeet Dharmapurikarcbdb53e2011-04-05 14:40:52 -070052
53#define REG_HWREV 0x002 /* PMIC4 revision */
54#define REG_HWREV_2 0x0E8 /* PMIC4 revision 2 */
55
Stephen Boyddc1a95c2014-02-26 10:59:21 -080056#define PM8921_NR_IRQS 256
57
Stephen Boydbc866fc2014-02-26 10:59:19 -080058struct pm_irq_chip {
Stephen Boyde7b81fca2014-02-26 10:59:23 -080059 struct regmap *regmap;
Stephen Boydbc866fc2014-02-26 10:59:19 -080060 spinlock_t pm_irq_lock;
Stephen Boyddc1a95c2014-02-26 10:59:21 -080061 struct irq_domain *irqdomain;
Stephen Boydbc866fc2014-02-26 10:59:19 -080062 unsigned int num_irqs;
63 unsigned int num_blocks;
64 unsigned int num_masters;
65 u8 config[0];
66};
67
Stephen Boyde7b81fca2014-02-26 10:59:23 -080068static int pm8xxx_read_block_irq(struct pm_irq_chip *chip, unsigned int bp,
69 unsigned int *ip)
Stephen Boydbc866fc2014-02-26 10:59:19 -080070{
71 int rc;
72
73 spin_lock(&chip->pm_irq_lock);
Stephen Boyde7b81fca2014-02-26 10:59:23 -080074 rc = regmap_write(chip->regmap, SSBI_REG_ADDR_IRQ_BLK_SEL, bp);
Stephen Boydbc866fc2014-02-26 10:59:19 -080075 if (rc) {
76 pr_err("Failed Selecting Block %d rc=%d\n", bp, rc);
77 goto bail;
78 }
79
Stephen Boyde7b81fca2014-02-26 10:59:23 -080080 rc = regmap_read(chip->regmap, SSBI_REG_ADDR_IRQ_IT_STATUS, ip);
Stephen Boydbc866fc2014-02-26 10:59:19 -080081 if (rc)
82 pr_err("Failed Reading Status rc=%d\n", rc);
83bail:
84 spin_unlock(&chip->pm_irq_lock);
85 return rc;
86}
87
Stephen Boyde7b81fca2014-02-26 10:59:23 -080088static int
89pm8xxx_config_irq(struct pm_irq_chip *chip, unsigned int bp, unsigned int cp)
Stephen Boydbc866fc2014-02-26 10:59:19 -080090{
91 int rc;
92
93 spin_lock(&chip->pm_irq_lock);
Stephen Boyde7b81fca2014-02-26 10:59:23 -080094 rc = regmap_write(chip->regmap, SSBI_REG_ADDR_IRQ_BLK_SEL, bp);
Stephen Boydbc866fc2014-02-26 10:59:19 -080095 if (rc) {
96 pr_err("Failed Selecting Block %d rc=%d\n", bp, rc);
97 goto bail;
98 }
99
100 cp |= PM_IRQF_WRITE;
Stephen Boyde7b81fca2014-02-26 10:59:23 -0800101 rc = regmap_write(chip->regmap, SSBI_REG_ADDR_IRQ_CONFIG, cp);
Stephen Boydbc866fc2014-02-26 10:59:19 -0800102 if (rc)
103 pr_err("Failed Configuring IRQ rc=%d\n", rc);
104bail:
105 spin_unlock(&chip->pm_irq_lock);
106 return rc;
107}
108
109static int pm8xxx_irq_block_handler(struct pm_irq_chip *chip, int block)
110{
111 int pmirq, irq, i, ret = 0;
Stephen Boyde7b81fca2014-02-26 10:59:23 -0800112 unsigned int bits;
Stephen Boydbc866fc2014-02-26 10:59:19 -0800113
114 ret = pm8xxx_read_block_irq(chip, block, &bits);
115 if (ret) {
116 pr_err("Failed reading %d block ret=%d", block, ret);
117 return ret;
118 }
119 if (!bits) {
120 pr_err("block bit set in master but no irqs: %d", block);
121 return 0;
122 }
123
124 /* Check IRQ bits */
125 for (i = 0; i < 8; i++) {
126 if (bits & (1 << i)) {
127 pmirq = block * 8 + i;
Stephen Boyddc1a95c2014-02-26 10:59:21 -0800128 irq = irq_find_mapping(chip->irqdomain, pmirq);
Stephen Boydbc866fc2014-02-26 10:59:19 -0800129 generic_handle_irq(irq);
130 }
131 }
132 return 0;
133}
134
135static int pm8xxx_irq_master_handler(struct pm_irq_chip *chip, int master)
136{
Stephen Boyde7b81fca2014-02-26 10:59:23 -0800137 unsigned int blockbits;
Stephen Boydbc866fc2014-02-26 10:59:19 -0800138 int block_number, i, ret = 0;
139
Stephen Boyde7b81fca2014-02-26 10:59:23 -0800140 ret = regmap_read(chip->regmap, SSBI_REG_ADDR_IRQ_M_STATUS1 + master,
141 &blockbits);
Stephen Boydbc866fc2014-02-26 10:59:19 -0800142 if (ret) {
143 pr_err("Failed to read master %d ret=%d\n", master, ret);
144 return ret;
145 }
146 if (!blockbits) {
147 pr_err("master bit set in root but no blocks: %d", master);
148 return 0;
149 }
150
151 for (i = 0; i < 8; i++)
152 if (blockbits & (1 << i)) {
153 block_number = master * 8 + i; /* block # */
154 ret |= pm8xxx_irq_block_handler(chip, block_number);
155 }
156 return ret;
157}
158
Thomas Gleixnerbd0b9ac2015-09-14 10:42:37 +0200159static void pm8xxx_irq_handler(struct irq_desc *desc)
Stephen Boydbc866fc2014-02-26 10:59:19 -0800160{
161 struct pm_irq_chip *chip = irq_desc_get_handler_data(desc);
162 struct irq_chip *irq_chip = irq_desc_get_chip(desc);
Stephen Boyde7b81fca2014-02-26 10:59:23 -0800163 unsigned int root;
Stephen Boydbc866fc2014-02-26 10:59:19 -0800164 int i, ret, masters = 0;
165
Stephen Boydcced3542014-02-26 10:59:20 -0800166 chained_irq_enter(irq_chip, desc);
167
Stephen Boyde7b81fca2014-02-26 10:59:23 -0800168 ret = regmap_read(chip->regmap, SSBI_REG_ADDR_IRQ_ROOT, &root);
Stephen Boydbc866fc2014-02-26 10:59:19 -0800169 if (ret) {
170 pr_err("Can't read root status ret=%d\n", ret);
171 return;
172 }
173
174 /* on pm8xxx series masters start from bit 1 of the root */
175 masters = root >> 1;
176
177 /* Read allowed masters for blocks. */
178 for (i = 0; i < chip->num_masters; i++)
179 if (masters & (1 << i))
180 pm8xxx_irq_master_handler(chip, i);
181
Stephen Boydcced3542014-02-26 10:59:20 -0800182 chained_irq_exit(irq_chip, desc);
Stephen Boydbc866fc2014-02-26 10:59:19 -0800183}
184
185static void pm8xxx_irq_mask_ack(struct irq_data *d)
186{
187 struct pm_irq_chip *chip = irq_data_get_irq_chip_data(d);
Stephen Boyddc1a95c2014-02-26 10:59:21 -0800188 unsigned int pmirq = irqd_to_hwirq(d);
Stephen Boydbc866fc2014-02-26 10:59:19 -0800189 u8 block, config;
190
191 block = pmirq / 8;
Stephen Boydbc866fc2014-02-26 10:59:19 -0800192
193 config = chip->config[pmirq] | PM_IRQF_MASK_ALL | PM_IRQF_CLR;
194 pm8xxx_config_irq(chip, block, config);
195}
196
197static void pm8xxx_irq_unmask(struct irq_data *d)
198{
199 struct pm_irq_chip *chip = irq_data_get_irq_chip_data(d);
Stephen Boyddc1a95c2014-02-26 10:59:21 -0800200 unsigned int pmirq = irqd_to_hwirq(d);
Stephen Boydbc866fc2014-02-26 10:59:19 -0800201 u8 block, config;
202
203 block = pmirq / 8;
Stephen Boydbc866fc2014-02-26 10:59:19 -0800204
205 config = chip->config[pmirq];
206 pm8xxx_config_irq(chip, block, config);
207}
208
209static int pm8xxx_irq_set_type(struct irq_data *d, unsigned int flow_type)
210{
211 struct pm_irq_chip *chip = irq_data_get_irq_chip_data(d);
Stephen Boyddc1a95c2014-02-26 10:59:21 -0800212 unsigned int pmirq = irqd_to_hwirq(d);
213 int irq_bit;
Stephen Boydbc866fc2014-02-26 10:59:19 -0800214 u8 block, config;
215
216 block = pmirq / 8;
Stephen Boydbc866fc2014-02-26 10:59:19 -0800217 irq_bit = pmirq % 8;
218
219 chip->config[pmirq] = (irq_bit << PM_IRQF_BITS_SHIFT)
220 | PM_IRQF_MASK_ALL;
221 if (flow_type & (IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING)) {
222 if (flow_type & IRQF_TRIGGER_RISING)
223 chip->config[pmirq] &= ~PM_IRQF_MASK_RE;
224 if (flow_type & IRQF_TRIGGER_FALLING)
225 chip->config[pmirq] &= ~PM_IRQF_MASK_FE;
226 } else {
227 chip->config[pmirq] |= PM_IRQF_LVL_SEL;
228
229 if (flow_type & IRQF_TRIGGER_HIGH)
230 chip->config[pmirq] &= ~PM_IRQF_MASK_RE;
231 else
232 chip->config[pmirq] &= ~PM_IRQF_MASK_FE;
233 }
234
235 config = chip->config[pmirq] | PM_IRQF_CLR;
236 return pm8xxx_config_irq(chip, block, config);
237}
238
Bjorn Anderssonf1837e42015-07-14 23:40:34 -0700239static int pm8xxx_irq_get_irqchip_state(struct irq_data *d,
240 enum irqchip_irq_state which,
241 bool *state)
242{
243 struct pm_irq_chip *chip = irq_data_get_irq_chip_data(d);
244 unsigned int pmirq = irqd_to_hwirq(d);
245 unsigned int bits;
246 int irq_bit;
247 u8 block;
248 int rc;
249
250 if (which != IRQCHIP_STATE_LINE_LEVEL)
251 return -EINVAL;
252
253 block = pmirq / 8;
254 irq_bit = pmirq % 8;
255
256 spin_lock(&chip->pm_irq_lock);
257 rc = regmap_write(chip->regmap, SSBI_REG_ADDR_IRQ_BLK_SEL, block);
258 if (rc) {
259 pr_err("Failed Selecting Block %d rc=%d\n", block, rc);
260 goto bail;
261 }
262
263 rc = regmap_read(chip->regmap, SSBI_REG_ADDR_IRQ_RT_STATUS, &bits);
264 if (rc) {
265 pr_err("Failed Reading Status rc=%d\n", rc);
266 goto bail;
267 }
268
269 *state = !!(bits & BIT(irq_bit));
270bail:
271 spin_unlock(&chip->pm_irq_lock);
272
273 return rc;
274}
275
Stephen Boydbc866fc2014-02-26 10:59:19 -0800276static struct irq_chip pm8xxx_irq_chip = {
277 .name = "pm8xxx",
278 .irq_mask_ack = pm8xxx_irq_mask_ack,
279 .irq_unmask = pm8xxx_irq_unmask,
280 .irq_set_type = pm8xxx_irq_set_type,
Bjorn Anderssonf1837e42015-07-14 23:40:34 -0700281 .irq_get_irqchip_state = pm8xxx_irq_get_irqchip_state,
Stephen Boydd2d24ad2014-03-04 10:48:52 -0800282 .flags = IRQCHIP_MASK_ON_SUSPEND | IRQCHIP_SKIP_SET_WAKE,
Stephen Boydbc866fc2014-02-26 10:59:19 -0800283};
284
Stephen Boyddc1a95c2014-02-26 10:59:21 -0800285static int pm8xxx_irq_domain_map(struct irq_domain *d, unsigned int irq,
286 irq_hw_number_t hwirq)
Stephen Boydbc866fc2014-02-26 10:59:19 -0800287{
Stephen Boyddc1a95c2014-02-26 10:59:21 -0800288 struct pm_irq_chip *chip = d->host_data;
Stephen Boydbc866fc2014-02-26 10:59:19 -0800289
Stephen Boyddc1a95c2014-02-26 10:59:21 -0800290 irq_set_chip_and_handler(irq, &pm8xxx_irq_chip, handle_level_irq);
291 irq_set_chip_data(irq, chip);
Stephen Boyddc1a95c2014-02-26 10:59:21 -0800292 irq_set_noprobe(irq);
Rob Herring9bd09f32015-07-27 15:55:20 -0500293
Stephen Boydbc866fc2014-02-26 10:59:19 -0800294 return 0;
295}
296
Stephen Boyddc1a95c2014-02-26 10:59:21 -0800297static const struct irq_domain_ops pm8xxx_irq_domain_ops = {
298 .xlate = irq_domain_xlate_twocell,
299 .map = pm8xxx_irq_domain_map,
300};
301
Stephen Boyde7b81fca2014-02-26 10:59:23 -0800302static const struct regmap_config ssbi_regmap_config = {
303 .reg_bits = 16,
304 .val_bits = 8,
305 .max_register = 0x3ff,
306 .fast_io = true,
307 .reg_read = ssbi_reg_read,
308 .reg_write = ssbi_reg_write
309};
310
Stephen Boydc5865a52014-02-26 10:59:24 -0800311static const struct of_device_id pm8921_id_table[] = {
312 { .compatible = "qcom,pm8058", },
313 { .compatible = "qcom,pm8921", },
314 { }
315};
316MODULE_DEVICE_TABLE(of, pm8921_id_table);
317
Bill Pembertonf791be42012-11-19 13:23:04 -0500318static int pm8921_probe(struct platform_device *pdev)
Abhijeet Dharmapurikarcbdb53e2011-04-05 14:40:52 -0700319{
Stephen Boyde7b81fca2014-02-26 10:59:23 -0800320 struct regmap *regmap;
Josh Cartwright202f7682014-03-05 13:34:25 -0600321 int irq, rc;
Stephen Boyde7b81fca2014-02-26 10:59:23 -0800322 unsigned int val;
Abhijeet Dharmapurikarc013f0a2011-04-05 14:40:53 -0700323 u32 rev;
Stephen Boyddc1a95c2014-02-26 10:59:21 -0800324 struct pm_irq_chip *chip;
325 unsigned int nirqs = PM8921_NR_IRQS;
Abhijeet Dharmapurikarcbdb53e2011-04-05 14:40:52 -0700326
Stephen Boyddc1a95c2014-02-26 10:59:21 -0800327 irq = platform_get_irq(pdev, 0);
328 if (irq < 0)
329 return irq;
Abhijeet Dharmapurikarcbdb53e2011-04-05 14:40:52 -0700330
Stephen Boyde7b81fca2014-02-26 10:59:23 -0800331 regmap = devm_regmap_init(&pdev->dev, NULL, pdev->dev.parent,
332 &ssbi_regmap_config);
333 if (IS_ERR(regmap))
334 return PTR_ERR(regmap);
335
Abhijeet Dharmapurikarcbdb53e2011-04-05 14:40:52 -0700336 /* Read PMIC chip revision */
Stephen Boyde7b81fca2014-02-26 10:59:23 -0800337 rc = regmap_read(regmap, REG_HWREV, &val);
Abhijeet Dharmapurikarcbdb53e2011-04-05 14:40:52 -0700338 if (rc) {
339 pr_err("Failed to read hw rev reg %d:rc=%d\n", REG_HWREV, rc);
Jingoo Hanb2cdcfa2013-08-20 16:02:26 +0900340 return rc;
Abhijeet Dharmapurikarcbdb53e2011-04-05 14:40:52 -0700341 }
342 pr_info("PMIC revision 1: %02X\n", val);
Abhijeet Dharmapurikarc013f0a2011-04-05 14:40:53 -0700343 rev = val;
Abhijeet Dharmapurikarcbdb53e2011-04-05 14:40:52 -0700344
345 /* Read PMIC chip revision 2 */
Stephen Boyde7b81fca2014-02-26 10:59:23 -0800346 rc = regmap_read(regmap, REG_HWREV_2, &val);
Abhijeet Dharmapurikarcbdb53e2011-04-05 14:40:52 -0700347 if (rc) {
348 pr_err("Failed to read hw rev 2 reg %d:rc=%d\n",
349 REG_HWREV_2, rc);
Jingoo Hanb2cdcfa2013-08-20 16:02:26 +0900350 return rc;
Abhijeet Dharmapurikarcbdb53e2011-04-05 14:40:52 -0700351 }
352 pr_info("PMIC revision 2: %02X\n", val);
Abhijeet Dharmapurikarc013f0a2011-04-05 14:40:53 -0700353 rev |= val << BITS_PER_BYTE;
Abhijeet Dharmapurikarcbdb53e2011-04-05 14:40:52 -0700354
Stephen Boyddc1a95c2014-02-26 10:59:21 -0800355 chip = devm_kzalloc(&pdev->dev, sizeof(*chip) +
356 sizeof(chip->config[0]) * nirqs,
357 GFP_KERNEL);
358 if (!chip)
359 return -ENOMEM;
360
Stephen Boyd3e879332014-04-08 17:14:15 -0700361 platform_set_drvdata(pdev, chip);
Stephen Boyde7b81fca2014-02-26 10:59:23 -0800362 chip->regmap = regmap;
Stephen Boyddc1a95c2014-02-26 10:59:21 -0800363 chip->num_irqs = nirqs;
364 chip->num_blocks = DIV_ROUND_UP(chip->num_irqs, 8);
365 chip->num_masters = DIV_ROUND_UP(chip->num_blocks, 8);
366 spin_lock_init(&chip->pm_irq_lock);
367
368 chip->irqdomain = irq_domain_add_linear(pdev->dev.of_node, nirqs,
369 &pm8xxx_irq_domain_ops,
370 chip);
371 if (!chip->irqdomain)
372 return -ENODEV;
373
Thomas Gleixnerb79f0432015-07-13 20:44:51 +0000374 irq_set_chained_handler_and_data(irq, pm8xxx_irq_handler, chip);
Stephen Boyddc1a95c2014-02-26 10:59:21 -0800375 irq_set_irq_wake(irq, 1);
376
377 rc = of_platform_populate(pdev->dev.of_node, NULL, NULL, &pdev->dev);
Abhijeet Dharmapurikarc013f0a2011-04-05 14:40:53 -0700378 if (rc) {
Thomas Gleixnerb79f0432015-07-13 20:44:51 +0000379 irq_set_chained_handler_and_data(irq, NULL, NULL);
Stephen Boyddc1a95c2014-02-26 10:59:21 -0800380 irq_domain_remove(chip->irqdomain);
Abhijeet Dharmapurikarc013f0a2011-04-05 14:40:53 -0700381 }
382
Abhijeet Dharmapurikarcbdb53e2011-04-05 14:40:52 -0700383 return rc;
384}
385
Stephen Boyddc1a95c2014-02-26 10:59:21 -0800386static int pm8921_remove_child(struct device *dev, void *unused)
387{
388 platform_device_unregister(to_platform_device(dev));
389 return 0;
390}
391
Bill Pemberton4740f732012-11-19 13:26:01 -0500392static int pm8921_remove(struct platform_device *pdev)
Abhijeet Dharmapurikarcbdb53e2011-04-05 14:40:52 -0700393{
Stephen Boyddc1a95c2014-02-26 10:59:21 -0800394 int irq = platform_get_irq(pdev, 0);
Stephen Boyd3e879332014-04-08 17:14:15 -0700395 struct pm_irq_chip *chip = platform_get_drvdata(pdev);
Abhijeet Dharmapurikarcbdb53e2011-04-05 14:40:52 -0700396
Stephen Boyddc1a95c2014-02-26 10:59:21 -0800397 device_for_each_child(&pdev->dev, NULL, pm8921_remove_child);
Thomas Gleixnerb79f0432015-07-13 20:44:51 +0000398 irq_set_chained_handler_and_data(irq, NULL, NULL);
Stephen Boyddc1a95c2014-02-26 10:59:21 -0800399 irq_domain_remove(chip->irqdomain);
Abhijeet Dharmapurikarcbdb53e2011-04-05 14:40:52 -0700400
401 return 0;
402}
403
404static struct platform_driver pm8921_driver = {
405 .probe = pm8921_probe,
Bill Pemberton84449212012-11-19 13:20:24 -0500406 .remove = pm8921_remove,
Abhijeet Dharmapurikarcbdb53e2011-04-05 14:40:52 -0700407 .driver = {
408 .name = "pm8921-core",
Stephen Boydc5865a52014-02-26 10:59:24 -0800409 .of_match_table = pm8921_id_table,
Abhijeet Dharmapurikarcbdb53e2011-04-05 14:40:52 -0700410 },
411};
412
413static int __init pm8921_init(void)
414{
415 return platform_driver_register(&pm8921_driver);
416}
417subsys_initcall(pm8921_init);
418
419static void __exit pm8921_exit(void)
420{
421 platform_driver_unregister(&pm8921_driver);
422}
423module_exit(pm8921_exit);
424
425MODULE_LICENSE("GPL v2");
426MODULE_DESCRIPTION("PMIC 8921 core driver");
427MODULE_VERSION("1.0");
428MODULE_ALIAS("platform:pm8921-core");