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Adam Baker630300d2016-03-05 15:34:56 +00001Kernel driver nsa320_hwmon
2==========================
3
4Supported chips:
5 * Holtek HT46R065 microcontroller with onboard firmware that configures
6 it to act as a hardware monitor.
7 Prefix: 'nsa320'
8 Addresses scanned: none
9 Datasheet: Not available, driver was reverse engineered based upon the
10 Zyxel kernel source
11
12Author:
13 Adam Baker <linux@baker-net.org.uk>
14
15Description
16-----------
17
18This chip is known to be used in the Zyxel NSA320 and NSA325 NAS Units and
19also in some variants of the NSA310 but the driver has only been tested
20on the NSA320. In all of these devices it is connected to the same 3 GPIO
21lines which are used to provide chip select, clock and data lines. The
22interface behaves similarly to SPI but at much lower speeds than are normally
23used for SPI.
24
25Following each chip select pulse the chip will generate a single 32 bit word
26that contains 0x55 as a marker to indicate that data is being read correctly,
27followed by an 8 bit fan speed in 100s of RPM and a 16 bit temperature in
28tenths of a degree.
29
30
31sysfs-Interface
32---------------
33
34temp1_input - temperature input
35fan1_input - fan speed
36
37Notes
38-----
39
40The access timings used in the driver are the same as used in the Zyxel
41provided kernel. Testing has shown that if the delay between chip select and
42the first clock pulse is reduced from 100 ms to just under 10ms then the chip
43will not produce any output. If the duration of either phase of the clock
44is reduced from 100 us to less than 15 us then data pulses are likely to be
45read twice corrupting the output. The above analysis is based upon a sample
46of one unit but suggests that the Zyxel provided delay values include a
47reasonable tolerance.
48
49The driver incorporates a limit that it will not check for updated values
50faster than once a second. This is because the hardware takes a relatively long
51time to read the data from the device and when it does it reads both temp and
52fan speed. As the most likely case for two accesses in quick succession is
53to read both of these values avoiding a second read delay is desirable.