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gerrit-public.fairphone.software / kernel / msm-4.9 / refs/tags/FP3-REL-Q-3.A.0107 / . / arch / arm / mach-omap2 / sram.h
blob: 18dc884267fa6b6efa37a18596843e4e595773e3 [file] [log] [blame]
Tony Lindgren622297f2012-10-02 14:19:52 -0700[diff] [blame]1/*
Tony Lindgren622297f2012-10-02 14:19:52 -0700[diff] [blame]2 * Interface for functions that need to be run in internal SRAM
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
Manjunath Kondaiah Gb0a330d2010-10-08 10:00:19 -0700[diff] [blame]8
Tony Lindgren622297f2012-10-02 14:19:52 -0700[diff] [blame]9#ifndef __ASSEMBLY__
Tony Lindgrenbf027ca2012-10-29 13:54:06 -0700[diff] [blame]10#include <plat/sram.h>
Tony Lindgren622297f2012-10-02 14:19:52 -0700[diff] [blame]11
12extern void omap2_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl,
13 u32 base_cs, u32 force_unlock);
14extern void omap2_sram_reprogram_sdrc(u32 perf_level, u32 dll_val,
15 u32 mem_type);
16extern u32 omap2_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass);
17
Tony Lindgren622297f2012-10-02 14:19:52 -0700[diff] [blame]18extern void omap3_sram_restore_context(void);
19
20/* Do not use these */
Tony Lindgren622297f2012-10-02 14:19:52 -0700[diff] [blame]21extern void omap24xx_sram_reprogram_clock(u32 ckctl, u32 dpllctl);
22extern unsigned long omap24xx_sram_reprogram_clock_sz;
23
24extern void omap242x_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl,
25 u32 base_cs, u32 force_unlock);
26extern unsigned long omap242x_sram_ddr_init_sz;
27
28extern u32 omap242x_sram_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val,
29 int bypass);
30extern unsigned long omap242x_sram_set_prcm_sz;
31
32extern void omap242x_sram_reprogram_sdrc(u32 perf_level, u32 dll_val,
33 u32 mem_type);
34extern unsigned long omap242x_sram_reprogram_sdrc_sz;
35
36
37extern void omap243x_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl,
38 u32 base_cs, u32 force_unlock);
39extern unsigned long omap243x_sram_ddr_init_sz;
40
41extern u32 omap243x_sram_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val,
42 int bypass);
43extern unsigned long omap243x_sram_set_prcm_sz;
44
45extern void omap243x_sram_reprogram_sdrc(u32 perf_level, u32 dll_val,
46 u32 mem_type);
47extern unsigned long omap243x_sram_reprogram_sdrc_sz;
48
Tony Lindgren622297f2012-10-02 14:19:52 -0700[diff] [blame]49#ifdef CONFIG_PM
50extern void omap_push_sram_idle(void);
51#else
52static inline void omap_push_sram_idle(void) {}
53#endif /* CONFIG_PM */
54
55#endif /* __ASSEMBLY__ */
56
57/*
58 * OMAP2+: define the SRAM PA addresses.
59 * Used by the SRAM management code and the idle sleep code.
60 */
61#define OMAP2_SRAM_PA 0x40200000
62#define OMAP3_SRAM_PA 0x40200000