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Jayachandran C5c64250672011-05-07 01:36:40 +05301/*
2 * Copyright 2003-2011 NetLogic Microsystems, Inc. (NetLogic). All rights
3 * reserved.
4 *
5 * This software is available to you under a choice of one of two
6 * licenses. You may choose to be licensed under the terms of the GNU
7 * General Public License (GPL) Version 2, available from the file
8 * COPYING in the main directory of this source tree, or the NetLogic
9 * license below:
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 *
15 * 1. Redistributions of source code must retain the above copyright
16 * notice, this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright
18 * notice, this list of conditions and the following disclaimer in
19 * the documentation and/or other materials provided with the
20 * distribution.
21 *
22 * THIS SOFTWARE IS PROVIDED BY NETLOGIC ``AS IS'' AND ANY EXPRESS OR
23 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
24 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25 * ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE LIABLE
26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
29 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
30 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
31 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
32 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35#include <linux/types.h>
Jayachandran C0c965402011-11-11 17:08:29 +053036#include <linux/serial_reg.h>
37
38#include <asm/mipsregs.h>
39#include <asm/netlogic/haldefs.h>
Jayachandran C61673de2013-12-21 16:52:24 +053040#include <asm/netlogic/common.h>
Jayachandran C0c965402011-11-11 17:08:29 +053041
Jayachandran C65040e22011-11-16 00:21:28 +000042#if defined(CONFIG_CPU_XLP)
43#include <asm/netlogic/xlp-hal/iomap.h>
Jayachandran C61673de2013-12-21 16:52:24 +053044#include <asm/netlogic/xlp-hal/xlp.h>
Jayachandran C65040e22011-11-16 00:21:28 +000045#include <asm/netlogic/xlp-hal/uart.h>
46#elif defined(CONFIG_CPU_XLR)
Jayachandran C5c64250672011-05-07 01:36:40 +053047#include <asm/netlogic/xlr/iomap.h>
Jayachandran C65040e22011-11-16 00:21:28 +000048#endif
Jayachandran C5c64250672011-05-07 01:36:40 +053049
50void prom_putchar(char c)
51{
Jayachandran C0c965402011-11-11 17:08:29 +053052 uint64_t uartbase;
Jayachandran C5c64250672011-05-07 01:36:40 +053053
Jayachandran C65040e22011-11-16 00:21:28 +000054#if defined(CONFIG_CPU_XLP)
55 uartbase = nlm_get_uart_regbase(0, 0);
56#elif defined(CONFIG_CPU_XLR)
Jayachandran C0c965402011-11-11 17:08:29 +053057 uartbase = nlm_mmio_base(NETLOGIC_IO_UART_0_OFFSET);
Jayachandran C65040e22011-11-16 00:21:28 +000058#endif
Jayachandran C7e6507a2012-07-16 15:33:37 +053059 while ((nlm_read_reg(uartbase, UART_LSR) & UART_LSR_THRE) == 0)
Jayachandran C5c64250672011-05-07 01:36:40 +053060 ;
Jayachandran C0c965402011-11-11 17:08:29 +053061 nlm_write_reg(uartbase, UART_TX, c);
Jayachandran C5c64250672011-05-07 01:36:40 +053062}