blob: 2129e67723ff38b6a1ef8fea8401886a063c8402 [file] [log] [blame]
Wu Zhangjin363c55c2009-06-04 20:27:10 +08001/*
2 * Suspend support specific for mips.
3 *
4 * Licensed under the GPLv2
5 *
Wu Zhangjinf7a904d2010-01-04 17:16:51 +08006 * Copyright (C) 2009 Lemote Inc.
Wu Zhangjin363c55c2009-06-04 20:27:10 +08007 * Author: Hu Hongbing <huhb@lemote.com>
Ralf Baechle70342282013-01-22 12:59:30 +01008 * Wu Zhangjin <wuzhangjin@gmail.com>
Wu Zhangjin363c55c2009-06-04 20:27:10 +08009 */
Geert Uytterhoeven7f8998c2014-10-09 15:30:30 -070010#include <asm/sections.h>
Wu Zhangjin363c55c2009-06-04 20:27:10 +080011#include <asm/fpu.h>
12#include <asm/dsp.h>
13
14static u32 saved_status;
15struct pt_regs saved_regs;
16
17void save_processor_state(void)
18{
19 saved_status = read_c0_status();
20
21 if (is_fpu_owner())
22 save_fp(current);
23 if (cpu_has_dsp)
24 save_dsp(current);
25}
26
27void restore_processor_state(void)
28{
29 write_c0_status(saved_status);
30
31 if (is_fpu_owner())
32 restore_fp(current);
33 if (cpu_has_dsp)
34 restore_dsp(current);
35}
36
37int pfn_is_nosave(unsigned long pfn)
38{
39 unsigned long nosave_begin_pfn = PFN_DOWN(__pa(&__nosave_begin));
40 unsigned long nosave_end_pfn = PFN_UP(__pa(&__nosave_end));
41
42 return (pfn >= nosave_begin_pfn) && (pfn < nosave_end_pfn);
43}