Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2002 Andi Kleen, SuSE Labs. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3 | * Thanks to Ben LaHaise for precious feedback. |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 4 | */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 5 | #include <linux/highmem.h> |
Ingo Molnar | 8192206 | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 6 | #include <linux/bootmem.h> |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 7 | #include <linux/sched.h> |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 8 | #include <linux/mm.h> |
Thomas Gleixner | 76ebd05 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 9 | #include <linux/interrupt.h> |
Thomas Gleixner | ee7ae7a | 2008-04-17 17:40:45 +0200 | [diff] [blame] | 10 | #include <linux/seq_file.h> |
| 11 | #include <linux/debugfs.h> |
Tejun Heo | e59a1bb | 2009-06-22 11:56:24 +0900 | [diff] [blame] | 12 | #include <linux/pfn.h> |
Tejun Heo | 8c4bfc6 | 2009-07-04 08:10:59 +0900 | [diff] [blame] | 13 | #include <linux/percpu.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 14 | #include <linux/gfp.h> |
Matthieu Castet | 5bd5a45 | 2010-11-16 22:31:26 +0100 | [diff] [blame] | 15 | #include <linux/pci.h> |
Stephen Rothwell | d647230 | 2015-06-02 19:01:38 +1000 | [diff] [blame] | 16 | #include <linux/vmalloc.h> |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 17 | |
Thomas Gleixner | 950f9d9 | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 18 | #include <asm/e820.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 19 | #include <asm/processor.h> |
| 20 | #include <asm/tlbflush.h> |
Dave Jones | f8af095 | 2006-01-06 00:12:10 -0800 | [diff] [blame] | 21 | #include <asm/sections.h> |
Jeremy Fitzhardinge | 93dbda7 | 2009-02-26 17:35:44 -0800 | [diff] [blame] | 22 | #include <asm/setup.h> |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 23 | #include <asm/uaccess.h> |
| 24 | #include <asm/pgalloc.h> |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 25 | #include <asm/proto.h> |
venkatesh.pallipadi@intel.com | 1219333 | 2008-03-18 17:00:18 -0700 | [diff] [blame] | 26 | #include <asm/pat.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 27 | |
Ingo Molnar | 9df8499 | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 28 | /* |
| 29 | * The current flushing context - we pass it instead of 5 arguments: |
| 30 | */ |
Thomas Gleixner | 72e458d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 31 | struct cpa_data { |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 32 | unsigned long *vaddr; |
Borislav Petkov | 0fd64c2 | 2013-10-31 17:25:00 +0100 | [diff] [blame] | 33 | pgd_t *pgd; |
Thomas Gleixner | 72e458d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 34 | pgprot_t mask_set; |
| 35 | pgprot_t mask_clr; |
Matt Fleming | 7425637 | 2016-01-29 11:36:10 +0000 | [diff] [blame] | 36 | unsigned long numpages; |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 37 | int flags; |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 38 | unsigned long pfn; |
Andi Kleen | c9caa02 | 2008-03-12 03:53:29 +0100 | [diff] [blame] | 39 | unsigned force_split : 1; |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 40 | int curpage; |
venkatesh.pallipadi@intel.com | 9ae2847 | 2009-03-19 14:51:14 -0700 | [diff] [blame] | 41 | struct page **pages; |
Thomas Gleixner | 72e458d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 42 | }; |
| 43 | |
Suresh Siddha | ad5ca55 | 2008-09-23 14:00:42 -0700 | [diff] [blame] | 44 | /* |
| 45 | * Serialize cpa() (for !DEBUG_PAGEALLOC which uses large identity mappings) |
| 46 | * using cpa_lock. So that we don't allow any other cpu, with stale large tlb |
| 47 | * entries change the page attribute in parallel to some other cpu |
| 48 | * splitting a large page entry along with changing the attribute. |
| 49 | */ |
| 50 | static DEFINE_SPINLOCK(cpa_lock); |
| 51 | |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 52 | #define CPA_FLUSHTLB 1 |
| 53 | #define CPA_ARRAY 2 |
venkatesh.pallipadi@intel.com | 9ae2847 | 2009-03-19 14:51:14 -0700 | [diff] [blame] | 54 | #define CPA_PAGES_ARRAY 4 |
Dave Hansen | 8f0baad | 2017-08-30 16:23:00 -0700 | [diff] [blame] | 55 | #define CPA_FREE_PAGETABLES 8 |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 56 | |
Thomas Gleixner | 65280e6 | 2008-05-05 16:35:21 +0200 | [diff] [blame] | 57 | #ifdef CONFIG_PROC_FS |
Andi Kleen | ce0c0e5 | 2008-05-02 11:46:49 +0200 | [diff] [blame] | 58 | static unsigned long direct_pages_count[PG_LEVEL_NUM]; |
| 59 | |
Thomas Gleixner | 65280e6 | 2008-05-05 16:35:21 +0200 | [diff] [blame] | 60 | void update_page_count(int level, unsigned long pages) |
Andi Kleen | ce0c0e5 | 2008-05-02 11:46:49 +0200 | [diff] [blame] | 61 | { |
Andi Kleen | ce0c0e5 | 2008-05-02 11:46:49 +0200 | [diff] [blame] | 62 | /* Protect against CPA */ |
Andrea Arcangeli | a79e53d | 2011-02-16 15:45:22 -0800 | [diff] [blame] | 63 | spin_lock(&pgd_lock); |
Andi Kleen | ce0c0e5 | 2008-05-02 11:46:49 +0200 | [diff] [blame] | 64 | direct_pages_count[level] += pages; |
Andrea Arcangeli | a79e53d | 2011-02-16 15:45:22 -0800 | [diff] [blame] | 65 | spin_unlock(&pgd_lock); |
Andi Kleen | ce0c0e5 | 2008-05-02 11:46:49 +0200 | [diff] [blame] | 66 | } |
| 67 | |
Thomas Gleixner | 65280e6 | 2008-05-05 16:35:21 +0200 | [diff] [blame] | 68 | static void split_page_count(int level) |
| 69 | { |
Dave Jones | c9e0d39 | 2016-01-11 12:04:28 -0500 | [diff] [blame] | 70 | if (direct_pages_count[level] == 0) |
| 71 | return; |
| 72 | |
Thomas Gleixner | 65280e6 | 2008-05-05 16:35:21 +0200 | [diff] [blame] | 73 | direct_pages_count[level]--; |
| 74 | direct_pages_count[level - 1] += PTRS_PER_PTE; |
| 75 | } |
| 76 | |
Alexey Dobriyan | e1759c2 | 2008-10-15 23:50:22 +0400 | [diff] [blame] | 77 | void arch_report_meminfo(struct seq_file *m) |
Thomas Gleixner | 65280e6 | 2008-05-05 16:35:21 +0200 | [diff] [blame] | 78 | { |
Hugh Dickins | b9c3bfc | 2008-11-06 12:05:40 +0000 | [diff] [blame] | 79 | seq_printf(m, "DirectMap4k: %8lu kB\n", |
Hugh Dickins | a06de63 | 2008-08-15 13:58:32 +0100 | [diff] [blame] | 80 | direct_pages_count[PG_LEVEL_4K] << 2); |
| 81 | #if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE) |
Hugh Dickins | b9c3bfc | 2008-11-06 12:05:40 +0000 | [diff] [blame] | 82 | seq_printf(m, "DirectMap2M: %8lu kB\n", |
Hugh Dickins | a06de63 | 2008-08-15 13:58:32 +0100 | [diff] [blame] | 83 | direct_pages_count[PG_LEVEL_2M] << 11); |
| 84 | #else |
Hugh Dickins | b9c3bfc | 2008-11-06 12:05:40 +0000 | [diff] [blame] | 85 | seq_printf(m, "DirectMap4M: %8lu kB\n", |
Hugh Dickins | a06de63 | 2008-08-15 13:58:32 +0100 | [diff] [blame] | 86 | direct_pages_count[PG_LEVEL_2M] << 12); |
| 87 | #endif |
Hugh Dickins | a06de63 | 2008-08-15 13:58:32 +0100 | [diff] [blame] | 88 | if (direct_gbpages) |
Hugh Dickins | b9c3bfc | 2008-11-06 12:05:40 +0000 | [diff] [blame] | 89 | seq_printf(m, "DirectMap1G: %8lu kB\n", |
Hugh Dickins | a06de63 | 2008-08-15 13:58:32 +0100 | [diff] [blame] | 90 | direct_pages_count[PG_LEVEL_1G] << 20); |
Thomas Gleixner | 65280e6 | 2008-05-05 16:35:21 +0200 | [diff] [blame] | 91 | } |
| 92 | #else |
| 93 | static inline void split_page_count(int level) { } |
| 94 | #endif |
| 95 | |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 96 | #ifdef CONFIG_X86_64 |
| 97 | |
| 98 | static inline unsigned long highmap_start_pfn(void) |
| 99 | { |
Alexander Duyck | fc8d782 | 2012-11-16 13:57:13 -0800 | [diff] [blame] | 100 | return __pa_symbol(_text) >> PAGE_SHIFT; |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 101 | } |
| 102 | |
| 103 | static inline unsigned long highmap_end_pfn(void) |
| 104 | { |
Thomas Garnier | 4ff5308 | 2016-06-15 12:05:45 -0700 | [diff] [blame] | 105 | /* Do not reference physical address outside the kernel. */ |
| 106 | return __pa_symbol(roundup(_brk_end, PMD_SIZE) - 1) >> PAGE_SHIFT; |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 107 | } |
| 108 | |
| 109 | #endif |
| 110 | |
Arjan van de Ven | ed724be | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 111 | static inline int |
| 112 | within(unsigned long addr, unsigned long start, unsigned long end) |
Ingo Molnar | 687c482 | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 113 | { |
Arjan van de Ven | ed724be | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 114 | return addr >= start && addr < end; |
| 115 | } |
| 116 | |
Thomas Garnier | 4ff5308 | 2016-06-15 12:05:45 -0700 | [diff] [blame] | 117 | static inline int |
| 118 | within_inclusive(unsigned long addr, unsigned long start, unsigned long end) |
| 119 | { |
| 120 | return addr >= start && addr <= end; |
| 121 | } |
| 122 | |
Arjan van de Ven | ed724be | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 123 | /* |
Thomas Gleixner | d7c8f21 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 124 | * Flushing functions |
| 125 | */ |
Thomas Gleixner | cd8ddf1 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 126 | |
Thomas Gleixner | cd8ddf1 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 127 | /** |
| 128 | * clflush_cache_range - flush a cache range with clflush |
Wanpeng Li | 9efc31b | 2012-06-10 10:50:52 +0800 | [diff] [blame] | 129 | * @vaddr: virtual start address |
Thomas Gleixner | cd8ddf1 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 130 | * @size: number of bytes to flush |
| 131 | * |
Ross Zwisler | 8b80fd8 | 2014-02-26 12:06:50 -0700 | [diff] [blame] | 132 | * clflushopt is an unordered instruction which needs fencing with mfence or |
| 133 | * sfence to avoid ordering issues. |
Thomas Gleixner | cd8ddf1 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 134 | */ |
Ingo Molnar | 4c61afc | 2008-01-30 13:34:09 +0100 | [diff] [blame] | 135 | void clflush_cache_range(void *vaddr, unsigned int size) |
Thomas Gleixner | d7c8f21 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 136 | { |
Chris Wilson | 1f1a89a | 2016-01-08 09:55:33 +0000 | [diff] [blame] | 137 | const unsigned long clflush_size = boot_cpu_data.x86_clflush_size; |
| 138 | void *p = (void *)((unsigned long)vaddr & ~(clflush_size - 1)); |
Ross Zwisler | 6c434d6 | 2015-05-11 10:15:49 +0200 | [diff] [blame] | 139 | void *vend = vaddr + size; |
Chris Wilson | 1f1a89a | 2016-01-08 09:55:33 +0000 | [diff] [blame] | 140 | |
| 141 | if (p >= vend) |
| 142 | return; |
Thomas Gleixner | d7c8f21 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 143 | |
Thomas Gleixner | cd8ddf1 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 144 | mb(); |
Ingo Molnar | 4c61afc | 2008-01-30 13:34:09 +0100 | [diff] [blame] | 145 | |
Chris Wilson | 1f1a89a | 2016-01-08 09:55:33 +0000 | [diff] [blame] | 146 | for (; p < vend; p += clflush_size) |
Ross Zwisler | 6c434d6 | 2015-05-11 10:15:49 +0200 | [diff] [blame] | 147 | clflushopt(p); |
Ingo Molnar | 4c61afc | 2008-01-30 13:34:09 +0100 | [diff] [blame] | 148 | |
Thomas Gleixner | cd8ddf1 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 149 | mb(); |
Thomas Gleixner | d7c8f21 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 150 | } |
Eric Anholt | e517a5e | 2009-09-10 17:48:48 -0700 | [diff] [blame] | 151 | EXPORT_SYMBOL_GPL(clflush_cache_range); |
Thomas Gleixner | d7c8f21 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 152 | |
Thomas Gleixner | af1e684 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 153 | static void __cpa_flush_all(void *arg) |
Thomas Gleixner | d7c8f21 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 154 | { |
Andi Kleen | 6bb8383 | 2008-02-04 16:48:06 +0100 | [diff] [blame] | 155 | unsigned long cache = (unsigned long)arg; |
| 156 | |
Thomas Gleixner | d7c8f21 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 157 | /* |
| 158 | * Flush all to work around Errata in early athlons regarding |
| 159 | * large page flushing. |
| 160 | */ |
| 161 | __flush_tlb_all(); |
| 162 | |
venkatesh.pallipadi@intel.com | 0b82753 | 2009-05-22 13:23:37 -0700 | [diff] [blame] | 163 | if (cache && boot_cpu_data.x86 >= 4) |
Thomas Gleixner | d7c8f21 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 164 | wbinvd(); |
| 165 | } |
| 166 | |
Andi Kleen | 6bb8383 | 2008-02-04 16:48:06 +0100 | [diff] [blame] | 167 | static void cpa_flush_all(unsigned long cache) |
Thomas Gleixner | d7c8f21 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 168 | { |
| 169 | BUG_ON(irqs_disabled()); |
| 170 | |
Jens Axboe | 15c8b6c | 2008-05-09 09:39:44 +0200 | [diff] [blame] | 171 | on_each_cpu(__cpa_flush_all, (void *) cache, 1); |
Thomas Gleixner | d7c8f21 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 172 | } |
| 173 | |
Thomas Gleixner | 57a6a46 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 174 | static void __cpa_flush_range(void *arg) |
| 175 | { |
Thomas Gleixner | 57a6a46 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 176 | /* |
| 177 | * We could optimize that further and do individual per page |
| 178 | * tlb invalidates for a low number of pages. Caveat: we must |
| 179 | * flush the high aliases on 64bit as well. |
| 180 | */ |
| 181 | __flush_tlb_all(); |
Thomas Gleixner | 57a6a46 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 182 | } |
| 183 | |
Andi Kleen | 6bb8383 | 2008-02-04 16:48:06 +0100 | [diff] [blame] | 184 | static void cpa_flush_range(unsigned long start, int numpages, int cache) |
Thomas Gleixner | 57a6a46 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 185 | { |
Ingo Molnar | 4c61afc | 2008-01-30 13:34:09 +0100 | [diff] [blame] | 186 | unsigned int i, level; |
| 187 | unsigned long addr; |
| 188 | |
Thomas Gleixner | 57a6a46 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 189 | BUG_ON(irqs_disabled()); |
Ingo Molnar | 4c61afc | 2008-01-30 13:34:09 +0100 | [diff] [blame] | 190 | WARN_ON(PAGE_ALIGN(start) != start); |
Thomas Gleixner | 57a6a46 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 191 | |
Jens Axboe | 15c8b6c | 2008-05-09 09:39:44 +0200 | [diff] [blame] | 192 | on_each_cpu(__cpa_flush_range, NULL, 1); |
Thomas Gleixner | 57a6a46 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 193 | |
Andi Kleen | 6bb8383 | 2008-02-04 16:48:06 +0100 | [diff] [blame] | 194 | if (!cache) |
| 195 | return; |
| 196 | |
Thomas Gleixner | 3b233e5 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 197 | /* |
| 198 | * We only need to flush on one CPU, |
| 199 | * clflush is a MESI-coherent instruction that |
| 200 | * will cause all other CPUs to flush the same |
| 201 | * cachelines: |
| 202 | */ |
Ingo Molnar | 4c61afc | 2008-01-30 13:34:09 +0100 | [diff] [blame] | 203 | for (i = 0, addr = start; i < numpages; i++, addr += PAGE_SIZE) { |
| 204 | pte_t *pte = lookup_address(addr, &level); |
| 205 | |
| 206 | /* |
| 207 | * Only flush present addresses: |
| 208 | */ |
Thomas Gleixner | 7bfb72e | 2008-02-04 16:48:08 +0100 | [diff] [blame] | 209 | if (pte && (pte_val(*pte) & _PAGE_PRESENT)) |
Ingo Molnar | 4c61afc | 2008-01-30 13:34:09 +0100 | [diff] [blame] | 210 | clflush_cache_range((void *) addr, PAGE_SIZE); |
| 211 | } |
Thomas Gleixner | 57a6a46 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 212 | } |
| 213 | |
venkatesh.pallipadi@intel.com | 9ae2847 | 2009-03-19 14:51:14 -0700 | [diff] [blame] | 214 | static void cpa_flush_array(unsigned long *start, int numpages, int cache, |
| 215 | int in_flags, struct page **pages) |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 216 | { |
| 217 | unsigned int i, level; |
Pallipadi, Venkatesh | 2171787 | 2009-05-26 10:33:35 -0700 | [diff] [blame] | 218 | unsigned long do_wbinvd = cache && numpages >= 1024; /* 4M threshold */ |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 219 | |
| 220 | BUG_ON(irqs_disabled()); |
| 221 | |
Pallipadi, Venkatesh | 2171787 | 2009-05-26 10:33:35 -0700 | [diff] [blame] | 222 | on_each_cpu(__cpa_flush_all, (void *) do_wbinvd, 1); |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 223 | |
Pallipadi, Venkatesh | 2171787 | 2009-05-26 10:33:35 -0700 | [diff] [blame] | 224 | if (!cache || do_wbinvd) |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 225 | return; |
| 226 | |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 227 | /* |
| 228 | * We only need to flush on one CPU, |
| 229 | * clflush is a MESI-coherent instruction that |
| 230 | * will cause all other CPUs to flush the same |
| 231 | * cachelines: |
| 232 | */ |
venkatesh.pallipadi@intel.com | 9ae2847 | 2009-03-19 14:51:14 -0700 | [diff] [blame] | 233 | for (i = 0; i < numpages; i++) { |
| 234 | unsigned long addr; |
| 235 | pte_t *pte; |
| 236 | |
| 237 | if (in_flags & CPA_PAGES_ARRAY) |
| 238 | addr = (unsigned long)page_address(pages[i]); |
| 239 | else |
| 240 | addr = start[i]; |
| 241 | |
| 242 | pte = lookup_address(addr, &level); |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 243 | |
| 244 | /* |
| 245 | * Only flush present addresses: |
| 246 | */ |
| 247 | if (pte && (pte_val(*pte) & _PAGE_PRESENT)) |
venkatesh.pallipadi@intel.com | 9ae2847 | 2009-03-19 14:51:14 -0700 | [diff] [blame] | 248 | clflush_cache_range((void *)addr, PAGE_SIZE); |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 249 | } |
| 250 | } |
| 251 | |
Thomas Gleixner | d7c8f21 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 252 | /* |
Arjan van de Ven | ed724be | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 253 | * Certain areas of memory on x86 require very specific protection flags, |
| 254 | * for example the BIOS area or kernel text. Callers don't always get this |
| 255 | * right (again, ioremap() on BIOS memory is not uncommon) so this function |
| 256 | * checks and fixes these known static required protection bits. |
| 257 | */ |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 258 | static inline pgprot_t static_protections(pgprot_t prot, unsigned long address, |
| 259 | unsigned long pfn) |
Arjan van de Ven | ed724be | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 260 | { |
| 261 | pgprot_t forbidden = __pgprot(0); |
| 262 | |
Ingo Molnar | 687c482 | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 263 | /* |
Arjan van de Ven | ed724be | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 264 | * The BIOS area between 640k and 1Mb needs to be executable for |
| 265 | * PCI BIOS based config access (CONFIG_PCI_GOBIOS) support. |
Ingo Molnar | 687c482 | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 266 | */ |
Matthieu Castet | 5bd5a45 | 2010-11-16 22:31:26 +0100 | [diff] [blame] | 267 | #ifdef CONFIG_PCI_BIOS |
| 268 | if (pcibios_enabled && within(pfn, BIOS_BEGIN >> PAGE_SHIFT, BIOS_END >> PAGE_SHIFT)) |
Arjan van de Ven | ed724be | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 269 | pgprot_val(forbidden) |= _PAGE_NX; |
Matthieu Castet | 5bd5a45 | 2010-11-16 22:31:26 +0100 | [diff] [blame] | 270 | #endif |
Arjan van de Ven | ed724be | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 271 | |
| 272 | /* |
| 273 | * The kernel text needs to be executable for obvious reasons |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 274 | * Does not cover __inittext since that is gone later on. On |
| 275 | * 64bit we do not enforce !NX on the low mapping |
Arjan van de Ven | ed724be | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 276 | */ |
| 277 | if (within(address, (unsigned long)_text, (unsigned long)_etext)) |
| 278 | pgprot_val(forbidden) |= _PAGE_NX; |
Arjan van de Ven | cc0f21b | 2008-02-04 16:48:05 +0100 | [diff] [blame] | 279 | |
Arjan van de Ven | cc0f21b | 2008-02-04 16:48:05 +0100 | [diff] [blame] | 280 | /* |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 281 | * The .rodata section needs to be read-only. Using the pfn |
Dave Hansen | 2bbb81d | 2018-04-06 13:55:14 -0700 | [diff] [blame] | 282 | * catches all aliases. This also includes __ro_after_init, |
| 283 | * so do not enforce until kernel_set_to_readonly is true. |
Arjan van de Ven | cc0f21b | 2008-02-04 16:48:05 +0100 | [diff] [blame] | 284 | */ |
Dave Hansen | 2bbb81d | 2018-04-06 13:55:14 -0700 | [diff] [blame] | 285 | if (kernel_set_to_readonly && |
| 286 | within(pfn, __pa_symbol(__start_rodata) >> PAGE_SHIFT, |
Alexander Duyck | fc8d782 | 2012-11-16 13:57:13 -0800 | [diff] [blame] | 287 | __pa_symbol(__end_rodata) >> PAGE_SHIFT)) |
Arjan van de Ven | cc0f21b | 2008-02-04 16:48:05 +0100 | [diff] [blame] | 288 | pgprot_val(forbidden) |= _PAGE_RW; |
Arjan van de Ven | ed724be | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 289 | |
Kees Cook | 9ccaf77 | 2016-02-17 14:41:14 -0800 | [diff] [blame] | 290 | #if defined(CONFIG_X86_64) |
Suresh Siddha | 74e0817 | 2009-10-14 14:46:56 -0700 | [diff] [blame] | 291 | /* |
Suresh Siddha | 502f660 | 2009-10-28 18:46:56 -0800 | [diff] [blame] | 292 | * Once the kernel maps the text as RO (kernel_set_to_readonly is set), |
| 293 | * kernel text mappings for the large page aligned text, rodata sections |
| 294 | * will be always read-only. For the kernel identity mappings covering |
| 295 | * the holes caused by this alignment can be anything that user asks. |
Suresh Siddha | 74e0817 | 2009-10-14 14:46:56 -0700 | [diff] [blame] | 296 | * |
| 297 | * This will preserve the large page mappings for kernel text/data |
| 298 | * at no extra cost. |
| 299 | */ |
Suresh Siddha | 502f660 | 2009-10-28 18:46:56 -0800 | [diff] [blame] | 300 | if (kernel_set_to_readonly && |
| 301 | within(address, (unsigned long)_text, |
Suresh Siddha | 281ff33 | 2010-02-18 11:51:40 -0800 | [diff] [blame] | 302 | (unsigned long)__end_rodata_hpage_align)) { |
| 303 | unsigned int level; |
| 304 | |
| 305 | /* |
| 306 | * Don't enforce the !RW mapping for the kernel text mapping, |
| 307 | * if the current mapping is already using small page mapping. |
| 308 | * No need to work hard to preserve large page mappings in this |
| 309 | * case. |
| 310 | * |
| 311 | * This also fixes the Linux Xen paravirt guest boot failure |
| 312 | * (because of unexpected read-only mappings for kernel identity |
| 313 | * mappings). In this paravirt guest case, the kernel text |
| 314 | * mapping and the kernel identity mapping share the same |
| 315 | * page-table pages. Thus we can't really use different |
| 316 | * protections for the kernel text and identity mappings. Also, |
| 317 | * these shared mappings are made of small page mappings. |
| 318 | * Thus this don't enforce !RW mapping for small page kernel |
| 319 | * text mapping logic will help Linux Xen parvirt guest boot |
Lucas De Marchi | 0d2eb44 | 2011-03-17 16:24:16 -0300 | [diff] [blame] | 320 | * as well. |
Suresh Siddha | 281ff33 | 2010-02-18 11:51:40 -0800 | [diff] [blame] | 321 | */ |
| 322 | if (lookup_address(address, &level) && (level != PG_LEVEL_4K)) |
| 323 | pgprot_val(forbidden) |= _PAGE_RW; |
| 324 | } |
Suresh Siddha | 74e0817 | 2009-10-14 14:46:56 -0700 | [diff] [blame] | 325 | #endif |
| 326 | |
Arjan van de Ven | ed724be | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 327 | prot = __pgprot(pgprot_val(prot) & ~pgprot_val(forbidden)); |
Ingo Molnar | 687c482 | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 328 | |
| 329 | return prot; |
| 330 | } |
| 331 | |
Matt Fleming | 426e34c | 2013-12-06 21:13:04 +0000 | [diff] [blame] | 332 | /* |
| 333 | * Lookup the page table entry for a virtual address in a specific pgd. |
| 334 | * Return a pointer to the entry and the level of the mapping. |
| 335 | */ |
| 336 | pte_t *lookup_address_in_pgd(pgd_t *pgd, unsigned long address, |
| 337 | unsigned int *level) |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 338 | { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 339 | pud_t *pud; |
| 340 | pmd_t *pmd; |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 341 | |
Thomas Gleixner | 30551bb | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 342 | *level = PG_LEVEL_NONE; |
| 343 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 344 | if (pgd_none(*pgd)) |
| 345 | return NULL; |
Ingo Molnar | 9df8499 | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 346 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 347 | pud = pud_offset(pgd, address); |
| 348 | if (pud_none(*pud)) |
| 349 | return NULL; |
Andi Kleen | c2f71ee | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 350 | |
| 351 | *level = PG_LEVEL_1G; |
| 352 | if (pud_large(*pud) || !pud_present(*pud)) |
| 353 | return (pte_t *)pud; |
| 354 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 355 | pmd = pmd_offset(pud, address); |
| 356 | if (pmd_none(*pmd)) |
| 357 | return NULL; |
Thomas Gleixner | 30551bb | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 358 | |
| 359 | *level = PG_LEVEL_2M; |
Thomas Gleixner | 9a14aef | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 360 | if (pmd_large(*pmd) || !pmd_present(*pmd)) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 361 | return (pte_t *)pmd; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 362 | |
Thomas Gleixner | 30551bb | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 363 | *level = PG_LEVEL_4K; |
Ingo Molnar | 9df8499 | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 364 | |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 365 | return pte_offset_kernel(pmd, address); |
| 366 | } |
Borislav Petkov | 0fd64c2 | 2013-10-31 17:25:00 +0100 | [diff] [blame] | 367 | |
| 368 | /* |
| 369 | * Lookup the page table entry for a virtual address. Return a pointer |
| 370 | * to the entry and the level of the mapping. |
| 371 | * |
| 372 | * Note: We return pud and pmd either when the entry is marked large |
| 373 | * or when the present bit is not set. Otherwise we would return a |
| 374 | * pointer to a nonexisting mapping. |
| 375 | */ |
| 376 | pte_t *lookup_address(unsigned long address, unsigned int *level) |
| 377 | { |
Matt Fleming | 426e34c | 2013-12-06 21:13:04 +0000 | [diff] [blame] | 378 | return lookup_address_in_pgd(pgd_offset_k(address), address, level); |
Borislav Petkov | 0fd64c2 | 2013-10-31 17:25:00 +0100 | [diff] [blame] | 379 | } |
Pekka Paalanen | 75bb883 | 2008-05-12 21:20:56 +0200 | [diff] [blame] | 380 | EXPORT_SYMBOL_GPL(lookup_address); |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 381 | |
Borislav Petkov | 0fd64c2 | 2013-10-31 17:25:00 +0100 | [diff] [blame] | 382 | static pte_t *_lookup_address_cpa(struct cpa_data *cpa, unsigned long address, |
| 383 | unsigned int *level) |
| 384 | { |
| 385 | if (cpa->pgd) |
Matt Fleming | 426e34c | 2013-12-06 21:13:04 +0000 | [diff] [blame] | 386 | return lookup_address_in_pgd(cpa->pgd + pgd_index(address), |
Borislav Petkov | 0fd64c2 | 2013-10-31 17:25:00 +0100 | [diff] [blame] | 387 | address, level); |
| 388 | |
| 389 | return lookup_address(address, level); |
| 390 | } |
| 391 | |
Ingo Molnar | 9df8499 | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 392 | /* |
Juergen Gross | 792230c | 2014-11-28 11:53:56 +0100 | [diff] [blame] | 393 | * Lookup the PMD entry for a virtual address. Return a pointer to the entry |
| 394 | * or NULL if not present. |
| 395 | */ |
| 396 | pmd_t *lookup_pmd_address(unsigned long address) |
| 397 | { |
| 398 | pgd_t *pgd; |
| 399 | pud_t *pud; |
| 400 | |
| 401 | pgd = pgd_offset_k(address); |
| 402 | if (pgd_none(*pgd)) |
| 403 | return NULL; |
| 404 | |
| 405 | pud = pud_offset(pgd, address); |
| 406 | if (pud_none(*pud) || pud_large(*pud) || !pud_present(*pud)) |
| 407 | return NULL; |
| 408 | |
| 409 | return pmd_offset(pud, address); |
| 410 | } |
| 411 | |
| 412 | /* |
Dave Hansen | d765653 | 2013-01-22 13:24:33 -0800 | [diff] [blame] | 413 | * This is necessary because __pa() does not work on some |
| 414 | * kinds of memory, like vmalloc() or the alloc_remap() |
| 415 | * areas on 32-bit NUMA systems. The percpu areas can |
| 416 | * end up in this kind of memory, for instance. |
| 417 | * |
| 418 | * This could be optimized, but it is only intended to be |
| 419 | * used at inititalization time, and keeping it |
| 420 | * unoptimized should increase the testing coverage for |
| 421 | * the more obscure platforms. |
| 422 | */ |
| 423 | phys_addr_t slow_virt_to_phys(void *__virt_addr) |
| 424 | { |
| 425 | unsigned long virt_addr = (unsigned long)__virt_addr; |
Dexuan Cui | bf70e55 | 2016-02-25 01:58:12 -0800 | [diff] [blame] | 426 | phys_addr_t phys_addr; |
| 427 | unsigned long offset; |
Dave Hansen | d765653 | 2013-01-22 13:24:33 -0800 | [diff] [blame] | 428 | enum pg_level level; |
Dave Hansen | d765653 | 2013-01-22 13:24:33 -0800 | [diff] [blame] | 429 | pte_t *pte; |
| 430 | |
| 431 | pte = lookup_address(virt_addr, &level); |
| 432 | BUG_ON(!pte); |
Toshi Kani | 34437e6 | 2015-09-17 12:24:20 -0600 | [diff] [blame] | 433 | |
Dexuan Cui | bf70e55 | 2016-02-25 01:58:12 -0800 | [diff] [blame] | 434 | /* |
| 435 | * pXX_pfn() returns unsigned long, which must be cast to phys_addr_t |
| 436 | * before being left-shifted PAGE_SHIFT bits -- this trick is to |
| 437 | * make 32-PAE kernel work correctly. |
| 438 | */ |
Toshi Kani | 34437e6 | 2015-09-17 12:24:20 -0600 | [diff] [blame] | 439 | switch (level) { |
| 440 | case PG_LEVEL_1G: |
Dexuan Cui | bf70e55 | 2016-02-25 01:58:12 -0800 | [diff] [blame] | 441 | phys_addr = (phys_addr_t)pud_pfn(*(pud_t *)pte) << PAGE_SHIFT; |
Toshi Kani | 34437e6 | 2015-09-17 12:24:20 -0600 | [diff] [blame] | 442 | offset = virt_addr & ~PUD_PAGE_MASK; |
| 443 | break; |
| 444 | case PG_LEVEL_2M: |
Dexuan Cui | bf70e55 | 2016-02-25 01:58:12 -0800 | [diff] [blame] | 445 | phys_addr = (phys_addr_t)pmd_pfn(*(pmd_t *)pte) << PAGE_SHIFT; |
Toshi Kani | 34437e6 | 2015-09-17 12:24:20 -0600 | [diff] [blame] | 446 | offset = virt_addr & ~PMD_PAGE_MASK; |
| 447 | break; |
| 448 | default: |
Dexuan Cui | bf70e55 | 2016-02-25 01:58:12 -0800 | [diff] [blame] | 449 | phys_addr = (phys_addr_t)pte_pfn(*pte) << PAGE_SHIFT; |
Toshi Kani | 34437e6 | 2015-09-17 12:24:20 -0600 | [diff] [blame] | 450 | offset = virt_addr & ~PAGE_MASK; |
| 451 | } |
| 452 | |
| 453 | return (phys_addr_t)(phys_addr | offset); |
Dave Hansen | d765653 | 2013-01-22 13:24:33 -0800 | [diff] [blame] | 454 | } |
| 455 | EXPORT_SYMBOL_GPL(slow_virt_to_phys); |
| 456 | |
| 457 | /* |
Ingo Molnar | 9df8499 | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 458 | * Set the new pmd in all the pgds we know about: |
| 459 | */ |
Ingo Molnar | 9a3dc78 | 2008-01-30 13:33:57 +0100 | [diff] [blame] | 460 | static void __set_pmd_pte(pte_t *kpte, unsigned long address, pte_t pte) |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 461 | { |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 462 | /* change init_mm */ |
| 463 | set_pte_atomic(kpte, pte); |
Ingo Molnar | 44af6c4 | 2008-01-30 13:34:03 +0100 | [diff] [blame] | 464 | #ifdef CONFIG_X86_32 |
Ingo Molnar | e4b71dc | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 465 | if (!SHARED_KERNEL_PMD) { |
Ingo Molnar | 44af6c4 | 2008-01-30 13:34:03 +0100 | [diff] [blame] | 466 | struct page *page; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 467 | |
Jeremy Fitzhardinge | e3ed910 | 2008-01-30 13:34:11 +0100 | [diff] [blame] | 468 | list_for_each_entry(page, &pgd_list, lru) { |
Ingo Molnar | 44af6c4 | 2008-01-30 13:34:03 +0100 | [diff] [blame] | 469 | pgd_t *pgd; |
| 470 | pud_t *pud; |
| 471 | pmd_t *pmd; |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 472 | |
Ingo Molnar | 44af6c4 | 2008-01-30 13:34:03 +0100 | [diff] [blame] | 473 | pgd = (pgd_t *)page_address(page) + pgd_index(address); |
| 474 | pud = pud_offset(pgd, address); |
| 475 | pmd = pmd_offset(pud, address); |
| 476 | set_pte_atomic((pte_t *)pmd, pte); |
| 477 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 478 | } |
Ingo Molnar | 44af6c4 | 2008-01-30 13:34:03 +0100 | [diff] [blame] | 479 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 480 | } |
| 481 | |
Ingo Molnar | 9df8499 | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 482 | static int |
| 483 | try_preserve_large_page(pte_t *kpte, unsigned long address, |
| 484 | struct cpa_data *cpa) |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 485 | { |
Toshi Kani | 3a19109 | 2015-09-17 12:24:22 -0600 | [diff] [blame] | 486 | unsigned long nextpage_addr, numpages, pmask, psize, addr, pfn, old_pfn; |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 487 | pte_t new_pte, old_pte, *tmp; |
matthieu castet | 64edc8e | 2010-11-16 22:30:27 +0100 | [diff] [blame] | 488 | pgprot_t old_prot, new_prot, req_prot; |
Thomas Gleixner | fac8493 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 489 | int i, do_split = 1; |
Dave Hansen | f3c4fbb | 2013-01-22 13:24:32 -0800 | [diff] [blame] | 490 | enum pg_level level; |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 491 | |
Andi Kleen | c9caa02 | 2008-03-12 03:53:29 +0100 | [diff] [blame] | 492 | if (cpa->force_split) |
| 493 | return 1; |
| 494 | |
Andrea Arcangeli | a79e53d | 2011-02-16 15:45:22 -0800 | [diff] [blame] | 495 | spin_lock(&pgd_lock); |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 496 | /* |
| 497 | * Check for races, another CPU might have split this page |
| 498 | * up already: |
| 499 | */ |
Borislav Petkov | 82f0712 | 2013-10-31 17:25:07 +0100 | [diff] [blame] | 500 | tmp = _lookup_address_cpa(cpa, address, &level); |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 501 | if (tmp != kpte) |
| 502 | goto out_unlock; |
| 503 | |
| 504 | switch (level) { |
| 505 | case PG_LEVEL_2M: |
Toshi Kani | 3a19109 | 2015-09-17 12:24:22 -0600 | [diff] [blame] | 506 | old_prot = pmd_pgprot(*(pmd_t *)kpte); |
| 507 | old_pfn = pmd_pfn(*(pmd_t *)kpte); |
| 508 | break; |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 509 | case PG_LEVEL_1G: |
Toshi Kani | 3a19109 | 2015-09-17 12:24:22 -0600 | [diff] [blame] | 510 | old_prot = pud_pgprot(*(pud_t *)kpte); |
| 511 | old_pfn = pud_pfn(*(pud_t *)kpte); |
Dave Hansen | f3c4fbb | 2013-01-22 13:24:32 -0800 | [diff] [blame] | 512 | break; |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 513 | default: |
Ingo Molnar | beaff63 | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 514 | do_split = -EINVAL; |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 515 | goto out_unlock; |
| 516 | } |
| 517 | |
Toshi Kani | 3a19109 | 2015-09-17 12:24:22 -0600 | [diff] [blame] | 518 | psize = page_level_size(level); |
| 519 | pmask = page_level_mask(level); |
| 520 | |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 521 | /* |
| 522 | * Calculate the number of pages, which fit into this large |
| 523 | * page starting at address: |
| 524 | */ |
| 525 | nextpage_addr = (address + psize) & pmask; |
| 526 | numpages = (nextpage_addr - address) >> PAGE_SHIFT; |
Rafael J. Wysocki | 9b5cf48 | 2008-03-03 01:17:37 +0100 | [diff] [blame] | 527 | if (numpages < cpa->numpages) |
| 528 | cpa->numpages = numpages; |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 529 | |
| 530 | /* |
| 531 | * We are safe now. Check whether the new pgprot is the same: |
Juergen Gross | f5b2831 | 2014-11-03 14:02:02 +0100 | [diff] [blame] | 532 | * Convert protection attributes to 4k-format, as cpa->mask* are set |
| 533 | * up accordingly. |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 534 | */ |
| 535 | old_pte = *kpte; |
Toshi Kani | 55696b1 | 2015-09-17 12:24:24 -0600 | [diff] [blame] | 536 | req_prot = pgprot_large_2_4k(old_prot); |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 537 | |
matthieu castet | 64edc8e | 2010-11-16 22:30:27 +0100 | [diff] [blame] | 538 | pgprot_val(req_prot) &= ~pgprot_val(cpa->mask_clr); |
| 539 | pgprot_val(req_prot) |= pgprot_val(cpa->mask_set); |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 540 | |
| 541 | /* |
Juergen Gross | f5b2831 | 2014-11-03 14:02:02 +0100 | [diff] [blame] | 542 | * req_prot is in format of 4k pages. It must be converted to large |
| 543 | * page format: the caching mode includes the PAT bit located at |
| 544 | * different bit positions in the two formats. |
| 545 | */ |
| 546 | req_prot = pgprot_4k_2_large(req_prot); |
| 547 | |
| 548 | /* |
Andrea Arcangeli | a8aed3e | 2013-02-22 15:11:51 -0800 | [diff] [blame] | 549 | * Set the PSE and GLOBAL flags only if the PRESENT flag is |
| 550 | * set otherwise pmd_present/pmd_huge will return true even on |
| 551 | * a non present pmd. The canon_pgprot will clear _PAGE_GLOBAL |
| 552 | * for the ancient hardware that doesn't support it. |
| 553 | */ |
Andrea Arcangeli | f76cfa3 | 2013-04-10 15:28:25 +0200 | [diff] [blame] | 554 | if (pgprot_val(req_prot) & _PAGE_PRESENT) |
| 555 | pgprot_val(req_prot) |= _PAGE_PSE | _PAGE_GLOBAL; |
Andrea Arcangeli | a8aed3e | 2013-02-22 15:11:51 -0800 | [diff] [blame] | 556 | else |
Andrea Arcangeli | f76cfa3 | 2013-04-10 15:28:25 +0200 | [diff] [blame] | 557 | pgprot_val(req_prot) &= ~(_PAGE_PSE | _PAGE_GLOBAL); |
Andrea Arcangeli | a8aed3e | 2013-02-22 15:11:51 -0800 | [diff] [blame] | 558 | |
Andrea Arcangeli | f76cfa3 | 2013-04-10 15:28:25 +0200 | [diff] [blame] | 559 | req_prot = canon_pgprot(req_prot); |
Andrea Arcangeli | a8aed3e | 2013-02-22 15:11:51 -0800 | [diff] [blame] | 560 | |
| 561 | /* |
Toshi Kani | 3a19109 | 2015-09-17 12:24:22 -0600 | [diff] [blame] | 562 | * old_pfn points to the large page base pfn. So we need |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 563 | * to add the offset of the virtual address: |
| 564 | */ |
Toshi Kani | 3a19109 | 2015-09-17 12:24:22 -0600 | [diff] [blame] | 565 | pfn = old_pfn + ((address & (psize - 1)) >> PAGE_SHIFT); |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 566 | cpa->pfn = pfn; |
| 567 | |
matthieu castet | 64edc8e | 2010-11-16 22:30:27 +0100 | [diff] [blame] | 568 | new_prot = static_protections(req_prot, address, pfn); |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 569 | |
| 570 | /* |
Thomas Gleixner | fac8493 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 571 | * We need to check the full range, whether |
| 572 | * static_protection() requires a different pgprot for one of |
| 573 | * the pages in the range we try to preserve: |
| 574 | */ |
matthieu castet | 64edc8e | 2010-11-16 22:30:27 +0100 | [diff] [blame] | 575 | addr = address & pmask; |
Toshi Kani | 3a19109 | 2015-09-17 12:24:22 -0600 | [diff] [blame] | 576 | pfn = old_pfn; |
matthieu castet | 64edc8e | 2010-11-16 22:30:27 +0100 | [diff] [blame] | 577 | for (i = 0; i < (psize >> PAGE_SHIFT); i++, addr += PAGE_SIZE, pfn++) { |
| 578 | pgprot_t chk_prot = static_protections(req_prot, addr, pfn); |
Thomas Gleixner | fac8493 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 579 | |
| 580 | if (pgprot_val(chk_prot) != pgprot_val(new_prot)) |
| 581 | goto out_unlock; |
| 582 | } |
| 583 | |
| 584 | /* |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 585 | * If there are no changes, return. maxpages has been updated |
| 586 | * above: |
| 587 | */ |
| 588 | if (pgprot_val(new_prot) == pgprot_val(old_prot)) { |
Ingo Molnar | beaff63 | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 589 | do_split = 0; |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 590 | goto out_unlock; |
| 591 | } |
| 592 | |
| 593 | /* |
| 594 | * We need to change the attributes. Check, whether we can |
| 595 | * change the large page in one go. We request a split, when |
| 596 | * the address is not aligned and the number of pages is |
| 597 | * smaller than the number of pages in the large page. Note |
| 598 | * that we limited the number of possible pages already to |
| 599 | * the number of pages in the large page. |
| 600 | */ |
matthieu castet | 64edc8e | 2010-11-16 22:30:27 +0100 | [diff] [blame] | 601 | if (address == (address & pmask) && cpa->numpages == (psize >> PAGE_SHIFT)) { |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 602 | /* |
| 603 | * The address is aligned and the number of pages |
| 604 | * covers the full page. |
| 605 | */ |
Toshi Kani | 3a19109 | 2015-09-17 12:24:22 -0600 | [diff] [blame] | 606 | new_pte = pfn_pte(old_pfn, new_prot); |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 607 | __set_pmd_pte(kpte, address, new_pte); |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 608 | cpa->flags |= CPA_FLUSHTLB; |
Ingo Molnar | beaff63 | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 609 | do_split = 0; |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 610 | } |
| 611 | |
| 612 | out_unlock: |
Andrea Arcangeli | a79e53d | 2011-02-16 15:45:22 -0800 | [diff] [blame] | 613 | spin_unlock(&pgd_lock); |
Ingo Molnar | 9df8499 | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 614 | |
Ingo Molnar | beaff63 | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 615 | return do_split; |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 616 | } |
| 617 | |
Borislav Petkov | 5952886 | 2013-03-21 18:16:57 +0100 | [diff] [blame] | 618 | static int |
Borislav Petkov | 82f0712 | 2013-10-31 17:25:07 +0100 | [diff] [blame] | 619 | __split_large_page(struct cpa_data *cpa, pte_t *kpte, unsigned long address, |
| 620 | struct page *base) |
Ingo Molnar | bb5c2db | 2008-01-30 13:33:56 +0100 | [diff] [blame] | 621 | { |
Borislav Petkov | 5952886 | 2013-03-21 18:16:57 +0100 | [diff] [blame] | 622 | pte_t *pbase = (pte_t *)page_address(base); |
Toshi Kani | d551aaa | 2015-09-17 12:24:23 -0600 | [diff] [blame] | 623 | unsigned long ref_pfn, pfn, pfninc = 1; |
Ingo Molnar | 86f0398 | 2008-01-30 13:34:09 +0100 | [diff] [blame] | 624 | unsigned int i, level; |
Wen Congyang | ae9aae9 | 2013-02-22 16:33:04 -0800 | [diff] [blame] | 625 | pte_t *tmp; |
Ingo Molnar | 9df8499 | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 626 | pgprot_t ref_prot; |
Ingo Molnar | bb5c2db | 2008-01-30 13:33:56 +0100 | [diff] [blame] | 627 | |
Andrea Arcangeli | a79e53d | 2011-02-16 15:45:22 -0800 | [diff] [blame] | 628 | spin_lock(&pgd_lock); |
Ingo Molnar | bb5c2db | 2008-01-30 13:33:56 +0100 | [diff] [blame] | 629 | /* |
| 630 | * Check for races, another CPU might have split this page |
| 631 | * up for us already: |
| 632 | */ |
Borislav Petkov | 82f0712 | 2013-10-31 17:25:07 +0100 | [diff] [blame] | 633 | tmp = _lookup_address_cpa(cpa, address, &level); |
Wen Congyang | ae9aae9 | 2013-02-22 16:33:04 -0800 | [diff] [blame] | 634 | if (tmp != kpte) { |
| 635 | spin_unlock(&pgd_lock); |
| 636 | return 1; |
| 637 | } |
Ingo Molnar | bb5c2db | 2008-01-30 13:33:56 +0100 | [diff] [blame] | 638 | |
Jeremy Fitzhardinge | 6944a9c | 2008-03-17 16:37:01 -0700 | [diff] [blame] | 639 | paravirt_alloc_pte(&init_mm, page_to_pfn(base)); |
Juergen Gross | f5b2831 | 2014-11-03 14:02:02 +0100 | [diff] [blame] | 640 | |
Toshi Kani | d551aaa | 2015-09-17 12:24:23 -0600 | [diff] [blame] | 641 | switch (level) { |
| 642 | case PG_LEVEL_2M: |
| 643 | ref_prot = pmd_pgprot(*(pmd_t *)kpte); |
| 644 | /* clear PSE and promote PAT bit to correct position */ |
Juergen Gross | f5b2831 | 2014-11-03 14:02:02 +0100 | [diff] [blame] | 645 | ref_prot = pgprot_large_2_4k(ref_prot); |
Toshi Kani | d551aaa | 2015-09-17 12:24:23 -0600 | [diff] [blame] | 646 | ref_pfn = pmd_pfn(*(pmd_t *)kpte); |
| 647 | break; |
Ingo Molnar | bb5c2db | 2008-01-30 13:33:56 +0100 | [diff] [blame] | 648 | |
Toshi Kani | d551aaa | 2015-09-17 12:24:23 -0600 | [diff] [blame] | 649 | case PG_LEVEL_1G: |
| 650 | ref_prot = pud_pgprot(*(pud_t *)kpte); |
| 651 | ref_pfn = pud_pfn(*(pud_t *)kpte); |
Andi Kleen | f07333f | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 652 | pfninc = PMD_PAGE_SIZE >> PAGE_SHIFT; |
Toshi Kani | d551aaa | 2015-09-17 12:24:23 -0600 | [diff] [blame] | 653 | |
Andrea Arcangeli | a8aed3e | 2013-02-22 15:11:51 -0800 | [diff] [blame] | 654 | /* |
Toshi Kani | d551aaa | 2015-09-17 12:24:23 -0600 | [diff] [blame] | 655 | * Clear the PSE flags if the PRESENT flag is not set |
Andrea Arcangeli | a8aed3e | 2013-02-22 15:11:51 -0800 | [diff] [blame] | 656 | * otherwise pmd_present/pmd_huge will return true |
| 657 | * even on a non present pmd. |
| 658 | */ |
Toshi Kani | d551aaa | 2015-09-17 12:24:23 -0600 | [diff] [blame] | 659 | if (!(pgprot_val(ref_prot) & _PAGE_PRESENT)) |
Andrea Arcangeli | a8aed3e | 2013-02-22 15:11:51 -0800 | [diff] [blame] | 660 | pgprot_val(ref_prot) &= ~_PAGE_PSE; |
Toshi Kani | d551aaa | 2015-09-17 12:24:23 -0600 | [diff] [blame] | 661 | break; |
| 662 | |
| 663 | default: |
| 664 | spin_unlock(&pgd_lock); |
| 665 | return 1; |
Andi Kleen | f07333f | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 666 | } |
Andi Kleen | f07333f | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 667 | |
Thomas Gleixner | 63c1dcf | 2008-02-04 16:48:05 +0100 | [diff] [blame] | 668 | /* |
Andrea Arcangeli | a8aed3e | 2013-02-22 15:11:51 -0800 | [diff] [blame] | 669 | * Set the GLOBAL flags only if the PRESENT flag is set |
| 670 | * otherwise pmd/pte_present will return true even on a non |
| 671 | * present pmd/pte. The canon_pgprot will clear _PAGE_GLOBAL |
| 672 | * for the ancient hardware that doesn't support it. |
| 673 | */ |
| 674 | if (pgprot_val(ref_prot) & _PAGE_PRESENT) |
| 675 | pgprot_val(ref_prot) |= _PAGE_GLOBAL; |
| 676 | else |
| 677 | pgprot_val(ref_prot) &= ~_PAGE_GLOBAL; |
| 678 | |
| 679 | /* |
Thomas Gleixner | 63c1dcf | 2008-02-04 16:48:05 +0100 | [diff] [blame] | 680 | * Get the target pfn from the original entry: |
| 681 | */ |
Toshi Kani | d551aaa | 2015-09-17 12:24:23 -0600 | [diff] [blame] | 682 | pfn = ref_pfn; |
Andi Kleen | f07333f | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 683 | for (i = 0; i < PTRS_PER_PTE; i++, pfn += pfninc) |
Andrea Arcangeli | a8aed3e | 2013-02-22 15:11:51 -0800 | [diff] [blame] | 684 | set_pte(&pbase[i], pfn_pte(pfn, canon_pgprot(ref_prot))); |
Ingo Molnar | bb5c2db | 2008-01-30 13:33:56 +0100 | [diff] [blame] | 685 | |
Sai Praneeth | 2c66e24d | 2015-10-16 16:20:27 -0700 | [diff] [blame] | 686 | if (virt_addr_valid(address)) { |
| 687 | unsigned long pfn = PFN_DOWN(__pa(address)); |
| 688 | |
| 689 | if (pfn_range_is_mapped(pfn, pfn + 1)) |
| 690 | split_page_count(level); |
| 691 | } |
Yinghai Lu | f361a45 | 2008-07-10 20:38:26 -0700 | [diff] [blame] | 692 | |
Ingo Molnar | bb5c2db | 2008-01-30 13:33:56 +0100 | [diff] [blame] | 693 | /* |
Ingo Molnar | 07a66d7 | 2009-02-20 08:04:13 +0100 | [diff] [blame] | 694 | * Install the new, split up pagetable. |
Huang, Ying | 4c881ca | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 695 | * |
Ingo Molnar | 07a66d7 | 2009-02-20 08:04:13 +0100 | [diff] [blame] | 696 | * We use the standard kernel pagetable protections for the new |
| 697 | * pagetable protections, the actual ptes set above control the |
| 698 | * primary protection behavior: |
Ingo Molnar | bb5c2db | 2008-01-30 13:33:56 +0100 | [diff] [blame] | 699 | */ |
Ingo Molnar | 07a66d7 | 2009-02-20 08:04:13 +0100 | [diff] [blame] | 700 | __set_pmd_pte(kpte, address, mk_pte(base, __pgprot(_KERNPG_TABLE))); |
Ingo Molnar | 211b3d0 | 2009-03-10 22:31:03 +0100 | [diff] [blame] | 701 | |
| 702 | /* |
| 703 | * Intel Atom errata AAH41 workaround. |
| 704 | * |
| 705 | * The real fix should be in hw or in a microcode update, but |
| 706 | * we also probabilistically try to reduce the window of having |
| 707 | * a large TLB mixed with 4K TLBs while instruction fetches are |
| 708 | * going on. |
| 709 | */ |
| 710 | __flush_tlb_all(); |
Andrea Arcangeli | a79e53d | 2011-02-16 15:45:22 -0800 | [diff] [blame] | 711 | spin_unlock(&pgd_lock); |
Ingo Molnar | bb5c2db | 2008-01-30 13:33:56 +0100 | [diff] [blame] | 712 | |
Ingo Molnar | bb5c2db | 2008-01-30 13:33:56 +0100 | [diff] [blame] | 713 | return 0; |
| 714 | } |
| 715 | |
Borislav Petkov | 82f0712 | 2013-10-31 17:25:07 +0100 | [diff] [blame] | 716 | static int split_large_page(struct cpa_data *cpa, pte_t *kpte, |
| 717 | unsigned long address) |
Wen Congyang | ae9aae9 | 2013-02-22 16:33:04 -0800 | [diff] [blame] | 718 | { |
Wen Congyang | ae9aae9 | 2013-02-22 16:33:04 -0800 | [diff] [blame] | 719 | struct page *base; |
| 720 | |
Christian Borntraeger | 288cf3c | 2016-03-15 14:57:33 -0700 | [diff] [blame] | 721 | if (!debug_pagealloc_enabled()) |
Wen Congyang | ae9aae9 | 2013-02-22 16:33:04 -0800 | [diff] [blame] | 722 | spin_unlock(&cpa_lock); |
| 723 | base = alloc_pages(GFP_KERNEL | __GFP_NOTRACK, 0); |
Christian Borntraeger | 288cf3c | 2016-03-15 14:57:33 -0700 | [diff] [blame] | 724 | if (!debug_pagealloc_enabled()) |
Wen Congyang | ae9aae9 | 2013-02-22 16:33:04 -0800 | [diff] [blame] | 725 | spin_lock(&cpa_lock); |
| 726 | if (!base) |
| 727 | return -ENOMEM; |
| 728 | |
Borislav Petkov | 82f0712 | 2013-10-31 17:25:07 +0100 | [diff] [blame] | 729 | if (__split_large_page(cpa, kpte, address, base)) |
Wen Congyang | ae9aae9 | 2013-02-22 16:33:04 -0800 | [diff] [blame] | 730 | __free_page(base); |
| 731 | |
| 732 | return 0; |
| 733 | } |
| 734 | |
Dave Hansen | 8f0baad | 2017-08-30 16:23:00 -0700 | [diff] [blame] | 735 | static bool try_to_free_pte_page(struct cpa_data *cpa, pte_t *pte) |
Borislav Petkov | 52a628f | 2013-10-31 17:25:06 +0100 | [diff] [blame] | 736 | { |
| 737 | int i; |
| 738 | |
Dave Hansen | 8f0baad | 2017-08-30 16:23:00 -0700 | [diff] [blame] | 739 | if (!(cpa->flags & CPA_FREE_PAGETABLES)) |
| 740 | return false; |
| 741 | |
Borislav Petkov | 52a628f | 2013-10-31 17:25:06 +0100 | [diff] [blame] | 742 | for (i = 0; i < PTRS_PER_PTE; i++) |
| 743 | if (!pte_none(pte[i])) |
| 744 | return false; |
| 745 | |
| 746 | free_page((unsigned long)pte); |
| 747 | return true; |
| 748 | } |
| 749 | |
Dave Hansen | 8f0baad | 2017-08-30 16:23:00 -0700 | [diff] [blame] | 750 | static bool try_to_free_pmd_page(struct cpa_data *cpa, pmd_t *pmd) |
Borislav Petkov | 52a628f | 2013-10-31 17:25:06 +0100 | [diff] [blame] | 751 | { |
| 752 | int i; |
| 753 | |
Dave Hansen | 8f0baad | 2017-08-30 16:23:00 -0700 | [diff] [blame] | 754 | if (!(cpa->flags & CPA_FREE_PAGETABLES)) |
| 755 | return false; |
| 756 | |
Borislav Petkov | 52a628f | 2013-10-31 17:25:06 +0100 | [diff] [blame] | 757 | for (i = 0; i < PTRS_PER_PMD; i++) |
| 758 | if (!pmd_none(pmd[i])) |
| 759 | return false; |
| 760 | |
| 761 | free_page((unsigned long)pmd); |
| 762 | return true; |
| 763 | } |
| 764 | |
Dave Hansen | 8f0baad | 2017-08-30 16:23:00 -0700 | [diff] [blame] | 765 | static bool unmap_pte_range(struct cpa_data *cpa, pmd_t *pmd, |
| 766 | unsigned long start, |
| 767 | unsigned long end) |
Borislav Petkov | 52a628f | 2013-10-31 17:25:06 +0100 | [diff] [blame] | 768 | { |
| 769 | pte_t *pte = pte_offset_kernel(pmd, start); |
| 770 | |
| 771 | while (start < end) { |
| 772 | set_pte(pte, __pte(0)); |
| 773 | |
| 774 | start += PAGE_SIZE; |
| 775 | pte++; |
| 776 | } |
| 777 | |
Dave Hansen | 8f0baad | 2017-08-30 16:23:00 -0700 | [diff] [blame] | 778 | if (try_to_free_pte_page(cpa, (pte_t *)pmd_page_vaddr(*pmd))) { |
Borislav Petkov | 52a628f | 2013-10-31 17:25:06 +0100 | [diff] [blame] | 779 | pmd_clear(pmd); |
| 780 | return true; |
| 781 | } |
| 782 | return false; |
| 783 | } |
| 784 | |
Dave Hansen | 8f0baad | 2017-08-30 16:23:00 -0700 | [diff] [blame] | 785 | static void __unmap_pmd_range(struct cpa_data *cpa, pud_t *pud, pmd_t *pmd, |
Borislav Petkov | 52a628f | 2013-10-31 17:25:06 +0100 | [diff] [blame] | 786 | unsigned long start, unsigned long end) |
| 787 | { |
Dave Hansen | 8f0baad | 2017-08-30 16:23:00 -0700 | [diff] [blame] | 788 | if (unmap_pte_range(cpa, pmd, start, end)) |
| 789 | if (try_to_free_pmd_page(cpa, (pmd_t *)pud_page_vaddr(*pud))) |
Borislav Petkov | 52a628f | 2013-10-31 17:25:06 +0100 | [diff] [blame] | 790 | pud_clear(pud); |
| 791 | } |
| 792 | |
Dave Hansen | 8f0baad | 2017-08-30 16:23:00 -0700 | [diff] [blame] | 793 | static void unmap_pmd_range(struct cpa_data *cpa, pud_t *pud, |
| 794 | unsigned long start, unsigned long end) |
Borislav Petkov | 52a628f | 2013-10-31 17:25:06 +0100 | [diff] [blame] | 795 | { |
| 796 | pmd_t *pmd = pmd_offset(pud, start); |
| 797 | |
| 798 | /* |
| 799 | * Not on a 2MB page boundary? |
| 800 | */ |
| 801 | if (start & (PMD_SIZE - 1)) { |
| 802 | unsigned long next_page = (start + PMD_SIZE) & PMD_MASK; |
| 803 | unsigned long pre_end = min_t(unsigned long, end, next_page); |
| 804 | |
Dave Hansen | 8f0baad | 2017-08-30 16:23:00 -0700 | [diff] [blame] | 805 | __unmap_pmd_range(cpa, pud, pmd, start, pre_end); |
Borislav Petkov | 52a628f | 2013-10-31 17:25:06 +0100 | [diff] [blame] | 806 | |
| 807 | start = pre_end; |
| 808 | pmd++; |
| 809 | } |
| 810 | |
| 811 | /* |
| 812 | * Try to unmap in 2M chunks. |
| 813 | */ |
| 814 | while (end - start >= PMD_SIZE) { |
| 815 | if (pmd_large(*pmd)) |
| 816 | pmd_clear(pmd); |
| 817 | else |
Dave Hansen | 8f0baad | 2017-08-30 16:23:00 -0700 | [diff] [blame] | 818 | __unmap_pmd_range(cpa, pud, pmd, |
| 819 | start, start + PMD_SIZE); |
Borislav Petkov | 52a628f | 2013-10-31 17:25:06 +0100 | [diff] [blame] | 820 | |
| 821 | start += PMD_SIZE; |
| 822 | pmd++; |
| 823 | } |
| 824 | |
| 825 | /* |
| 826 | * 4K leftovers? |
| 827 | */ |
| 828 | if (start < end) |
Dave Hansen | 8f0baad | 2017-08-30 16:23:00 -0700 | [diff] [blame] | 829 | return __unmap_pmd_range(cpa, pud, pmd, start, end); |
Borislav Petkov | 52a628f | 2013-10-31 17:25:06 +0100 | [diff] [blame] | 830 | |
| 831 | /* |
| 832 | * Try again to free the PMD page if haven't succeeded above. |
| 833 | */ |
| 834 | if (!pud_none(*pud)) |
Dave Hansen | 8f0baad | 2017-08-30 16:23:00 -0700 | [diff] [blame] | 835 | if (try_to_free_pmd_page(cpa, (pmd_t *)pud_page_vaddr(*pud))) |
Borislav Petkov | 52a628f | 2013-10-31 17:25:06 +0100 | [diff] [blame] | 836 | pud_clear(pud); |
| 837 | } |
Borislav Petkov | 0bb8aee | 2013-10-31 17:25:05 +0100 | [diff] [blame] | 838 | |
Dave Hansen | 8f0baad | 2017-08-30 16:23:00 -0700 | [diff] [blame] | 839 | static void __unmap_pud_range(struct cpa_data *cpa, pgd_t *pgd, |
| 840 | unsigned long start, |
| 841 | unsigned long end) |
Borislav Petkov | 0bb8aee | 2013-10-31 17:25:05 +0100 | [diff] [blame] | 842 | { |
| 843 | pud_t *pud = pud_offset(pgd, start); |
| 844 | |
| 845 | /* |
| 846 | * Not on a GB page boundary? |
| 847 | */ |
| 848 | if (start & (PUD_SIZE - 1)) { |
| 849 | unsigned long next_page = (start + PUD_SIZE) & PUD_MASK; |
| 850 | unsigned long pre_end = min_t(unsigned long, end, next_page); |
| 851 | |
Dave Hansen | 8f0baad | 2017-08-30 16:23:00 -0700 | [diff] [blame] | 852 | unmap_pmd_range(cpa, pud, start, pre_end); |
Borislav Petkov | 0bb8aee | 2013-10-31 17:25:05 +0100 | [diff] [blame] | 853 | |
| 854 | start = pre_end; |
| 855 | pud++; |
| 856 | } |
| 857 | |
| 858 | /* |
| 859 | * Try to unmap in 1G chunks? |
| 860 | */ |
| 861 | while (end - start >= PUD_SIZE) { |
| 862 | |
| 863 | if (pud_large(*pud)) |
| 864 | pud_clear(pud); |
| 865 | else |
Dave Hansen | 8f0baad | 2017-08-30 16:23:00 -0700 | [diff] [blame] | 866 | unmap_pmd_range(cpa, pud, start, start + PUD_SIZE); |
Borislav Petkov | 0bb8aee | 2013-10-31 17:25:05 +0100 | [diff] [blame] | 867 | |
| 868 | start += PUD_SIZE; |
| 869 | pud++; |
| 870 | } |
| 871 | |
| 872 | /* |
| 873 | * 2M leftovers? |
| 874 | */ |
| 875 | if (start < end) |
Dave Hansen | 8f0baad | 2017-08-30 16:23:00 -0700 | [diff] [blame] | 876 | unmap_pmd_range(cpa, pud, start, end); |
Borislav Petkov | 0bb8aee | 2013-10-31 17:25:05 +0100 | [diff] [blame] | 877 | |
| 878 | /* |
| 879 | * No need to try to free the PUD page because we'll free it in |
| 880 | * populate_pgd's error path |
| 881 | */ |
| 882 | } |
| 883 | |
Dave Hansen | 8f0baad | 2017-08-30 16:23:00 -0700 | [diff] [blame] | 884 | static void unmap_pud_range(pgd_t *pgd, unsigned long start, unsigned long end) |
| 885 | { |
| 886 | struct cpa_data cpa = { |
| 887 | .flags = CPA_FREE_PAGETABLES, |
| 888 | }; |
| 889 | |
| 890 | __unmap_pud_range(&cpa, pgd, start, end); |
| 891 | } |
| 892 | |
| 893 | void unmap_pud_range_nofree(pgd_t *pgd, unsigned long start, unsigned long end) |
| 894 | { |
| 895 | struct cpa_data cpa = { |
| 896 | .flags = 0, |
| 897 | }; |
| 898 | |
| 899 | __unmap_pud_range(&cpa, pgd, start, end); |
| 900 | } |
| 901 | |
Borislav Petkov | f900a4b | 2013-10-31 17:25:03 +0100 | [diff] [blame] | 902 | static int alloc_pte_page(pmd_t *pmd) |
| 903 | { |
| 904 | pte_t *pte = (pte_t *)get_zeroed_page(GFP_KERNEL | __GFP_NOTRACK); |
| 905 | if (!pte) |
| 906 | return -1; |
| 907 | |
| 908 | set_pmd(pmd, __pmd(__pa(pte) | _KERNPG_TABLE)); |
| 909 | return 0; |
| 910 | } |
| 911 | |
Borislav Petkov | 4b23538 | 2013-10-31 17:25:02 +0100 | [diff] [blame] | 912 | static int alloc_pmd_page(pud_t *pud) |
| 913 | { |
| 914 | pmd_t *pmd = (pmd_t *)get_zeroed_page(GFP_KERNEL | __GFP_NOTRACK); |
| 915 | if (!pmd) |
| 916 | return -1; |
| 917 | |
| 918 | set_pud(pud, __pud(__pa(pmd) | _KERNPG_TABLE)); |
| 919 | return 0; |
| 920 | } |
| 921 | |
Borislav Petkov | c6b6f36 | 2013-10-31 17:25:04 +0100 | [diff] [blame] | 922 | static void populate_pte(struct cpa_data *cpa, |
| 923 | unsigned long start, unsigned long end, |
| 924 | unsigned num_pages, pmd_t *pmd, pgprot_t pgprot) |
| 925 | { |
| 926 | pte_t *pte; |
| 927 | |
| 928 | pte = pte_offset_kernel(pmd, start); |
| 929 | |
Sai Praneeth | 397630150 | 2016-02-17 12:35:56 +0000 | [diff] [blame] | 930 | /* |
| 931 | * Set the GLOBAL flags only if the PRESENT flag is |
| 932 | * set otherwise pte_present will return true even on |
| 933 | * a non present pte. The canon_pgprot will clear |
| 934 | * _PAGE_GLOBAL for the ancient hardware that doesn't |
| 935 | * support it. |
| 936 | */ |
| 937 | if (pgprot_val(pgprot) & _PAGE_PRESENT) |
| 938 | pgprot_val(pgprot) |= _PAGE_GLOBAL; |
| 939 | else |
| 940 | pgprot_val(pgprot) &= ~_PAGE_GLOBAL; |
| 941 | |
| 942 | pgprot = canon_pgprot(pgprot); |
| 943 | |
Borislav Petkov | c6b6f36 | 2013-10-31 17:25:04 +0100 | [diff] [blame] | 944 | while (num_pages-- && start < end) { |
Matt Fleming | edc3b91 | 2015-11-27 21:09:31 +0000 | [diff] [blame] | 945 | set_pte(pte, pfn_pte(cpa->pfn, pgprot)); |
Borislav Petkov | c6b6f36 | 2013-10-31 17:25:04 +0100 | [diff] [blame] | 946 | |
| 947 | start += PAGE_SIZE; |
Matt Fleming | edc3b91 | 2015-11-27 21:09:31 +0000 | [diff] [blame] | 948 | cpa->pfn++; |
Borislav Petkov | c6b6f36 | 2013-10-31 17:25:04 +0100 | [diff] [blame] | 949 | pte++; |
| 950 | } |
| 951 | } |
Borislav Petkov | f900a4b | 2013-10-31 17:25:03 +0100 | [diff] [blame] | 952 | |
Matt Fleming | e535ec0 | 2016-09-20 14:26:21 +0100 | [diff] [blame] | 953 | static long populate_pmd(struct cpa_data *cpa, |
| 954 | unsigned long start, unsigned long end, |
| 955 | unsigned num_pages, pud_t *pud, pgprot_t pgprot) |
Borislav Petkov | f900a4b | 2013-10-31 17:25:03 +0100 | [diff] [blame] | 956 | { |
Matt Fleming | e535ec0 | 2016-09-20 14:26:21 +0100 | [diff] [blame] | 957 | long cur_pages = 0; |
Borislav Petkov | f900a4b | 2013-10-31 17:25:03 +0100 | [diff] [blame] | 958 | pmd_t *pmd; |
Juergen Gross | f5b2831 | 2014-11-03 14:02:02 +0100 | [diff] [blame] | 959 | pgprot_t pmd_pgprot; |
Borislav Petkov | f900a4b | 2013-10-31 17:25:03 +0100 | [diff] [blame] | 960 | |
| 961 | /* |
| 962 | * Not on a 2M boundary? |
| 963 | */ |
| 964 | if (start & (PMD_SIZE - 1)) { |
| 965 | unsigned long pre_end = start + (num_pages << PAGE_SHIFT); |
| 966 | unsigned long next_page = (start + PMD_SIZE) & PMD_MASK; |
| 967 | |
| 968 | pre_end = min_t(unsigned long, pre_end, next_page); |
| 969 | cur_pages = (pre_end - start) >> PAGE_SHIFT; |
| 970 | cur_pages = min_t(unsigned int, num_pages, cur_pages); |
| 971 | |
| 972 | /* |
| 973 | * Need a PTE page? |
| 974 | */ |
| 975 | pmd = pmd_offset(pud, start); |
| 976 | if (pmd_none(*pmd)) |
| 977 | if (alloc_pte_page(pmd)) |
| 978 | return -1; |
| 979 | |
| 980 | populate_pte(cpa, start, pre_end, cur_pages, pmd, pgprot); |
| 981 | |
| 982 | start = pre_end; |
| 983 | } |
| 984 | |
| 985 | /* |
| 986 | * We mapped them all? |
| 987 | */ |
| 988 | if (num_pages == cur_pages) |
| 989 | return cur_pages; |
| 990 | |
Juergen Gross | f5b2831 | 2014-11-03 14:02:02 +0100 | [diff] [blame] | 991 | pmd_pgprot = pgprot_4k_2_large(pgprot); |
| 992 | |
Borislav Petkov | f900a4b | 2013-10-31 17:25:03 +0100 | [diff] [blame] | 993 | while (end - start >= PMD_SIZE) { |
| 994 | |
| 995 | /* |
| 996 | * We cannot use a 1G page so allocate a PMD page if needed. |
| 997 | */ |
| 998 | if (pud_none(*pud)) |
| 999 | if (alloc_pmd_page(pud)) |
| 1000 | return -1; |
| 1001 | |
| 1002 | pmd = pmd_offset(pud, start); |
| 1003 | |
Andi Kleen | 7e46437 | 2018-08-07 15:09:39 -0700 | [diff] [blame] | 1004 | set_pmd(pmd, pmd_mkhuge(pfn_pmd(cpa->pfn, |
| 1005 | canon_pgprot(pmd_pgprot)))); |
Borislav Petkov | f900a4b | 2013-10-31 17:25:03 +0100 | [diff] [blame] | 1006 | |
| 1007 | start += PMD_SIZE; |
Matt Fleming | edc3b91 | 2015-11-27 21:09:31 +0000 | [diff] [blame] | 1008 | cpa->pfn += PMD_SIZE >> PAGE_SHIFT; |
Borislav Petkov | f900a4b | 2013-10-31 17:25:03 +0100 | [diff] [blame] | 1009 | cur_pages += PMD_SIZE >> PAGE_SHIFT; |
| 1010 | } |
| 1011 | |
| 1012 | /* |
| 1013 | * Map trailing 4K pages. |
| 1014 | */ |
| 1015 | if (start < end) { |
| 1016 | pmd = pmd_offset(pud, start); |
| 1017 | if (pmd_none(*pmd)) |
| 1018 | if (alloc_pte_page(pmd)) |
| 1019 | return -1; |
| 1020 | |
| 1021 | populate_pte(cpa, start, end, num_pages - cur_pages, |
| 1022 | pmd, pgprot); |
| 1023 | } |
| 1024 | return num_pages; |
| 1025 | } |
Borislav Petkov | 4b23538 | 2013-10-31 17:25:02 +0100 | [diff] [blame] | 1026 | |
Matt Fleming | e535ec0 | 2016-09-20 14:26:21 +0100 | [diff] [blame] | 1027 | static long populate_pud(struct cpa_data *cpa, unsigned long start, pgd_t *pgd, |
| 1028 | pgprot_t pgprot) |
Borislav Petkov | 4b23538 | 2013-10-31 17:25:02 +0100 | [diff] [blame] | 1029 | { |
| 1030 | pud_t *pud; |
| 1031 | unsigned long end; |
Matt Fleming | e535ec0 | 2016-09-20 14:26:21 +0100 | [diff] [blame] | 1032 | long cur_pages = 0; |
Juergen Gross | f5b2831 | 2014-11-03 14:02:02 +0100 | [diff] [blame] | 1033 | pgprot_t pud_pgprot; |
Borislav Petkov | 4b23538 | 2013-10-31 17:25:02 +0100 | [diff] [blame] | 1034 | |
| 1035 | end = start + (cpa->numpages << PAGE_SHIFT); |
| 1036 | |
| 1037 | /* |
| 1038 | * Not on a Gb page boundary? => map everything up to it with |
| 1039 | * smaller pages. |
| 1040 | */ |
| 1041 | if (start & (PUD_SIZE - 1)) { |
| 1042 | unsigned long pre_end; |
| 1043 | unsigned long next_page = (start + PUD_SIZE) & PUD_MASK; |
| 1044 | |
| 1045 | pre_end = min_t(unsigned long, end, next_page); |
| 1046 | cur_pages = (pre_end - start) >> PAGE_SHIFT; |
| 1047 | cur_pages = min_t(int, (int)cpa->numpages, cur_pages); |
| 1048 | |
| 1049 | pud = pud_offset(pgd, start); |
| 1050 | |
| 1051 | /* |
| 1052 | * Need a PMD page? |
| 1053 | */ |
| 1054 | if (pud_none(*pud)) |
| 1055 | if (alloc_pmd_page(pud)) |
| 1056 | return -1; |
| 1057 | |
| 1058 | cur_pages = populate_pmd(cpa, start, pre_end, cur_pages, |
| 1059 | pud, pgprot); |
| 1060 | if (cur_pages < 0) |
| 1061 | return cur_pages; |
| 1062 | |
| 1063 | start = pre_end; |
| 1064 | } |
| 1065 | |
| 1066 | /* We mapped them all? */ |
| 1067 | if (cpa->numpages == cur_pages) |
| 1068 | return cur_pages; |
| 1069 | |
| 1070 | pud = pud_offset(pgd, start); |
Juergen Gross | f5b2831 | 2014-11-03 14:02:02 +0100 | [diff] [blame] | 1071 | pud_pgprot = pgprot_4k_2_large(pgprot); |
Borislav Petkov | 4b23538 | 2013-10-31 17:25:02 +0100 | [diff] [blame] | 1072 | |
| 1073 | /* |
| 1074 | * Map everything starting from the Gb boundary, possibly with 1G pages |
| 1075 | */ |
Borislav Petkov | b8291adc | 2016-03-29 17:41:58 +0200 | [diff] [blame] | 1076 | while (boot_cpu_has(X86_FEATURE_GBPAGES) && end - start >= PUD_SIZE) { |
Andi Kleen | 7e46437 | 2018-08-07 15:09:39 -0700 | [diff] [blame] | 1077 | set_pud(pud, pud_mkhuge(pfn_pud(cpa->pfn, |
| 1078 | canon_pgprot(pud_pgprot)))); |
Borislav Petkov | 4b23538 | 2013-10-31 17:25:02 +0100 | [diff] [blame] | 1079 | |
| 1080 | start += PUD_SIZE; |
Matt Fleming | edc3b91 | 2015-11-27 21:09:31 +0000 | [diff] [blame] | 1081 | cpa->pfn += PUD_SIZE >> PAGE_SHIFT; |
Borislav Petkov | 4b23538 | 2013-10-31 17:25:02 +0100 | [diff] [blame] | 1082 | cur_pages += PUD_SIZE >> PAGE_SHIFT; |
| 1083 | pud++; |
| 1084 | } |
| 1085 | |
| 1086 | /* Map trailing leftover */ |
| 1087 | if (start < end) { |
Matt Fleming | e535ec0 | 2016-09-20 14:26:21 +0100 | [diff] [blame] | 1088 | long tmp; |
Borislav Petkov | 4b23538 | 2013-10-31 17:25:02 +0100 | [diff] [blame] | 1089 | |
| 1090 | pud = pud_offset(pgd, start); |
| 1091 | if (pud_none(*pud)) |
| 1092 | if (alloc_pmd_page(pud)) |
| 1093 | return -1; |
| 1094 | |
| 1095 | tmp = populate_pmd(cpa, start, end, cpa->numpages - cur_pages, |
| 1096 | pud, pgprot); |
| 1097 | if (tmp < 0) |
| 1098 | return cur_pages; |
| 1099 | |
| 1100 | cur_pages += tmp; |
| 1101 | } |
| 1102 | return cur_pages; |
| 1103 | } |
Borislav Petkov | f3f7296 | 2013-10-31 17:25:01 +0100 | [diff] [blame] | 1104 | |
| 1105 | /* |
| 1106 | * Restrictions for kernel page table do not necessarily apply when mapping in |
| 1107 | * an alternate PGD. |
| 1108 | */ |
| 1109 | static int populate_pgd(struct cpa_data *cpa, unsigned long addr) |
| 1110 | { |
| 1111 | pgprot_t pgprot = __pgprot(_KERNPG_TABLE); |
Borislav Petkov | f3f7296 | 2013-10-31 17:25:01 +0100 | [diff] [blame] | 1112 | pud_t *pud = NULL; /* shut up gcc */ |
Borislav Petkov | 42a5477 | 2014-01-18 12:48:16 +0100 | [diff] [blame] | 1113 | pgd_t *pgd_entry; |
Matt Fleming | e535ec0 | 2016-09-20 14:26:21 +0100 | [diff] [blame] | 1114 | long ret; |
Borislav Petkov | f3f7296 | 2013-10-31 17:25:01 +0100 | [diff] [blame] | 1115 | |
| 1116 | pgd_entry = cpa->pgd + pgd_index(addr); |
| 1117 | |
| 1118 | /* |
| 1119 | * Allocate a PUD page and hand it down for mapping. |
| 1120 | */ |
| 1121 | if (pgd_none(*pgd_entry)) { |
| 1122 | pud = (pud_t *)get_zeroed_page(GFP_KERNEL | __GFP_NOTRACK); |
| 1123 | if (!pud) |
| 1124 | return -1; |
Andy Lutomirski | 530dd8d | 2016-07-22 21:58:08 -0700 | [diff] [blame] | 1125 | |
| 1126 | set_pgd(pgd_entry, __pgd(__pa(pud) | _KERNPG_TABLE)); |
Borislav Petkov | f3f7296 | 2013-10-31 17:25:01 +0100 | [diff] [blame] | 1127 | } |
| 1128 | |
| 1129 | pgprot_val(pgprot) &= ~pgprot_val(cpa->mask_clr); |
| 1130 | pgprot_val(pgprot) |= pgprot_val(cpa->mask_set); |
| 1131 | |
| 1132 | ret = populate_pud(cpa, addr, pgd_entry, pgprot); |
Borislav Petkov | 0bb8aee | 2013-10-31 17:25:05 +0100 | [diff] [blame] | 1133 | if (ret < 0) { |
Andy Lutomirski | 55920d3 | 2016-07-23 09:59:28 -0700 | [diff] [blame] | 1134 | /* |
| 1135 | * Leave the PUD page in place in case some other CPU or thread |
| 1136 | * already found it, but remove any useless entries we just |
| 1137 | * added to it. |
| 1138 | */ |
Andy Lutomirski | 360cb4d | 2016-07-14 13:22:50 -0700 | [diff] [blame] | 1139 | unmap_pud_range(pgd_entry, addr, |
Borislav Petkov | 0bb8aee | 2013-10-31 17:25:05 +0100 | [diff] [blame] | 1140 | addr + (cpa->numpages << PAGE_SHIFT)); |
Borislav Petkov | 0bb8aee | 2013-10-31 17:25:05 +0100 | [diff] [blame] | 1141 | return ret; |
| 1142 | } |
Borislav Petkov | 42a5477 | 2014-01-18 12:48:16 +0100 | [diff] [blame] | 1143 | |
Borislav Petkov | f3f7296 | 2013-10-31 17:25:01 +0100 | [diff] [blame] | 1144 | cpa->numpages = ret; |
| 1145 | return 0; |
| 1146 | } |
| 1147 | |
Suresh Siddha | a1e4621 | 2009-01-20 14:20:21 -0800 | [diff] [blame] | 1148 | static int __cpa_process_fault(struct cpa_data *cpa, unsigned long vaddr, |
| 1149 | int primary) |
| 1150 | { |
Matt Fleming | 7fc8442 | 2016-04-25 21:06:35 +0100 | [diff] [blame] | 1151 | if (cpa->pgd) { |
| 1152 | /* |
| 1153 | * Right now, we only execute this code path when mapping |
| 1154 | * the EFI virtual memory map regions, no other users |
| 1155 | * provide a ->pgd value. This may change in the future. |
| 1156 | */ |
Borislav Petkov | 82f0712 | 2013-10-31 17:25:07 +0100 | [diff] [blame] | 1157 | return populate_pgd(cpa, vaddr); |
Matt Fleming | 7fc8442 | 2016-04-25 21:06:35 +0100 | [diff] [blame] | 1158 | } |
Borislav Petkov | 82f0712 | 2013-10-31 17:25:07 +0100 | [diff] [blame] | 1159 | |
Suresh Siddha | a1e4621 | 2009-01-20 14:20:21 -0800 | [diff] [blame] | 1160 | /* |
| 1161 | * Ignore all non primary paths. |
| 1162 | */ |
Jan Beulich | 405e1133 | 2016-02-10 02:03:00 -0700 | [diff] [blame] | 1163 | if (!primary) { |
| 1164 | cpa->numpages = 1; |
Suresh Siddha | a1e4621 | 2009-01-20 14:20:21 -0800 | [diff] [blame] | 1165 | return 0; |
Jan Beulich | 405e1133 | 2016-02-10 02:03:00 -0700 | [diff] [blame] | 1166 | } |
Suresh Siddha | a1e4621 | 2009-01-20 14:20:21 -0800 | [diff] [blame] | 1167 | |
| 1168 | /* |
| 1169 | * Ignore the NULL PTE for kernel identity mapping, as it is expected |
| 1170 | * to have holes. |
| 1171 | * Also set numpages to '1' indicating that we processed cpa req for |
| 1172 | * one virtual address page and its pfn. TBD: numpages can be set based |
| 1173 | * on the initial value and the level returned by lookup_address(). |
| 1174 | */ |
| 1175 | if (within(vaddr, PAGE_OFFSET, |
| 1176 | PAGE_OFFSET + (max_pfn_mapped << PAGE_SHIFT))) { |
| 1177 | cpa->numpages = 1; |
| 1178 | cpa->pfn = __pa(vaddr) >> PAGE_SHIFT; |
| 1179 | return 0; |
| 1180 | } else { |
| 1181 | WARN(1, KERN_WARNING "CPA: called for zero pte. " |
| 1182 | "vaddr = %lx cpa->vaddr = %lx\n", vaddr, |
| 1183 | *cpa->vaddr); |
| 1184 | |
| 1185 | return -EFAULT; |
| 1186 | } |
| 1187 | } |
| 1188 | |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 1189 | static int __change_page_attr(struct cpa_data *cpa, int primary) |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 1190 | { |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 1191 | unsigned long address; |
Harvey Harrison | da7bfc5 | 2008-02-09 23:24:08 +0100 | [diff] [blame] | 1192 | int do_split, err; |
| 1193 | unsigned int level; |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 1194 | pte_t *kpte, old_pte; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1195 | |
Thomas Hellstrom | 8523acf | 2009-08-03 09:25:45 +0200 | [diff] [blame] | 1196 | if (cpa->flags & CPA_PAGES_ARRAY) { |
| 1197 | struct page *page = cpa->pages[cpa->curpage]; |
| 1198 | if (unlikely(PageHighMem(page))) |
| 1199 | return 0; |
| 1200 | address = (unsigned long)page_address(page); |
| 1201 | } else if (cpa->flags & CPA_ARRAY) |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 1202 | address = cpa->vaddr[cpa->curpage]; |
| 1203 | else |
| 1204 | address = *cpa->vaddr; |
Ingo Molnar | 97f99fe | 2008-01-30 13:33:55 +0100 | [diff] [blame] | 1205 | repeat: |
Borislav Petkov | 82f0712 | 2013-10-31 17:25:07 +0100 | [diff] [blame] | 1206 | kpte = _lookup_address_cpa(cpa, address, &level); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1207 | if (!kpte) |
Suresh Siddha | a1e4621 | 2009-01-20 14:20:21 -0800 | [diff] [blame] | 1208 | return __cpa_process_fault(cpa, address, primary); |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 1209 | |
| 1210 | old_pte = *kpte; |
Dave Hansen | dcb32d9 | 2016-07-07 17:19:15 -0700 | [diff] [blame] | 1211 | if (pte_none(old_pte)) |
Suresh Siddha | a1e4621 | 2009-01-20 14:20:21 -0800 | [diff] [blame] | 1212 | return __cpa_process_fault(cpa, address, primary); |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 1213 | |
Thomas Gleixner | 30551bb | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 1214 | if (level == PG_LEVEL_4K) { |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 1215 | pte_t new_pte; |
Arjan van de Ven | 626c2c9 | 2008-02-04 16:48:05 +0100 | [diff] [blame] | 1216 | pgprot_t new_prot = pte_pgprot(old_pte); |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 1217 | unsigned long pfn = pte_pfn(old_pte); |
Thomas Gleixner | a72a08a | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 1218 | |
Thomas Gleixner | 72e458d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 1219 | pgprot_val(new_prot) &= ~pgprot_val(cpa->mask_clr); |
| 1220 | pgprot_val(new_prot) |= pgprot_val(cpa->mask_set); |
Ingo Molnar | 86f0398 | 2008-01-30 13:34:09 +0100 | [diff] [blame] | 1221 | |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 1222 | new_prot = static_protections(new_prot, address, pfn); |
Ingo Molnar | 86f0398 | 2008-01-30 13:34:09 +0100 | [diff] [blame] | 1223 | |
Arjan van de Ven | 626c2c9 | 2008-02-04 16:48:05 +0100 | [diff] [blame] | 1224 | /* |
Andrea Arcangeli | a8aed3e | 2013-02-22 15:11:51 -0800 | [diff] [blame] | 1225 | * Set the GLOBAL flags only if the PRESENT flag is |
| 1226 | * set otherwise pte_present will return true even on |
| 1227 | * a non present pte. The canon_pgprot will clear |
| 1228 | * _PAGE_GLOBAL for the ancient hardware that doesn't |
| 1229 | * support it. |
| 1230 | */ |
| 1231 | if (pgprot_val(new_prot) & _PAGE_PRESENT) |
| 1232 | pgprot_val(new_prot) |= _PAGE_GLOBAL; |
| 1233 | else |
| 1234 | pgprot_val(new_prot) &= ~_PAGE_GLOBAL; |
| 1235 | |
| 1236 | /* |
Arjan van de Ven | 626c2c9 | 2008-02-04 16:48:05 +0100 | [diff] [blame] | 1237 | * We need to keep the pfn from the existing PTE, |
| 1238 | * after all we're only going to change it's attributes |
| 1239 | * not the memory it points to |
| 1240 | */ |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 1241 | new_pte = pfn_pte(pfn, canon_pgprot(new_prot)); |
| 1242 | cpa->pfn = pfn; |
Thomas Gleixner | f4ae5da | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 1243 | /* |
| 1244 | * Do we really change anything ? |
| 1245 | */ |
| 1246 | if (pte_val(old_pte) != pte_val(new_pte)) { |
| 1247 | set_pte_atomic(kpte, new_pte); |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 1248 | cpa->flags |= CPA_FLUSHTLB; |
Thomas Gleixner | f4ae5da | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 1249 | } |
Rafael J. Wysocki | 9b5cf48 | 2008-03-03 01:17:37 +0100 | [diff] [blame] | 1250 | cpa->numpages = 1; |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 1251 | return 0; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1252 | } |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 1253 | |
| 1254 | /* |
| 1255 | * Check, whether we can keep the large page intact |
| 1256 | * and just change the pte: |
| 1257 | */ |
Ingo Molnar | beaff63 | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 1258 | do_split = try_preserve_large_page(kpte, address, cpa); |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 1259 | /* |
| 1260 | * When the range fits into the existing large page, |
Rafael J. Wysocki | 9b5cf48 | 2008-03-03 01:17:37 +0100 | [diff] [blame] | 1261 | * return. cp->numpages and cpa->tlbflush have been updated in |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 1262 | * try_large_page: |
| 1263 | */ |
Ingo Molnar | 87f7f8f | 2008-02-04 16:48:10 +0100 | [diff] [blame] | 1264 | if (do_split <= 0) |
| 1265 | return do_split; |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 1266 | |
| 1267 | /* |
| 1268 | * We have to split the large page: |
| 1269 | */ |
Borislav Petkov | 82f0712 | 2013-10-31 17:25:07 +0100 | [diff] [blame] | 1270 | err = split_large_page(cpa, kpte, address); |
Ingo Molnar | 87f7f8f | 2008-02-04 16:48:10 +0100 | [diff] [blame] | 1271 | if (!err) { |
Suresh Siddha | ad5ca55 | 2008-09-23 14:00:42 -0700 | [diff] [blame] | 1272 | /* |
| 1273 | * Do a global flush tlb after splitting the large page |
| 1274 | * and before we do the actual change page attribute in the PTE. |
| 1275 | * |
| 1276 | * With out this, we violate the TLB application note, that says |
| 1277 | * "The TLBs may contain both ordinary and large-page |
| 1278 | * translations for a 4-KByte range of linear addresses. This |
| 1279 | * may occur if software modifies the paging structures so that |
| 1280 | * the page size used for the address range changes. If the two |
| 1281 | * translations differ with respect to page frame or attributes |
| 1282 | * (e.g., permissions), processor behavior is undefined and may |
| 1283 | * be implementation-specific." |
| 1284 | * |
| 1285 | * We do this global tlb flush inside the cpa_lock, so that we |
| 1286 | * don't allow any other cpu, with stale tlb entries change the |
| 1287 | * page attribute in parallel, that also falls into the |
| 1288 | * just split large page entry. |
| 1289 | */ |
| 1290 | flush_tlb_all(); |
Ingo Molnar | 87f7f8f | 2008-02-04 16:48:10 +0100 | [diff] [blame] | 1291 | goto repeat; |
| 1292 | } |
Ingo Molnar | beaff63 | 2008-02-04 16:48:09 +0100 | [diff] [blame] | 1293 | |
Ingo Molnar | 87f7f8f | 2008-02-04 16:48:10 +0100 | [diff] [blame] | 1294 | return err; |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 1295 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1296 | |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 1297 | static int __change_page_attr_set_clr(struct cpa_data *cpa, int checkalias); |
| 1298 | |
| 1299 | static int cpa_process_alias(struct cpa_data *cpa) |
Ingo Molnar | 44af6c4 | 2008-01-30 13:34:03 +0100 | [diff] [blame] | 1300 | { |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 1301 | struct cpa_data alias_cpa; |
Tejun Heo | 992f4c1 | 2009-06-22 11:56:24 +0900 | [diff] [blame] | 1302 | unsigned long laddr = (unsigned long)__va(cpa->pfn << PAGE_SHIFT); |
Tejun Heo | e933a73 | 2009-08-14 15:00:53 +0900 | [diff] [blame] | 1303 | unsigned long vaddr; |
Tejun Heo | 992f4c1 | 2009-06-22 11:56:24 +0900 | [diff] [blame] | 1304 | int ret; |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 1305 | |
Yinghai Lu | 8eb5779 | 2012-11-16 19:38:49 -0800 | [diff] [blame] | 1306 | if (!pfn_range_is_mapped(cpa->pfn, cpa->pfn + 1)) |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 1307 | return 0; |
| 1308 | |
Thomas Gleixner | f34b439 | 2008-02-15 22:17:57 +0100 | [diff] [blame] | 1309 | /* |
| 1310 | * No need to redo, when the primary call touched the direct |
| 1311 | * mapping already: |
| 1312 | */ |
Thomas Hellstrom | 8523acf | 2009-08-03 09:25:45 +0200 | [diff] [blame] | 1313 | if (cpa->flags & CPA_PAGES_ARRAY) { |
| 1314 | struct page *page = cpa->pages[cpa->curpage]; |
| 1315 | if (unlikely(PageHighMem(page))) |
| 1316 | return 0; |
| 1317 | vaddr = (unsigned long)page_address(page); |
| 1318 | } else if (cpa->flags & CPA_ARRAY) |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 1319 | vaddr = cpa->vaddr[cpa->curpage]; |
| 1320 | else |
| 1321 | vaddr = *cpa->vaddr; |
| 1322 | |
| 1323 | if (!(within(vaddr, PAGE_OFFSET, |
Suresh Siddha | a1e4621 | 2009-01-20 14:20:21 -0800 | [diff] [blame] | 1324 | PAGE_OFFSET + (max_pfn_mapped << PAGE_SHIFT)))) { |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 1325 | |
Thomas Gleixner | f34b439 | 2008-02-15 22:17:57 +0100 | [diff] [blame] | 1326 | alias_cpa = *cpa; |
Tejun Heo | 992f4c1 | 2009-06-22 11:56:24 +0900 | [diff] [blame] | 1327 | alias_cpa.vaddr = &laddr; |
venkatesh.pallipadi@intel.com | 9ae2847 | 2009-03-19 14:51:14 -0700 | [diff] [blame] | 1328 | alias_cpa.flags &= ~(CPA_PAGES_ARRAY | CPA_ARRAY); |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 1329 | |
Thomas Gleixner | f34b439 | 2008-02-15 22:17:57 +0100 | [diff] [blame] | 1330 | ret = __change_page_attr_set_clr(&alias_cpa, 0); |
Tejun Heo | 992f4c1 | 2009-06-22 11:56:24 +0900 | [diff] [blame] | 1331 | if (ret) |
| 1332 | return ret; |
Thomas Gleixner | f34b439 | 2008-02-15 22:17:57 +0100 | [diff] [blame] | 1333 | } |
Ingo Molnar | 44af6c4 | 2008-01-30 13:34:03 +0100 | [diff] [blame] | 1334 | |
Arjan van de Ven | 488fd99 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 1335 | #ifdef CONFIG_X86_64 |
Thomas Gleixner | 0879750 | 2008-01-30 13:34:09 +0100 | [diff] [blame] | 1336 | /* |
Tejun Heo | 992f4c1 | 2009-06-22 11:56:24 +0900 | [diff] [blame] | 1337 | * If the primary call didn't touch the high mapping already |
| 1338 | * and the physical address is inside the kernel map, we need |
Thomas Gleixner | 0879750 | 2008-01-30 13:34:09 +0100 | [diff] [blame] | 1339 | * to touch the high mapped kernel as well: |
| 1340 | */ |
Tejun Heo | 992f4c1 | 2009-06-22 11:56:24 +0900 | [diff] [blame] | 1341 | if (!within(vaddr, (unsigned long)_text, _brk_end) && |
Thomas Garnier | 4ff5308 | 2016-06-15 12:05:45 -0700 | [diff] [blame] | 1342 | within_inclusive(cpa->pfn, highmap_start_pfn(), |
| 1343 | highmap_end_pfn())) { |
Tejun Heo | 992f4c1 | 2009-06-22 11:56:24 +0900 | [diff] [blame] | 1344 | unsigned long temp_cpa_vaddr = (cpa->pfn << PAGE_SHIFT) + |
| 1345 | __START_KERNEL_map - phys_base; |
| 1346 | alias_cpa = *cpa; |
| 1347 | alias_cpa.vaddr = &temp_cpa_vaddr; |
| 1348 | alias_cpa.flags &= ~(CPA_PAGES_ARRAY | CPA_ARRAY); |
Thomas Gleixner | 0879750 | 2008-01-30 13:34:09 +0100 | [diff] [blame] | 1349 | |
Tejun Heo | 992f4c1 | 2009-06-22 11:56:24 +0900 | [diff] [blame] | 1350 | /* |
| 1351 | * The high mapping range is imprecise, so ignore the |
| 1352 | * return value. |
| 1353 | */ |
| 1354 | __change_page_attr_set_clr(&alias_cpa, 0); |
| 1355 | } |
Thomas Gleixner | 0879750 | 2008-01-30 13:34:09 +0100 | [diff] [blame] | 1356 | #endif |
Tejun Heo | 992f4c1 | 2009-06-22 11:56:24 +0900 | [diff] [blame] | 1357 | |
| 1358 | return 0; |
Ingo Molnar | 44af6c4 | 2008-01-30 13:34:03 +0100 | [diff] [blame] | 1359 | } |
| 1360 | |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 1361 | static int __change_page_attr_set_clr(struct cpa_data *cpa, int checkalias) |
Thomas Gleixner | ff31452 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 1362 | { |
Matt Fleming | e535ec0 | 2016-09-20 14:26:21 +0100 | [diff] [blame] | 1363 | unsigned long numpages = cpa->numpages; |
| 1364 | int ret; |
Thomas Gleixner | ff31452 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 1365 | |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 1366 | while (numpages) { |
| 1367 | /* |
| 1368 | * Store the remaining nr of pages for the large page |
| 1369 | * preservation check. |
| 1370 | */ |
Rafael J. Wysocki | 9b5cf48 | 2008-03-03 01:17:37 +0100 | [diff] [blame] | 1371 | cpa->numpages = numpages; |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 1372 | /* for array changes, we can't use large page */ |
venkatesh.pallipadi@intel.com | 9ae2847 | 2009-03-19 14:51:14 -0700 | [diff] [blame] | 1373 | if (cpa->flags & (CPA_ARRAY | CPA_PAGES_ARRAY)) |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 1374 | cpa->numpages = 1; |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 1375 | |
Christian Borntraeger | 288cf3c | 2016-03-15 14:57:33 -0700 | [diff] [blame] | 1376 | if (!debug_pagealloc_enabled()) |
Suresh Siddha | ad5ca55 | 2008-09-23 14:00:42 -0700 | [diff] [blame] | 1377 | spin_lock(&cpa_lock); |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 1378 | ret = __change_page_attr(cpa, checkalias); |
Christian Borntraeger | 288cf3c | 2016-03-15 14:57:33 -0700 | [diff] [blame] | 1379 | if (!debug_pagealloc_enabled()) |
Suresh Siddha | ad5ca55 | 2008-09-23 14:00:42 -0700 | [diff] [blame] | 1380 | spin_unlock(&cpa_lock); |
Thomas Gleixner | ff31452 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 1381 | if (ret) |
| 1382 | return ret; |
Thomas Gleixner | ff31452 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 1383 | |
Thomas Gleixner | c31c7d4 | 2008-02-18 20:54:14 +0100 | [diff] [blame] | 1384 | if (checkalias) { |
| 1385 | ret = cpa_process_alias(cpa); |
| 1386 | if (ret) |
| 1387 | return ret; |
| 1388 | } |
| 1389 | |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 1390 | /* |
| 1391 | * Adjust the number of pages with the result of the |
| 1392 | * CPA operation. Either a large page has been |
| 1393 | * preserved or a single page update happened. |
| 1394 | */ |
Matt Fleming | 7425637 | 2016-01-29 11:36:10 +0000 | [diff] [blame] | 1395 | BUG_ON(cpa->numpages > numpages || !cpa->numpages); |
Rafael J. Wysocki | 9b5cf48 | 2008-03-03 01:17:37 +0100 | [diff] [blame] | 1396 | numpages -= cpa->numpages; |
venkatesh.pallipadi@intel.com | 9ae2847 | 2009-03-19 14:51:14 -0700 | [diff] [blame] | 1397 | if (cpa->flags & (CPA_PAGES_ARRAY | CPA_ARRAY)) |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 1398 | cpa->curpage++; |
| 1399 | else |
| 1400 | *cpa->vaddr += cpa->numpages * PAGE_SIZE; |
| 1401 | |
Thomas Gleixner | 65e074d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 1402 | } |
Thomas Gleixner | ff31452 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 1403 | return 0; |
| 1404 | } |
| 1405 | |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 1406 | static int change_page_attr_set_clr(unsigned long *addr, int numpages, |
Andi Kleen | c9caa02 | 2008-03-12 03:53:29 +0100 | [diff] [blame] | 1407 | pgprot_t mask_set, pgprot_t mask_clr, |
venkatesh.pallipadi@intel.com | 9ae2847 | 2009-03-19 14:51:14 -0700 | [diff] [blame] | 1408 | int force_split, int in_flag, |
| 1409 | struct page **pages) |
Thomas Gleixner | ff31452 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 1410 | { |
Thomas Gleixner | 72e458d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 1411 | struct cpa_data cpa; |
Ingo Molnar | cacf890 | 2008-08-21 13:46:33 +0200 | [diff] [blame] | 1412 | int ret, cache, checkalias; |
Jack Steiner | fa526d0 | 2009-09-03 12:56:02 -0500 | [diff] [blame] | 1413 | unsigned long baddr = 0; |
Thomas Gleixner | 331e406 | 2008-02-04 16:48:06 +0100 | [diff] [blame] | 1414 | |
Borislav Petkov | 82f0712 | 2013-10-31 17:25:07 +0100 | [diff] [blame] | 1415 | memset(&cpa, 0, sizeof(cpa)); |
| 1416 | |
Thomas Gleixner | 331e406 | 2008-02-04 16:48:06 +0100 | [diff] [blame] | 1417 | /* |
| 1418 | * Check, if we are requested to change a not supported |
| 1419 | * feature: |
| 1420 | */ |
| 1421 | mask_set = canon_pgprot(mask_set); |
| 1422 | mask_clr = canon_pgprot(mask_clr); |
Andi Kleen | c9caa02 | 2008-03-12 03:53:29 +0100 | [diff] [blame] | 1423 | if (!pgprot_val(mask_set) && !pgprot_val(mask_clr) && !force_split) |
Thomas Gleixner | 331e406 | 2008-02-04 16:48:06 +0100 | [diff] [blame] | 1424 | return 0; |
| 1425 | |
Thomas Gleixner | 69b1415 | 2008-02-13 11:04:50 +0100 | [diff] [blame] | 1426 | /* Ensure we are PAGE_SIZE aligned */ |
venkatesh.pallipadi@intel.com | 9ae2847 | 2009-03-19 14:51:14 -0700 | [diff] [blame] | 1427 | if (in_flag & CPA_ARRAY) { |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 1428 | int i; |
| 1429 | for (i = 0; i < numpages; i++) { |
| 1430 | if (addr[i] & ~PAGE_MASK) { |
| 1431 | addr[i] &= PAGE_MASK; |
| 1432 | WARN_ON_ONCE(1); |
| 1433 | } |
| 1434 | } |
venkatesh.pallipadi@intel.com | 9ae2847 | 2009-03-19 14:51:14 -0700 | [diff] [blame] | 1435 | } else if (!(in_flag & CPA_PAGES_ARRAY)) { |
| 1436 | /* |
| 1437 | * in_flag of CPA_PAGES_ARRAY implies it is aligned. |
| 1438 | * No need to cehck in that case |
| 1439 | */ |
| 1440 | if (*addr & ~PAGE_MASK) { |
| 1441 | *addr &= PAGE_MASK; |
| 1442 | /* |
| 1443 | * People should not be passing in unaligned addresses: |
| 1444 | */ |
| 1445 | WARN_ON_ONCE(1); |
| 1446 | } |
Jack Steiner | fa526d0 | 2009-09-03 12:56:02 -0500 | [diff] [blame] | 1447 | /* |
| 1448 | * Save address for cache flush. *addr is modified in the call |
| 1449 | * to __change_page_attr_set_clr() below. |
| 1450 | */ |
| 1451 | baddr = *addr; |
Thomas Gleixner | 69b1415 | 2008-02-13 11:04:50 +0100 | [diff] [blame] | 1452 | } |
| 1453 | |
Nick Piggin | 5843d9a | 2008-08-01 03:15:21 +0200 | [diff] [blame] | 1454 | /* Must avoid aliasing mappings in the highmem code */ |
| 1455 | kmap_flush_unused(); |
| 1456 | |
Nick Piggin | db64fe0 | 2008-10-18 20:27:03 -0700 | [diff] [blame] | 1457 | vm_unmap_aliases(); |
| 1458 | |
Thomas Gleixner | 72e458d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 1459 | cpa.vaddr = addr; |
venkatesh.pallipadi@intel.com | 9ae2847 | 2009-03-19 14:51:14 -0700 | [diff] [blame] | 1460 | cpa.pages = pages; |
Thomas Gleixner | 72e458d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 1461 | cpa.numpages = numpages; |
| 1462 | cpa.mask_set = mask_set; |
| 1463 | cpa.mask_clr = mask_clr; |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 1464 | cpa.flags = 0; |
| 1465 | cpa.curpage = 0; |
Andi Kleen | c9caa02 | 2008-03-12 03:53:29 +0100 | [diff] [blame] | 1466 | cpa.force_split = force_split; |
Thomas Gleixner | 72e458d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 1467 | |
venkatesh.pallipadi@intel.com | 9ae2847 | 2009-03-19 14:51:14 -0700 | [diff] [blame] | 1468 | if (in_flag & (CPA_ARRAY | CPA_PAGES_ARRAY)) |
| 1469 | cpa.flags |= in_flag; |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 1470 | |
Thomas Gleixner | af96e44 | 2008-02-15 21:49:46 +0100 | [diff] [blame] | 1471 | /* No alias checking for _NX bit modifications */ |
| 1472 | checkalias = (pgprot_val(mask_set) | pgprot_val(mask_clr)) != _PAGE_NX; |
| 1473 | |
| 1474 | ret = __change_page_attr_set_clr(&cpa, checkalias); |
Thomas Gleixner | ff31452 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 1475 | |
Thomas Gleixner | 57a6a46 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 1476 | /* |
Thomas Gleixner | f4ae5da | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 1477 | * Check whether we really changed something: |
| 1478 | */ |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 1479 | if (!(cpa.flags & CPA_FLUSHTLB)) |
Shaohua Li | 1ac2f7d | 2008-08-04 14:51:24 +0800 | [diff] [blame] | 1480 | goto out; |
Ingo Molnar | cacf890 | 2008-08-21 13:46:33 +0200 | [diff] [blame] | 1481 | |
Thomas Gleixner | f4ae5da | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 1482 | /* |
Andi Kleen | 6bb8383 | 2008-02-04 16:48:06 +0100 | [diff] [blame] | 1483 | * No need to flush, when we did not set any of the caching |
| 1484 | * attributes: |
| 1485 | */ |
Juergen Gross | c06814d | 2014-11-03 14:01:57 +0100 | [diff] [blame] | 1486 | cache = !!pgprot2cachemode(mask_set); |
Andi Kleen | 6bb8383 | 2008-02-04 16:48:06 +0100 | [diff] [blame] | 1487 | |
| 1488 | /* |
Borislav Petkov | b82ad3d | 2014-03-12 15:13:04 +0100 | [diff] [blame] | 1489 | * On success we use CLFLUSH, when the CPU supports it to |
| 1490 | * avoid the WBINVD. If the CPU does not support it and in the |
H. Peter Anvin | f026cfa | 2012-08-14 09:53:38 -0700 | [diff] [blame] | 1491 | * error case we fall back to cpa_flush_all (which uses |
Borislav Petkov | b82ad3d | 2014-03-12 15:13:04 +0100 | [diff] [blame] | 1492 | * WBINVD): |
Thomas Gleixner | 57a6a46 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 1493 | */ |
Borislav Petkov | 906bf7f | 2016-03-29 17:41:59 +0200 | [diff] [blame] | 1494 | if (!ret && boot_cpu_has(X86_FEATURE_CLFLUSH)) { |
venkatesh.pallipadi@intel.com | 9ae2847 | 2009-03-19 14:51:14 -0700 | [diff] [blame] | 1495 | if (cpa.flags & (CPA_PAGES_ARRAY | CPA_ARRAY)) { |
| 1496 | cpa_flush_array(addr, numpages, cache, |
| 1497 | cpa.flags, pages); |
| 1498 | } else |
Jack Steiner | fa526d0 | 2009-09-03 12:56:02 -0500 | [diff] [blame] | 1499 | cpa_flush_range(baddr, numpages, cache); |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 1500 | } else |
Andi Kleen | 6bb8383 | 2008-02-04 16:48:06 +0100 | [diff] [blame] | 1501 | cpa_flush_all(cache); |
Ingo Molnar | cacf890 | 2008-08-21 13:46:33 +0200 | [diff] [blame] | 1502 | |
Thomas Gleixner | 76ebd05 | 2008-02-09 23:24:09 +0100 | [diff] [blame] | 1503 | out: |
Thomas Gleixner | ff31452 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 1504 | return ret; |
| 1505 | } |
| 1506 | |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 1507 | static inline int change_page_attr_set(unsigned long *addr, int numpages, |
| 1508 | pgprot_t mask, int array) |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 1509 | { |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 1510 | return change_page_attr_set_clr(addr, numpages, mask, __pgprot(0), 0, |
venkatesh.pallipadi@intel.com | 9ae2847 | 2009-03-19 14:51:14 -0700 | [diff] [blame] | 1511 | (array ? CPA_ARRAY : 0), NULL); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 1512 | } |
| 1513 | |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 1514 | static inline int change_page_attr_clear(unsigned long *addr, int numpages, |
| 1515 | pgprot_t mask, int array) |
Thomas Gleixner | 72932c7 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 1516 | { |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 1517 | return change_page_attr_set_clr(addr, numpages, __pgprot(0), mask, 0, |
venkatesh.pallipadi@intel.com | 9ae2847 | 2009-03-19 14:51:14 -0700 | [diff] [blame] | 1518 | (array ? CPA_ARRAY : 0), NULL); |
Thomas Gleixner | 72932c7 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 1519 | } |
| 1520 | |
venkatesh.pallipadi@intel.com | 0f35075 | 2009-03-19 14:51:15 -0700 | [diff] [blame] | 1521 | static inline int cpa_set_pages_array(struct page **pages, int numpages, |
| 1522 | pgprot_t mask) |
| 1523 | { |
| 1524 | return change_page_attr_set_clr(NULL, numpages, mask, __pgprot(0), 0, |
| 1525 | CPA_PAGES_ARRAY, pages); |
| 1526 | } |
| 1527 | |
| 1528 | static inline int cpa_clear_pages_array(struct page **pages, int numpages, |
| 1529 | pgprot_t mask) |
| 1530 | { |
| 1531 | return change_page_attr_set_clr(NULL, numpages, __pgprot(0), mask, 0, |
| 1532 | CPA_PAGES_ARRAY, pages); |
| 1533 | } |
| 1534 | |
venkatesh.pallipadi@intel.com | 1219333 | 2008-03-18 17:00:18 -0700 | [diff] [blame] | 1535 | int _set_memory_uc(unsigned long addr, int numpages) |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 1536 | { |
Suresh Siddha | de33c44 | 2008-04-25 17:07:22 -0700 | [diff] [blame] | 1537 | /* |
| 1538 | * for now UC MINUS. see comments in ioremap_nocache() |
Luis R. Rodriguez | e4b6be33 | 2015-05-11 10:15:53 +0200 | [diff] [blame] | 1539 | * If you really need strong UC use ioremap_uc(), but note |
| 1540 | * that you cannot override IO areas with set_memory_*() as |
| 1541 | * these helpers cannot work with IO memory. |
Suresh Siddha | de33c44 | 2008-04-25 17:07:22 -0700 | [diff] [blame] | 1542 | */ |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 1543 | return change_page_attr_set(&addr, numpages, |
Juergen Gross | c06814d | 2014-11-03 14:01:57 +0100 | [diff] [blame] | 1544 | cachemode2pgprot(_PAGE_CACHE_MODE_UC_MINUS), |
| 1545 | 0); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 1546 | } |
venkatesh.pallipadi@intel.com | 1219333 | 2008-03-18 17:00:18 -0700 | [diff] [blame] | 1547 | |
| 1548 | int set_memory_uc(unsigned long addr, int numpages) |
| 1549 | { |
venkatesh.pallipadi@intel.com | 9fa3ab3 | 2009-04-09 14:26:49 -0700 | [diff] [blame] | 1550 | int ret; |
| 1551 | |
Suresh Siddha | de33c44 | 2008-04-25 17:07:22 -0700 | [diff] [blame] | 1552 | /* |
| 1553 | * for now UC MINUS. see comments in ioremap_nocache() |
| 1554 | */ |
venkatesh.pallipadi@intel.com | 9fa3ab3 | 2009-04-09 14:26:49 -0700 | [diff] [blame] | 1555 | ret = reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE, |
Juergen Gross | e00c8cc | 2014-11-03 14:01:59 +0100 | [diff] [blame] | 1556 | _PAGE_CACHE_MODE_UC_MINUS, NULL); |
venkatesh.pallipadi@intel.com | 9fa3ab3 | 2009-04-09 14:26:49 -0700 | [diff] [blame] | 1557 | if (ret) |
| 1558 | goto out_err; |
venkatesh.pallipadi@intel.com | 1219333 | 2008-03-18 17:00:18 -0700 | [diff] [blame] | 1559 | |
venkatesh.pallipadi@intel.com | 9fa3ab3 | 2009-04-09 14:26:49 -0700 | [diff] [blame] | 1560 | ret = _set_memory_uc(addr, numpages); |
| 1561 | if (ret) |
| 1562 | goto out_free; |
| 1563 | |
| 1564 | return 0; |
| 1565 | |
| 1566 | out_free: |
| 1567 | free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE); |
| 1568 | out_err: |
| 1569 | return ret; |
venkatesh.pallipadi@intel.com | 1219333 | 2008-03-18 17:00:18 -0700 | [diff] [blame] | 1570 | } |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 1571 | EXPORT_SYMBOL(set_memory_uc); |
| 1572 | |
H Hartley Sweeten | 2d070ef | 2011-11-15 14:49:00 -0800 | [diff] [blame] | 1573 | static int _set_memory_array(unsigned long *addr, int addrinarray, |
Juergen Gross | c06814d | 2014-11-03 14:01:57 +0100 | [diff] [blame] | 1574 | enum page_cache_mode new_type) |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 1575 | { |
Toshi Kani | 623dffb | 2015-06-04 18:55:20 +0200 | [diff] [blame] | 1576 | enum page_cache_mode set_type; |
venkatesh.pallipadi@intel.com | 9fa3ab3 | 2009-04-09 14:26:49 -0700 | [diff] [blame] | 1577 | int i, j; |
| 1578 | int ret; |
| 1579 | |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 1580 | for (i = 0; i < addrinarray; i++) { |
venkatesh.pallipadi@intel.com | 9fa3ab3 | 2009-04-09 14:26:49 -0700 | [diff] [blame] | 1581 | ret = reserve_memtype(__pa(addr[i]), __pa(addr[i]) + PAGE_SIZE, |
Pauli Nieminen | 4f64625 | 2010-04-01 12:45:01 +0000 | [diff] [blame] | 1582 | new_type, NULL); |
venkatesh.pallipadi@intel.com | 9fa3ab3 | 2009-04-09 14:26:49 -0700 | [diff] [blame] | 1583 | if (ret) |
| 1584 | goto out_free; |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 1585 | } |
| 1586 | |
Toshi Kani | 623dffb | 2015-06-04 18:55:20 +0200 | [diff] [blame] | 1587 | /* If WC, set to UC- first and then WC */ |
| 1588 | set_type = (new_type == _PAGE_CACHE_MODE_WC) ? |
| 1589 | _PAGE_CACHE_MODE_UC_MINUS : new_type; |
| 1590 | |
venkatesh.pallipadi@intel.com | 9fa3ab3 | 2009-04-09 14:26:49 -0700 | [diff] [blame] | 1591 | ret = change_page_attr_set(addr, addrinarray, |
Toshi Kani | 623dffb | 2015-06-04 18:55:20 +0200 | [diff] [blame] | 1592 | cachemode2pgprot(set_type), 1); |
Pauli Nieminen | 4f64625 | 2010-04-01 12:45:01 +0000 | [diff] [blame] | 1593 | |
Juergen Gross | c06814d | 2014-11-03 14:01:57 +0100 | [diff] [blame] | 1594 | if (!ret && new_type == _PAGE_CACHE_MODE_WC) |
Pauli Nieminen | 4f64625 | 2010-04-01 12:45:01 +0000 | [diff] [blame] | 1595 | ret = change_page_attr_set_clr(addr, addrinarray, |
Juergen Gross | c06814d | 2014-11-03 14:01:57 +0100 | [diff] [blame] | 1596 | cachemode2pgprot( |
| 1597 | _PAGE_CACHE_MODE_WC), |
Pauli Nieminen | 4f64625 | 2010-04-01 12:45:01 +0000 | [diff] [blame] | 1598 | __pgprot(_PAGE_CACHE_MASK), |
| 1599 | 0, CPA_ARRAY, NULL); |
venkatesh.pallipadi@intel.com | 9fa3ab3 | 2009-04-09 14:26:49 -0700 | [diff] [blame] | 1600 | if (ret) |
| 1601 | goto out_free; |
Rene Herman | c5e147c | 2008-08-22 01:02:20 +0200 | [diff] [blame] | 1602 | |
venkatesh.pallipadi@intel.com | 9fa3ab3 | 2009-04-09 14:26:49 -0700 | [diff] [blame] | 1603 | return 0; |
| 1604 | |
| 1605 | out_free: |
| 1606 | for (j = 0; j < i; j++) |
| 1607 | free_memtype(__pa(addr[j]), __pa(addr[j]) + PAGE_SIZE); |
| 1608 | |
| 1609 | return ret; |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 1610 | } |
Pauli Nieminen | 4f64625 | 2010-04-01 12:45:01 +0000 | [diff] [blame] | 1611 | |
| 1612 | int set_memory_array_uc(unsigned long *addr, int addrinarray) |
| 1613 | { |
Juergen Gross | c06814d | 2014-11-03 14:01:57 +0100 | [diff] [blame] | 1614 | return _set_memory_array(addr, addrinarray, _PAGE_CACHE_MODE_UC_MINUS); |
Pauli Nieminen | 4f64625 | 2010-04-01 12:45:01 +0000 | [diff] [blame] | 1615 | } |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 1616 | EXPORT_SYMBOL(set_memory_array_uc); |
| 1617 | |
Pauli Nieminen | 4f64625 | 2010-04-01 12:45:01 +0000 | [diff] [blame] | 1618 | int set_memory_array_wc(unsigned long *addr, int addrinarray) |
| 1619 | { |
Juergen Gross | c06814d | 2014-11-03 14:01:57 +0100 | [diff] [blame] | 1620 | return _set_memory_array(addr, addrinarray, _PAGE_CACHE_MODE_WC); |
Pauli Nieminen | 4f64625 | 2010-04-01 12:45:01 +0000 | [diff] [blame] | 1621 | } |
| 1622 | EXPORT_SYMBOL(set_memory_array_wc); |
| 1623 | |
Toshi Kani | 623dffb | 2015-06-04 18:55:20 +0200 | [diff] [blame] | 1624 | int set_memory_array_wt(unsigned long *addr, int addrinarray) |
| 1625 | { |
| 1626 | return _set_memory_array(addr, addrinarray, _PAGE_CACHE_MODE_WT); |
| 1627 | } |
| 1628 | EXPORT_SYMBOL_GPL(set_memory_array_wt); |
| 1629 | |
venkatesh.pallipadi@intel.com | ef354af | 2008-03-18 17:00:23 -0700 | [diff] [blame] | 1630 | int _set_memory_wc(unsigned long addr, int numpages) |
| 1631 | { |
venkatesh.pallipadi@intel.com | 3869c4a | 2009-04-09 14:26:50 -0700 | [diff] [blame] | 1632 | int ret; |
Pallipadi, Venkatesh | bdc6340 | 2009-07-30 14:43:19 -0700 | [diff] [blame] | 1633 | unsigned long addr_copy = addr; |
| 1634 | |
venkatesh.pallipadi@intel.com | 3869c4a | 2009-04-09 14:26:50 -0700 | [diff] [blame] | 1635 | ret = change_page_attr_set(&addr, numpages, |
Juergen Gross | c06814d | 2014-11-03 14:01:57 +0100 | [diff] [blame] | 1636 | cachemode2pgprot(_PAGE_CACHE_MODE_UC_MINUS), |
| 1637 | 0); |
venkatesh.pallipadi@intel.com | 3869c4a | 2009-04-09 14:26:50 -0700 | [diff] [blame] | 1638 | if (!ret) { |
Pallipadi, Venkatesh | bdc6340 | 2009-07-30 14:43:19 -0700 | [diff] [blame] | 1639 | ret = change_page_attr_set_clr(&addr_copy, numpages, |
Juergen Gross | c06814d | 2014-11-03 14:01:57 +0100 | [diff] [blame] | 1640 | cachemode2pgprot( |
| 1641 | _PAGE_CACHE_MODE_WC), |
Pallipadi, Venkatesh | bdc6340 | 2009-07-30 14:43:19 -0700 | [diff] [blame] | 1642 | __pgprot(_PAGE_CACHE_MASK), |
| 1643 | 0, 0, NULL); |
venkatesh.pallipadi@intel.com | 3869c4a | 2009-04-09 14:26:50 -0700 | [diff] [blame] | 1644 | } |
| 1645 | return ret; |
venkatesh.pallipadi@intel.com | ef354af | 2008-03-18 17:00:23 -0700 | [diff] [blame] | 1646 | } |
| 1647 | |
| 1648 | int set_memory_wc(unsigned long addr, int numpages) |
| 1649 | { |
venkatesh.pallipadi@intel.com | 9fa3ab3 | 2009-04-09 14:26:49 -0700 | [diff] [blame] | 1650 | int ret; |
| 1651 | |
venkatesh.pallipadi@intel.com | 9fa3ab3 | 2009-04-09 14:26:49 -0700 | [diff] [blame] | 1652 | ret = reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE, |
Juergen Gross | e00c8cc | 2014-11-03 14:01:59 +0100 | [diff] [blame] | 1653 | _PAGE_CACHE_MODE_WC, NULL); |
venkatesh.pallipadi@intel.com | 9fa3ab3 | 2009-04-09 14:26:49 -0700 | [diff] [blame] | 1654 | if (ret) |
Toshi Kani | 623dffb | 2015-06-04 18:55:20 +0200 | [diff] [blame] | 1655 | return ret; |
venkatesh.pallipadi@intel.com | ef354af | 2008-03-18 17:00:23 -0700 | [diff] [blame] | 1656 | |
venkatesh.pallipadi@intel.com | 9fa3ab3 | 2009-04-09 14:26:49 -0700 | [diff] [blame] | 1657 | ret = _set_memory_wc(addr, numpages); |
| 1658 | if (ret) |
Toshi Kani | 623dffb | 2015-06-04 18:55:20 +0200 | [diff] [blame] | 1659 | free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE); |
venkatesh.pallipadi@intel.com | 9fa3ab3 | 2009-04-09 14:26:49 -0700 | [diff] [blame] | 1660 | |
venkatesh.pallipadi@intel.com | 9fa3ab3 | 2009-04-09 14:26:49 -0700 | [diff] [blame] | 1661 | return ret; |
venkatesh.pallipadi@intel.com | ef354af | 2008-03-18 17:00:23 -0700 | [diff] [blame] | 1662 | } |
| 1663 | EXPORT_SYMBOL(set_memory_wc); |
| 1664 | |
Toshi Kani | 623dffb | 2015-06-04 18:55:20 +0200 | [diff] [blame] | 1665 | int _set_memory_wt(unsigned long addr, int numpages) |
| 1666 | { |
| 1667 | return change_page_attr_set(&addr, numpages, |
| 1668 | cachemode2pgprot(_PAGE_CACHE_MODE_WT), 0); |
| 1669 | } |
| 1670 | |
| 1671 | int set_memory_wt(unsigned long addr, int numpages) |
| 1672 | { |
| 1673 | int ret; |
| 1674 | |
| 1675 | ret = reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE, |
| 1676 | _PAGE_CACHE_MODE_WT, NULL); |
| 1677 | if (ret) |
| 1678 | return ret; |
| 1679 | |
| 1680 | ret = _set_memory_wt(addr, numpages); |
| 1681 | if (ret) |
| 1682 | free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE); |
| 1683 | |
| 1684 | return ret; |
| 1685 | } |
| 1686 | EXPORT_SYMBOL_GPL(set_memory_wt); |
| 1687 | |
venkatesh.pallipadi@intel.com | 1219333 | 2008-03-18 17:00:18 -0700 | [diff] [blame] | 1688 | int _set_memory_wb(unsigned long addr, int numpages) |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 1689 | { |
Juergen Gross | c06814d | 2014-11-03 14:01:57 +0100 | [diff] [blame] | 1690 | /* WB cache mode is hard wired to all cache attribute bits being 0 */ |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 1691 | return change_page_attr_clear(&addr, numpages, |
| 1692 | __pgprot(_PAGE_CACHE_MASK), 0); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 1693 | } |
venkatesh.pallipadi@intel.com | 1219333 | 2008-03-18 17:00:18 -0700 | [diff] [blame] | 1694 | |
| 1695 | int set_memory_wb(unsigned long addr, int numpages) |
| 1696 | { |
venkatesh.pallipadi@intel.com | 9fa3ab3 | 2009-04-09 14:26:49 -0700 | [diff] [blame] | 1697 | int ret; |
| 1698 | |
| 1699 | ret = _set_memory_wb(addr, numpages); |
| 1700 | if (ret) |
| 1701 | return ret; |
| 1702 | |
venkatesh.pallipadi@intel.com | c15238d | 2008-08-20 16:45:51 -0700 | [diff] [blame] | 1703 | free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE); |
venkatesh.pallipadi@intel.com | 9fa3ab3 | 2009-04-09 14:26:49 -0700 | [diff] [blame] | 1704 | return 0; |
venkatesh.pallipadi@intel.com | 1219333 | 2008-03-18 17:00:18 -0700 | [diff] [blame] | 1705 | } |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 1706 | EXPORT_SYMBOL(set_memory_wb); |
| 1707 | |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 1708 | int set_memory_array_wb(unsigned long *addr, int addrinarray) |
| 1709 | { |
| 1710 | int i; |
venkatesh.pallipadi@intel.com | a5593e0 | 2009-04-09 14:26:48 -0700 | [diff] [blame] | 1711 | int ret; |
| 1712 | |
Juergen Gross | c06814d | 2014-11-03 14:01:57 +0100 | [diff] [blame] | 1713 | /* WB cache mode is hard wired to all cache attribute bits being 0 */ |
venkatesh.pallipadi@intel.com | a5593e0 | 2009-04-09 14:26:48 -0700 | [diff] [blame] | 1714 | ret = change_page_attr_clear(addr, addrinarray, |
| 1715 | __pgprot(_PAGE_CACHE_MASK), 1); |
venkatesh.pallipadi@intel.com | 9fa3ab3 | 2009-04-09 14:26:49 -0700 | [diff] [blame] | 1716 | if (ret) |
| 1717 | return ret; |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 1718 | |
venkatesh.pallipadi@intel.com | 9fa3ab3 | 2009-04-09 14:26:49 -0700 | [diff] [blame] | 1719 | for (i = 0; i < addrinarray; i++) |
| 1720 | free_memtype(__pa(addr[i]), __pa(addr[i]) + PAGE_SIZE); |
Rene Herman | c5e147c | 2008-08-22 01:02:20 +0200 | [diff] [blame] | 1721 | |
venkatesh.pallipadi@intel.com | 9fa3ab3 | 2009-04-09 14:26:49 -0700 | [diff] [blame] | 1722 | return 0; |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 1723 | } |
| 1724 | EXPORT_SYMBOL(set_memory_array_wb); |
| 1725 | |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 1726 | int set_memory_x(unsigned long addr, int numpages) |
| 1727 | { |
H. Peter Anvin | 583140a | 2009-11-13 15:28:15 -0800 | [diff] [blame] | 1728 | if (!(__supported_pte_mask & _PAGE_NX)) |
| 1729 | return 0; |
| 1730 | |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 1731 | return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_NX), 0); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 1732 | } |
| 1733 | EXPORT_SYMBOL(set_memory_x); |
| 1734 | |
| 1735 | int set_memory_nx(unsigned long addr, int numpages) |
| 1736 | { |
H. Peter Anvin | 583140a | 2009-11-13 15:28:15 -0800 | [diff] [blame] | 1737 | if (!(__supported_pte_mask & _PAGE_NX)) |
| 1738 | return 0; |
| 1739 | |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 1740 | return change_page_attr_set(&addr, numpages, __pgprot(_PAGE_NX), 0); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 1741 | } |
| 1742 | EXPORT_SYMBOL(set_memory_nx); |
| 1743 | |
| 1744 | int set_memory_ro(unsigned long addr, int numpages) |
| 1745 | { |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 1746 | return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_RW), 0); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 1747 | } |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 1748 | |
| 1749 | int set_memory_rw(unsigned long addr, int numpages) |
| 1750 | { |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 1751 | return change_page_attr_set(&addr, numpages, __pgprot(_PAGE_RW), 0); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 1752 | } |
Ingo Molnar | f62d0f0 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 1753 | |
| 1754 | int set_memory_np(unsigned long addr, int numpages) |
| 1755 | { |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 1756 | return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_PRESENT), 0); |
Ingo Molnar | f62d0f0 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 1757 | } |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 1758 | |
Andi Kleen | c9caa02 | 2008-03-12 03:53:29 +0100 | [diff] [blame] | 1759 | int set_memory_4k(unsigned long addr, int numpages) |
| 1760 | { |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 1761 | return change_page_attr_set_clr(&addr, numpages, __pgprot(0), |
venkatesh.pallipadi@intel.com | 9ae2847 | 2009-03-19 14:51:14 -0700 | [diff] [blame] | 1762 | __pgprot(0), 1, 0, NULL); |
Andi Kleen | c9caa02 | 2008-03-12 03:53:29 +0100 | [diff] [blame] | 1763 | } |
| 1764 | |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 1765 | int set_pages_uc(struct page *page, int numpages) |
| 1766 | { |
| 1767 | unsigned long addr = (unsigned long)page_address(page); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 1768 | |
Thomas Gleixner | d7c8f21 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 1769 | return set_memory_uc(addr, numpages); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 1770 | } |
| 1771 | EXPORT_SYMBOL(set_pages_uc); |
| 1772 | |
Pauli Nieminen | 4f64625 | 2010-04-01 12:45:01 +0000 | [diff] [blame] | 1773 | static int _set_pages_array(struct page **pages, int addrinarray, |
Juergen Gross | c06814d | 2014-11-03 14:01:57 +0100 | [diff] [blame] | 1774 | enum page_cache_mode new_type) |
venkatesh.pallipadi@intel.com | 0f35075 | 2009-03-19 14:51:15 -0700 | [diff] [blame] | 1775 | { |
| 1776 | unsigned long start; |
| 1777 | unsigned long end; |
Toshi Kani | 623dffb | 2015-06-04 18:55:20 +0200 | [diff] [blame] | 1778 | enum page_cache_mode set_type; |
venkatesh.pallipadi@intel.com | 0f35075 | 2009-03-19 14:51:15 -0700 | [diff] [blame] | 1779 | int i; |
| 1780 | int free_idx; |
Pauli Nieminen | 4f64625 | 2010-04-01 12:45:01 +0000 | [diff] [blame] | 1781 | int ret; |
venkatesh.pallipadi@intel.com | 0f35075 | 2009-03-19 14:51:15 -0700 | [diff] [blame] | 1782 | |
| 1783 | for (i = 0; i < addrinarray; i++) { |
Thomas Hellstrom | 8523acf | 2009-08-03 09:25:45 +0200 | [diff] [blame] | 1784 | if (PageHighMem(pages[i])) |
| 1785 | continue; |
| 1786 | start = page_to_pfn(pages[i]) << PAGE_SHIFT; |
venkatesh.pallipadi@intel.com | 0f35075 | 2009-03-19 14:51:15 -0700 | [diff] [blame] | 1787 | end = start + PAGE_SIZE; |
Pauli Nieminen | 4f64625 | 2010-04-01 12:45:01 +0000 | [diff] [blame] | 1788 | if (reserve_memtype(start, end, new_type, NULL)) |
venkatesh.pallipadi@intel.com | 0f35075 | 2009-03-19 14:51:15 -0700 | [diff] [blame] | 1789 | goto err_out; |
| 1790 | } |
| 1791 | |
Toshi Kani | 623dffb | 2015-06-04 18:55:20 +0200 | [diff] [blame] | 1792 | /* If WC, set to UC- first and then WC */ |
| 1793 | set_type = (new_type == _PAGE_CACHE_MODE_WC) ? |
| 1794 | _PAGE_CACHE_MODE_UC_MINUS : new_type; |
| 1795 | |
Pauli Nieminen | 4f64625 | 2010-04-01 12:45:01 +0000 | [diff] [blame] | 1796 | ret = cpa_set_pages_array(pages, addrinarray, |
Toshi Kani | 623dffb | 2015-06-04 18:55:20 +0200 | [diff] [blame] | 1797 | cachemode2pgprot(set_type)); |
Juergen Gross | c06814d | 2014-11-03 14:01:57 +0100 | [diff] [blame] | 1798 | if (!ret && new_type == _PAGE_CACHE_MODE_WC) |
Pauli Nieminen | 4f64625 | 2010-04-01 12:45:01 +0000 | [diff] [blame] | 1799 | ret = change_page_attr_set_clr(NULL, addrinarray, |
Juergen Gross | c06814d | 2014-11-03 14:01:57 +0100 | [diff] [blame] | 1800 | cachemode2pgprot( |
| 1801 | _PAGE_CACHE_MODE_WC), |
Pauli Nieminen | 4f64625 | 2010-04-01 12:45:01 +0000 | [diff] [blame] | 1802 | __pgprot(_PAGE_CACHE_MASK), |
| 1803 | 0, CPA_PAGES_ARRAY, pages); |
| 1804 | if (ret) |
| 1805 | goto err_out; |
| 1806 | return 0; /* Success */ |
venkatesh.pallipadi@intel.com | 0f35075 | 2009-03-19 14:51:15 -0700 | [diff] [blame] | 1807 | err_out: |
| 1808 | free_idx = i; |
| 1809 | for (i = 0; i < free_idx; i++) { |
Thomas Hellstrom | 8523acf | 2009-08-03 09:25:45 +0200 | [diff] [blame] | 1810 | if (PageHighMem(pages[i])) |
| 1811 | continue; |
| 1812 | start = page_to_pfn(pages[i]) << PAGE_SHIFT; |
venkatesh.pallipadi@intel.com | 0f35075 | 2009-03-19 14:51:15 -0700 | [diff] [blame] | 1813 | end = start + PAGE_SIZE; |
| 1814 | free_memtype(start, end); |
| 1815 | } |
| 1816 | return -EINVAL; |
| 1817 | } |
Pauli Nieminen | 4f64625 | 2010-04-01 12:45:01 +0000 | [diff] [blame] | 1818 | |
| 1819 | int set_pages_array_uc(struct page **pages, int addrinarray) |
| 1820 | { |
Juergen Gross | c06814d | 2014-11-03 14:01:57 +0100 | [diff] [blame] | 1821 | return _set_pages_array(pages, addrinarray, _PAGE_CACHE_MODE_UC_MINUS); |
Pauli Nieminen | 4f64625 | 2010-04-01 12:45:01 +0000 | [diff] [blame] | 1822 | } |
venkatesh.pallipadi@intel.com | 0f35075 | 2009-03-19 14:51:15 -0700 | [diff] [blame] | 1823 | EXPORT_SYMBOL(set_pages_array_uc); |
| 1824 | |
Pauli Nieminen | 4f64625 | 2010-04-01 12:45:01 +0000 | [diff] [blame] | 1825 | int set_pages_array_wc(struct page **pages, int addrinarray) |
| 1826 | { |
Juergen Gross | c06814d | 2014-11-03 14:01:57 +0100 | [diff] [blame] | 1827 | return _set_pages_array(pages, addrinarray, _PAGE_CACHE_MODE_WC); |
Pauli Nieminen | 4f64625 | 2010-04-01 12:45:01 +0000 | [diff] [blame] | 1828 | } |
| 1829 | EXPORT_SYMBOL(set_pages_array_wc); |
| 1830 | |
Toshi Kani | 623dffb | 2015-06-04 18:55:20 +0200 | [diff] [blame] | 1831 | int set_pages_array_wt(struct page **pages, int addrinarray) |
| 1832 | { |
| 1833 | return _set_pages_array(pages, addrinarray, _PAGE_CACHE_MODE_WT); |
| 1834 | } |
| 1835 | EXPORT_SYMBOL_GPL(set_pages_array_wt); |
| 1836 | |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 1837 | int set_pages_wb(struct page *page, int numpages) |
| 1838 | { |
| 1839 | unsigned long addr = (unsigned long)page_address(page); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 1840 | |
Thomas Gleixner | d7c8f21 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 1841 | return set_memory_wb(addr, numpages); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 1842 | } |
| 1843 | EXPORT_SYMBOL(set_pages_wb); |
| 1844 | |
venkatesh.pallipadi@intel.com | 0f35075 | 2009-03-19 14:51:15 -0700 | [diff] [blame] | 1845 | int set_pages_array_wb(struct page **pages, int addrinarray) |
| 1846 | { |
| 1847 | int retval; |
| 1848 | unsigned long start; |
| 1849 | unsigned long end; |
| 1850 | int i; |
| 1851 | |
Juergen Gross | c06814d | 2014-11-03 14:01:57 +0100 | [diff] [blame] | 1852 | /* WB cache mode is hard wired to all cache attribute bits being 0 */ |
venkatesh.pallipadi@intel.com | 0f35075 | 2009-03-19 14:51:15 -0700 | [diff] [blame] | 1853 | retval = cpa_clear_pages_array(pages, addrinarray, |
| 1854 | __pgprot(_PAGE_CACHE_MASK)); |
venkatesh.pallipadi@intel.com | 9fa3ab3 | 2009-04-09 14:26:49 -0700 | [diff] [blame] | 1855 | if (retval) |
| 1856 | return retval; |
venkatesh.pallipadi@intel.com | 0f35075 | 2009-03-19 14:51:15 -0700 | [diff] [blame] | 1857 | |
| 1858 | for (i = 0; i < addrinarray; i++) { |
Thomas Hellstrom | 8523acf | 2009-08-03 09:25:45 +0200 | [diff] [blame] | 1859 | if (PageHighMem(pages[i])) |
| 1860 | continue; |
| 1861 | start = page_to_pfn(pages[i]) << PAGE_SHIFT; |
venkatesh.pallipadi@intel.com | 0f35075 | 2009-03-19 14:51:15 -0700 | [diff] [blame] | 1862 | end = start + PAGE_SIZE; |
| 1863 | free_memtype(start, end); |
| 1864 | } |
| 1865 | |
venkatesh.pallipadi@intel.com | 9fa3ab3 | 2009-04-09 14:26:49 -0700 | [diff] [blame] | 1866 | return 0; |
venkatesh.pallipadi@intel.com | 0f35075 | 2009-03-19 14:51:15 -0700 | [diff] [blame] | 1867 | } |
| 1868 | EXPORT_SYMBOL(set_pages_array_wb); |
| 1869 | |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 1870 | int set_pages_x(struct page *page, int numpages) |
| 1871 | { |
| 1872 | unsigned long addr = (unsigned long)page_address(page); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 1873 | |
Thomas Gleixner | d7c8f21 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 1874 | return set_memory_x(addr, numpages); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 1875 | } |
| 1876 | EXPORT_SYMBOL(set_pages_x); |
| 1877 | |
| 1878 | int set_pages_nx(struct page *page, int numpages) |
| 1879 | { |
| 1880 | unsigned long addr = (unsigned long)page_address(page); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 1881 | |
Thomas Gleixner | d7c8f21 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 1882 | return set_memory_nx(addr, numpages); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 1883 | } |
| 1884 | EXPORT_SYMBOL(set_pages_nx); |
| 1885 | |
| 1886 | int set_pages_ro(struct page *page, int numpages) |
| 1887 | { |
| 1888 | unsigned long addr = (unsigned long)page_address(page); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 1889 | |
Thomas Gleixner | d7c8f21 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 1890 | return set_memory_ro(addr, numpages); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 1891 | } |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 1892 | |
| 1893 | int set_pages_rw(struct page *page, int numpages) |
| 1894 | { |
| 1895 | unsigned long addr = (unsigned long)page_address(page); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 1896 | |
Thomas Gleixner | d7c8f21 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 1897 | return set_memory_rw(addr, numpages); |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 1898 | } |
Arjan van de Ven | 75cbade | 2008-01-30 13:34:06 +0100 | [diff] [blame] | 1899 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1900 | #ifdef CONFIG_DEBUG_PAGEALLOC |
Ingo Molnar | f62d0f0 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 1901 | |
| 1902 | static int __set_pages_p(struct page *page, int numpages) |
| 1903 | { |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 1904 | unsigned long tempaddr = (unsigned long) page_address(page); |
| 1905 | struct cpa_data cpa = { .vaddr = &tempaddr, |
Borislav Petkov | 82f0712 | 2013-10-31 17:25:07 +0100 | [diff] [blame] | 1906 | .pgd = NULL, |
Thomas Gleixner | 72e458d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 1907 | .numpages = numpages, |
| 1908 | .mask_set = __pgprot(_PAGE_PRESENT | _PAGE_RW), |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 1909 | .mask_clr = __pgprot(0), |
| 1910 | .flags = 0}; |
Thomas Gleixner | 72932c7 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 1911 | |
Suresh Siddha | 55121b4 | 2008-09-23 14:00:40 -0700 | [diff] [blame] | 1912 | /* |
| 1913 | * No alias checking needed for setting present flag. otherwise, |
| 1914 | * we may need to break large pages for 64-bit kernel text |
| 1915 | * mappings (this adds to complexity if we want to do this from |
| 1916 | * atomic context especially). Let's keep it simple! |
| 1917 | */ |
| 1918 | return __change_page_attr_set_clr(&cpa, 0); |
Ingo Molnar | f62d0f0 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 1919 | } |
| 1920 | |
| 1921 | static int __set_pages_np(struct page *page, int numpages) |
| 1922 | { |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 1923 | unsigned long tempaddr = (unsigned long) page_address(page); |
| 1924 | struct cpa_data cpa = { .vaddr = &tempaddr, |
Borislav Petkov | 82f0712 | 2013-10-31 17:25:07 +0100 | [diff] [blame] | 1925 | .pgd = NULL, |
Thomas Gleixner | 72e458d | 2008-02-04 16:48:07 +0100 | [diff] [blame] | 1926 | .numpages = numpages, |
| 1927 | .mask_set = __pgprot(0), |
Shaohua Li | d75586a | 2008-08-21 10:46:06 +0800 | [diff] [blame] | 1928 | .mask_clr = __pgprot(_PAGE_PRESENT | _PAGE_RW), |
| 1929 | .flags = 0}; |
Thomas Gleixner | 72932c7 | 2008-01-30 13:34:08 +0100 | [diff] [blame] | 1930 | |
Suresh Siddha | 55121b4 | 2008-09-23 14:00:40 -0700 | [diff] [blame] | 1931 | /* |
| 1932 | * No alias checking needed for setting not present flag. otherwise, |
| 1933 | * we may need to break large pages for 64-bit kernel text |
| 1934 | * mappings (this adds to complexity if we want to do this from |
| 1935 | * atomic context especially). Let's keep it simple! |
| 1936 | */ |
| 1937 | return __change_page_attr_set_clr(&cpa, 0); |
Ingo Molnar | f62d0f0 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 1938 | } |
| 1939 | |
Joonsoo Kim | 031bc57 | 2014-12-12 16:55:52 -0800 | [diff] [blame] | 1940 | void __kernel_map_pages(struct page *page, int numpages, int enable) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1941 | { |
| 1942 | if (PageHighMem(page)) |
| 1943 | return; |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 1944 | if (!enable) { |
Ingo Molnar | f9b8404 | 2006-06-27 02:54:49 -0700 | [diff] [blame] | 1945 | debug_check_no_locks_freed(page_address(page), |
| 1946 | numpages * PAGE_SIZE); |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 1947 | } |
Ingo Molnar | de5097c | 2006-01-09 15:59:21 -0800 | [diff] [blame] | 1948 | |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 1949 | /* |
Ingo Molnar | f8d8406 | 2008-02-13 14:09:53 +0100 | [diff] [blame] | 1950 | * The return value is ignored as the calls cannot fail. |
Suresh Siddha | 55121b4 | 2008-09-23 14:00:40 -0700 | [diff] [blame] | 1951 | * Large pages for identity mappings are not used at boot time |
| 1952 | * and hence no memory allocations during large page split. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1953 | */ |
Ingo Molnar | f62d0f0 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 1954 | if (enable) |
| 1955 | __set_pages_p(page, numpages); |
| 1956 | else |
| 1957 | __set_pages_np(page, numpages); |
Ingo Molnar | 9f4c815 | 2008-01-30 13:33:41 +0100 | [diff] [blame] | 1958 | |
| 1959 | /* |
Ingo Molnar | e4b71dc | 2008-01-30 13:34:04 +0100 | [diff] [blame] | 1960 | * We should perform an IPI and flush all tlbs, |
| 1961 | * but that can deadlock->flush only current cpu: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1962 | */ |
| 1963 | __flush_tlb_all(); |
Boris Ostrovsky | 2656460 | 2013-04-11 13:59:52 -0400 | [diff] [blame] | 1964 | |
| 1965 | arch_flush_lazy_mmu_mode(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1966 | } |
Rafael J. Wysocki | 8a235ef | 2008-02-20 01:47:44 +0100 | [diff] [blame] | 1967 | |
| 1968 | #ifdef CONFIG_HIBERNATION |
| 1969 | |
| 1970 | bool kernel_page_present(struct page *page) |
| 1971 | { |
| 1972 | unsigned int level; |
| 1973 | pte_t *pte; |
| 1974 | |
| 1975 | if (PageHighMem(page)) |
| 1976 | return false; |
| 1977 | |
| 1978 | pte = lookup_address((unsigned long)page_address(page), &level); |
| 1979 | return (pte_val(*pte) & _PAGE_PRESENT); |
| 1980 | } |
| 1981 | |
| 1982 | #endif /* CONFIG_HIBERNATION */ |
| 1983 | |
| 1984 | #endif /* CONFIG_DEBUG_PAGEALLOC */ |
Arjan van de Ven | d1028a1 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 1985 | |
Borislav Petkov | 82f0712 | 2013-10-31 17:25:07 +0100 | [diff] [blame] | 1986 | int kernel_map_pages_in_pgd(pgd_t *pgd, u64 pfn, unsigned long address, |
| 1987 | unsigned numpages, unsigned long page_flags) |
| 1988 | { |
| 1989 | int retval = -EINVAL; |
| 1990 | |
| 1991 | struct cpa_data cpa = { |
| 1992 | .vaddr = &address, |
| 1993 | .pfn = pfn, |
| 1994 | .pgd = pgd, |
| 1995 | .numpages = numpages, |
| 1996 | .mask_set = __pgprot(0), |
| 1997 | .mask_clr = __pgprot(0), |
| 1998 | .flags = 0, |
| 1999 | }; |
| 2000 | |
| 2001 | if (!(__supported_pte_mask & _PAGE_NX)) |
| 2002 | goto out; |
| 2003 | |
| 2004 | if (!(page_flags & _PAGE_NX)) |
| 2005 | cpa.mask_clr = __pgprot(_PAGE_NX); |
| 2006 | |
Sai Praneeth | 15f003d | 2016-02-17 12:36:04 +0000 | [diff] [blame] | 2007 | if (!(page_flags & _PAGE_RW)) |
| 2008 | cpa.mask_clr = __pgprot(_PAGE_RW); |
| 2009 | |
Borislav Petkov | 82f0712 | 2013-10-31 17:25:07 +0100 | [diff] [blame] | 2010 | cpa.mask_set = __pgprot(_PAGE_PRESENT | page_flags); |
| 2011 | |
| 2012 | retval = __change_page_attr_set_clr(&cpa, 0); |
| 2013 | __flush_tlb_all(); |
| 2014 | |
| 2015 | out: |
| 2016 | return retval; |
| 2017 | } |
| 2018 | |
Arjan van de Ven | d1028a1 | 2008-01-30 13:34:07 +0100 | [diff] [blame] | 2019 | /* |
| 2020 | * The testcases use internal knowledge of the implementation that shouldn't |
| 2021 | * be exposed to the rest of the kernel. Include these directly here. |
| 2022 | */ |
| 2023 | #ifdef CONFIG_CPA_DEBUG |
| 2024 | #include "pageattr-test.c" |
| 2025 | #endif |