- 03e2219 perf, x86: Handle in flight NMIs on P4 platform by Cyrill Gorcunov · 14 years ago
- de725de perf, x86: Fix handle_irq return values by Peter Zijlstra · 14 years ago
- 8d33091 perf, x86, Pentium4: Clear the P4_CCCR_FORCE_OVF flag by Lin Ming · 14 years ago
- 1c250d7 perf, x86: P4 PMU -- update nmi irq statistics and unmask lvt entry properly by Cyrill Gorcunov · 14 years ago
- 39ef13a perf, x86: P4 PMU -- redesign cache events by Cyrill Gorcunov · 14 years ago
- 68aa00a perf, x86: Make a second write to performance counter if needed by Cyrill Gorcunov · 14 years ago
- 9d36dfc perf, x86: P4_pmu_schedule_events -- use smp_processor_id instead of raw_ by Cyrill Gorcunov · 14 years ago
- 623aab8 perf, x86: P4 PMU -- do a real check for ESCR address being in hash by Cyrill Gorcunov · 14 years ago
- ef4f30f perf, x86: P4 PMU -- fix typo in unflagged NMI handling by Cyrill Gorcunov · 14 years ago
- 0db1a7b perf, x86: P4 PMU -- handle unflagged events by Cyrill Gorcunov · 14 years ago
- 1ff3d7d x86, perf: P4 PMU - fix counters management logic by Cyrill Gorcunov · 14 years ago
- 7200199 x86, perf: P4 PMU -- use hash for p4_get_escr_idx() by Cyrill Gorcunov · 14 years ago
- c799316 x86, perf: P4 PMU -- check for proper event index in RAW events by Cyrill Gorcunov · 14 years ago
- 3f51b71 x86, perf: P4 PMU -- Get rid of redundant check for array index by Cyrill Gorcunov · 14 years ago
- 137351e x86, perf: P4 PMU -- protect sensible procedures from preemption by Cyrill Gorcunov · 14 years ago
- de902d9 x86, perf: P4 PMU -- configure predefined events by Cyrill Gorcunov · 14 years ago
- 9d0fcba6 perf, x86: Call x86_setup_perfctr() from .hw_config() by Robert Richter · 14 years ago
- caaa8be perf, x86: Fix __initconst vs const by Peter Zijlstra · 15 years ago
- b4cdc5c perf, x86: Fix up the ANY flag stuff by Peter Zijlstra · 15 years ago
- 948b1bb perf, x86: Undo some some *_counter* -> *_event* renames by Robert Richter · 15 years ago
- 11164cd perf, x86: Add Nehelem PMU programming errata workaround by Peter Zijlstra · 15 years ago
- d814f30 x86, perf: Add raw events support for the P4 PMU by Cyrill Gorcunov · 15 years ago
- 9c8c6ba x86, perf: Fix few cosmetic dabs for P4 pmu (comments and constantify) by Cyrill Gorcunov · 15 years ago
- cb7d6b5 perf, x86: Add cache events for the Pentium-4 PMU by Lin Ming · 15 years ago
- f34edbc perf, x86: Add a key to simplify template lookup in Pentium-4 PMU by Lin Ming · 15 years ago
- 7335f75 x86, perf: Use apic_write unconditionally by Cyrill Gorcunov · 15 years ago
- e449526 perf, x86: Enable not tagged retired instruction counting on P4s by Cyrill Gorcunov · 15 years ago
- 8576e19 x86, perf: Unmask LVTPC only if we have APIC supported by Cyrill Gorcunov · 15 years ago
- a072738 perf, x86: Implement initial P4 PMU driver by Cyrill Gorcunov · 15 years ago