Gitiles
Code Review
Sign In
gerrit-public.fairphone.software
/
kernel
/
msm-4.9
/
00c83b01d58068dfeb2e1351cca6fccf2a83fa8f
/
drivers
/
clk
/
tegra
/
clk.h
2ae7752
clk: tegra: remove legacy reset APIs
by Stephen Warren
· 11 years ago
6d5b988
clk: tegra: implement a reset driver
by Stephen Warren
· 11 years ago
b29f9e9
clk: tegra: add TEGRA_PERIPH_NO_GATE
by Peter De Schrijver
· 11 years ago
bc44275
clk: tegra: add locking to periph clks
by Peter De Schrijver
· 11 years ago
798e910
clk: tegra: Add support for PLLSS
by Peter De Schrijver
· 11 years ago
a7c8485
clk: tegra: introduce common gen4 super clock
by Peter De Schrijver
· 11 years ago
de4f30f
clk: tegra: move PMC, fixed clocks to common files
by Peter De Schrijver
· 11 years ago
76ebc13
clk: tegra: move periph clocks to common file
by Peter De Schrijver
· 11 years ago
6609dbe
clk: tegra: move audio clk to common file
by Peter De Schrijver
· 11 years ago
73d37e4
clk: tegra: add clkdev registration infra
by Peter De Schrijver
· 11 years ago
b8700d5
clk: tegra: add common infra for DT clocks
by Peter De Schrijver
· 11 years ago
ebe142b
clk: tegra: move fields to tegra_clk_pll_params
by Peter De Schrijver
· 11 years ago
5bb9d26
clk: tegra: Add TEGRA_PERIPH_NO_DIV flag
by Peter De Schrijver
· 11 years ago
343a607
clk: tegra: common periph_clk_enb_refcnt and clks
by Peter De Schrijver
· 11 years ago
d5ff89a
clk: tegra: simplify periph clock data
by Peter De Schrijver
· 11 years ago
1c472d8
clk: tegra: T114: add DFLL DVCO reset control
by Paul Walmsley
· 11 years ago
25c9ded
clk: tegra: T114: add FCPU clock shaper programming, needed by the DFLL
by Paul Walmsley
· 11 years ago
7b781c7
clk: tegra: Add fields for override bits
by Peter De Schrijver
· 11 years ago
aa6fefd
clk: tegra: allow PLL m,n,p init from SoC files
by Peter De Schrijver
· 11 years ago
061cec9
clk: tegra: Use common of_clk_init function
by Prashant Gaikwad
· 11 years ago
27aa99d
clk: tegra: devicetree match for nvidia,tegra114-car
by Peter De Schrijver
· 12 years ago
fdcccbd
clk: tegra: Workaround for Tegra114 MSENC problem
by Peter De Schrijver
· 12 years ago
a26a029
clk: tegra: Add flags to tegra_clk_periph()
by Peter De Schrijver
· 12 years ago
c1d1939
clk: tegra: Add new fields and PLL types for Tegra114
by Peter De Schrijver
· 12 years ago
3e72771
clk: tegra: move from a lock bit idx to a lock mask
by Peter De Schrijver
· 12 years ago
0b6525a
clk: tegra: Add PLL post divider table
by Peter De Schrijver
· 12 years ago
7ba2881
clk: tegra: introduce TEGRA_PLL_HAS_LOCK_ENABLE
by Peter De Schrijver
· 12 years ago
dd93587
clk: tegra: Add TEGRA_PLL_BYPASS flag
by Peter De Schrijver
· 12 years ago
dba4072
clk: tegra: Refactor PLL programming code
by Peter De Schrijver
· 12 years ago
441f199
clk: tegra: defer application of init table
by Stephen Warren
· 12 years ago
ce4f331
clk: add table lookup to mux
by Peter De Schrijver
· 12 years ago
b08e8c0
clk: tegra: add clock support for Tegra30
by Prashant Gaikwad
· 12 years ago
37c26a9
clk: tegra: add clock support for Tegra20
by Prashant Gaikwad
· 12 years ago
8f8f484
clk: tegra: add Tegra specific clocks
by Prashant Gaikwad
· 12 years ago