Gitiles
Code Review Sign In
gerrit-public.fairphone.software / kernel / msm-4.9 / 062efa5d841cca5e0df5b45c624966cb9936438c / drivers / gpu / drm / i915 / intel_dsi_pll.c
  1. 062efa5 drm/i915: Eliminate {vlv,bxt}_configure_dsi_pll() by Ville Syrjälä · 8 years ago
  2. 47eacba drm/i915: Compute DSI PLL parameters during .compute_config() by Ville Syrjälä · 8 years ago
  3. ae9ec62 drm/i915: Fix CHV DSI PLL refclk during state readout by Ville Syrjälä · 8 years ago
  4. f00b568 drm/i915: Power down the DSI PLL before reconfiguring it by Ville Syrjälä · 8 years ago
  5. 50dd63a drm/i915: Change lfsr_converts[] to u16 by Ville Syrjälä · 8 years ago
  6. db18b6a drm/i915/bxt: Fix DSI HW state readout by Imre Deak · 8 years ago
  7. 1e78aa0 drm/i915/dsi: start using enum mipi_dsi_pixel_format by Jani Nikula · 8 years ago
  8. 42c151e drm/i915/dsi: lose the loose 666 format name in favor of packed by Jani Nikula · 8 years ago
  9. 782d25c drm/i915/bxt: Additional MIPI clock divider form B0 stepping onwards by Deepak M · 8 years ago
  10. 0aa8bdf drm/i915/dsi: Using the bpp value wrt the pixel format by Deepak M · 8 years ago
  11. b5c0bbc drm/i915/dsi: remove unused dsi_rr_formula() by Jani Nikula · 9 years ago
  12. d7d85d8 drm/i915/dsi: abstract get pclk platform differences by Jani Nikula · 9 years ago
  13. 666a453 drm/i915: Separate cherryview from valleyview by Wayne Boyer · 9 years ago
  14. b248e65 drm/i915/bxt: vlv_dsi_reset_clocks() can be static by kbuild test robot · 9 years ago
  15. ce0c982 drm/i915/bxt: get DSI pixelclock by Shashank Sharma · 9 years ago
  16. b389a45 drm/i915/bxt: DSI disable and post-disable by Shashank Sharma · 9 years ago
  17. 11b8e4f drm/i915/bxt: Program Tx Rx and Dphy clocks by Shashank Sharma · 9 years ago
  18. fe88fc6 drm/i915/bxt: Disable DSI PLL for BXT by Shashank Sharma · 9 years ago
  19. cfe01a5 drm/i915/bxt: Enable BXT DSI PLL by Shashank Sharma · 9 years ago
  20. 20dbe1a drm/i915: Changes required to enable DSI Video Mode on CHT by Gaurav K Singh · 9 years ago
  21. 3c5c6d8 drm/i915: Support for higher DSI clk by Gaurav K Singh · 9 years ago
  22. 260c1ad drm/i915/dsi: abstract dsi bpp derivation from pixel format by Jani Nikula · 9 years ago
  23. a580516 drm/i915: s/dpio_lock/sb_lock/ by Ville Syrjälä · 9 years ago
  24. a856c5b drm/i915/dsi: add support for DSI PLL N1 divisor values by Jani Nikula · 9 years ago
  25. 7471bf4 drm/i915: clean up dsi pll calculation by Jani Nikula · 9 years ago
  26. 3c860ab drm/i915: Use DSI Pll1 for enabling MIPI DSI on Port C by Gaurav K Singh · 10 years ago
  27. 3770f0e drm/i915: cck reg used for checking DSI Pll locked by Gaurav K Singh · 10 years ago
  28. 58cf888 drm/i915: Enable DSI PLL for both DSI0 and DSI1 in case of dual link by Gaurav K Singh · 10 years ago
  29. 7f3de83 drm/i915: Align intel_dsi*.c files a bit by Daniel Vetter · 10 years ago
  30. 7f0c860 drm/i915: Add support for Video Burst Mode for MIPI DSI by Shobhit Kumar · 10 years ago
  31. f573de5 drm/i915: Add correct hw/sw config check for DSI encoder by Shobhit Kumar · 10 years ago
  32. 8e1eed5 drm/i915: Try harder to get best m, n, p values with minimal error by Shobhit Kumar · 11 years ago
  33. 44d4c6e drm/i915: Compute dsi_clk from pixel clock by Shobhit Kumar · 11 years ago
  34. a748214 drm/i915: Use adjusted_mode in DSI PLL calculations by Ville Syrjälä · 11 years ago
  35. be4fc04 drm/i915: add VLV DSI PLL Calculations by ymohanma · 11 years ago