1. 06be007 x86/cpu: Rename cpu_data.x86_mask to cpu_data.x86_stepping by Jia Zhang · 7 years ago
  2. 085656d perf/x86: Avoid exposing wrong/stale data in intel_pmu_lbr_read_32() by Peter Zijlstra · 7 years ago
  3. 5c38181 perf/x86/intel: Remove an inconsistent NULL check by Dan Carpenter · 8 years ago
  4. 3e2c1a6 perf/x86/intel: Clean up LBR state tracking by Peter Zijlstra · 8 years ago
  5. a5dcff6 perf/x86/intel: Remove redundant test from intel_pmu_lbr_add() by Peter Zijlstra · 8 years ago
  6. c3a61a2 perf/x86/intel: Eliminate dead code in intel_pmu_lbr_del() by Peter Zijlstra · 8 years ago
  7. 68f7082 perf/x86: Ensure perf_sched_cb_{inc,dec}() is only called from pmu::{add,del}() by Peter Zijlstra · 8 years ago
  8. aefbc4d perf/x86/intel: Fix rdlbr_to() MSR reading typo by Peter Zijlstra · 8 years ago
  9. d4cf194 perf/x86/intel: Add {rd,wr}lbr_{to,from} wrappers by Peter Zijlstra · 8 years ago
  10. 71adae9 perf/x86/intel: Add MSR_LAST_BRANCH_FROM_x quirk for ctx switch by David Carrillo-Cisneros · 8 years ago
  11. 3812bba perf/x86/intel: Fix trivial formatting and style bug by David Carrillo-Cisneros · 8 years ago
  12. 19fc9dd perf/x86/intel: Fix MSR_LAST_BRANCH_FROM_x bug when no TSX by David Carrillo-Cisneros · 8 years ago
  13. f09509b perf/x86/intel: Print LBR support statement after validation by David Carrillo-Cisneros · 8 years ago
  14. 0b20e59 Merge branch 'perf/urgent' into perf/core, to resolve conflict by Ingo Molnar · 8 years ago
  15. cf3beb7 perf/x86/intel: Fix incorrect lbr_sel_mask value by Kan Liang · 8 years ago
  16. f21d5ad perf/x86/intel: Add LBR filter support for Silvermont and Airmont CPUs by Kan Liang · 8 years ago
  17. 8b92c3a perf/x86/intel: Add Goldmont CPU support by Kan Liang · 8 years ago
  18. 00f5268 Merge branch 'x86/cleanups' into x86/urgent by Ingo Molnar · 9 years ago
  19. 27f6d22 perf/x86: Move perf_event.h to its new home by Borislav Petkov · 9 years ago
  20. c85cc44 perf/x86: Move perf_event_intel_lbr.c ........ => x86/events/intel/lbr.c by Borislav Petkov · 9 years ago[Renamed (99%) from arch/x86/kernel/cpu/perf_event_intel_lbr.c]
  21. 1e7b939 perf/x86/intel: Add perf core PMU support for Intel Knights Landing by Harish Chegondi · 9 years ago
  22. 6fc2e83 perf/x86: Fix LBR related crashes on Intel Atom by Stephane Eranian · 9 years ago
  23. b16a5b5 perf/x86: Add option to disable reading branch flags/cycles by Andi Kleen · 9 years ago
  24. b28ae95 perf/x86: Fix LBR call stack save/restore by Andi Kleen · 9 years ago
  25. d892819 perf/x86: Add support for PERF_SAMPLE_BRANCH_CALL by Stephane Eranian · 9 years ago
  26. 96f3eda perf/x86/intel: Fix static checker warning in lbr enable by Kan Liang · 9 years ago
  27. deb2751 perf/x86/intel: Fix LBR callstack issue caused by FREEZE_LBRS_ON_PMI by Kan Liang · 9 years ago
  28. 90405aa perf/x86/intel/lbr: Limit LBR accesses to TOS in callstack mode by Andi Kleen · 9 years ago
  29. e057336 perf/x86/intel/lbr: Use correct index to save/restore LBR_INFO with call stack by Andi Kleen · 9 years ago
  30. 9a92e16 perf/x86/intel: Add Intel Skylake PMU support by Andi Kleen · 9 years ago
  31. 425507f perf/x86/intel/lbr: Optimize v4 LBR unfreezing by Andi Kleen · 9 years ago
  32. 50eab8f perf/x86/intel/lbr: Add support for LBRv5 by Andi Kleen · 9 years ago
  33. 9c964ef perf/x86/intel: Drain the PEBS buffer during context switches by Yan, Zheng · 9 years ago
  34. 7b74cfb perf/x86/intel: add support for PERF_SAMPLE_BRANCH_IND_JUMP by Stephane Eranian · 9 years ago
  35. cd1f11d perf/x86/intel: Avoid rewriting DEBUGCTL with the same value for LBRs by Andi Kleen · 10 years ago
  36. 1a78d93 perf/x86/intel: Streamline LBR MSR handling in PMI by Andi Kleen · 10 years ago
  37. 2c44b19 perf/x86/intel: Expose LBR callstack to user space tooling by Peter Zijlstra · 10 years ago
  38. aa54ae9 perf/x86/intel: Discard zero length call entries in LBR call stack by Yan, Zheng · 10 years ago
  39. 2c70d00 perf/x86/intel: Disable FREEZE_LBRS_ON_PMI when LBR operates in callstack mode by Yan, Zheng · 10 years ago
  40. 76cb2c6 perf/x86/intel: Save/restore LBR stack during context switch by Yan, Zheng · 10 years ago
  41. 63f0c1d perf/x86/intel: Track number of events that use the LBR callstack by Yan, Zheng · 10 years ago
  42. e9d7f7c perf/x86/intel: Add basic Haswell LBR call stack support by Yan, Zheng · 10 years ago
  43. 2a0ad3b perf/x86/intel: Use context switch callback to flush LBR stack by Yan, Zheng · 10 years ago
  44. 27ac905 perf/x86/intel: Reduce lbr_sel_map[] size by Yan, Zheng · 10 years ago
  45. 6ba48ff x86: Remove arbitrary instruction size limit in instruction decoder by Dave Hansen · 10 years ago
  46. 0429fbc Merge branch 'for-3.18-consistent-ops' of git://git.kernel.org/pub/scm/linux/kernel/git/tj/percpu by Linus Torvalds · 10 years ago
  47. 066ce64 perf/x86/intel: Mark initialization code as such by Mathias Krause · 10 years ago
  48. 89cbc76 x86: Replace __get_cpu_var uses by Christoph Lameter · 10 years ago
  49. 3754891 perf/x86: Add conditional branch filtering support by Anshuman Khandual · 10 years ago
  50. 0a19684 perf: Fix arch_perf_out_copy_user default by Peter Zijlstra · 11 years ago
  51. b7af41a perf/x86: Suppress duplicated abort LBR records by Andi Kleen · 11 years ago
  52. 135c561 perf/x86/intel: Support Haswell/v4 LBR format by Andi Kleen · 11 years ago
  53. 2b923c8 perf/x86: Check branch sampling priv level in generic code by Stephane Eranian · 11 years ago
  54. 7cc23cd perf/x86/intel/lbr: Demand proper privileges for PERF_SAMPLE_BRANCH_KERNEL by Peter Zijlstra · 11 years ago
  55. 6e15eb3 perf/x86/intel/lbr: Fix LBR filter by Peter Zijlstra · 11 years ago
  56. 3ec18cd perf/x86: Enable Intel Cedarview Atom suppport by Stephane Eranian · 12 years ago
  57. 3e702ff perf/x86: Add LBR software filter support for Intel CPUs by Stephane Eranian · 13 years ago
  58. 60ce0fb perf/x86: Implement PERF_SAMPLE_BRANCH for Intel CPUs by Stephane Eranian · 13 years ago
  59. 88c9a65 perf/x86: Disable LBR support for older Intel Atom processors by Stephane Eranian · 13 years ago
  60. c5cc2cd perf/x86: Add Intel LBR mappings for PERF_SAMPLE_BRANCH filters by Stephane Eranian · 13 years ago
  61. 225ce53 perf/x86: Add Intel LBR MSR definitions by Stephane Eranian · 13 years ago
  62. bce38cd perf: Add generic taken branch sampling support by Stephane Eranian · 13 years ago
  63. 84f2b9b perf: Remove deprecated WARN_ON_ONCE() by Stephane Eranian · 13 years ago
  64. de0428a x86, perf: Clean up perf_event cpu code by Kevin Winchester · 13 years ago
  65. 7c5ecaf perf, x86: Clean up debugctlmsr bit definitions by Peter Zijlstra · 15 years ago
  66. 63fb3f9 perf, x86: Fix LBR read-out by Peter Zijlstra · 15 years ago
  67. b83a46e perf, x86: Don't reset the LBR as frequently by Peter Zijlstra · 15 years ago
  68. 2df202b perf, x86: Fix LBR enable/disable vs cpuc->enabled by Peter Zijlstra · 15 years ago
  69. 74846d3 perf, x86: Clear the LBRs on init by Peter Zijlstra · 15 years ago
  70. 8db909a perf, x86: Clean up IA32_PERF_CAPABILITIES usage by Peter Zijlstra · 15 years ago
  71. caff2be perf, x86: Implement simple LBR support by Peter Zijlstra · 15 years ago