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gerrit-public.fairphone.software / kernel / msm-4.9 / 08fd59fcc8c0f9732214fb93ad5cb09f67cb1124
  1. 08fd59f drm/i915: Move vblank wait determination to 'check' phase by Matt Roper · 9 years ago
  2. 9ca3ba0 drm/i915/chv: use vlv_PLL_is_optimal in chv_find_best_dpll by Imre Deak · 9 years ago
  3. 24be4e4 drm/i915: check for div-by-zero in vlv_PLL_is_optimal by Imre Deak · 9 years ago
  4. d5dd62b drm/i915: factor out vlv_PLL_is_optimal by Imre Deak · 9 years ago
  5. bdd7554 drm/i915: Kill intel_plane->obj by Ville Syrjälä · 9 years ago
  6. 6702cf1 drm/i915: Initialize all contexts by Ben Widawsky · 9 years ago
  7. 563222a drm/i915: Track page table reload need by Ben Widawsky · 9 years ago
  8. 678d96f drm/i915: Track GEN6 page table usage by Ben Widawsky · 9 years ago
  9. 317b4e9 drm/i915: Extract context switch skip and add pd load logic by Ben Widawsky · 9 years ago
  10. 07749ef drm/i915: page table generalizations by Michel Thierry · 9 years ago
  11. d2d9cbb drm/i915: Send out the full AUX address by Ville Syrjälä · 9 years ago
  12. eb0b44a drm/i915: kerneldoc for i915_gem_shrinker.c by Daniel Vetter · 9 years ago
  13. be6a037 drm/i915: Extract i915_gem_shrinker.c by Daniel Vetter · 9 years ago
  14. 6f4b12f8 drm/i915: Use down ei for manual Baytrail RPS calculations by Chris Wilson · 9 years ago
  15. 43cf3bf drm/i915: Improved w/a for rps on Baytrail by Chris Wilson · 9 years ago
  16. aed242f drm/i915: Relax RPS contraints to allows setting minfreq on idle by Chris Wilson · 9 years ago
  17. edf4427 drm/i915: Fallback to using CPU relocations for large batch buffers by Chris Wilson · 10 years ago
  18. 6fafab7 drm/i915: Turn on PIN_GLOBAL in i915_gem_object_ggtt_pin by Tvrtko Ursulin · 9 years ago
  19. dabde5c drm/i915: memory leak in __i915_gem_vma_create() by Dan Carpenter · 9 years ago
  20. a1ddefd drm/i915/dp: return number of bytes written for short aux/i2c writes by Jani Nikula · 9 years ago
  21. 94ca719 drm/i915: Unconfuse DP link rate array names by Ville Syrjälä · 9 years ago
  22. 0336400e drm/i915: Include the sink/source/supported rates in debug output by Ville Syrjälä · 9 years ago
  23. fe51bfb drm/i915: Add eDP intermediate frequencies for CHV by Ville Syrjälä · 9 years ago
  24. e6bda3e drm/i915: Avoid overflowing the DP link rate arrays by Ville Syrjälä · 9 years ago
  25. ed4e9c1 drm/i915: Fix MST link rate handling by Ville Syrjälä · 9 years ago
  26. bc27b7d drm/i915: Use DP_LINK_RATE_SET whenever possible by Ville Syrjälä · 9 years ago
  27. 50fec21 drm/i915: Fix max link rate in intel_dp_mode_valid() by Ville Syrjälä · 9 years ago
  28. 2ecae76 drm/i915: Hide the source vs. sink rate handling from intel_dp_compute_config() by Ville Syrjälä · 9 years ago
  29. 1db10e2 drm/i915: Fully separate source vs. sink rates by Ville Syrjälä · 9 years ago
  30. d098a50 drm/i915: Remove special case from intel_supported_rates() by Ville Syrjälä · 9 years ago
  31. 12f6a2e drm/i915: Don't copy sink rates either by Ville Syrjälä · 9 years ago
  32. 636280b drm/i915: Don't copy the DP source rates arrays by Ville Syrjälä · 9 years ago
  33. ea2d8a4 drm/i915: Store the converted link rates in intel_dp->supported_rates[] by Ville Syrjälä · 9 years ago
  34. f4896f1 drm/i915: Make the DP rates int instead of uint32_t by Ville Syrjälä · 9 years ago
  35. ec7adb6 drm/i915: Do not use ggtt_view with (aliasing) PPGTT by Joonas Lahtinen · 9 years ago
  36. aca5e36 drm/i915: Fix sink crc connector iteration by Rodrigo Vivi · 9 years ago
  37. 0f9e9cd Merge tag 'drm-intel-fixes-2015-03-19' into drm-intel-next by Daniel Vetter · 9 years ago
  38. 7f0801e drm/i915: Make sure the primary plane is enabled before reading out the fb state by Damien Lespiau · 10 years ago
  39. 86a930d drm/i915: Update DRIVER_DATE to 20150313 by Daniel Vetter · 9 years ago
  40. 72c5ba9 drm/i915: Fix vmap_batch page iterator overrun by Mika Kuoppala · 9 years ago
  41. a1559ff drm/i915: Export total subslice and EU counts by Jeff McGee · 9 years ago
  42. cd9bfac drm/i915: redefine WARN_ON_ONCE to include the condition by Jani Nikula · 9 years ago
  43. 8749be8 drm/i915/skl: Implement WaDisableHBR2 by Damien Lespiau · 10 years ago
  44. 7a8785f drm/i915: Remove the preliminary_hw_support shackles from CHV by Ville Syrjälä · 9 years ago
  45. 968040b drm/i915: Read CHV_PLL_DW8 from the correct offset by Ville Syrjälä · 9 years ago
  46. d272ddf drm/i915: Rewrite IVB FDI bifurcation conflict checks by Ville Syrjälä · 9 years ago
  47. 251cc67 drm/i915: Rewrite some some of the FDI lane checks by Ville Syrjälä · 9 years ago
  48. 4c2a889 drm/i915/skl: Enable the RPS interrupts programming by Akash Goel · 9 years ago
  49. aa44862 drm/i915/skl: Enabling processing of Turbo interrupts by Akash Goel · 9 years ago
  50. 60260a5 drm/i915/skl: Updated the i915_frequency_info debugfs function by Akash Goel · 9 years ago
  51. 003632d drm/i915: Simplify the way BC bifurcation state consistency is kept by Ander Conselvan de Oliveira · 9 years ago
  52. ed64d66 drm/i915/skl: Updated the act_freq_mhz_show sysfs function by Akash Goel · 9 years ago
  53. 0beb059 drm/i915/skl: Updated the gen9_enable_rps function by Akash Goel · 9 years ago
  54. 74ef117 drm/i915/skl: Updated the gen6_rps_limits function by Akash Goel · 9 years ago
  55. 8a58643 drm/i915/skl: Restructured the gen6_set_rps_thresholds function by Akash Goel · 9 years ago
  56. 5704195 drm/i915/skl: Updated the gen6_set_rps function by Akash Goel · 9 years ago
  57. cee991c drm/i915/skl: Updated the gen6_init_rps_frequencies function by Akash Goel · 9 years ago
  58. 80b6dda drm/i915/skl: Updated intel_gpu_freq() and intel_freq_opcode() by Akash Goel · 9 years ago
  59. de43ae9 drm/i915/skl: Added new macros by Akash Goel · 9 years ago
  60. 44e5e28 drm/i915: remove indirection in the PCI ID macros by Jani Nikula · 10 years ago
  61. f499896 drm/i915: Use FW_WM() macro for older gmch platforms too by Ville Syrjälä · 9 years ago
  62. 1566597 drm/i915: Add polish to VLV WM shift+mask operations by Ville Syrjälä · 9 years ago
  63. 6e721fb drm/i915: Use plane->state->fb instead of plane->fb in intel_plane_restore() by Ville Syrjälä · 9 years ago
  64. 3749f46 drm/i915: Reduce clutter by using the local plane pointer by Ville Syrjälä · 9 years ago
  65. c5da514 drm/i915: Remove debug prints from primary plane update funcs by Ville Syrjälä · 9 years ago
  66. 41659ab7 drm/i915: Add ULL postfix to VGT_MAGIC constant by Daniel Vetter · 9 years ago
  67. 8c4f83f drm/fourcc: 64 #defines need ULL postfix by Daniel Vetter · 9 years ago
  68. c9f038a drm/i915: Don't assume primary & cursor are always on for wm calculation (v4) by Matt Roper · 9 years ago
  69. 89ed88ba drm/i915: Move drm_framebuffer_unreference out of struct_mutex for flips by Chris Wilson · 9 years ago
  70. fc1ac8d drm/i915: Disable DDR DVFS on CHV by Ville Syrjälä · 9 years ago
  71. cfb4141 drm/i915: Enable the maxfifo PM5 mode when appropriate on CHV by Ville Syrjälä · 9 years ago
  72. 1e69cd7 drm/i915: Program PFI credits for VLV by Vidya Srinivas · 9 years ago
  73. ae80152 drm/i915: Rewrite VLV/CHV watermark code by Ville Syrjälä · 9 years ago
  74. 03e515f drm/i915: Make sure we invalidate frontbuffer on fbcon. by Rodrigo Vivi · 9 years ago
  75. 9cbe40c drm/i915: Update prop, int co-eff and gain threshold for CHV by Vijay Purushothaman · 9 years ago
  76. de3a0fd drm/i915: Initialize CHV digital lock detect threshold by Vijay Purushothaman · 9 years ago
  77. a945ce7e drm/i915: Disable M2 frac division for integer case by Vijay Purushothaman · 9 years ago
  78. ca2b140 drm/i915: Spelling s/auxilliary/auxiliary/ by Geert Uytterhoeven · 9 years ago
  79. 3ef0028 drm/i915: Use crtc->state->active in ilk/skl watermark calculations (v3) by Matt Roper · 9 years ago
  80. c3d1f43 drm/i915: Update intel_crtc_active() to use state values (v2) by Matt Roper · 9 years ago
  81. 3553a8e drm/i915: Exit early from psr_status if PSR is not supported by the device by Damien Lespiau · 9 years ago
  82. 9d0d3fd drm/i915: Fix chv cdclk support by Ville Syrjälä · 9 years ago
  83. 6cca319 drm/i915: Allow pixel clock up to 95% of cdclk on CHV by Ville Syrjälä · 9 years ago
  84. de31fac drm/i915/skl: port A fuse straps don't work on early SKL steppings by Jesse Barnes · 9 years ago
  85. 1d2b952 drm/i915/skl: Restore the DDI translation tables when enabling PW1 by Damien Lespiau · 9 years ago
  86. 2540039 drm/i915: Remove unused condition in hsw_power_well_post_enable() by Damien Lespiau · 9 years ago
  87. d14c034 drm/i915/skl: Restore pipe interrupt registers after power well enabling by Damien Lespiau · 9 years ago
  88. 510e6fd drm/i915/skl: Mirror what we do on HSW for the power well enable log message by Damien Lespiau · 9 years ago
  89. 2a51835 drm/i915/skl: Introduce enable_requested and is_enabled in the power well code by Damien Lespiau · 9 years ago
  90. 4c6c03b drm/i915/skl: Make gen8_irq_power_well_post_enable() take a pipe mask by Damien Lespiau · 9 years ago
  91. 5575f03 drm/i915/chv: Add CHV HW status to SSEU status by Jeff McGee · 9 years ago
  92. c93043a drm/i915/chv: Determine CHV slice/subslice/EU info by Jeff McGee · 9 years ago
  93. c6beb13 drm/i915: Make sure PND deadline mode is enabled on VLV/CHV by Ville Syrjälä · 9 years ago
  94. b500472 drm/i915: Read out display FIFO size on VLV/CHV by Ville Syrjälä · 9 years ago
  95. 883a3d2 drm/i915: Pass plane to vlv_compute_drain_latency() by Ville Syrjälä · 9 years ago
  96. 0018fda drm/i915: Reorganize VLV DDL setup by Ville Syrjälä · 9 years ago
  97. 341c526 drm/i915: Hide VLV DDL precision handling by Ville Syrjälä · 9 years ago
  98. abfc00b drm/i915: Simplify VLV drain latency computation by Ville Syrjälä · 9 years ago
  99. 1203051 drm/i915: Kill DRAIN_LATENCY_PRECISION_* defines by Ville Syrjälä · 9 years ago
  100. edf6056 drm/i915: Reduce CHV DDL multiplier to 16/8 by Ville Syrjälä · 9 years ago