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gerrit-public.fairphone.software / kernel / msm-4.9 / 08feecd7fc709077ce92d21a979f522a5f57170a / drivers / clk / tegra / clk-pll.c
  1. 442f53f clk: tegra: Fix PLLE SS coefficients by Mark Kuo · 9 years ago
  2. fd2963b clk: tegra: Fix typos around clearing PLLE bits during enable by Rhyland Klein · 9 years ago
  3. f59b016 clk: tegra: Do not disable PLLE when under hardware control by Mark Kuo · 9 years ago
  4. 3eb6156 clk: tegra: pll: Fix potential sleeping-while-atomic by Andrew Bresticker · 9 years ago
  5. 2d7f61f clk: tegra: Read correct IDDQ register in PLL_SS registration by Bill Huang · 10 years ago
  6. a4ca2b2 clk: tegra: Fix WARN_ON in PLL_RE registration by Bill Huang · 10 years ago
  7. afff455 clk: tegra: pll: Fix issues with rates for VCO PLLs by Andrew Bresticker · 10 years ago
  8. 6b301a0 clk: tegra: Add support for Tegra210 clocks by Rhyland Klein · 10 years ago
  9. 0ef9db6 clk: tegra: pll: Add logic for SS by Bill Huang · 10 years ago
  10. 17e9273 clk: tegra: pll: Add dyn_ramp callback by Rhyland Klein · 10 years ago
  11. b985114 clk: tegra: pll: Add Set_default logic by Bill Huang · 10 years ago
  12. b5512b4 clk: tegra: pll: Adjust vco_min if SDM present by Bill Huang · 10 years ago
  13. 6929715 clk: tegra: pll: Add support for PLLMB for Tegra210 by Rhyland Klein · 10 years ago
  14. dd322f0 clk: tegra: pll: Add specialized logic for Tegra210 by Rhyland Klein · 10 years ago
  15. 267b62a clk: tegra: pll: Update PLLM handling by Danny Huang · 10 years ago
  16. 86c679a clk: tegra: pll: Fix _pll_ramp_calc_pll logic and _calc_dynamic_ramp_rate by Rhyland Klein · 10 years ago
  17. fde207e clk: tegra: pll: Add code to handle if resets are supported by PLL by Bill Huang · 10 years ago
  18. 407254d clk: tegra: pll: Add logic for out-of-table rates for T210 by Rhyland Klein · 10 years ago
  19. d907f4b clk: tegra: pll: Add logic for handling SDM data by Rhyland Klein · 10 years ago
  20. 3706b43 clk: tegra: pll: Don't unconditionally set LOCK flags by Rhyland Klein · 10 years ago
  21. 204c85d clk: tegra: pll: Update warning message by Rhyland Klein · 10 years ago
  22. 7db864c clk: tegra: pll: Simplify clk_enable_path by Rhyland Klein · 10 years ago
  23. 6583a63 clk: tegra: pll: Add tegra_pll_wait_for_lock to clk header by Rhyland Klein · 10 years ago
  24. 385f9ad clk: tegra: Constify pdiv-to-hw mappings by Thierry Reding · 9 years ago
  25. e52d7c0 clk: tegra: Miscellaneous coding style cleanups by Thierry Reding · 9 years ago
  26. 836ee0f clk: Convert __clk_get_name(hw->clk) to clk_hw_get_name(hw) by Stephen Boyd · 9 years ago
  27. 5cdb1dc clk: tegra: Convert to clk_hw based provider APIs by Stephen Boyd · 9 years ago
  28. 584ac4e clk: tegra: Properly include clk.h by Stephen Boyd · 10 years ago
  29. 44a6f3db clk: tegra: Remove needless initializations by Thierry Reding · 10 years ago
  30. 6bb18c5 clk: tegra: Various whitespace cleanups by Thierry Reding · 10 years ago
  31. 08acae3 clk: tegra: Add support for the Tegra132 CAR IP block by Paul Walmsley · 10 years ago
  32. ca036b2 clk: tegra: Fix order of arguments in WARN by Tomeu Vizoso · 10 years ago
  33. 0e548d50b clk: tegra: Use XUSB-compatible SATA PLL sequence by Mikko Perttunen · 10 years ago
  34. 37ab366 clk: tegra: Enable hardware control of SATA PLL by Mikko Perttunen · 11 years ago
  35. 4c8f806 Merge branch 'clk-fixes' into clk-next by Mike Turquette · 11 years ago
  36. 5178438 Merge tag 'clk-tegra-fixes-3.15' of git://nv-tegra.nvidia.com/user/pdeschrijver/linux into clk-fixes by Mike Turquette · 11 years ago
  37. 2cfe167 clk: tegra: Enable hardware control of PLLE by Jim Lin · 11 years ago
  38. d2c834a clk: tegra: Fix wrong value written to PLLE_AUX by Tuomas Tynkkynen · 11 years ago
  39. 4ccc402 clk: tegra: Fix enabling of PLLE by Thierry Reding · 11 years ago
  40. c61e4e7 clk: tegra: Introduce divider mask and shift helpers by Thierry Reding · 11 years ago
  41. d0f02ce clk: tegra: Fix PLLE programming by Thierry Reding · 11 years ago
  42. e47e12f clk: tegra: Staticize local variables in clk-pll.c by Sachin Kamat · 11 years ago
  43. 62ce7cd clk: tegra: fix __clk_lookup() return value checks by Wei Yongjun · 11 years ago
  44. 8ba4b3b clk: tegra: Do not print errors for clk_round_rate() by Thierry Reding · 11 years ago
  45. 798e910 clk: tegra: Add support for PLLSS by Peter De Schrijver · 11 years ago
  46. ebe142b clk: tegra: move fields to tegra_clk_pll_params by Peter De Schrijver · 11 years ago
  47. 8e9cc80 clk: tegra: use pll_ref as the pll_e parent by Peter De Schrijver · 11 years ago
  48. 04edb09 clk: tegra: move some PLLC and PLLXC init to clk-pll.c by Peter De Schrijver · 11 years ago
  49. 00c674e clk: tegra: Fix clock rate computation by Thierry Reding · 11 years ago
  50. 642fb0c clk: tegra: PLLE spread spectrum control by Peter De Schrijver · 11 years ago
  51. 408a24f clk: tegra: Use override bits when needed by Peter De Schrijver · 12 years ago
  52. 35d287a clk: tegra: fix pllre initilization by Peter De Schrijver · 12 years ago
  53. aa6fefd clk: tegra: allow PLL m,n,p init from SoC files by Peter De Schrijver · 12 years ago
  54. 053b525 clk: tegra: pllc and pllxc should use pdiv_map by Peter De Schrijver · 12 years ago
  55. c1d1939 clk: tegra: Add new fields and PLL types for Tegra114 by Peter De Schrijver · 12 years ago
  56. 3e72771 clk: tegra: move from a lock bit idx to a lock mask by Peter De Schrijver · 12 years ago
  57. 0b6525a clk: tegra: Add PLL post divider table by Peter De Schrijver · 12 years ago
  58. 7ba2881 clk: tegra: introduce TEGRA_PLL_HAS_LOCK_ENABLE by Peter De Schrijver · 12 years ago
  59. dd93587 clk: tegra: Add TEGRA_PLL_BYPASS flag by Peter De Schrijver · 12 years ago
  60. dba4072 clk: tegra: Refactor PLL programming code by Peter De Schrijver · 12 years ago
  61. 8f8f484 clk: tegra: add Tegra specific clocks by Prashant Gaikwad · 12 years ago