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gerrit-public.fairphone.software / kernel / msm-4.9 / 145830dfb005961cb507a578c9d2e7622f0b3716 / drivers / gpu / drm / i915 / i915_reg.h
  1. 22613c9 drm/i915: Make the DERRMR SRM target global GTT by Ville Syrjälä · 11 years ago
  2. ab0169b Merge tag 'bdw-stage1-2013-11-08-v2' of git://people.freedesktop.org/~danvet/drm-intel into drm-next by Dave Airlie · 11 years ago
  3. 38d83c96 drm/i915: Wire up cpu fifo underrun reporting support for bdw by Daniel Vetter · 11 years ago
  4. 6d766f0 drm/i915: Wire up port A aux channel by Daniel Vetter · 11 years ago
  5. 30100f2 drm/i915: Fix up the bdw pipe interrupt enable lists by Daniel Vetter · 11 years ago
  6. c42664c drm/i915: Optimize pipe irq handling on bdw by Daniel Vetter · 11 years ago
  7. 4c2e7a5 drm/i915/bdw: WaSingleSubspanDispatchOnAALinesAndPoints by Ben Widawsky · 11 years ago
  8. a75f362 drm/i915/bdw: conservative SBE VUE cache mode by Ben Widawsky · 11 years ago
  9. 7f88da0 drm/i915/bdw: Limit SDE poly depth FIFO to 2 by Ben Widawsky · 11 years ago
  10. bf66347 drm/i915/bdw: Sampler power bypass disable by Ben Widawsky · 11 years ago
  11. fd392b6 ddrm/i915/bdw: Disable centroid pixel perf optimization by Ben Widawsky · 11 years ago
  12. 4afe8d3 drm/i915/bdw: BWGTLB clock gate disable by Ben Widawsky · 11 years ago
  13. fe4ab3c drm/i915/bdw: Implement edp PSR workarounds by Ben Widawsky · 11 years ago
  14. ed8546a drm/i915/bdw: Support eDP PSR by Ben Widawsky · 11 years ago
  15. 2a114cc drm/i915/bdw: Use The GT mailbox for IPS enable/disable by Ben Widawsky · 11 years ago
  16. 416f472 drm/i915/bdw: Add Broadwell display FIFO limits by Ville Syrjälä · 11 years ago
  17. 8f93f4f drm/i915/bdw: add support for BDW DP voltage swings and pre-emphasis by Paulo Zanoni · 11 years ago
  18. e39bf98 drm/i915/bdw: get the correct LCPLL frequency on Broadwell by Paulo Zanoni · 11 years ago
  19. 756f85c drm/i915/bdw: Broadwell has PIPEMISC by Paulo Zanoni · 11 years ago
  20. 94e409c drm/i915/bdw: Implement PPGTT enable by Ben Widawsky · 11 years ago
  21. fbe5d36 drm/i915/bdw: Support BDW caching by Ben Widawsky · 11 years ago
  22. 1c7a062 drm/i915/bdw: dispatch updates (64b related) by Ben Widawsky · 11 years ago
  23. abd58f0 drm/i915/bdw: Implement interrupt changes by Ben Widawsky · 11 years ago
  24. 4e0bbc3 drm/i915/bdw: display stuff by Ben Widawsky · 11 years ago
  25. 8897644 drm/i915/bdw: HW context support by Ben Widawsky · 11 years ago
  26. 31a5336 drm/i915/bdw: Swizzling support by Ben Widawsky · 11 years ago
  27. 07bf139 drm/i915/vlv: use per-pipe backlight controls v2 by Jesse Barnes · 11 years ago
  28. 9ca2fe7 drm/i915/vlv: enable HDA display audio for Valleyview2 by Mengdong Lin · 11 years ago
  29. 7f16e5c Merge tag 'v3.12' into drm-intel-next by Daniel Vetter · 11 years ago
  30. 8409360 drm/i915: scramble reset support for DP port CRC on g4x by Daniel Vetter · 11 years ago
  31. 93d1f99 drm/i915/vlv: Fix typo in the DPIO register define. by Chon Ming Lee · 11 years ago
  32. 40da17c drm/i915: refactor ilk display interrupt handling by Daniel Vetter · 11 years ago
  33. 94e39e2 drm/i915: Capture batchbuffer state upon GPU hang by Chris Wilson · 11 years ago
  34. 8c7b72f drm/i915: Remove WaFbcDisableDpfcClockGating on HSW by Ben Widawsky · 11 years ago
  35. 153b4b95 drm/i915: Convert straggling MCHBAR registers by Ben Widawsky · 11 years ago
  36. 52f843f drm/i915: Wire up gen2 CRC support by Daniel Vetter · 11 years ago
  37. b073aea drm/i915: Fix PIPE_CRC_CTL for vlv by Daniel Vetter · 11 years ago
  38. b4437a4 drm/i915: CRC source selection #defines for gmch/vlv chips by Daniel Vetter · 11 years ago
  39. 0b5c5ed drm/i915: Adjust CRC capture for pre-gen5/vlv by Daniel Vetter · 11 years ago
  40. 828c790 drm/i915: Disable GGTT PTEs on GEN6+ suspend by Ben Widawsky · 11 years ago
  41. 5a69b89 drm/i915: crc support for hsw by Daniel Vetter · 11 years ago
  42. 5b3a856 drm/i915: wire up CRC interrupt for ilk/snb by Daniel Vetter · 11 years ago
  43. 5a6b5c8 drm/i915: add CRC #defines for ilk/snb by Daniel Vetter · 11 years ago
  44. 1a91510 drm/i915: set HDMI pixel clock in audio configuration by Jani Nikula · 11 years ago
  45. 8bf1e9f drm/i915: Expose latest 200 CRC value for pipe through debugfs by Shuang He · 11 years ago
  46. 1996d62 drm/i915: Adjust watermark register masks by Ville Syrjälä · 11 years ago
  47. cd66407 drm/i915: disable LVDS clock gating on CPT v2 by Jesse Barnes · 11 years ago
  48. 25a2e2d drm/i915: Fix VLV frame counter registers by Ville Syrjälä · 11 years ago
  49. 02f4c9e drm/i915/vlv: Turn off power gate for BIOS-less system. by Chon Ming Lee · 11 years ago
  50. 40e9cf6 drm/i915/vlv: reset DPIO on load and resume v2 by Jesse Barnes · 11 years ago
  51. dd75fdc drm/i915: Tweak RPS thresholds to more aggressively downclock by Chris Wilson · 11 years ago
  52. f3fc488 drm/i915/hsw: Disable L3 caching of atomic memory operations. by Francisco Jerez · 11 years ago
  53. e454a05 drm/i915/vlv: use correct units for rc6 residency v2 by Jesse Barnes · 11 years ago
  54. 49798eb drm/i915/vlv: use lower precision RC6 counter by Jesse Barnes · 11 years ago
  55. 24eb2d5 drm/i915: Program GMBUS Frequency based on the CDCLK for VLV. by Chon Ming Lee · 11 years ago
  56. 45f80d5 drm/i915: precendence bug in GT_PARITY_ERROR() by Dan Carpenter · 11 years ago
  57. 18b5992 drm/i915: Calculate PSR register offsets from base + gen by Ben Widawsky · 11 years ago
  58. 35a85ac drm/i915: Add second slice l3 remapping by Ben Widawsky · 11 years ago
  59. 515b239 drm/i915: write D_COMP using the mailbox by Paulo Zanoni · 11 years ago
  60. 18442d0 drm/i915: Fix port_clock and adjusted_mode.clock readout all over by Ville Syrjälä · 11 years ago
  61. a24c144 drm/i915: clean up power sequencing register port select definitions by Jani Nikula · 11 years ago
  62. 9435373 drm/i915: Report enabled slices on Haswell GT3 by Rodrigo Vivi · 11 years ago
  63. be4fc04 drm/i915: add VLV DSI PLL Calculations by ymohanma · 11 years ago
  64. 3230bf1 drm/i915: add MIPI DSI register definitions by Jani Nikula · 11 years ago
  65. b6ec10b drm/i915: add VLV pipeconf bit definition for DSI PLL lock by Jani Nikula · 11 years ago
  66. e9f882a drm/i915: add more VLV IOSF sideband ports accessors by Jani Nikula · 11 years ago
  67. 1f5d76d drm/i915: enable trickle feed on Haswell by Paulo Zanoni · 11 years ago
  68. 814c5f1 x86: add early quirk for reserving Intel graphics stolen memory v5 by Jesse Barnes · 11 years ago
  69. ffe74d7 drm/i915: Use RCS flips on Ivybridge+ by Chris Wilson · 11 years ago
  70. 9c725e5 Merge branch 'drm-next-3.12' of git://people.freedesktop.org/~agd5f/linux into drm-next by Dave Airlie · 11 years ago
  71. efa27f9 Merge tag 'drm-intel-next-2013-08-23' of git://people.freedesktop.org/~danvet/drm-intel into drm-next by Dave Airlie · 11 years ago
  72. c8bb75a drm/i915/hdmi: Write HDMI vendor specific infoframes by Lespiau, Damien · 11 years ago
  73. 77fa4cb drm/i915: ivb: fix edp voltage swing reg val by Imre Deak · 11 years ago
  74. e801605 drm/i915: Fix context size calculation on SNB/IVB/VLV by Ville Syrjälä · 11 years ago
  75. ec013e7 drm/i915: Expose energy counter on SNB+ through debugfs by Jesse Barnes · 11 years ago
  76. 6aedd1f drm/i915: clarify Haswell power well bit names by Paulo Zanoni · 11 years ago
  77. 884020b drm/i915: Invalidate TLBs for the rings after a reset by Chris Wilson · 11 years ago
  78. 0ce99f7 drm/i915: fix gen4 digital port hotplug definitions by Daniel Vetter · 11 years ago
  79. b0aea5d drm/i915: Use the watermark latency values from dev_priv for ILK/SNB/IVB too by Ville Syrjälä · 11 years ago
  80. 257a7ff drm/i915: fix pnv display core clock readout out by Daniel Vetter · 11 years ago
  81. be256dc drm/i915: add functions to disable and restore LCPLL by Paulo Zanoni · 11 years ago
  82. 2fa86a1 drm/i915: extend lpt_enable_clkout_dp by Paulo Zanoni · 11 years ago
  83. b518421 drm/i915: kill Ivybridge vblank irq vfuncs by Paulo Zanoni · 11 years ago
  84. 3f51e47 drm/i915: Match all PSR mode entry conditions before enabling it. by Rodrigo Vivi · 11 years ago
  85. e91fd8c drm/i915: Added debugfs support for PSR Status by Rodrigo Vivi · 11 years ago
  86. 2b28bb1 drm/i915: Enable/Disable PSR by Rodrigo Vivi · 11 years ago
  87. 05e21cc drm/i915: Define some of the eLLC magic by Ben Widawsky · 11 years ago
  88. 7336df6 drm/i915: improve GEN7_ERR_INT clearing for fifo underrun reporting by Daniel Vetter · 11 years ago
  89. 1dd246f drm/i915: improve SERR_INT clearing for fifo underrun reporting by Daniel Vetter · 11 years ago
  90. 4a33e48 drm/i915: fix dvo DPLL regression by Daniel Vetter · 11 years ago
  91. e847440 drm/i915: Use wait_for() to wait for Punit to change GPU freq on VLV by Ville Syrjälä · 11 years ago
  92. a0de80a drm/i915: Fix context sizes on HSW by Ben Widawsky · 11 years ago
  93. 921c3b6 drm/i915: Fix VLV sprite register offsets by Ville Syrjälä · 11 years ago
  94. 4abb2c3 drm/i915: s/LFP/LPF in DPIO PLL register names by Ville Syrjälä · 11 years ago
  95. 4f7fd70 drm/i915: Fix up sdvo hpd pins for i965g/gm by Daniel Vetter · 11 years ago
  96. 3eff4fa drm/i915: explicitly set up PIPECONF (and gamma table) on haswell by Daniel Vetter · 11 years ago
  97. e0d8d59 drm/i915: Try harder to disable trickle feed on VLV by Ville Syrjälä · 11 years ago
  98. e9a632a drm/i915: scrap register address storage by Daniel Vetter · 11 years ago
  99. 1188739 drm/i915: refactor PCH_DPLL_SEL #defines by Daniel Vetter · 11 years ago
  100. fd3da6c drm/i915: WA: FBC Render Nuke. by Rodrigo Vivi · 11 years ago