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gerrit-public.fairphone.software
/
kernel
/
msm-4.9
/
158ec071fb5243e5c49259d2dbc4c8dbaed24c47
/
drivers
/
clk
/
pistachio
17bfa3f
clk: pistachio: Add sanity checks on PLL configuration
by Kevin Cernekee
· 9 years ago
e0b7a79
clk: pistachio: Lock the PLL when enabled upon rate change
by Ezequiel Garcia
· 9 years ago
4f4adfb
clk: pistachio: Add a pll_lock() helper for clarity
by Ezequiel Garcia
· 9 years ago
a47eb35
CLK: Pistachio: Register external clock gates
by Andrew Bresticker
· 10 years ago
8cb94af
CLK: Pistachio: Register system interface gate clocks
by Andrew Bresticker
· 10 years ago
44960ab
CLK: Pistachio: Register peripheral clocks
by Andrew Bresticker
· 10 years ago
b35d7c3
CLK: Pistachio: Register core clocks
by Andrew Bresticker
· 10 years ago
43049b0
CLK: Pistachio: Add PLL driver
by Andrew Bresticker
· 10 years ago
8e4b772
CLK: Add basic infrastructure for Pistachio clocks
by Andrew Bresticker
· 10 years ago