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gerrit-public.fairphone.software / kernel / msm-4.9 / 1c472d8e8284917a7687694effcc7ebb6911b63d / drivers / clk / tegra / clk-tegra114.c
  1. 1c472d8 clk: tegra: T114: add DFLL DVCO reset control by Paul Walmsley · 11 years ago
  2. 9e60121 clk: tegra: T114: add DFLL source clocks by Paul Walmsley · 11 years ago
  3. 25c9ded clk: tegra: T114: add FCPU clock shaper programming, needed by the DFLL by Paul Walmsley · 11 years ago
  4. d53442e clk: tegra: override bits for Tegra114 PLLM by Peter De Schrijver · 11 years ago
  5. 29b0944 clk: tegra: fix sclk_parents by Peter De Schrijver · 11 years ago
  6. fd428ad clk: tegra: PLL m,n,p init for Tegra114 by Peter De Schrijver · 11 years ago
  7. c388eee clk: tegra: pllp_out2 divider is int only by Peter De Schrijver · 11 years ago
  8. 8823598 clk: tegra114: Fix msenc clock register by Mikko Perttunen · 11 years ago
  9. 061cec9 clk: tegra: Use common of_clk_init function by Prashant Gaikwad · 11 years ago
  10. 9139227 clk: tegra114: correctly output clk_32k by Alexandre Courbot · 11 years ago
  11. 995968e clk: tegra: fix clk_out parents list by Prashant Gaikwad · 11 years ago
  12. 964ea47 clk: tegra: fix enum tegra114_clk to match binding by Stephen Warren · 11 years ago
  13. c604283 clk: tegra: Remove forced clk_enable of uartd by Peter De Schrijver · 11 years ago
  14. 2cb5efe clk: tegra: Implement clocks for Tegra114 by Peter De Schrijver · 11 years ago