1. 21dd373 drm/i915: Defer reporting EIO until we try to use the GPU by Chris Wilson · 14 years ago
  2. d9e86c0 drm/i915: Pipelined fencing [infrastructure] by Chris Wilson · 14 years ago
  3. 05394f3 drm/i915: Use drm_i915_gem_object as the preferred type by Chris Wilson · 14 years ago
  4. df15315 drm/i915: Fix current tiling check for relaxed fencing by Chris Wilson · 14 years ago
  5. a00b10c drm/i915: Only enforce fence limits inside the GTT. by Chris Wilson · 14 years ago
  6. f00a3dd drm/i915: IS_IRONLAKE is synonymous with gen == 5 by Chris Wilson · 14 years ago
  7. 30dbf0c drm/i915: Adjust hangcheck EIO semantics by Chris Wilson · 14 years ago
  8. a6c45cf drm/i915: INTEL_INFO->gen supercedes i8xx, i9xx, i965g by Chris Wilson · 14 years ago
  9. 2cf34d7 drm/i915: Allow get_fence_reg() to be uninterruptible by Chris Wilson · 14 years ago
  10. dd2575f drm/i915: Remove impossible error handling from bit17 swizzling by Chris Wilson · 14 years ago
  11. bf79cb9 drm: Use ENOENT consistently for the error return for an unmatched handle. by Chris Wilson · 14 years ago
  12. 0b34000 drm/i915: Remove the WARN when failing to set tiling. by Chris Wilson · 14 years ago
  13. 31770bd drm/i915: don't allow tiling changes on pinned buffers v2 by Daniel Vetter · 14 years ago
  14. c36a2a6 drm/i915: fix tiling limits for i915 class hw v2 by Daniel Vetter · 14 years ago
  15. 23010e4 drm/i915: introduce to_intel_bo helper by Daniel Vetter · 14 years ago
  16. fe30519 drm/intel: fix up set_tiling for untiled->tiled transition by Daniel Vetter · 14 years ago
  17. bad720f drm/i915: Add initial bits for VGA modesetting bringup on Sandybridge. by Eric Anholt · 15 years ago
  18. 30d6c72 Merge remote branch 'anholt/drm-intel-next' into drm-next-stage by Dave Airlie · 15 years ago
  19. f590d27 drm/i915: reduce some of the duplication of tiling checking by Owain Ainsworth · 15 years ago
  20. 10ae9bd drm/i915: blow away userspace mappings before fence change by Daniel Vetter · 15 years ago
  21. c4804411 drm/i915: Keep MCHBAR always enabled by Zhenyu Wang · 15 years ago
  22. bc9025b Use drm_gem_object_[handle_]unreference_unlocked where possible by Luca Barbieri · 15 years ago
  23. 76446ca drm/i915: execbuf2 support by Jesse Barnes · 15 years ago
  24. f2b115e drm/i915: Fix product names and #defines by Adam Jackson · 15 years ago
  25. 44d98a6 drm/i915: Replace DRM_DEBUG with DRM_DEBUG_DRIVER by Zhao Yakui · 15 years ago
  26. ec2a4c3 drm/i915: get the bridge device once. by Dave Airlie · 15 years ago
  27. 553bd14 drm/i915: fix tiling on IGDNG by Zhenyu Wang · 15 years ago
  28. d05ca30 drm/i915: Zap the GTT mapping when transitioning from untiled to tiled. by Eric Anholt · 15 years ago
  29. b99e228 drm/i915: check for CONFIG_PNP before using pnp function by Keith Packard · 15 years ago
  30. 52dc7d3 drm/i915: Clear fence register on tiling stride change. by Chris Wilson · 15 years ago
  31. d765898 drm/i915: enable MCHBAR if needed by Jesse Barnes · 15 years ago
  32. 2cce0d8 drm/i915: Disable tiling on IGDNG for now by Zhenyu Wang · 15 years ago
  33. e76a16d drm/i915: Fix tiling pitch handling on 8xx. by Eric Anholt · 15 years ago
  34. 5b0bdd6 drm/i915: fix transition to I915_TILING_NONE by Keith Packard · 15 years ago
  35. 280b713 drm/i915: Allow tiling of objects with bit 17 swizzling by the CPU. by Eric Anholt · 15 years ago
  36. 8d7773a drm/i915: fix up tiling/fence reg setup on i8xx class hw by Daniel Vetter · 15 years ago
  37. 568d9a8 drm/i915: Change DCC tiling detection case to cover only mobile parts. by Eric Anholt · 15 years ago
  38. d687310 drm/i915: hold mutex for unreference() in i915_gem_tiling.c by Chris Wilson · 16 years ago
  39. 72daad4 drm/i915: Unref the object after failing to set tiling mode. by Chris Wilson · 16 years ago
  40. 0f973f2 drm/i915: add fence register management to execbuf by Jesse Barnes · 16 years ago
  41. de151cf drm/i915: add GEM GTT mapping support by Jesse Barnes · 16 years ago
  42. a7f014f drm/i915: Respect GM965/GM45 bit-17-instead-of-bit-11 option for swizzling. by Eric Anholt · 16 years ago
  43. b612eda i915: GM45 has GM965-style MCH setup. by Eric Anholt · 16 years ago
  44. 28af0a2 drm: G33-class hardware has a newer 965-style MCH (no DCC register). by Eric Anholt · 16 years ago
  45. 673a394 drm: Add GEM ("graphics execution manager") to i915 driver. by Eric Anholt · 16 years ago