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gerrit-public.fairphone.software / kernel / msm-4.9 / 23bd97eaebc55d5eef9d3cd41e3bd6189a0e9dd6 / drivers / clk
  1. c033654 clk: clk-fixed-factor: Clear OF_POPULATED flag in case of failure by Rajan Vaja · 6 years ago
  2. 59d4d41 clk: imx6ul: fix missing of_node_put() by Nicholas Mc Guire · 6 years ago
  3. 4678c00 clk: rockchip: Add pclk_rkpwm_pmu to PMU critical clocks in rk3399 by Levin Du · 6 years ago
  4. 072555e clk: rockchip: fix clk_i2sout parent selection bits on rk3399 by Alberto Panizzo · 6 years ago
  5. c0eb205 clk: at91: PLL recalc_rate() now using cached MUL and DIV values by Marcin Ziemianowicz · 7 years ago
  6. 676b002 clk: renesas: cpg-mssr: Stop using printk format %pCr by Geert Uytterhoeven · 6 years ago
  7. 515702e clk: samsung: exynos3250: Fix PLL rates by Andrzej Hajda · 7 years ago
  8. a5637e4 clk: samsung: exynos5250: Fix PLL rates by Andrzej Hajda · 7 years ago
  9. 8c76204 clk: samsung: exynos5433: Fix PLL rates by Andrzej Hajda · 7 years ago
  10. 1b287c3 clk: samsung: exynos5260: Fix PLL rates by Andrzej Hajda · 7 years ago
  11. 2434a06 clk: samsung: exynos7: Fix PLL rates by Andrzej Hajda · 7 years ago
  12. c2cc0c4 clk: samsung: s3c2410: Fix PLL rates by Andrzej Hajda · 7 years ago
  13. 1325a6c clk: rockchip: Prevent calculating mmc phase if clock rate is zero by Shawn Lin · 7 years ago
  14. eaab238d clk: tegra: Fix pll_u rate configuration by Marcel Ziswiler · 7 years ago
  15. 2c440ef clk: Don't show the incorrect clock phase by Shawn Lin · 7 years ago
  16. f19681d clk: rockchip: Fix wrong parent for SDMMC phase clock for rk3228 by Shawn Lin · 7 years ago
  17. 6af2423 clk: bcm2835: De-assert/assert PLL reset signal when appropriate by Boris Brezillon · 7 years ago
  18. 5971ee2 clk: fix false-positive Wmaybe-uninitialized warning by Arnd Bergmann · 7 years ago
  19. b2c89d8 clk: mvebu: armada-38x: add support for missing clocks by Richard Genoud · 7 years ago
  20. 1b22bdc clk: mvebu: armada-38x: add support for 1866MHz variants by Ralph Sennhauser · 7 years ago
  21. 2f9c90e clk: at91: fix clk-generated compilation by Alexandre Belloni · 7 years ago
  22. a81437a clk: meson: meson8b: add compatibles for Meson8 and Meson8m2 by Martin Blumenstingl · 7 years ago
  23. df17018 clk: Fix __set_clk_rates error print-string by Bryan O'Donoghue · 8 years ago
  24. 82a1909 clk: scpi: fix return type of __scpi_dvfs_round_rate by Sudeep Holla · 8 years ago
  25. 903ad1a clk: at91: fix clk-generated parenting by Alexandre Belloni · 8 years ago
  26. 0babe22 clk: renesas: rcar-gen2: Fix PLL0 on R-Car V2H and E2 by Geert Uytterhoeven · 8 years ago
  27. bdbd915 clk: sunxi-ng: a31: Fix CLK_OUT_* clock ops by Chen-Yu Tsai · 7 years ago
  28. 8f0dd27 clk: bcm2835: Protect sections updating shared registers by Boris Brezillon · 7 years ago
  29. beb9ece clk: bcm2835: Fix ana->maskX definitions by Boris Brezillon · 7 years ago
  30. bbdfb44 clk: migrate the count of orphaned clocks at init by Jerome Brunet · 7 years ago
  31. bc0e731 clk: si5351: Rename internal plls to avoid name collisions by Sergej Sawazki · 7 years ago
  32. c53ae7d clk: axi-clkgen: Correctly handle nocount bit in recalc_rate() by Lars-Peter Clausen · 7 years ago
  33. 9fd65f8 clk: Don't touch hardware when reparenting during registration by Stephen Boyd · 7 years ago
  34. cfa8803 clk: ns2: Correct SDIO bits by Bharat Kumar Reddy Gooty · 8 years ago
  35. a40eb9e clk: qcom: msm8916: fix mnd_width for codec_digcodec by Srinivas Kandagatla · 7 years ago
  36. 05fafb8 clk: meson: gxbb: fix wrong clock for SARADC/SANA by Yixun Lan · 7 years ago
  37. 59665fc clk: qcom: msm8996: Fix the vfe1 powerdomain name by Rajendra Nayak · 8 years ago
  38. e4f0069 clk: meson: gxbb: fix build error without RESET_CONTROLLER by Tobias Regnery · 8 years ago
  39. 89b6f09 clk: sunxi-ng: fix build error without CONFIG_RESET_CONTROLLER by Tobias Regnery · 8 years ago
  40. 2635a64 clk: sunxi: sun9i-mmc: Implement reset callback for reset controls by Chen-Yu Tsai · 7 years ago
  41. 5859027 clk: sunxi-ng: sun6i: Rename HDMI DDC clock to avoid name collision by Chen-Yu Tsai · 7 years ago
  42. 27f5597 clk: tegra: Fix cclk_lp divisor register by Michał Mirosław · 7 years ago
  43. 54809e3 clk: hi6220: mark clock cs_atb_syspll as critical by Leo Yan · 7 years ago
  44. 47b63ea clk: imx6: refine hdmi_isfr's parent to make HDMI work on i.MX6 SoCs w/o VPU by Sébastien Szymanski · 7 years ago
  45. d6b6302 clk: mediatek: add the option for determining PLL source clock by Chen Zhong · 7 years ago
  46. c488c2e clk: uniphier: fix DAPLL2 clock rate of Pro5 by Masahiro Yamada · 7 years ago
  47. 352d106 clk: qcom: ipq4019: Add all the frequencies for apss cpu by Abhishek Sahu · 8 years ago
  48. 5732d69 clk: sunxi-ng: fix PLL_CPUX adjusting on A33 by Icenowy Zheng · 8 years ago
  49. 7084a27 clk: sunxi-ng: A31: Fix spdif clock register by Marcus Cooper · 8 years ago
  50. 8a42130 clk: ti: dra7-atl-clock: fix child-node lookups by Johan Hovold · 7 years ago
  51. fa8f3a6 clk: mvebu: adjust AP806 CPU clock frequencies to production chip by Thomas Petazzoni · 8 years ago
  52. 872c075 clk: samsung: exynos5433: Add IDs for PHYCLK_MIPIDPHY0_* clocks by Marek Szyprowski · 8 years ago
  53. ceec837 clk: sunxi-ng: Check kzalloc() for errors and cleanup error path by Stephen Boyd · 7 years ago
  54. 952d3c5 clk/axs10x: Clear init field in driver probe by Jose Abreu · 8 years ago
  55. aa07a2c clk: sunxi-ng: fix PLL_CPUX adjusting on H3 by Ondrej Jirman · 8 years ago
  56. 99eb27d clk/samsung: exynos542x: mark some clocks as critical by Marek Szyprowski · 8 years ago
  57. 92e6667 clk: scpi: don't add cpufreq device if the scpi dvfs node is disabled by Sudeep Holla · 8 years ago
  58. 0e051f1 clk: sunxi-ng: a31: Correct lcd1-ch1 clock register offset by Chen-Yu Tsai · 8 years ago
  59. 52dd14d clk: rockchip: add "," to mux_pll_src_apll_dpll_gpll_usb480m_p on rk3036 by Heiko Stuebner · 8 years ago
  60. c9f6172 clk: Make x86/ conditional on CONFIG_COMMON_CLK by Pierre-Louis Bossart · 8 years ago
  61. e02a5d1 clk: lpc32xx: add a quirk for PWM and MS clock dividers by Vladimir Zapolskiy · 8 years ago
  62. 35ef543 clk: sunxi-ng: mp: Adjust parent rate for pre-dividers by Chen-Yu Tsai · 8 years ago
  63. 867f780 clk: sunxi-ng: sun6i: Fix enable bit offset for hdmi-ddc module clock by Chen-Yu Tsai · 8 years ago
  64. f4d40cf clk: bcm2835: Fix ->fixed_divider of pllh_aux by Boris Brezillon · 8 years ago
  65. b8ba5fa ARM: 8631/1: clkdev: Detect errors in clk_hw_register_clkdev() for mass registration by Geert Uytterhoeven · 8 years ago
  66. 54eed7a clk: renesas: mstp: Support 8-bit registers for r7s72100 by Chris Brandt · 8 years ago
  67. 5dd700e clk: imx31: fix rewritten input argument of mx31_clocks_init() by Vladimir Zapolskiy · 8 years ago
  68. 6c9f628 clk: sunxi-ng: sun8i-h3: Set CLK_SET_RATE_PARENT for audio module clocks by Chen-Yu Tsai · 8 years ago
  69. 36a6f70 clk: sunxi-ng: sun8i-a23: Set CLK_SET_RATE_PARENT for audio module clocks by Chen-Yu Tsai · 8 years ago
  70. 7af503c clk: ti: dra7: fix "failed to lookup clock node gmac_gmii_ref_clk_div" boot message by Grygorii Strashko · 8 years ago
  71. 411873a clk: clk-wm831x: fix a logic error by Pan Bian · 8 years ago
  72. e3b665e clk: qcom: ipq806x: Fix board clk rates by Stephen Boyd · 8 years ago
  73. 629138c clk: renesas: cpg-mssr: Fix inverted debug check by Geert Uytterhoeven · 8 years ago
  74. 05bc207 clk: bcm2835: Avoid overwriting the div info when disabling a pll_div clk by Boris Brezillon · 8 years ago
  75. 0de98ee clk: ti: omap36xx: Work around sprz319 advisory 2.1 by Richard Watts · 8 years ago
  76. f513581 Merge tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux by Linus Torvalds · 8 years ago
  77. b7d79eb clk: bcm: Fix unmet Kconfig dependencies for CLK_BCM_63XX by Florian Fainelli · 8 years ago
  78. 98fb2b9 clk: sunxi-ng: enable so-said LDOs for A33 SoC's pll-mipi clock by Icenowy Zheng · 8 years ago
  79. 95881a5 clk: sunxi-ng: sun6i-a31: Enable PLL-MIPI LDOs when ungating it by Chen-Yu Tsai · 8 years ago
  80. c861667 Merge tag 'sunxi-clk-fixes-for-4.9' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into clk-fixes by Stephen Boyd · 8 years ago
  81. bdfdabf clk: efm32gg: Pass correct type to hw provider registration by Stephen Boyd · 8 years ago
  82. 3ca0b51 clk: berlin: Pass correct type to hw provider registration by Stephen Boyd · 8 years ago
  83. ac95330 clk: sunxi: Fix M factor computation for APB1 by Stéphan Rafin · 8 years ago
  84. 10f2bfb clk: mmp: pxa910: fix return value check in pxa910_clk_init() by Wei Yongjun · 8 years ago
  85. deab0726 clk: mmp: pxa168: fix return value check in pxa168_clk_init() by Wei Yongjun · 8 years ago
  86. a29e52a clk: mmp: mmp2: fix return value check in mmp2_clk_init() by Wei Yongjun · 8 years ago
  87. 7c1c541 clk: qoriq: Don't allow CPU clocks higher than starting value by Scott Wood · 8 years ago
  88. c712937 Merge tag 'v4.9-rockchip-clkfixes1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into clk-fixes by Stephen Boyd · 8 years ago
  89. 5c2f117 clk: imx: fix integer overflow in AV PLL round rate by Emil Lundmark · 8 years ago
  90. 06b113e clk: xgene: Don't call __pa on ioremaped address by Laura Abbott · 8 years ago
  91. 5c4a912 clk/samsung: Use CLK_OF_DECLARE_DRIVER initialization method for CLKOUT by Marek Szyprowski · 8 years ago
  92. 91bbc17 clk: at91: Fix a return value in case of error by Christophe JAILLET · 8 years ago
  93. 5c6201e clk: uniphier: rename MIO clock to SD clock for Pro5, PXs2, LD20 SoCs by Masahiro Yamada · 8 years ago
  94. 7d36b9c clk: uniphier: fix memory overrun bug by Masahiro Yamada · 8 years ago
  95. a17b9e4 clk: sunxi-ng: sun6i-a31: Force AHB1 clock to use PLL6 as parent by Chen-Yu Tsai · 8 years ago
  96. d339748 clk: hi6220: use CLK_OF_DECLARE_DRIVER for sysctrl and mediactrl clock init by Shawn Guo · 8 years ago
  97. 4aa6c99 clk: mvebu: armada-37xx-periph: Fix the clock gate flag by Gregory CLEMENT · 8 years ago
  98. c4e634c clk: bcm2835: Clamp the PLL's requested rate to the hardware limits. by Eric Anholt · 8 years ago
  99. 1c70322 clk: max77686: fix number of clocks setup for clk_hw based registration by Javier Martinez Canillas · 8 years ago
  100. 981e1be clk: mvebu: armada-37xx-periph: Fix the clock provider registration by Gregory CLEMENT · 8 years ago