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gerrit-public.fairphone.software
/
kernel
/
msm-4.9
/
2493f21f56316ad55508f173463ebf0b3f0a15bb
/
drivers
/
gpu
/
drm
/
i915
/
intel_dsi_pll.c
ce0c982
drm/i915/bxt: get DSI pixelclock
by Shashank Sharma
· 9 years ago
b389a45
drm/i915/bxt: DSI disable and post-disable
by Shashank Sharma
· 9 years ago
11b8e4f
drm/i915/bxt: Program Tx Rx and Dphy clocks
by Shashank Sharma
· 9 years ago
fe88fc6
drm/i915/bxt: Disable DSI PLL for BXT
by Shashank Sharma
· 9 years ago
cfe01a5
drm/i915/bxt: Enable BXT DSI PLL
by Shashank Sharma
· 9 years ago
20dbe1a
drm/i915: Changes required to enable DSI Video Mode on CHT
by Gaurav K Singh
· 9 years ago
3c5c6d8
drm/i915: Support for higher DSI clk
by Gaurav K Singh
· 9 years ago
260c1ad
drm/i915/dsi: abstract dsi bpp derivation from pixel format
by Jani Nikula
· 9 years ago
a580516
drm/i915: s/dpio_lock/sb_lock/
by Ville Syrjälä
· 9 years ago
a856c5b
drm/i915/dsi: add support for DSI PLL N1 divisor values
by Jani Nikula
· 9 years ago
7471bf4
drm/i915: clean up dsi pll calculation
by Jani Nikula
· 9 years ago
3c860ab
drm/i915: Use DSI Pll1 for enabling MIPI DSI on Port C
by Gaurav K Singh
· 10 years ago
3770f0e
drm/i915: cck reg used for checking DSI Pll locked
by Gaurav K Singh
· 10 years ago
58cf888
drm/i915: Enable DSI PLL for both DSI0 and DSI1 in case of dual link
by Gaurav K Singh
· 10 years ago
7f3de83
drm/i915: Align intel_dsi*.c files a bit
by Daniel Vetter
· 10 years ago
7f0c860
drm/i915: Add support for Video Burst Mode for MIPI DSI
by Shobhit Kumar
· 10 years ago
f573de5
drm/i915: Add correct hw/sw config check for DSI encoder
by Shobhit Kumar
· 10 years ago
8e1eed5
drm/i915: Try harder to get best m, n, p values with minimal error
by Shobhit Kumar
· 11 years ago
44d4c6e
drm/i915: Compute dsi_clk from pixel clock
by Shobhit Kumar
· 11 years ago
a748214
drm/i915: Use adjusted_mode in DSI PLL calculations
by Ville Syrjälä
· 11 years ago
be4fc04
drm/i915: add VLV DSI PLL Calculations
by ymohanma
· 11 years ago